mpc85xx: fix up kernel config and make the target boot on the MPC8568E-MDS-PB board

[openwrt.git] / target / linux / generic / files / drivers / net / phy / rtl8366rb.c

diff --git a/target/linux/generic/files/drivers/net/phy/rtl8366rb.c b/target/linux/generic/files/drivers/net/phy/rtl8366rb.c
index 7db3e65..55731ba 100644 (file)
--- a/target/linux/generic/files/drivers/net/phy/rtl8366rb.c
+++ b/target/linux/generic/files/drivers/net/phy/rtl8366rb.c
@@ -1,5 +1,5 @@
 /*
- * Platform driver for the Realtek RTL8366S ethernet switch
+ * Platform driver for the Realtek RTL8366RB ethernet switch
  *
  * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
  * Copyright (C) 2010 Antti Seppälä <a.seppala@gmail.com>
@@ -21,11 +21,12 @@
 #include "rtl8366_smi.h"
 
 #define RTL8366RB_DRIVER_DESC  "Realtek RTL8366RB ethernet switch driver"
-#define RTL8366RB_DRIVER_VER   "0.2.2"
+#define RTL8366RB_DRIVER_VER   "0.2.3"
 
 #define RTL8366RB_PHY_NO_MAX   4
 #define RTL8366RB_PHY_PAGE_MAX 7
 #define RTL8366RB_PHY_ADDR_MAX 31
+#define RTL8366RB_PHY_WAN      4
 
 /* Switch Global Configuration register */
 #define RTL8366RB_SGCR                         0x0000
@@ -181,7 +182,7 @@
 #define RTL8366RB_EB_PREIFG_MASK       (1 << RTL8366RB_EB_PREIFG_OFFSET)
 
 #define RTL8366RB_BDTH_SW_MAX          1048512
-#define RTL8366RB_BDTH_BASE            64
+#define RTL8366RB_BDTH_UNIT            64
 #define RTL8366RB_BDTH_REG_DEFAULT     16383
 
 /* QOS */
@@ -824,7 +825,7 @@ static int rtl8366rb_sw_set_port_rate_in(struct switch_dev *dev,
                return -EINVAL;
 
        if (val->value.i > 0 && val->value.i < RTL8366RB_BDTH_SW_MAX)
-               val->value.i = (val->value.i - 1) / RTL8366RB_BDTH_BASE;
+               val->value.i = (val->value.i - 1) / RTL8366RB_BDTH_UNIT;
        else
                val->value.i = RTL8366RB_BDTH_REG_DEFAULT;
 
@@ -850,7 +851,7 @@ static int rtl8366rb_sw_get_port_rate_in(struct switch_dev *dev,
        if (data < RTL8366RB_IB_BDTH_MASK)
                data += 1;
 
-       val->value.i = (int)data * RTL8366RB_BDTH_BASE;
+       val->value.i = (int)data * RTL8366RB_BDTH_UNIT;
 
        return 0;
 }
@@ -869,7 +870,7 @@ static int rtl8366rb_sw_set_port_rate_out(struct switch_dev *dev,
                (RTL8366RB_QOS_DEFAULT_PREIFG << RTL8366RB_EB_PREIFG_OFFSET));
 
        if (val->value.i > 0 && val->value.i < RTL8366RB_BDTH_SW_MAX)
-               val->value.i = (val->value.i - 1) / RTL8366RB_BDTH_BASE;
+               val->value.i = (val->value.i - 1) / RTL8366RB_BDTH_UNIT;
        else
                val->value.i = RTL8366RB_BDTH_REG_DEFAULT;
 
@@ -893,7 +894,7 @@ static int rtl8366rb_sw_get_port_rate_out(struct switch_dev *dev,
        if (data < RTL8366RB_EB_BDTH_MASK)
                data += 1;
 
-       val->value.i = (int)data * RTL8366RB_BDTH_BASE;
+       val->value.i = (int)data * RTL8366RB_BDTH_UNIT;
 
        return 0;
 }
@@ -1064,6 +1065,13 @@ static struct switch_attr rtl8366rb_vlan[] = {
                .max = 1,
                .set = NULL,
                .get = rtl8366_sw_get_vlan_info,
+       }, {
+               .type = SWITCH_TYPE_INT,
+               .name = "fid",
+               .description = "Get/Set vlan FID",
+               .max = RTL8366RB_FIDMAX,
+               .set = rtl8366_sw_set_vlan_fid,
+               .get = rtl8366_sw_get_vlan_fid,
        },
 };
 
@@ -1208,7 +1216,7 @@ static struct rtl8366_smi_ops rtl8366rb_smi_ops = {
        .enable_vlan4k  = rtl8366rb_enable_vlan4k,
 };
 
-static int __init rtl8366rb_probe(struct platform_device *pdev)
+static int __devinit rtl8366rb_probe(struct platform_device *pdev)
 {
        static int rtl8366_smi_version_printed;
        struct rtl8366rb_platform_data *pdata;
@@ -1272,6 +1280,10 @@ static int rtl8366rb_phy_config_init(struct phy_device *phydev)
 
 static int rtl8366rb_phy_config_aneg(struct phy_device *phydev)
 {
+       /* phy 4 might be connected to a second mac, allow aneg config */
+       if (phydev->addr == RTL8366RB_PHY_WAN)
+               return genphy_config_aneg(phydev);
+
        return 0;
 }