X-Git-Url: https://git.rohieb.name/openwrt.git/blobdiff_plain/022e126a6b8c27220f3f0ec2475d1610f38ec713..ae2566d99ca3e1cd82660434ba5078eaa9ec2cd9:/target/linux/ixp4xx/patches-2.6.26/105-wg302v1_support.patch

diff --git a/target/linux/ixp4xx/patches-2.6.26/105-wg302v1_support.patch b/target/linux/ixp4xx/patches-2.6.26/105-wg302v1_support.patch
index 102342322..70c91db63 100644
--- a/target/linux/ixp4xx/patches-2.6.26/105-wg302v1_support.patch
+++ b/target/linux/ixp4xx/patches-2.6.26/105-wg302v1_support.patch
@@ -112,7 +112,7 @@
 +subsys_initcall(wg302v1_pci_init);
 --- /dev/null
 +++ b/arch/arm/mach-ixp4xx/wg302v1-setup.c
-@@ -0,0 +1,126 @@
+@@ -0,0 +1,142 @@
 +/*
 + * arch/arm/mach-ixp4xx/wg302v1-setup.c
 + *
@@ -163,10 +163,17 @@
 +	.resource	= &wg302v1_flash_resource,
 +};
 +
-+static struct resource wg302v1_uart_resource = {
-+	.start	= IXP4XX_UART1_BASE_PHYS,
-+	.end	= IXP4XX_UART1_BASE_PHYS + 0x0fff,
-+	.flags	= IORESOURCE_MEM,
++static struct resource wg302v1_uart_resources[] = {
++	{
++		.start	= IXP4XX_UART1_BASE_PHYS,
++		.end	= IXP4XX_UART1_BASE_PHYS + 0x0fff,
++		.flags	= IORESOURCE_MEM,
++	},
++	{
++		.start	= IXP4XX_UART2_BASE_PHYS,
++		.end	= IXP4XX_UART2_BASE_PHYS + 0x0fff,
++		.flags	= IORESOURCE_MEM,
++	}
 +};
 +
 +static struct plat_serial8250_port wg302v1_uart_data[] = {
@@ -179,6 +186,15 @@
 +		.regshift	= 2,
 +		.uartclk	= IXP4XX_UART_XTAL,
 +	},
++	{
++		.mapbase	= IXP4XX_UART2_BASE_PHYS,
++		.membase	= (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
++		.irq		= IRQ_IXP4XX_UART2,
++		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
++		.iotype		= UPIO_MEM,
++		.regshift	= 2,
++		.uartclk	= IXP4XX_UART_XTAL,
++	},
 +	{ },
 +};
 +
@@ -188,8 +204,8 @@
 +	.dev			= {
 +		.platform_data	= wg302v1_uart_data,
 +	},
-+	.num_resources	= 1,
-+	.resource	= &wg302v1_uart_resource,
++	.num_resources	= 2,
++	.resource	= wg302v1_uart_resources,
 +};
 +
 +static struct eth_plat_info wg302v1_plat_eth[] = {