X-Git-Url: https://git.rohieb.name/openwrt.git/blobdiff_plain/04aff2e833edde651fb7b4792439d9e05fbfaee2..a24dd9c82ff999fecc52aee985beb51271d1995a:/target/linux/atheros/patches-2.6.30/100-board.patch diff --git a/target/linux/atheros/patches-2.6.30/100-board.patch b/target/linux/atheros/patches-2.6.30/100-board.patch index 052e887d2..5f5129371 100644 --- a/target/linux/atheros/patches-2.6.30/100-board.patch +++ b/target/linux/atheros/patches-2.6.30/100-board.patch @@ -4,7 +4,7 @@ help Support for BCM47XX based boards -+config ATHEROS ++config ATHEROS_AR231X + bool "Atheros 231x/531x SoC support" + select CEVT_R4K + select CSRC_R4K @@ -20,7 +20,7 @@ config MIPS_COBALT bool "Cobalt Server" select CEVT_R4K -@@ -632,6 +645,7 @@ config CAVIUM_OCTEON_REFERENCE_BOARD +@@ -633,6 +646,7 @@ config CAVIUM_OCTEON_REFERENCE_BOARD endchoice @@ -30,15 +30,15 @@ source "arch/mips/jazz/Kconfig" --- a/arch/mips/Makefile +++ b/arch/mips/Makefile -@@ -290,6 +290,13 @@ libs-$(CONFIG_MIPS_XXS1500) += arch/mips +@@ -283,6 +283,13 @@ libs-$(CONFIG_MIPS_XXS1500) += arch/mips load-$(CONFIG_MIPS_XXS1500) += 0xffffffff80100000 # +# Atheros AR5312/AR2312 WiSoC +# -+core-$(CONFIG_ATHEROS) += arch/mips/ar231x/ -+cflags-$(CONFIG_ATHEROS) += -I$(srctree)/arch/mips/include/asm/mach-ar231x -+load-$(CONFIG_ATHEROS) += 0xffffffff80041000 ++core-$(CONFIG_ATHEROS_AR231X) += arch/mips/ar231x/ ++cflags-$(CONFIG_ATHEROS_AR231X) += -I$(srctree)/arch/mips/include/asm/mach-ar231x ++load-$(CONFIG_ATHEROS_AR231X) += 0xffffffff80041000 + +# # Cobalt Server @@ -49,12 +49,12 @@ @@ -0,0 +1,17 @@ +config ATHEROS_AR5312 + bool "Atheros 5312/2312+ support" -+ depends on ATHEROS ++ depends on ATHEROS_AR231X + default y + +config ATHEROS_AR2315 + bool "Atheros 2315+ support" -+ depends on ATHEROS ++ depends on ATHEROS_AR231X + select DMA_NONCOHERENT + select CEVT_R4K + select CSRC_R4K @@ -2105,7 +2105,7 @@ + --- /dev/null +++ b/arch/mips/ar231x/ar2315.c -@@ -0,0 +1,643 @@ +@@ -0,0 +1,658 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive @@ -2163,6 +2163,10 @@ + if (!pend) + ar231x_write_reg(AR2315_ISR, AR2315_ISR_GPIO); + ++ /* Enable interrupt with edge detection */ ++ if ((ar231x_read_reg(AR2315_GPIO_CR) & AR2315_GPIO_CR_M(bit)) != AR2315_GPIO_CR_I(bit)) ++ return; ++ + if (bit >= 0) + do_IRQ(AR531X_GPIO_IRQ_BASE + bit); +} @@ -2220,14 +2224,24 @@ +{ + unsigned int gpio = irq - AR531X_GPIO_IRQ_BASE; + -+ /* reconfigure GPIO line as input */ -+ ar231x_mask_reg(AR2315_GPIO_CR, AR2315_GPIO_CR_M(gpio), AR2315_GPIO_CR_I(gpio)); -+ + /* Enable interrupt with edge detection */ ++ if ((ar231x_read_reg(AR2315_GPIO_CR) & AR2315_GPIO_CR_M(gpio)) != AR2315_GPIO_CR_I(gpio)) ++ return; ++ + gpiointmask |= (1 << gpio); + ar2315_set_gpiointmask(gpio, 3); +} + ++static unsigned int ar2315_gpio_intr_startup(unsigned int irq) ++{ ++ unsigned int gpio = irq - AR531X_GPIO_IRQ_BASE; ++ ++ /* reconfigure GPIO line as input */ ++ ar231x_mask_reg(AR2315_GPIO_CR, AR2315_GPIO_CR_M(gpio), AR2315_GPIO_CR_I(gpio)); ++ ar2315_gpio_intr_enable(irq); ++ return 0; ++} ++ +static void ar2315_gpio_intr_disable(unsigned int irq) +{ + unsigned int gpio = irq - AR531X_GPIO_IRQ_BASE; @@ -2246,6 +2260,7 @@ + +static struct irq_chip ar2315_gpio_intr_controller = { + .typename = "AR2315-GPIO", ++ .startup = ar2315_gpio_intr_startup, + .ack = ar2315_gpio_intr_disable, + .mask_ack = ar2315_gpio_intr_disable, + .mask = ar2315_gpio_intr_disable, @@ -2929,7 +2944,7 @@ +#endif --- /dev/null +++ b/arch/mips/ar231x/devices.c -@@ -0,0 +1,174 @@ +@@ -0,0 +1,175 @@ +#include +#include +#include @@ -2945,6 +2960,7 @@ +struct ar231x_board_config ar231x_board; +int ar231x_devtype = DEV_TYPE_UNKNOWN; +const struct ar231x_gpiodev *ar231x_gpiodev; ++EXPORT_SYMBOL(ar231x_gpiodev); + +static struct resource ar231x_eth0_res[] = { + {