X-Git-Url: https://git.rohieb.name/openwrt.git/blobdiff_plain/094507e8fede9ed92407b1684d7e7106a94a7644..69c62c65e7dcacc5b98ff80292ae0f4043010257:/package/mac80211/patches/201-ath5k-WAR-for-AR71xx-PCI-bug.patch?ds=inline

diff --git a/package/mac80211/patches/201-ath5k-WAR-for-AR71xx-PCI-bug.patch b/package/mac80211/patches/201-ath5k-WAR-for-AR71xx-PCI-bug.patch
index b72c5bd82..b216b9dbe 100644
--- a/package/mac80211/patches/201-ath5k-WAR-for-AR71xx-PCI-bug.patch
+++ b/package/mac80211/patches/201-ath5k-WAR-for-AR71xx-PCI-bug.patch
@@ -1,32 +1,38 @@
---- a/drivers/net/wireless/ath/ath5k/reset.c
-+++ b/drivers/net/wireless/ath/ath5k/reset.c
-@@ -1370,8 +1370,14 @@ int ath5k_hw_reset(struct ath5k_hw *ah, 
- 	if (ah->ah_version != AR5K_AR5210) {
- 		AR5K_REG_WRITE_BITS(ah, AR5K_TXCFG,
- 			AR5K_TXCFG_SDMAMR, AR5K_DMASIZE_128B);
-+#ifndef CONFIG_ATHEROS_AR71XX
- 		AR5K_REG_WRITE_BITS(ah, AR5K_RXCFG,
- 			AR5K_RXCFG_SDMAMW, AR5K_DMASIZE_128B);
-+#else
-+		/* WAR for AR71xx PCI bug */
-+		AR5K_REG_WRITE_BITS(ah, AR5K_RXCFG,
-+			AR5K_RXCFG_SDMAMW, AR5K_DMASIZE_4B);
-+#endif
- 	}
- 
- 	/* Pre-enable interrupts on 5211/5212*/
 --- a/drivers/net/wireless/ath/ath5k/initvals.c
 +++ b/drivers/net/wireless/ath/ath5k/initvals.c
-@@ -59,7 +59,12 @@ static const struct ath5k_ini ar5210_ini
+@@ -58,8 +58,14 @@ static const struct ath5k_ini ar5210_ini
+ 	{ AR5K_IMR,		0 },
  	{ AR5K_IER,		AR5K_IER_DISABLE },
  	{ AR5K_BSR,		0, AR5K_INI_READ },
- 	{ AR5K_TXCFG,		AR5K_DMASIZE_128B },
 +#ifndef CONFIG_ATHEROS_AR71XX
+ 	{ AR5K_TXCFG,		AR5K_DMASIZE_128B },
  	{ AR5K_RXCFG,		AR5K_DMASIZE_128B },
 +#else
 +	/* WAR for AR71xx PCI bug */
++	{ AR5K_TXCFG,		AR5K_DMASIZE_4B },
 +	{ AR5K_RXCFG,		AR5K_DMASIZE_4B },
 +#endif
  	{ AR5K_CFG,		AR5K_INIT_CFG },
  	{ AR5K_TOPS,		8 },
  	{ AR5K_RXNOFRM,		8 },
+--- a/drivers/net/wireless/ath/ath5k/dma.c
++++ b/drivers/net/wireless/ath/ath5k/dma.c
+@@ -787,10 +787,18 @@ void ath5k_hw_dma_init(struct ath5k_hw *
+ 	 * guess we can tweak it and see how it goes ;-)
+ 	 */
+ 	if (ah->ah_version != AR5K_AR5210) {
++#ifndef CONFIG_ATHEROS_AR71XX
+ 		AR5K_REG_WRITE_BITS(ah, AR5K_TXCFG,
+ 			AR5K_TXCFG_SDMAMR, AR5K_DMASIZE_128B);
+ 		AR5K_REG_WRITE_BITS(ah, AR5K_RXCFG,
+ 			AR5K_RXCFG_SDMAMW, AR5K_DMASIZE_128B);
++#else
++		/* WAR for AR71xx PCI bug */
++		AR5K_REG_WRITE_BITS(ah, AR5K_TXCFG,
++			AR5K_TXCFG_SDMAMR, AR5K_DMASIZE_4B);
++		AR5K_REG_WRITE_BITS(ah, AR5K_RXCFG,
++			AR5K_RXCFG_SDMAMW, AR5K_DMASIZE_4B);
++#endif
+ 	}
+ 
+ 	/* Pre-enable interrupts on 5211/5212*/