X-Git-Url: https://git.rohieb.name/openwrt.git/blobdiff_plain/17bba1a8f677463d167bff354036fb3f0f04160e..818a5943dcc3648dc438194a3e16efddee9d4827:/target/linux/brcm47xx/patches-2.6.25/220-bcm5354.patch diff --git a/target/linux/brcm47xx/patches-2.6.25/220-bcm5354.patch b/target/linux/brcm47xx/patches-2.6.25/220-bcm5354.patch index 6e6f10e4c..6a4341fed 100644 --- a/target/linux/brcm47xx/patches-2.6.25/220-bcm5354.patch +++ b/target/linux/brcm47xx/patches-2.6.25/220-bcm5354.patch @@ -1,7 +1,5 @@ -Index: linux-2.6.25.4/drivers/ssb/driver_chipcommon.c -=================================================================== ---- linux-2.6.25.4.orig/drivers/ssb/driver_chipcommon.c -+++ linux-2.6.25.4/drivers/ssb/driver_chipcommon.c +--- a/drivers/ssb/driver_chipcommon.c ++++ b/drivers/ssb/driver_chipcommon.c @@ -270,6 +270,8 @@ void ssb_chipco_resume(struct ssb_chipco void ssb_chipco_get_clockcpu(struct ssb_chipcommon *cc, u32 *plltype, u32 *n, u32 *m) @@ -20,10 +18,8 @@ Index: linux-2.6.25.4/drivers/ssb/driver_chipcommon.c *n = chipco_read32(cc, SSB_CHIPCO_CLOCK_N); *plltype = (cc->capabilities & SSB_CHIPCO_CAP_PLLT); switch (*plltype) { -Index: linux-2.6.25.4/drivers/ssb/driver_mipscore.c -=================================================================== ---- linux-2.6.25.4.orig/drivers/ssb/driver_mipscore.c -+++ linux-2.6.25.4/drivers/ssb/driver_mipscore.c +--- a/drivers/ssb/driver_mipscore.c ++++ b/drivers/ssb/driver_mipscore.c @@ -161,6 +161,8 @@ u32 ssb_cpu_clock(struct ssb_mipscore *m if ((pll_type == SSB_PLLTYPE_5) || (bus->chip_id == 0x5365)) { @@ -33,10 +29,8 @@ Index: linux-2.6.25.4/drivers/ssb/driver_mipscore.c } else { rate = ssb_calc_clock_rate(pll_type, n, m); } -Index: linux-2.6.25.4/drivers/ssb/main.c -=================================================================== ---- linux-2.6.25.4.orig/drivers/ssb/main.c -+++ linux-2.6.25.4/drivers/ssb/main.c +--- a/drivers/ssb/main.c ++++ b/drivers/ssb/main.c @@ -867,6 +867,8 @@ u32 ssb_clockspeed(struct ssb_bus *bus) if (bus->chip_id == 0x5365) {