X-Git-Url: https://git.rohieb.name/openwrt.git/blobdiff_plain/1a35b7c84e9494409a1c22920a7ae3e7cb65bae7..b1f3482e708d8d7e2088e80144b09c4c51b07431:/target/linux/lantiq/patches/400-mach-arv45xx.patch

diff --git a/target/linux/lantiq/patches/400-mach-arv45xx.patch b/target/linux/lantiq/patches/400-mach-arv45xx.patch
index 419c9ae55..4da4c9859 100644
--- a/target/linux/lantiq/patches/400-mach-arv45xx.patch
+++ b/target/linux/lantiq/patches/400-mach-arv45xx.patch
@@ -1,11 +1,12 @@
 --- a/arch/mips/include/asm/mach-lantiq/machine.h
 +++ b/arch/mips/include/asm/mach-lantiq/machine.h
-@@ -11,4 +11,14 @@
+@@ -11,4 +11,15 @@
  	LANTIQ_MACH_EASY4010,		/* Twinpass evalkit */
  	LANTIQ_MACH_EASY50712,		/* Danube evalkit */
  	LANTIQ_MACH_EASY50812,		/* AR9 eval board */
 +
 +	/* Arcadyan */
++	LANTIQ_MACH_ARV3527P,		/* Arcor easybox a401 */
 +	LANTIQ_MACH_ARV4510PW,		/* Wippies Homebox */
 +	LANTIQ_MACH_ARV4518PW,		/* Airties WAV-221, SMC-7908A-ISP */
 +	LANTIQ_MACH_ARV4520PW,		/* Airties WAV-281, Arcor EasyboxA800 */
@@ -37,7 +38,7 @@
 +obj-$(CONFIG_LANTIQ_MACH_ARV45XX) += mach-arv45xx.o
 --- /dev/null
 +++ b/arch/mips/lantiq/xway/mach-arv45xx.c
-@@ -0,0 +1,465 @@
+@@ -0,0 +1,537 @@
 +/*
 + *  This program is free software; you can redistribute it and/or modify it
 + *  under the terms of the GNU General Public License version 2 as published
@@ -56,6 +57,8 @@
 +#include <linux/mtd/physmap.h>
 +#include <linux/input.h>
 +#include <linux/etherdevice.h>
++#include <linux/ath5k_platform.h>
++#include <linux/pci.h>
 +
 +#include <machine.h>
 +
@@ -66,7 +69,7 @@
 +#include "dev-dwc_otg.h"
 +
 +#ifdef CONFIG_MTD_PARTITIONS
-+static struct mtd_partition arv45xx_partitions[] =
++static struct mtd_partition arv4510_partitions[] =
 +{
 +	{
 +		.name	= "uboot",
@@ -76,36 +79,36 @@
 +	{
 +		.name	= "uboot_env",
 +		.offset	= 0x20000,
-+		.size	= 0x10000,
++		.size	= 0x120000,
 +	},
 +	{
 +		.name	= "linux",
-+		.offset	= 0x30000,
-+		.size	= 0x3c0000,
++		.offset	= 0x40000,
++		.size	= 0xfa0000,
 +	},
 +	{
 +		.name	= "board_config",
-+		.offset	= 0x3f0000,
-+		.size	= 0x10000,
++		.offset	= 0xfe0000,
++		.size	= 0x20000,
 +	},
 +};
 +
-+static struct mtd_partition arv4518_partitions[] =
++static struct mtd_partition arv45xx_partitions[] =
 +{
 +	{
 +		.name	= "uboot",
 +		.offset	= 0x0,
-+		.size	= 0x40000,
++		.size	= 0x20000,
 +	},
 +	{
 +		.name	= "uboot_env",
-+		.offset	= 0x40000,
++		.offset	= 0x20000,
 +		.size	= 0x10000,
 +	},
 +	{
 +		.name	= "linux",
-+		.offset	= 0x50000,
-+		.size	= 0x3a0000,
++		.offset	= 0x30000,
++		.size	= 0x3c0000,
 +	},
 +	{
 +		.name	= "board_config",
@@ -119,17 +122,17 @@
 +	{
 +		.name	= "uboot",
 +		.offset	= 0x0,
-+		.size	= 0x40000,
++		.size	= 0x10000,
 +	},
 +	{
 +		.name	= "uboot_env",
-+		.offset	= 0x40000,
++		.offset	= 0x10000,
 +		.size	= 0x10000,
 +	},
 +	{
 +		.name	= "linux",
-+		.offset	= 0x50000,
-+		.size	= 0x7a0000,
++		.offset	= 0x20000,
++		.size	= 0x7d0000,
 +	},
 +	{
 +		.name	= "board_config",
@@ -140,17 +143,17 @@
 +
 +#endif
 +
-+static struct physmap_flash_data arv45xx_flash_data = {
++static struct physmap_flash_data arv4510_flash_data = {
 +#ifdef CONFIG_MTD_PARTITIONS
-+	.nr_parts	= ARRAY_SIZE(arv45xx_partitions),
-+	.parts		= arv45xx_partitions,
++	.nr_parts	= ARRAY_SIZE(arv4510_partitions),
++	.parts		= arv4510_partitions,
 +#endif
 +};
 +
-+static struct physmap_flash_data arv4518_flash_data = {
++static struct physmap_flash_data arv45xx_flash_data = {
 +#ifdef CONFIG_MTD_PARTITIONS
-+	.nr_parts	= ARRAY_SIZE(arv4518_partitions),
-+	.parts		= arv4518_partitions,
++	.nr_parts	= ARRAY_SIZE(arv45xx_partitions),
++	.parts		= arv45xx_partitions,
 +#endif
 +};
 +
@@ -315,6 +318,65 @@
 +	lq_register_ethernet(&lq_eth_data);
 +}
 +
++static u16 arv45xx_ath5k_eeprom_data[ATH5K_PLAT_EEP_MAX_WORDS];
++static struct ath5k_platform_data arv45xx_ath5k_platform_data;
++
++static int arv45xx_pci_plat_dev_init(struct pci_dev *dev)
++{
++	dev->dev.platform_data = &arv45xx_ath5k_platform_data;
++	return 0;
++}
++
++void __init
++arv45xx_register_ath5k(void)
++{
++#define ARV45XX_BRN_ATH		0x3f0478
++	int i;
++	unsigned char eeprom_mac[6];
++	static u16 eeprom_data[ATH5K_PLAT_EEP_MAX_WORDS];
++	u32 *p = (u32*)arv45xx_ath5k_eeprom_data;
++
++	memcpy_fromio(eeprom_mac,
++		(void *)KSEG1ADDR(LQ_FLASH_START + ARV45XX_BRN_MAC), 6);
++	eeprom_mac[5]++;
++	memcpy_fromio(arv45xx_ath5k_eeprom_data,
++		(void *)KSEG1ADDR(LQ_FLASH_START + ARV45XX_BRN_ATH), ATH5K_PLAT_EEP_MAX_WORDS);
++	// swap eeprom bytes
++	for (i = 0; i < ATH5K_PLAT_EEP_MAX_WORDS>>1; i++){
++		//arv4518_ath5k_eeprom_data[i] = ((eeprom_data[i]&0xff)<<8)|((eeprom_data[i]&0xff00)>>8);
++		p[i] = ((eeprom_data[(i<<1)+1]&0xff)<<24)|((eeprom_data[(i<<1)+1]&0xff00)<<8)|((eeprom_data[i<<1]&0xff)<<8)|((eeprom_data[i<<1]&0xff00)>>8);
++		if (i == 0xbf>>1){
++			// printk ("regdomain: 0x%x --> 0x%x\n", p[i], (p[i] & 0xffff0000)|0x67);
++			/* regdomain is invalid?? how did original fw convert 
++			* value to 0x82d4 ??
++			* for now, force to 0x67 */
++			p[i] &= 0xffff0000;
++			p[i] |= 0x67;
++		}
++	}
++	arv45xx_ath5k_platform_data.eeprom_data = arv45xx_ath5k_eeprom_data;
++	arv45xx_ath5k_platform_data.macaddr = eeprom_mac;
++	lqpci_plat_dev_init = arv45xx_pci_plat_dev_init;
++}
++
++static void __init
++arv3527p_init(void)
++{
++	lq_register_gpio();
++	lq_register_gpio_stp();
++	//lq_register_gpio_leds(arv3527p_leds_gpio, ARRAY_SIZE(arv3527p_leds_gpio));
++	lq_register_asc(0);
++	lq_register_asc(1);
++	lq_register_nor(&arv45xx_flash_data);
++	lq_register_wdt();
++	arv45xx_register_ethernet();
++}
++
++MIPS_MACHINE(LANTIQ_MACH_ARV3527P,
++			"ARV3527P",
++			"ARV3527P - Arcor Easybox 401",
++			arv3527p_init);
++
 +static void __init
 +arv4510pw_init(void)
 +{
@@ -323,10 +385,10 @@
 +	lq_register_gpio_leds(arv4510pw_leds_gpio, ARRAY_SIZE(arv4510pw_leds_gpio));
 +	lq_register_asc(0);
 +	lq_register_asc(1);
-+	lq_register_nor(&arv45xx_flash_data);
-+	lq_register_pci(&lq_pci_data);
-+	lq_pci_data.irq[15] = (INT_NUM_IM2_IRL0 + 31);
-+	lq_pci_data.gpio |= PCI_EXIN1 | PCI_REQ2;
++	lq_register_nor(&arv4510_flash_data);
++	lq_pci_data.irq[12] = (INT_NUM_IM2_IRL0 + 31);
++	lq_pci_data.irq[15] = (INT_NUM_IM0_IRL0 + 26);
++	lq_pci_data.gpio |= PCI_EXIN2 | PCI_REQ2;
 +	lq_register_pci(&lq_pci_data);
 +	lq_register_wdt();
 +	bewan_register_ethernet();
@@ -350,12 +412,14 @@
 +	lq_register_gpio_buttons(arv4518pw_gpio_buttons, ARRAY_SIZE(arv4518pw_gpio_buttons));
 +	lq_register_asc(0);
 +	lq_register_asc(1);
-+	lq_register_nor(&arv4518_flash_data);
++	lq_register_nor(&arv45xx_flash_data);
 +	lq_pci_data.gpio = PCI_GNT2 | PCI_REQ2;
 +	lq_register_pci(&lq_pci_data);
 +	lq_register_wdt();
-+	arv45xx_register_ethernet();
++	lq_register_madwifi_eep();
 +	xway_register_dwc(ARV4518PW_USB);
++	arv45xx_register_ethernet();
++	arv45xx_register_ath5k();
 +
 +	gpio_request(ARV4518PW_SWITCH_RESET, "switch");
 +	gpio_direction_output(ARV4518PW_SWITCH_RESET, 1);
@@ -372,6 +436,7 @@
 +{
 +#define ARV4520PW_EBU			0x400
 +#define ARV4520PW_USB			28
++#define ARV4520PW_SWITCH_RESET		42
 +
 +	lq_register_gpio();
 +	lq_register_gpio_ebu(ARV4520PW_EBU);
@@ -381,8 +446,12 @@
 +	lq_register_nor(&arv45xx_flash_data);
 +	lq_register_pci(&lq_pci_data);
 +	lq_register_wdt();
++	lq_register_tapi();
 +	arv45xx_register_ethernet();
 +	xway_register_dwc(ARV4520PW_USB);
++
++	gpio_request(ARV4520PW_SWITCH_RESET, "switch");
++	gpio_set_value(ARV4520PW_SWITCH_RESET, 1);
 +}
 +
 +MIPS_MACHINE(LANTIQ_MACH_ARV4520PW,
@@ -404,11 +473,13 @@
 +	lq_register_gpio_leds(arv452cpw_leds_gpio, ARRAY_SIZE(arv452cpw_leds_gpio));
 +	lq_register_asc(0);
 +	lq_register_asc(1);
-+	lq_register_nor(&arv4518_flash_data);
++	lq_register_nor(&arv45xx_flash_data);
 +	lq_register_pci(&lq_pci_data);
 +	lq_register_wdt();
-+	arv45xx_register_ethernet();
++	lq_register_madwifi_eep();
 +	xway_register_dwc(ARV452CPW_USB);
++	arv45xx_register_ethernet();
++	arv45xx_register_ath5k();
 +
 +	gpio_request(ARV452CPW_SWITCH_RESET, "switch");
 +	gpio_set_value(ARV452CPW_SWITCH_RESET, 1);
@@ -439,6 +510,7 @@
 +	lq_pci_data.clock = PCI_CLOCK_INT;
 +	lq_register_pci(&lq_pci_data);
 +	lq_register_wdt();
++	lq_register_madwifi_eep();
 +	lq_eth_data.mii_mode = MII_MODE;
 +	arv45xx_register_ethernet();
 +}
@@ -452,7 +524,7 @@
 +arv7518pw_init(void)
 +{
 +#define ARV7518PW_EBU			0x2
-+#define ARV7518PW_USB			-1
++#define ARV7518PW_USB			14
 +
 +	lq_register_gpio();
 +	lq_register_gpio_ebu(ARV7518PW_EBU);
@@ -463,6 +535,7 @@
 +	lq_register_nor(&arv75xx_flash_data);
 +	lq_register_pci(&lq_pci_data);
 +	lq_register_wdt();
++	lq_register_tapi();
 +	xway_register_dwc(ARV7518PW_USB);
 +	arv75xx_register_ethernet();
 +	//arv7518_register_ath9k(mac);