X-Git-Url: https://git.rohieb.name/openwrt.git/blobdiff_plain/2c0b4a49174edd0b00eca8e71334957f9dccee0b..60197a65d9f9a115722864b7aec15f0047b84355:/target/linux/ifxmips/files/drivers/char/ifxmips_ssc.c?ds=inline

diff --git a/target/linux/ifxmips/files/drivers/char/ifxmips_ssc.c b/target/linux/ifxmips/files/drivers/char/ifxmips_ssc.c
index 9f5c0047a..35b32e852 100644
--- a/target/linux/ifxmips/files/drivers/char/ifxmips_ssc.c
+++ b/target/linux/ifxmips/files/drivers/char/ifxmips_ssc.c
@@ -58,16 +58,6 @@
 #include <asm/ifxmips/ifx_ssc_defines.h>
 #include <asm/ifxmips/ifx_ssc.h>
 
-#ifdef SSC_FRAME_INT_ENABLE
-#undef SSC_FRAME_INT_ENABLE
-#endif
-
-#define not_yet
-
-#define SPI_VINETIC
-
-
-
 /* allow the user to set the major device number */
 static int maj = 0;
 
@@ -78,37 +68,19 @@ static int maj = 0;
  */
 static struct ifx_ssc_port *isp;
 
-/* prototypes for fops */
-static ssize_t ifx_ssc_read (struct file *, char *, size_t, loff_t *);
-static ssize_t ifx_ssc_write (struct file *, const char *, size_t, loff_t *);
-//static unsigned int ifx_ssc_poll(struct file *, struct poll_table_struct *);
-int ifx_ssc_ioctl (struct inode *, struct file *, unsigned int,
-		   unsigned long);
-int ifx_ssc_open (struct inode *, struct file *);
-int ifx_ssc_close (struct inode *, struct file *);
-
 /* other forward declarations */
 static unsigned int ifx_ssc_get_kernel_clk (struct ifx_ssc_port *info);
 static void tx_int (struct ifx_ssc_port *);
 
 extern unsigned int ifxmips_get_fpi_hz (void);
-extern void mask_and_ack_ifxmips_irq (unsigned int irq_nr);
-
-static struct file_operations ifx_ssc_fops = {
-      .owner = THIS_MODULE,
-      .read = ifx_ssc_read,
-      .write = ifx_ssc_write,
-      .ioctl = ifx_ssc_ioctl,
-      .open = ifx_ssc_open,
-      .release = ifx_ssc_close,
-};
+extern void ifxmips_mask_and_ack_irq (unsigned int irq_nr);
 
 static inline unsigned int
 ifx_ssc_get_kernel_clk (struct ifx_ssc_port *info)
 {
 	unsigned int rmc;
 
-	rmc = (readl(IFXMIPS_SSC_CLC) & IFX_CLC_RUN_DIVIDER_MASK) >> IFX_CLC_RUN_DIVIDER_OFFSET;
+	rmc = (ifxmips_r32(IFXMIPS_SSC_CLC) & IFX_CLC_RUN_DIVIDER_MASK) >> IFX_CLC_RUN_DIVIDER_OFFSET;
 	if (rmc == 0)
 	{
 		printk ("ifx_ssc_get_kernel_clk rmc==0 \n");
@@ -117,49 +89,6 @@ ifx_ssc_get_kernel_clk (struct ifx_ssc_port *info)
 	return ifxmips_get_fpi_hz () / rmc;
 }
 
-#ifndef not_yet
-#ifdef IFX_SSC_INT_USE_BH
-/*
- * This routine is used by the interrupt handler to schedule
- * processing in the software interrupt portion of the driver
- * (also known as the "bottom half").  This can be called any
- * number of times for any channel without harm.
- */
-static inline void
-ifx_ssc_sched_event (struct ifx_ssc_port *info, int event)
-{
-	info->event |= 1 << event;	/* remember what kind of event and who */
-	queue_task (&info->tqueue, &tq_cyclades);	/* it belongs to */
-	mark_bh (CYCLADES_BH);	/* then trigger event */
-}
-
-static void
-do_softint (void *private_)
-{
-	struct ifx_ssc_port *info = (struct ifx_ssc_port *) private_;
-
-	if (test_and_clear_bit (Cy_EVENT_HANGUP, &info->event))
-	{
-		wake_up_interruptible (&info->open_wait);
-		info->flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CALLOUT_ACTIVE);
-	}
-
-	if (test_and_clear_bit (Cy_EVENT_OPEN_WAKEUP, &info->event))
-		wake_up_interruptible (&info->open_wait);
-
-	if (test_and_clear_bit (Cy_EVENT_DELTA_WAKEUP, &info->event))
-		wake_up_interruptible (&info->delta_msr_wait);
-
-	if (test_and_clear_bit (Cy_EVENT_WRITE_WAKEUP, &info->event))
-		wake_up_interruptible (&tty->write_wait);
-#ifdef Z_WAKE
-	if (test_and_clear_bit (Cy_EVENT_SHUTDOWN_WAKEUP, &info->event))
-		wake_up_interruptible (&info->shutdown_wait);
-#endif
-}
-#endif
-#endif
-
 inline static void
 rx_int (struct ifx_ssc_port *info)
 {
@@ -168,12 +97,12 @@ rx_int (struct ifx_ssc_port *info)
 	unsigned long *tmp_ptr;
 	unsigned int rx_valid_cnt;
 	/* number of words waiting in the RX FIFO */
-	fifo_fill_lev = (readl(IFXMIPS_SSC_FSTAT) & IFX_SSC_FSTAT_RECEIVED_WORDS_MASK) >> IFX_SSC_FSTAT_RECEIVED_WORDS_OFFSET;
+	fifo_fill_lev = (ifxmips_r32(IFXMIPS_SSC_FSTAT) & IFX_SSC_FSTAT_RECEIVED_WORDS_MASK) >> IFX_SSC_FSTAT_RECEIVED_WORDS_OFFSET;
 	bytes_in_buf = info->rxbuf_end - info->rxbuf_ptr;
 	// transfer with 32 bits per entry
 	while ((bytes_in_buf >= 4) && (fifo_fill_lev > 0)) {
 		tmp_ptr = (unsigned long *) info->rxbuf_ptr;
-		*tmp_ptr = readl(IFXMIPS_SSC_RB);
+		*tmp_ptr = ifxmips_r32(IFXMIPS_SSC_RB);
 		info->rxbuf_ptr += 4;
 		info->stats.rxBytes += 4;
 		fifo_fill_lev--;
@@ -182,14 +111,14 @@ rx_int (struct ifx_ssc_port *info)
 
 	// now do the rest as mentioned in STATE.RXBV
 	while ((bytes_in_buf > 0) && (fifo_fill_lev > 0)) {
-		rx_valid_cnt = (readl(IFXMIPS_SSC_STATE) & IFX_SSC_STATE_RX_BYTE_VALID_MASK) >> IFX_SSC_STATE_RX_BYTE_VALID_OFFSET;
+		rx_valid_cnt = (ifxmips_r32(IFXMIPS_SSC_STATE) & IFX_SSC_STATE_RX_BYTE_VALID_MASK) >> IFX_SSC_STATE_RX_BYTE_VALID_OFFSET;
 		if (rx_valid_cnt == 0)
 			break;
 
 		if (rx_valid_cnt > bytes_in_buf)
 			rx_valid_cnt = bytes_in_buf;
 
-		tmp_val = readl(IFXMIPS_SSC_RB);
+		tmp_val = ifxmips_r32(IFXMIPS_SSC_RB);
 
 		for (i = 0; i < rx_valid_cnt; i++)
 		{
@@ -203,14 +132,14 @@ rx_int (struct ifx_ssc_port *info)
 	// check if transfer is complete
 	if (info->rxbuf_ptr >= info->rxbuf_end)
 	{
-		disable_irq(info->rxirq);
+		disable_irq(IFXMIPS_SSC_RIR);
 		wake_up_interruptible (&info->rwait);
-	} else if ((info->opts.modeRxTx == IFX_SSC_MODE_RX) && (readl(IFXMIPS_SSC_RXCNT) == 0))
+	} else if ((info->opts.modeRxTx == IFX_SSC_MODE_RX) && (ifxmips_r32(IFXMIPS_SSC_RXCNT) == 0))
 	{
 		if (info->rxbuf_end - info->rxbuf_ptr < IFX_SSC_RXREQ_BLOCK_SIZE)
-			writel((info->rxbuf_end - info->rxbuf_ptr) << IFX_SSC_RXREQ_RXCOUNT_OFFSET, IFXMIPS_SSC_RXREQ);
+			ifxmips_w32((info->rxbuf_end - info->rxbuf_ptr) << IFX_SSC_RXREQ_RXCOUNT_OFFSET, IFXMIPS_SSC_RXREQ);
 		else
-			writel(IFX_SSC_RXREQ_BLOCK_SIZE << IFX_SSC_RXREQ_RXCOUNT_OFFSET,  IFXMIPS_SSC_RXREQ);
+			ifxmips_w32(IFX_SSC_RXREQ_BLOCK_SIZE << IFX_SSC_RXREQ_RXCOUNT_OFFSET,  IFXMIPS_SSC_RXREQ);
 	}
 }
 
@@ -219,8 +148,8 @@ tx_int (struct ifx_ssc_port *info)
 {
 
 	int fifo_space, fill, i;
-	fifo_space = ((readl(IFXMIPS_SSC_ID) & IFX_SSC_PERID_TXFS_MASK) >> IFX_SSC_PERID_TXFS_OFFSET)
-		- ((readl(IFXMIPS_SSC_FSTAT) & IFX_SSC_FSTAT_TRANSMIT_WORDS_MASK) >> IFX_SSC_FSTAT_TRANSMIT_WORDS_OFFSET);
+	fifo_space = ((ifxmips_r32(IFXMIPS_SSC_ID) & IFX_SSC_PERID_TXFS_MASK) >> IFX_SSC_PERID_TXFS_OFFSET)
+		- ((ifxmips_r32(IFXMIPS_SSC_FSTAT) & IFX_SSC_FSTAT_TRANSMIT_WORDS_MASK) >> IFX_SSC_FSTAT_TRANSMIT_WORDS_OFFSET);
 
 	if (fifo_space == 0)
 		return;
@@ -233,7 +162,7 @@ tx_int (struct ifx_ssc_port *info)
 	for (i = 0; i < fill / 4; i++)
 	{
 		// at first 32 bit access
-		writel(*(UINT32 *) info->txbuf_ptr, IFXMIPS_SSC_TB);
+		ifxmips_w32(*(UINT32 *) info->txbuf_ptr, IFXMIPS_SSC_TB);
 		info->txbuf_ptr += 4;
 	}
 
@@ -261,7 +190,7 @@ tx_int (struct ifx_ssc_port *info)
 	// check if transmission complete
 	if (info->txbuf_ptr >= info->txbuf_end)
 	{
-		disable_irq(info->txirq);
+		disable_irq(IFXMIPS_SSC_TIR);
 		kfree (info->txbuf);
 		info->txbuf = NULL;
 	}
@@ -295,7 +224,7 @@ ifx_ssc_err_int (int irq, void *dev_id)
 	unsigned long flags;
 
 	local_irq_save (flags);
-	state = readl(IFXMIPS_SSC_STATE);
+	state = ifxmips_r32(IFXMIPS_SSC_STATE);
 
 	if ((state & IFX_SSC_STATE_RX_UFL) != 0) {
 		info->stats.rxUnErr++;
@@ -323,7 +252,7 @@ ifx_ssc_err_int (int irq, void *dev_id)
 	}
 
 	if (write_back)
-		writel(write_back, IFXMIPS_SSC_WHBSTATE);
+		ifxmips_w32(write_back, IFXMIPS_SSC_WHBSTATE);
 
 	local_irq_restore (flags);
 
@@ -338,9 +267,9 @@ ifx_ssc_abort (struct ifx_ssc_port *info)
 
 	local_irq_save (flags);
 
-	disable_irq(info->rxirq);
-	disable_irq(info->txirq);
-	disable_irq(info->errirq);
+	disable_irq(IFXMIPS_SSC_RIR);
+	disable_irq(IFXMIPS_SSC_TIR);
+	disable_irq(IFXMIPS_SSC_EIR);
 
 	local_irq_restore (flags);
 
@@ -349,12 +278,12 @@ ifx_ssc_abort (struct ifx_ssc_port *info)
 	// complete word. The disable cuts the transmission immediatly and 
 	// releases the chip selects. This could result in unpredictable 
 	// behavior of connected external devices!
-	enabled = (readl(IFXMIPS_SSC_STATE) & IFX_SSC_STATE_IS_ENABLED) != 0;
-	writel(IFX_SSC_WHBSTATE_CLR_ENABLE, IFXMIPS_SSC_WHBSTATE);
+	enabled = (ifxmips_r32(IFXMIPS_SSC_STATE) & IFX_SSC_STATE_IS_ENABLED) != 0;
+	ifxmips_w32(IFX_SSC_WHBSTATE_CLR_ENABLE, IFXMIPS_SSC_WHBSTATE);
 
 	// flush fifos
-	writel(IFX_SSC_XFCON_FIFO_FLUSH, IFXMIPS_SSC_TXFCON);
-	writel(IFX_SSC_XFCON_FIFO_FLUSH, IFXMIPS_SSC_RXFCON);
+	ifxmips_w32(IFX_SSC_XFCON_FIFO_FLUSH, IFXMIPS_SSC_TXFCON);
+	ifxmips_w32(IFX_SSC_XFCON_FIFO_FLUSH, IFXMIPS_SSC_RXFCON);
 
 	// free txbuf
 	if (info->txbuf != NULL)
@@ -368,15 +297,15 @@ ifx_ssc_abort (struct ifx_ssc_port *info)
 		wake_up_interruptible (&info->rwait);
 
 	// clear pending int's 
-	mask_and_ack_ifxmips_irq(info->rxirq);
-	mask_and_ack_ifxmips_irq(info->txirq);
-	mask_and_ack_ifxmips_irq(info->errirq);
+	ifxmips_mask_and_ack_irq(IFXMIPS_SSC_RIR);
+	ifxmips_mask_and_ack_irq(IFXMIPS_SSC_TIR);
+	ifxmips_mask_and_ack_irq(IFXMIPS_SSC_EIR);
 
 	// clear error flags
-	writel(IFX_SSC_WHBSTATE_CLR_ALL_ERROR, IFXMIPS_SSC_WHBSTATE);
+	ifxmips_w32(IFX_SSC_WHBSTATE_CLR_ALL_ERROR, IFXMIPS_SSC_WHBSTATE);
 
 	if (enabled)
-		writel(IFX_SSC_WHBSTATE_SET_ENABLE, IFXMIPS_SSC_WHBSTATE);
+		ifxmips_w32(IFX_SSC_WHBSTATE_SET_ENABLE, IFXMIPS_SSC_WHBSTATE);
 
 }
 
@@ -396,7 +325,6 @@ ifx_ssc_open (struct inode *inode, struct file *filp)
 		line = (int) inode;
 	} else {
 		line = MINOR (filp->f_dentry->d_inode->i_rdev);
-		filp->f_op = &ifx_ssc_fops;
 	}
 
 	/* don't open more minor devices than we can support */
@@ -410,27 +338,27 @@ ifx_ssc_open (struct inode *inode, struct file *filp)
 		return -EBUSY;
 	info->port_is_open++;
 
-	disable_irq(info->rxirq);
-	disable_irq(info->txirq);
-	disable_irq(info->errirq);
+	disable_irq(IFXMIPS_SSC_RIR);
+	disable_irq(IFXMIPS_SSC_TIR);
+	disable_irq(IFXMIPS_SSC_EIR);
 
 	/* Flush and enable TX/RX FIFO */
-	writel((IFX_SSC_DEF_TXFIFO_FL << IFX_SSC_XFCON_ITL_OFFSET) | IFX_SSC_XFCON_FIFO_FLUSH | IFX_SSC_XFCON_FIFO_ENABLE, IFXMIPS_SSC_TXFCON);
-	writel((IFX_SSC_DEF_RXFIFO_FL << IFX_SSC_XFCON_ITL_OFFSET) | IFX_SSC_XFCON_FIFO_FLUSH | IFX_SSC_XFCON_FIFO_ENABLE, IFXMIPS_SSC_RXFCON);
+	ifxmips_w32((IFX_SSC_DEF_TXFIFO_FL << IFX_SSC_XFCON_ITL_OFFSET) | IFX_SSC_XFCON_FIFO_FLUSH | IFX_SSC_XFCON_FIFO_ENABLE, IFXMIPS_SSC_TXFCON);
+	ifxmips_w32((IFX_SSC_DEF_RXFIFO_FL << IFX_SSC_XFCON_ITL_OFFSET) | IFX_SSC_XFCON_FIFO_FLUSH | IFX_SSC_XFCON_FIFO_ENABLE, IFXMIPS_SSC_RXFCON);
 
 	/* logically flush the software FIFOs */
 	info->rxbuf_ptr = 0;
 	info->txbuf_ptr = 0;
 
 	/* clear all error bits */
-	writel(IFX_SSC_WHBSTATE_CLR_ALL_ERROR, IFXMIPS_SSC_WHBSTATE);
+	ifxmips_w32(IFX_SSC_WHBSTATE_CLR_ALL_ERROR, IFXMIPS_SSC_WHBSTATE);
 
 	// clear pending interrupts
-	mask_and_ack_ifxmips_irq(info->rxirq);
-	mask_and_ack_ifxmips_irq(info->txirq);
-	mask_and_ack_ifxmips_irq(info->errirq);
+	ifxmips_mask_and_ack_irq(IFXMIPS_SSC_RIR);
+	ifxmips_mask_and_ack_irq(IFXMIPS_SSC_TIR);
+	ifxmips_mask_and_ack_irq(IFXMIPS_SSC_EIR);
 
-	writel(IFX_SSC_WHBSTATE_SET_ENABLE, IFXMIPS_SSC_WHBSTATE);
+	ifxmips_w32(IFX_SSC_WHBSTATE_SET_ENABLE, IFXMIPS_SSC_WHBSTATE);
 
 	return 0;
 }
@@ -454,7 +382,7 @@ ifx_ssc_close (struct inode *inode, struct file *filp)
 	if (!info)
 		return -ENXIO;
 
-	writel(IFX_SSC_WHBSTATE_CLR_ENABLE, IFXMIPS_SSC_WHBSTATE);
+	ifxmips_w32(IFX_SSC_WHBSTATE_CLR_ENABLE, IFXMIPS_SSC_WHBSTATE);
 
 	ifx_ssc_abort(info);
 
@@ -518,18 +446,18 @@ ifx_ssc_read_helper (struct ifx_ssc_port *info, char *buf, size_t len, int from_
 		tx_int (info);
 
 		if (info->txbuf_ptr < info->txbuf_end)
-			enable_irq(info->txirq);
+			enable_irq(IFXMIPS_SSC_TIR);
 
-		enable_irq(info->rxirq);
+		enable_irq(IFXMIPS_SSC_RIR);
 	} else {
 		local_irq_restore(flags);
-		if (readl(IFXMIPS_SSC_RXCNT) & IFX_SSC_RXCNT_TODO_MASK)
+		if (ifxmips_r32(IFXMIPS_SSC_RXCNT) & IFX_SSC_RXCNT_TODO_MASK)
 			return -EBUSY;
-		enable_irq(info->rxirq);
+		enable_irq(IFXMIPS_SSC_RIR);
 		if (len < IFX_SSC_RXREQ_BLOCK_SIZE)
-			writel(len << IFX_SSC_RXREQ_RXCOUNT_OFFSET, IFXMIPS_SSC_RXREQ);
+			ifxmips_w32(len << IFX_SSC_RXREQ_RXCOUNT_OFFSET, IFXMIPS_SSC_RXREQ);
 		else
-			writel(IFX_SSC_RXREQ_BLOCK_SIZE << IFX_SSC_RXREQ_RXCOUNT_OFFSET, IFXMIPS_SSC_RXREQ);
+			ifxmips_w32(IFX_SSC_RXREQ_BLOCK_SIZE << IFX_SSC_RXREQ_RXCOUNT_OFFSET, IFXMIPS_SSC_RXREQ);
 	}
 
 	__add_wait_queue (&info->rwait, &wait);
@@ -574,7 +502,7 @@ ifx_ssc_write_helper (struct ifx_ssc_port *info, const char *buf,
 		tx_int (info);
 		if (info->txbuf_ptr < info->txbuf_end)
 		{
-			enable_irq(info->txirq);
+			enable_irq(IFXMIPS_SSC_TIR);
 		}
 	}
 
@@ -611,7 +539,7 @@ ifx_ssc_kread (int port, char *kbuf, size_t len)
 	ret_val = ifx_ssc_read_helper_poll (info, kbuf, len, 1);
 	info->rxbuf = NULL;
 
-	disable_irq(info->rxirq);
+	disable_irq(IFXMIPS_SSC_RIR);
 
 	return ret_val;
 }
@@ -667,7 +595,7 @@ ifx_ssc_read (struct file *filp, char *ubuf, size_t len, loff_t * off)
 	if (copy_to_user ((void *) ubuf, info->rxbuf, ret_val) != 0)
 		ret_val = -EFAULT;
 
-	disable_irq(info->rxirq);
+	disable_irq(IFXMIPS_SSC_RIR);
 
 	kfree (info->rxbuf);
 	info->rxbuf = NULL;
@@ -715,12 +643,12 @@ ifx_ssc_frm_status_get (struct ifx_ssc_port *info)
 {
 	unsigned long tmp;
 
-	tmp = readl(IFXMIPS_SSC_SFSTAT);
+	tmp = ifxmips_r32(IFXMIPS_SSC_SFSTAT);
 	info->frm_status.DataBusy = (tmp & IFX_SSC_SFSTAT_IN_DATA) > 0;
 	info->frm_status.PauseBusy = (tmp & IFX_SSC_SFSTAT_IN_PAUSE) > 0;
 	info->frm_status.DataCount = (tmp & IFX_SSC_SFSTAT_DATA_COUNT_MASK) >> IFX_SSC_SFSTAT_DATA_COUNT_OFFSET;
 	info->frm_status.PauseCount = (tmp & IFX_SSC_SFSTAT_PAUSE_COUNT_MASK) >> IFX_SSC_SFSTAT_PAUSE_COUNT_OFFSET;
-	tmp = readl(IFXMIPS_SSC_SFCON);
+	tmp = ifxmips_r32(IFXMIPS_SSC_SFCON);
 	info->frm_status.EnIntAfterData = (tmp & IFX_SSC_SFCON_FIR_ENABLE_BEFORE_PAUSE) > 0;
 	info->frm_status.EnIntAfterPause = (tmp & IFX_SSC_SFCON_FIR_ENABLE_AFTER_PAUSE) > 0;
 
@@ -733,7 +661,7 @@ ifx_ssc_frm_control_get (struct ifx_ssc_port *info)
 {
 	unsigned long tmp;
 
-	tmp = readl(IFXMIPS_SSC_SFCON);
+	tmp = ifxmips_r32(IFXMIPS_SSC_SFCON);
 	info->frm_opts.FrameEnable = (tmp & IFX_SSC_SFCON_SF_ENABLE) > 0;
 	info->frm_opts.DataLength = (tmp & IFX_SSC_SFCON_DATA_LENGTH_MASK) >> IFX_SSC_SFCON_DATA_LENGTH_OFFSET;
 	info->frm_opts.PauseLength = (tmp & IFX_SSC_SFCON_PAUSE_LENGTH_MASK) >> IFX_SSC_SFCON_PAUSE_LENGTH_OFFSET;
@@ -749,7 +677,6 @@ ifx_ssc_frm_control_set (struct ifx_ssc_port *info)
 {
 	unsigned long tmp;
 
-	// check parameters
 	if ((info->frm_opts.DataLength > IFX_SSC_SFCON_DATA_LENGTH_MAX)
 	    || (info->frm_opts.DataLength < 1)
 	    || (info->frm_opts.PauseLength > IFX_SSC_SFCON_PAUSE_LENGTH_MAX)
@@ -759,7 +686,7 @@ ifx_ssc_frm_control_set (struct ifx_ssc_port *info)
 		return -EINVAL;
 
 	// read interrupt bits (they're not changed here)
-	tmp = readl(IFXMIPS_SSC_SFCON) &
+	tmp = ifxmips_r32(IFXMIPS_SSC_SFCON) &
 		(IFX_SSC_SFCON_FIR_ENABLE_BEFORE_PAUSE | IFX_SSC_SFCON_FIR_ENABLE_AFTER_PAUSE);
 
 	// set all values with respect to it's bit position (for data and pause 
@@ -771,7 +698,7 @@ ifx_ssc_frm_control_set (struct ifx_ssc_port *info)
 	tmp |= info->frm_opts.FrameEnable * IFX_SSC_SFCON_SF_ENABLE;
 	tmp |= info->frm_opts.StopAfterPause * IFX_SSC_SFCON_STOP_AFTER_PAUSE;
 
-	writel(tmp, IFXMIPS_SSC_SFCON);
+	ifxmips_w32(tmp, IFXMIPS_SSC_SFCON);
 
 	return 0;
 }
@@ -784,12 +711,12 @@ ifx_ssc_rxtx_mode_set (struct ifx_ssc_port *info, unsigned int val)
 	if (!(info) || (val & ~(IFX_SSC_MODE_MASK)))
 		return -EINVAL;
 
-	if ((readl(IFXMIPS_SSC_STATE) & IFX_SSC_STATE_BUSY)
-	    || (readl(IFXMIPS_SSC_RXCNT) & IFX_SSC_RXCNT_TODO_MASK))
+	if ((ifxmips_r32(IFXMIPS_SSC_STATE) & IFX_SSC_STATE_BUSY)
+	    || (ifxmips_r32(IFXMIPS_SSC_RXCNT) & IFX_SSC_RXCNT_TODO_MASK))
 		return -EBUSY;
 
-	tmp = (readl(IFXMIPS_SSC_CON) & ~(IFX_SSC_CON_RX_OFF | IFX_SSC_CON_TX_OFF)) | (val);
-	writel(tmp, IFXMIPS_SSC_SFCON);
+	tmp = (ifxmips_r32(IFXMIPS_SSC_CON) & ~(IFX_SSC_CON_RX_OFF | IFX_SSC_CON_TX_OFF)) | (val);
+	ifxmips_w32(tmp, IFXMIPS_SSC_SFCON);
 	info->opts.modeRxTx = val;
 
 	return 0;
@@ -839,20 +766,20 @@ ifx_ssc_sethwopts (struct ifx_ssc_port *info)
 
 	local_irq_save (flags);
 
-	writel(bits, IFXMIPS_SSC_CON);
-	writel((info->opts.gpoCs << IFX_SSC_GPOCON_ISCSB0_POS) |
+	ifxmips_w32(bits, IFXMIPS_SSC_CON);
+	ifxmips_w32((info->opts.gpoCs << IFX_SSC_GPOCON_ISCSB0_POS) |
 				   (info->opts.gpoInv << IFX_SSC_GPOCON_INVOUT0_POS), IFXMIPS_SSC_GPOCON);
 
-	writel(info->opts.gpoCs << IFX_SSC_WHBGPOSTAT_SETOUT0_POS, IFXMIPS_SSC_WHBGPOSTAT);
+	ifxmips_w32(info->opts.gpoCs << IFX_SSC_WHBGPOSTAT_SETOUT0_POS, IFXMIPS_SSC_WHBGPOSTAT);
 
 	//master mode
 	if (opts->masterSelect)
-		writel(IFX_SSC_WHBSTATE_SET_MASTER_SELECT, IFXMIPS_SSC_WHBSTATE);
+		ifxmips_w32(IFX_SSC_WHBSTATE_SET_MASTER_SELECT, IFXMIPS_SSC_WHBSTATE);
 	else
-		writel(IFX_SSC_WHBSTATE_CLR_MASTER_SELECT, IFXMIPS_SSC_WHBSTATE);
+		ifxmips_w32(IFX_SSC_WHBSTATE_CLR_MASTER_SELECT, IFXMIPS_SSC_WHBSTATE);
 
 	// init serial framing
-	writel(0, IFXMIPS_SSC_SFCON);
+	ifxmips_w32(0, IFXMIPS_SSC_SFCON);
 	/* set up the port pins */
 	//check for general requirements to switch (external) pad/pin characteristics
 	/* TODO: P0.9 SPI_CS4, P0.10 SPI_CS5, P 0.11 SPI_CS6, because of ASC0 */
@@ -896,23 +823,23 @@ ifx_ssc_set_baud (struct ifx_ssc_port *info, unsigned int baud)
 
 	local_irq_save (flags);
 
-	enabled = (readl(IFXMIPS_SSC_STATE) & IFX_SSC_STATE_IS_ENABLED);
-	writel(IFX_SSC_WHBSTATE_CLR_ENABLE, IFXMIPS_SSC_WHBSTATE);
+	enabled = (ifxmips_r32(IFXMIPS_SSC_STATE) & IFX_SSC_STATE_IS_ENABLED);
+	ifxmips_w32(IFX_SSC_WHBSTATE_CLR_ENABLE, IFXMIPS_SSC_WHBSTATE);
 
 	br = (((ifx_ssc_clock >> 1) + baud / 2) / baud) - 1;
 	wmb();
 
 	if (br > 0xffff || ((br == 0) &&
-			((readl(IFXMIPS_SSC_STATE) & IFX_SSC_STATE_IS_MASTER) == 0))) {
+			((ifxmips_r32(IFXMIPS_SSC_STATE) & IFX_SSC_STATE_IS_MASTER) == 0))) {
 		local_irq_restore (flags);
 		printk ("%s: invalid baudrate %u\n", __func__, baud);
 		return -EINVAL;
 	}
 
-	writel(br, IFXMIPS_SSC_BR);
+	ifxmips_w32(br, IFXMIPS_SSC_BR);
 
 	if (enabled)
-		writel(IFX_SSC_WHBSTATE_SET_ENABLE, IFXMIPS_SSC_WHBSTATE);
+		ifxmips_w32(IFX_SSC_WHBSTATE_SET_ENABLE, IFXMIPS_SSC_WHBSTATE);
 
 	local_irq_restore(flags);
 
@@ -926,8 +853,8 @@ ifx_ssc_hwinit (struct ifx_ssc_port *info)
 	unsigned long flags;
 	bool enabled;
 
-	enabled = (readl(IFXMIPS_SSC_STATE) & IFX_SSC_STATE_IS_ENABLED);
-	writel(IFX_SSC_WHBSTATE_CLR_ENABLE, IFXMIPS_SSC_WHBSTATE);
+	enabled = (ifxmips_r32(IFXMIPS_SSC_STATE) & IFX_SSC_STATE_IS_ENABLED);
+	ifxmips_w32(IFX_SSC_WHBSTATE_CLR_ENABLE, IFXMIPS_SSC_WHBSTATE);
 
 	if (ifx_ssc_sethwopts (info) < 0)
 	{
@@ -944,14 +871,14 @@ ifx_ssc_hwinit (struct ifx_ssc_port *info)
 	local_irq_save (flags);
 
 	/* TX FIFO */
-	writel((IFX_SSC_DEF_TXFIFO_FL << IFX_SSC_XFCON_ITL_OFFSET) | IFX_SSC_XFCON_FIFO_ENABLE, IFXMIPS_SSC_TXFCON);
+	ifxmips_w32((IFX_SSC_DEF_TXFIFO_FL << IFX_SSC_XFCON_ITL_OFFSET) | IFX_SSC_XFCON_FIFO_ENABLE, IFXMIPS_SSC_TXFCON);
 	/* RX FIFO */
-	writel((IFX_SSC_DEF_RXFIFO_FL << IFX_SSC_XFCON_ITL_OFFSET) | IFX_SSC_XFCON_FIFO_ENABLE, IFXMIPS_SSC_RXFCON);
+	ifxmips_w32((IFX_SSC_DEF_RXFIFO_FL << IFX_SSC_XFCON_ITL_OFFSET) | IFX_SSC_XFCON_FIFO_ENABLE, IFXMIPS_SSC_RXFCON);
 
 	local_irq_restore (flags);
 
 	if (enabled)
-		writel(IFX_SSC_WHBSTATE_SET_ENABLE, IFXMIPS_SSC_WHBSTATE);
+		ifxmips_w32(IFX_SSC_WHBSTATE_SET_ENABLE, IFXMIPS_SSC_WHBSTATE);
 
 	return 0;
 }
@@ -999,7 +926,7 @@ ifx_ssc_ioctl (struct inode *inode, struct file *filp, unsigned int cmd, unsigne
 		/* if the buffers are not empty then the port is */
 		/* busy and we shouldn't change things on-the-fly! */
 		if (!info->txbuf || !info->rxbuf ||
-		    (readl(IFXMIPS_SSC_STATE) & IFX_SSC_STATE_BUSY)) {
+		    (ifxmips_r32(IFXMIPS_SSC_STATE) & IFX_SSC_STATE_BUSY)) {
 			ret_val = -EBUSY;
 			break;
 		}
@@ -1040,7 +967,7 @@ ifx_ssc_ioctl (struct inode *inode, struct file *filp, unsigned int cmd, unsigne
 		ret_val = ifx_ssc_rxtx_mode_set (info, tmp);
 		break;
 	case IFX_SSC_RXTX_MODE_GET:
-		tmp = readl(IFXMIPS_SSC_CON) &
+		tmp = ifxmips_r32(IFXMIPS_SSC_CON) &
 			(~(IFX_SSC_CON_RX_OFF | IFX_SSC_CON_TX_OFF));
 		if (from_kernel)
 			*((unsigned int *) data) = tmp;
@@ -1064,7 +991,7 @@ ifx_ssc_ioctl (struct inode *inode, struct file *filp, unsigned int cmd, unsigne
 		if (tmp > IFX_SSC_MAX_GPO_OUT)
 			ret_val = -EINVAL;
 		else
-			writel(1 << (tmp + IFX_SSC_WHBGPOSTAT_SETOUT0_POS),
+			ifxmips_w32(1 << (tmp + IFX_SSC_WHBGPOSTAT_SETOUT0_POS),
 				 IFXMIPS_SSC_WHBGPOSTAT);
 		break;
 	case IFX_SSC_GPO_OUT_CLR:
@@ -1077,12 +1004,12 @@ ifx_ssc_ioctl (struct inode *inode, struct file *filp, unsigned int cmd, unsigne
 		if (tmp > IFX_SSC_MAX_GPO_OUT)
 			ret_val = -EINVAL;
 		else {
-			writel(1 << (tmp + IFX_SSC_WHBGPOSTAT_CLROUT0_POS),
+			ifxmips_w32(1 << (tmp + IFX_SSC_WHBGPOSTAT_CLROUT0_POS),
 				 IFXMIPS_SSC_WHBGPOSTAT);
 		}
 		break;
 	case IFX_SSC_GPO_OUT_GET:
-		tmp = readl(IFXMIPS_SSC_GPOSTAT);
+		tmp = ifxmips_r32(IFXMIPS_SSC_GPOSTAT);
 		if (from_kernel)
 			*((unsigned int *) data) = tmp;
 		else if (copy_to_user ((void *) data,
@@ -1126,7 +1053,7 @@ ifx_ssc_ioctl (struct inode *inode, struct file *filp, unsigned int cmd, unsigne
 		/* if the buffers are not empty then the port is */
 		/* busy and we shouldn't change things on-the-fly! */
 		if (!info->txbuf || !info->rxbuf ||
-		    (readl(IFXMIPS_SSC_STATE)
+		    (ifxmips_r32(IFXMIPS_SSC_STATE)
 		     & IFX_SSC_STATE_BUSY)) {
 			ret_val = -EBUSY;
 			break;
@@ -1161,6 +1088,15 @@ ifx_ssc_ioctl (struct inode *inode, struct file *filp, unsigned int cmd, unsigne
 }
 EXPORT_SYMBOL(ifx_ssc_ioctl);
 
+static struct file_operations ifx_ssc_fops = {
+      .owner = THIS_MODULE,
+      .read = ifx_ssc_read,
+      .write = ifx_ssc_write,
+      .ioctl = ifx_ssc_ioctl,
+      .open = ifx_ssc_open,
+      .release = ifx_ssc_close,
+};
+
 int __init
 ifx_ssc_init (void)
 {
@@ -1227,48 +1163,45 @@ ifx_ssc_init (void)
 		/* values specific to SSC1 */
 		if (i == 0) {
 			info->mapbase = IFXMIPS_SSC_BASE_ADDR;
-			info->txirq = IFXMIPS_SSC_TIR;
-			info->rxirq = IFXMIPS_SSC_RIR;
-			info->errirq = IFXMIPS_SSC_EIR;
 		}
 
-		writel(IFX_SSC_DEF_RMC << IFX_CLC_RUN_DIVIDER_OFFSET, IFXMIPS_SSC_CLC);
+		ifxmips_w32(IFX_SSC_DEF_RMC << IFX_CLC_RUN_DIVIDER_OFFSET, IFXMIPS_SSC_CLC);
 
 		init_waitqueue_head (&info->rwait);
 
 		local_irq_save (flags);
 
 		// init serial framing register
-		writel(IFX_SSC_DEF_SFCON, IFXMIPS_SSC_SFCON);
+		ifxmips_w32(IFX_SSC_DEF_SFCON, IFXMIPS_SSC_SFCON);
 
-		ret_val = request_irq(info->txirq, ifx_ssc_tx_int, SA_INTERRUPT, "ifx_ssc_tx", info);
+		ret_val = request_irq(IFXMIPS_SSC_TIR, ifx_ssc_tx_int, IRQF_DISABLED, "ifx_ssc_tx", info);
 		if (ret_val)
 		{
-			printk("%s: unable to get irq %d\n", __func__, info->txirq);
+			printk("%s: unable to get irq %d\n", __func__, IFXMIPS_SSC_TIR);
 			local_irq_restore(flags);
 			goto errout;
 		}
 
-		ret_val = request_irq(info->rxirq, ifx_ssc_rx_int, SA_INTERRUPT, "ifx_ssc_rx", info);
+		ret_val = request_irq(IFXMIPS_SSC_RIR, ifx_ssc_rx_int, IRQF_DISABLED, "ifx_ssc_rx", info);
 		if (ret_val)
 		{
-			printk ("%s: unable to get irq %d\n", __func__, info->rxirq);
+			printk ("%s: unable to get irq %d\n", __func__, IFXMIPS_SSC_RIR);
 			local_irq_restore (flags);
 			goto irqerr;
 		}
 
-		ret_val = request_irq(info->errirq, ifx_ssc_err_int, SA_INTERRUPT,"ifx_ssc_err", info);
+		ret_val = request_irq(IFXMIPS_SSC_EIR, ifx_ssc_err_int, IRQF_DISABLED, "ifx_ssc_err", info);
 		if (ret_val)
 		{
-			printk ("%s: unable to get irq %d\n", __func__, info->errirq);
+			printk ("%s: unable to get irq %d\n", __func__, IFXMIPS_SSC_EIR);
 			local_irq_restore (flags);
 			goto irqerr;
 		}
-		writel(IFX_SSC_DEF_IRNEN, IFXMIPS_SSC_IRN);
+		ifxmips_w32(IFX_SSC_DEF_IRNEN, IFXMIPS_SSC_IRN);
 
-		enable_irq(info->txirq);
-		enable_irq(info->rxirq);
-		enable_irq(info->errirq);
+		//enable_irq(IFXMIPS_SSC_TIR);
+		//enable_irq(IFXMIPS_SSC_RIR);
+		//enable_irq(IFXMIPS_SSC_EIR);
 
 		local_irq_restore (flags);
 	}
@@ -1286,9 +1219,9 @@ ifx_ssc_init (void)
 	return 0;
 
 irqerr:
-	free_irq(isp[0].txirq, &isp[0]);
-	free_irq(isp[0].rxirq, &isp[0]);
-	free_irq(isp[0].errirq, &isp[0]);
+	free_irq(IFXMIPS_SSC_TIR, &isp[0]);
+	free_irq(IFXMIPS_SSC_RIR, &isp[0]);
+	free_irq(IFXMIPS_SSC_EIR, &isp[0]);
 errout:
 	kfree (isp);
 	return (ret_val);
@@ -1300,10 +1233,10 @@ ifx_ssc_cleanup_module (void)
 	int i;
 
 	for (i = 0; i < PORT_CNT; i++) {
-		writel(IFX_SSC_WHBSTATE_CLR_ENABLE, IFXMIPS_SSC_WHBSTATE);
-		free_irq(isp[i].txirq, &isp[i]);
-		free_irq(isp[i].rxirq, &isp[i]);
-		free_irq(isp[i].errirq, &isp[i]);
+		ifxmips_w32(IFX_SSC_WHBSTATE_CLR_ENABLE, IFXMIPS_SSC_WHBSTATE);
+		free_irq(IFXMIPS_SSC_TIR, &isp[i]);
+		free_irq(IFXMIPS_SSC_RIR, &isp[i]);
+		free_irq(IFXMIPS_SSC_EIR, &isp[i]);
 	}
 	kfree (isp);
 }