X-Git-Url: https://git.rohieb.name/openwrt.git/blobdiff_plain/2c4d27ff3bf2665454a8c742922ead6a3b7645d2..b3f665b9197dfa174d7247dfe53f9aa3eec6ed6b:/package/broadcom-diag/src/gpio.h?ds=inline diff --git a/package/broadcom-diag/src/gpio.h b/package/broadcom-diag/src/gpio.h index c6f34bdea..575fd8c47 100644 --- a/package/broadcom-diag/src/gpio.h +++ b/package/broadcom-diag/src/gpio.h @@ -1,70 +1,47 @@ #ifndef __DIAG_GPIO_H #define __DIAG_GPIO_H +#include +#include +#include -#include -#include -#include -#include -#include -#include -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) -#include -#else -#include +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0) +#define ssb_bcm47xx bcm47xx_bus.ssb #endif -#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) -#define sbh bcm947xx_sbh -#define sbh_lock bcm947xx_sbh_lock -#endif - -#define EXTIF_ADDR 0x1f000000 -#define EXTIF_UART (EXTIF_ADDR + 0x00800000) - -#define GPIO_TYPE_NORMAL (0x0 << 24) -#define GPIO_TYPE_EXTIF (0x1 << 24) -#define GPIO_TYPE_MASK (0xf << 24) - -extern void *sbh; -extern spinlock_t sbh_lock; - -#define gpio_in() sb_gpioin(sbh) -#define gpio_out(mask, value) sb_gpioout(sbh, mask, ((value) & (mask)), GPIO_DRV_PRIORITY) -#define gpio_outen(mask, value) sb_gpioouten(sbh, mask, value, GPIO_DRV_PRIORITY) -#define gpio_control(mask, value) sb_gpiocontrol(sbh, mask, value, GPIO_DRV_PRIORITY) -#define gpio_intmask(mask, value) sb_gpiointmask(sbh, mask, value, GPIO_DRV_PRIORITY) -#define gpio_intpolarity(mask, value) sb_gpiointpolarity(sbh, mask, value, GPIO_DRV_PRIORITY) +static inline u32 __ssb_write32_masked(struct ssb_device *dev, u16 offset, + u32 mask, u32 value) +{ + value &= mask; + value |= ssb_read32(dev, offset) & ~mask; + ssb_write32(dev, offset, value); + return value; +} -static void gpio_set_irqenable(int enabled, irqreturn_t (*handler)(int, void *, struct pt_regs *)) +static void gpio_set_irqenable(int enabled, irqreturn_t (*handler)(int, void *)) { - unsigned int coreidx; - unsigned long flags; - chipcregs_t *cc; int irq; - spin_lock_irqsave(sbh_lock, flags); - coreidx = sb_coreidx(sbh); - - irq = sb_irq(sbh) + 2; - if (enabled) - request_irq(irq, handler, SA_SHIRQ | SA_SAMPLE_RANDOM, "gpio", handler); - else + irq = gpio_to_irq(0); + if (irq == -EINVAL) return; + + if (enabled) { + if (request_irq(irq, handler, IRQF_SHARED | IRQF_SAMPLE_RANDOM, "gpio", handler)) + return; + } else { free_irq(irq, handler); - - if ((cc = sb_setcore(sbh, SB_CC, 0))) { - int intmask; - - intmask = readl(&cc->intmask); - if (enabled) - intmask |= CI_GPIO; - else - intmask &= ~CI_GPIO; - writel(intmask, &cc->intmask); } - sb_setcoreidx(sbh, coreidx); - spin_unlock_irqrestore(sbh_lock, flags); + + if (ssb_bcm47xx.chipco.dev) + __ssb_write32_masked(ssb_bcm47xx.chipco.dev, SSB_CHIPCO_IRQMASK, SSB_CHIPCO_IRQ_GPIO, (enabled ? SSB_CHIPCO_IRQ_GPIO : 0)); } +#define EXTIF_ADDR 0x1f000000 +#define EXTIF_UART (EXTIF_ADDR + 0x00800000) + +#define GPIO_TYPE_NORMAL (0x0 << 24) +#define GPIO_TYPE_EXTIF (0x1 << 24) +#define GPIO_TYPE_MASK (0xf << 24) + static inline void gpio_set_extif(int gpio, int value) { volatile u8 *addr = (volatile u8 *) KSEG1ADDR(EXTIF_UART) + (gpio & ~GPIO_TYPE_MASK); @@ -74,5 +51,4 @@ static inline void gpio_set_extif(int gpio, int value) *addr; } - -#endif +#endif /* __DIAG_GPIO_H */