X-Git-Url: https://git.rohieb.name/openwrt.git/blobdiff_plain/2c4d27ff3bf2665454a8c742922ead6a3b7645d2..c291b847846f5921d669b17478cbf59f0c83ee19:/package/broadcom-diag/src/gpio.h?ds=inline diff --git a/package/broadcom-diag/src/gpio.h b/package/broadcom-diag/src/gpio.h index c6f34bdea..6b1b2ada4 100644 --- a/package/broadcom-diag/src/gpio.h +++ b/package/broadcom-diag/src/gpio.h @@ -1,5 +1,83 @@ #ifndef __DIAG_GPIO_H #define __DIAG_GPIO_H +#include + +#ifndef BCMDRIVER +#include + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,25) +#include +#define ssb ssb_bcm47xx +#endif +extern struct ssb_bus ssb; + + +static inline u32 gpio_in(void) +{ + return ssb_gpio_in(&ssb, ~0); +} + +static inline u32 gpio_out(u32 mask, u32 value) +{ + return ssb_gpio_out(&ssb, mask, value); +} + +static inline u32 gpio_outen(u32 mask, u32 value) +{ + return ssb_gpio_outen(&ssb, mask, value); +} + +static inline u32 gpio_control(u32 mask, u32 value) +{ + return ssb_gpio_control(&ssb, mask, value); +} + +static inline u32 gpio_intmask(u32 mask, u32 value) +{ + return ssb_gpio_intmask(&ssb, mask, value); +} + +static inline u32 gpio_intpolarity(u32 mask, u32 value) +{ + return ssb_gpio_polarity(&ssb, mask, value); +} + +static inline u32 __ssb_write32_masked(struct ssb_device *dev, u16 offset, + u32 mask, u32 value) +{ + value &= mask; + value |= ssb_read32(dev, offset) & ~mask; + ssb_write32(dev, offset, value); + return value; +} + +static void gpio_set_irqenable(int enabled, irqreturn_t (*handler)(int, void *)) +{ + int irq; + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,25) + irq = gpio_to_irq(0); + if (irq == -EINVAL) return; +#else + if (ssb.chipco.dev) + irq = ssb_mips_irq(ssb.chipco.dev) + 2; + else if (ssb.extif.dev) + irq = ssb_mips_irq(ssb.extif.dev) + 2; + else return; +#endif + + if (enabled) { + if (request_irq(irq, handler, IRQF_SHARED | IRQF_SAMPLE_RANDOM, "gpio", handler)) + return; + } else { + free_irq(irq, handler); + } + + if (ssb.chipco.dev) + __ssb_write32_masked(ssb.chipco.dev, SSB_CHIPCO_IRQMASK, SSB_CHIPCO_IRQ_GPIO, (enabled ? SSB_CHIPCO_IRQ_GPIO : 0)); +} + +#else #include #include @@ -18,13 +96,6 @@ #define sbh_lock bcm947xx_sbh_lock #endif -#define EXTIF_ADDR 0x1f000000 -#define EXTIF_UART (EXTIF_ADDR + 0x00800000) - -#define GPIO_TYPE_NORMAL (0x0 << 24) -#define GPIO_TYPE_EXTIF (0x1 << 24) -#define GPIO_TYPE_MASK (0xf << 24) - extern void *sbh; extern spinlock_t sbh_lock; @@ -65,6 +136,15 @@ static void gpio_set_irqenable(int enabled, irqreturn_t (*handler)(int, void *, spin_unlock_irqrestore(sbh_lock, flags); } +#endif /* BCMDRIVER */ + +#define EXTIF_ADDR 0x1f000000 +#define EXTIF_UART (EXTIF_ADDR + 0x00800000) + +#define GPIO_TYPE_NORMAL (0x0 << 24) +#define GPIO_TYPE_EXTIF (0x1 << 24) +#define GPIO_TYPE_MASK (0xf << 24) + static inline void gpio_set_extif(int gpio, int value) { volatile u8 *addr = (volatile u8 *) KSEG1ADDR(EXTIF_UART) + (gpio & ~GPIO_TYPE_MASK); @@ -74,5 +154,4 @@ static inline void gpio_set_extif(int gpio, int value) *addr; } - -#endif +#endif /* __DIAG_GPIO_H */