X-Git-Url: https://git.rohieb.name/openwrt.git/blobdiff_plain/3ff4f7ce16ee4fa844ab699d64c1b8f8f8065c07..2f3b768d56c443c04e57ada7ac6893ef7c8ab7bc:/target/linux/ramips/files/arch/mips/ralink/rt288x/rt288x.c diff --git a/target/linux/ramips/files/arch/mips/ralink/rt288x/rt288x.c b/target/linux/ramips/files/arch/mips/ralink/rt288x/rt288x.c index e7c3787e1..49a301a1e 100644 --- a/target/linux/ramips/files/arch/mips/ralink/rt288x/rt288x.c +++ b/target/linux/ramips/files/arch/mips/ralink/rt288x/rt288x.c @@ -1,7 +1,7 @@ /* * Ralink RT288x SoC specific setup * - * Copyright (C) 2008 Gabor Juhos + * Copyright (C) 2008-2009 Gabor Juhos * Copyright (C) 2008 Imre Kaloz * * Parts of this file are based on Ralink's 2.6.21 BSP @@ -14,6 +14,7 @@ #include #include #include +#include #include #include @@ -73,3 +74,35 @@ void __init rt288x_detect_sys_freq(void) rt288x_sys_freq = rt288x_cpu_freq / 2; } +static void rt288x_gpio_reserve(int first, int last) +{ + for (; first <= last; first++) + gpio_request(first, "reserved"); +} + +void __init rt288x_gpio_init(u32 mode) +{ + rt288x_sysc_wr(mode, SYSC_REG_GPIO_MODE); + + ramips_gpio_init(); + if ((mode & RT2880_GPIO_MODE_I2C) == 0) + rt288x_gpio_reserve(1, 2); + + if ((mode & RT2880_GPIO_MODE_SPI) == 0) + rt288x_gpio_reserve(3, 6); + + if ((mode & RT2880_GPIO_MODE_UART0) == 0) + rt288x_gpio_reserve(7, 14); + + if ((mode & RT2880_GPIO_MODE_JTAG) == 0) + rt288x_gpio_reserve(17, 21); + + if ((mode & RT2880_GPIO_MODE_MDIO) == 0) + rt288x_gpio_reserve(22, 23); + + if ((mode & RT2880_GPIO_MODE_SDRAM) == 0) + rt288x_gpio_reserve(24, 39); + + if ((mode & RT2880_GPIO_MODE_PCI) == 0) + rt288x_gpio_reserve(40, 71); +}