X-Git-Url: https://git.rohieb.name/openwrt.git/blobdiff_plain/4f531230a3c9c8984c5a8e8b38874be7f608f2d1..0cfd99d729c2d53031c2d564a4b70760eb1a7c30:/package/linux/kernel-source/arch/mips/brcm-boards/bcm947xx/sbpci.c diff --git a/package/linux/kernel-source/arch/mips/brcm-boards/bcm947xx/sbpci.c b/package/linux/kernel-source/arch/mips/brcm-boards/bcm947xx/sbpci.c index b3469134e..538dea57b 100644 --- a/package/linux/kernel-source/arch/mips/brcm-boards/bcm947xx/sbpci.c +++ b/package/linux/kernel-source/arch/mips/brcm-boards/bcm947xx/sbpci.c @@ -245,7 +245,6 @@ sbpci_ban(uint16 core) if (pci_banned < ARRAYSIZE(pci_ban)) pci_ban[pci_banned++] = core; } -//#define CT4712_WR 1 /* Workaround for 4712 */ int __init sbpci_init(void *sbh) @@ -257,7 +256,6 @@ sbpci_init(void *sbh) pci_config_regs *cfg; void *regs; char varname[8]; - int CT4712_WR; uint wlidx = 0; uint16 vendor, core; uint8 class, subclass, progif; @@ -274,12 +272,6 @@ sbpci_init(void *sbh) return -1; sb_core_reset(sbh, 0); - /* In some board, */ - if(nvram_match("boardtype", "bcm94710dev")) - CT4712_WR = 0; - else - CT4712_WR = 1; - boardflags = (uint32) getintvar(NULL, "boardflags"); if ((chip == BCM4310_DEVICE_ID) && (chiprev == 0)) @@ -290,8 +282,10 @@ sbpci_init(void *sbh) * PCI is bonded out, some boards may leave the pins * floating. */ - if (((chip == BCM4712_DEVICE_ID) && (chippkg == BCM4712SMALL_PKG_ID)) || - (boardflags & BFL_NOPCI) || CT4712_WR) + if (((chip == BCM4712_DEVICE_ID) && + ((chippkg == BCM4712SMALL_PKG_ID) || + (chippkg == BCM4712MID_PKG_ID))) || + (boardflags & BFL_NOPCI)) pci_disabled = TRUE; /*