X-Git-Url: https://git.rohieb.name/openwrt.git/blobdiff_plain/60da4b4a94df250ac7cde9d73bdc97fb1ebc5774..d3b0cb38e0ebdf22042b4fb318d0fec22fbd2da2:/target/linux/ramips/files/arch/mips/ralink/rt305x/setup.c diff --git a/target/linux/ramips/files/arch/mips/ralink/rt305x/setup.c b/target/linux/ramips/files/arch/mips/ralink/rt305x/setup.c index d574ef650..19f340bd4 100644 --- a/target/linux/ramips/files/arch/mips/ralink/rt305x/setup.c +++ b/target/linux/ramips/files/arch/mips/ralink/rt305x/setup.c @@ -13,20 +13,15 @@ #include #include #include -#include -#include #include #include #include +#include #include #include -#include "machine.h" - -enum rt305x_mach_type rt305x_mach; - static void rt305x_restart(char *command) { rt305x_sysc_wr(RT305X_RESET_SYSTEM, SYSC_REG_RESET_CTRL); @@ -42,75 +37,20 @@ static void rt305x_halt(void) cpu_wait(); } -static void __init rt305x_detect_mem_size(void) -{ - unsigned long size; - - for (size = RT305X_MEM_SIZE_MIN; size < RT305X_MEM_SIZE_MAX; - size <<= 1 ) { - if (!memcmp(rt305x_detect_mem_size, - rt305x_detect_mem_size + size, 1024)) - break; - } - - add_memory_region(RT305X_SDRAM_BASE, size, BOOT_MEM_RAM); -} - -static void __init rt305x_early_serial_setup(void) -{ - struct uart_port p; - int err; - - memset(&p, 0, sizeof(p)); - p.flags = UPF_SKIP_TEST; - p.iotype = UPIO_AU; - p.uartclk = rt305x_sys_freq; - p.regshift = 2; - p.type = PORT_16550A; - - p.mapbase = RT305X_UART0_BASE; - p.membase = ioremap_nocache(p.mapbase, RT305X_UART0_SIZE); - p.line = 0; - p.irq = RT305X_INTC_IRQ_UART0; - - err = early_serial_setup(&p); - if (err) - printk(KERN_ERR "RT305x: early UART0 registration failed %d\n", - err); - - p.mapbase = RT305X_UART1_BASE; - p.membase = ioremap_nocache(p.mapbase, RT305X_UART1_SIZE); - p.line = 1; - p.irq = RT305X_INTC_IRQ_UART1; - - err = early_serial_setup(&p); - if (err) - printk(KERN_ERR "RT305x: early UART1 registration failed %d\n", - err); -} - -const char *get_system_type(void) -{ - return rt305x_sys_type; -} - unsigned int __cpuinit get_c0_compare_irq(void) { return CP0_LEGACY_COMPARE_IRQ; } -void __init plat_mem_setup(void) +void __init ramips_soc_setup(void) { - set_io_port_base(KSEG1); - rt305x_sysc_base = ioremap_nocache(RT305X_SYSC_BASE, PAGE_SIZE); rt305x_memc_base = ioremap_nocache(RT305X_MEMC_BASE, PAGE_SIZE); - rt305x_detect_mem_size(); rt305x_detect_sys_type(); rt305x_detect_sys_freq(); - printk(KERN_INFO "%s running at %lu.%02lu MHz\n", get_system_type(), + printk(KERN_INFO "%s running at %lu.%02lu MHz\n", ramips_sys_type, rt305x_cpu_freq / 1000000, (rt305x_cpu_freq % 1000000) * 100 / 1000000); @@ -118,19 +58,13 @@ void __init plat_mem_setup(void) _machine_halt = rt305x_halt; pm_power_off = rt305x_halt; - rt305x_early_serial_setup(); + ramips_early_serial_setup(0, RT305X_UART0_BASE, rt305x_sys_freq, + RT305X_INTC_IRQ_UART0); + ramips_early_serial_setup(1, RT305X_UART1_BASE, rt305x_sys_freq, + RT305X_INTC_IRQ_UART1); } void __init plat_time_init(void) { mips_hpt_frequency = rt305x_cpu_freq / 2; } - -static int __init rt305x_machine_setup(void) -{ - mips_machine_setup(rt305x_mach); - - return 0; -} - -arch_initcall(rt305x_machine_setup);