X-Git-Url: https://git.rohieb.name/openwrt.git/blobdiff_plain/60da4b4a94df250ac7cde9d73bdc97fb1ebc5774..f6ba1d4f8c058ad3e8bf63cbea901b148c3bfee3:/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x.h

diff --git a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x.h b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x.h
index 4e0e36e8e..29c7a7205 100644
--- a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x.h
+++ b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x.h
@@ -1,7 +1,7 @@
 /*
  * Ralink RT288x SoC specific definitions
  *
- * Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
+ * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
  * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
  *
  * Parts of this file are based on Ralink's 2.6.21 BSP
@@ -17,18 +17,7 @@
 #include <linux/init.h>
 #include <linux/io.h>
 
-void rt288x_detect_sys_type(void) __init;
-
-#define RT288X_SYS_TYPE_LEN	64
-extern unsigned char rt288x_sys_type[RT288X_SYS_TYPE_LEN];
-
-void rt288x_detect_sys_freq(void) __init;
-
-extern unsigned long rt288x_cpu_freq;
-extern unsigned long rt288x_sys_freq;
-
-extern unsigned long rt288x_mach_type;
-#define RT288X_MACH_GENERIC	0
+void rt288x_detect_sys_type(void);
 
 #define RT288X_CPU_IRQ_BASE	0
 #define RT288X_INTC_IRQ_BASE	8
@@ -75,4 +64,12 @@ static inline u32 rt288x_memc_rr(unsigned reg)
 	return __raw_readl(rt288x_memc_base + reg);
 }
 
+void rt288x_gpio_init(u32 mode);
+
+#ifdef CONFIG_PCI
+int rt288x_register_pci(void);
+#else
+static inline int rt288x_register_pci(void) { return 0; }
+#endif /* CONFIG_PCI */
+
 #endif /* _RT228X_H_ */