X-Git-Url: https://git.rohieb.name/openwrt.git/blobdiff_plain/62be67eb01c9ee1941f8a6074fee4b297f92b6d5..de73b57f12eb068f9dab72fda7794afe023d07e2:/target/linux/ar71xx/files/arch/mips/pci/pci-ar71xx.c

diff --git a/target/linux/ar71xx/files/arch/mips/pci/pci-ar71xx.c b/target/linux/ar71xx/files/arch/mips/pci/pci-ar71xx.c
index 1014acc8c..fd6b37900 100644
--- a/target/linux/ar71xx/files/arch/mips/pci/pci-ar71xx.c
+++ b/target/linux/ar71xx/files/arch/mips/pci/pci-ar71xx.c
@@ -329,13 +329,12 @@ static void ar71xx_pci_irq_handler(unsigned int irq, struct irq_desc *desc)
 		spurious_interrupt();
 }
 
-static void ar71xx_pci_irq_unmask(unsigned int irq)
+static void ar71xx_pci_irq_unmask(struct irq_data *d)
 {
+	unsigned int irq = d->irq - AR71XX_PCI_IRQ_BASE;
 	void __iomem *base = ar71xx_reset_base;
 	u32 t;
 
-	irq -= AR71XX_PCI_IRQ_BASE;
-
 	t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
 	__raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE);
 
@@ -343,13 +342,12 @@ static void ar71xx_pci_irq_unmask(unsigned int irq)
 	(void) __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
 }
 
-static void ar71xx_pci_irq_mask(unsigned int irq)
+static void ar71xx_pci_irq_mask(struct irq_data *d)
 {
+	unsigned int irq = d->irq - AR71XX_PCI_IRQ_BASE;
 	void __iomem *base = ar71xx_reset_base;
 	u32 t;
 
-	irq -= AR71XX_PCI_IRQ_BASE;
-
 	t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
 	__raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE);
 
@@ -359,9 +357,9 @@ static void ar71xx_pci_irq_mask(unsigned int irq)
 
 static struct irq_chip ar71xx_pci_irq_chip = {
 	.name		= "AR71XX PCI ",
-	.mask		= ar71xx_pci_irq_mask,
-	.unmask		= ar71xx_pci_irq_unmask,
-	.mask_ack	= ar71xx_pci_irq_mask,
+	.irq_mask	= ar71xx_pci_irq_mask,
+	.irq_unmask	= ar71xx_pci_irq_unmask,
+	.irq_mask_ack	= ar71xx_pci_irq_mask,
 };
 
 static void __init ar71xx_pci_irq_init(void)
@@ -374,10 +372,10 @@ static void __init ar71xx_pci_irq_init(void)
 
 	for (i = AR71XX_PCI_IRQ_BASE;
 	     i < AR71XX_PCI_IRQ_BASE + AR71XX_PCI_IRQ_COUNT; i++)
-		set_irq_chip_and_handler(i, &ar71xx_pci_irq_chip,
+		irq_set_chip_and_handler(i, &ar71xx_pci_irq_chip,
 					 handle_level_irq);
 
-	set_irq_chained_handler(AR71XX_CPU_IRQ_IP2, ar71xx_pci_irq_handler);
+	irq_set_chained_handler(AR71XX_CPU_IRQ_IP2, ar71xx_pci_irq_handler);
 }
 
 int __init ar71xx_pcibios_init(void)