X-Git-Url: https://git.rohieb.name/openwrt.git/blobdiff_plain/79f8984b04af750bd6767d142360ed1516e92a67..08b66183fa7aa740e87a509ea5030fb5557e7eee:/target/linux/generic-2.6/files/drivers/net/phy/mvswitch.h

diff --git a/target/linux/generic-2.6/files/drivers/net/phy/mvswitch.h b/target/linux/generic-2.6/files/drivers/net/phy/mvswitch.h
index b51e84a73..1563eec4d 100644
--- a/target/linux/generic-2.6/files/drivers/net/phy/mvswitch.h
+++ b/target/linux/generic-2.6/files/drivers/net/phy/mvswitch.h
@@ -9,6 +9,19 @@
 #ifndef __MVSWITCH_H
 #define __MVSWITCH_H
 
+#define MV_HEADER_SIZE	2
+#define MV_HEADER_PORTS_M	0x001f
+#define MV_HEADER_PORTS_S	0
+#define MV_HEADER_VLAN_M	0xf000
+#define MV_HEADER_VLAN_S	12
+
+#define MV_TRAILER_SIZE	4
+#define MV_TRAILER_PORTS_M	0x1f
+#define MV_TRAILER_PORTS_S	16
+#define MV_TRAILER_FLAGS_S	24
+#define MV_TRAILER_OVERRIDE	0x80
+
+
 #define MV_PORTS	5
 #define MV_WANPORT	4
 #define MV_CPUPORT	5
@@ -36,7 +49,7 @@ enum {
 	MV_PHY_INTR_EN      = 0x12,
 	MV_PHY_INTR_STATUS  = 0x13,
 	MV_PHY_INTR_PORT    = 0x14,
-	MV_PHY_RECV_COUNTER = 0x15,
+	MV_PHY_RECV_COUNTER = 0x16,
 	MV_PHY_LED_PARALLEL = 0x16,
 	MV_PHY_LED_STREAM   = 0x17,
 	MV_PHY_LED_CTRL     = 0x18,
@@ -64,6 +77,7 @@ enum {
 	MV_PORTCTRL_ENABLED =  (3 << 0),
 	MV_PORTCTRL_VLANTUN =  (1 << 7),	/* Enforce VLANs on packets */
 	MV_PORTCTRL_RXTR    =  (1 << 8),	/* Enable Marvell packet trailer for ingress */
+	MV_PORTCTRL_HEADER	= (1 << 11),	/* Enable Marvell packet header mode for port */
 	MV_PORTCTRL_TXTR    = (1 << 14),	/* Enable Marvell packet trailer for egress */
 	MV_PORTCTRL_FORCEFL = (1 << 15),	/* force flow control */
 };
@@ -89,6 +103,19 @@ enum {
 #define MV_SWITCHREG(_type) MV_SWITCHREGS, MV_SWITCH_##_type
 
 enum {
+	MV_SWITCHCTL_EEIE   =  (1 << 0),	/* EEPROM interrupt enable */
+	MV_SWITCHCTL_PHYIE  =  (1 << 1),	/* PHY interrupt enable */
+	MV_SWITCHCTL_ATUDONE=  (1 << 2),	/* ATU done interrupt enable */
+	MV_SWITCHCTL_ATUIE  =  (1 << 3),	/* ATU interrupt enable */
+	MV_SWITCHCTL_CTRMODE=  (1 << 8),	/* statistics for rx and tx errors */
+	MV_SWITCHCTL_RELOAD =  (1 << 9),	/* reload registers from eeprom */
+	MV_SWITCHCTL_MSIZE  = (1 << 10),	/* increase maximum frame size */
+	MV_SWITCHCTL_DROP   = (1 << 13),	/* discard frames with excessive collisions */
+};
+
+enum {
+#define MV_ATUCTL_AGETIME_MIN	16
+#define MV_ATUCTL_AGETIME_MAX	4080
 #define MV_ATUCTL_AGETIME(_n)	((((_n) / 16) & 0xff) << 4)
 	MV_ATUCTL_ATU_256   = (0 << 12),
 	MV_ATUCTL_ATU_512   = (1 << 12),
@@ -96,7 +123,21 @@ enum {
 	MV_ATUCTL_ATUMASK   = (3 << 12),
 	MV_ATUCTL_NO_LEARN  = (1 << 14),
 	MV_ATUCTL_RESET     = (1 << 15),
-}
+};
+
+enum {
+#define MV_ATUOP_DBNUM(_n)	((_n) & 0x0f)
+
+	MV_ATUOP_NOOP       = (0 << 12),
+	MV_ATUOP_FLUSH_ALL  = (1 << 12),
+	MV_ATUOP_FLUSH_U    = (2 << 12),
+	MV_ATUOP_LOAD_DB    = (3 << 12),
+	MV_ATUOP_GET_NEXT   = (4 << 12),
+	MV_ATUOP_FLUSH_DB   = (5 << 12),
+	MV_ATUOP_FLUSH_DB_UU= (6 << 12),
+
+	MV_ATUOP_INPROGRESS = (1 << 15),
+};
 
 #define MV_IDENT_MASK		0xfff0
 #define MV_IDENT_VALUE		0x0600