X-Git-Url: https://git.rohieb.name/openwrt.git/blobdiff_plain/7ed9009bbdf799be5f9f1446c264b8504f483beb..90fba37c49479ed4e5233dc0d348cdf7d24c9ee1:/target/linux/brcm-2.4/files/arch/mips/bcm947xx/pcibios.c?ds=sidebyside

diff --git a/target/linux/brcm-2.4/files/arch/mips/bcm947xx/pcibios.c b/target/linux/brcm-2.4/files/arch/mips/bcm947xx/pcibios.c
index 012009a91..2d8549623 100644
--- a/target/linux/brcm-2.4/files/arch/mips/bcm947xx/pcibios.c
+++ b/target/linux/brcm-2.4/files/arch/mips/bcm947xx/pcibios.c
@@ -25,7 +25,6 @@
 
 #include <typedefs.h>
 #include <osl.h>
-#include <bcmutils.h>
 #include <sbconfig.h>
 #include <sbutils.h>
 #include <hndpci.h>
@@ -134,7 +133,7 @@ pcibios_init(void)
 {
 	ulong flags;
 
-	if (!(sbh = sb_kattach()))
+	if (!(sbh = sb_kattach(SB_OSH)))
 		panic("sb_kattach failed");
 	spin_lock_init(&sbh_lock);
 
@@ -143,6 +142,7 @@ pcibios_init(void)
 	spin_unlock_irqrestore(&sbh_lock, flags);
 
 	set_io_port_base((unsigned long) ioremap_nocache(SB_PCI_MEM, 0x04000000));
+	mdelay(300); /* workaround for atheros cards */
 
 	/* Scan the SB bus */
 	pci_scan_bus(0, &pcibios_ops, NULL);
@@ -311,6 +311,25 @@ pcibios_enable_device(struct pci_dev *dev, int mask)
 			writel(0x7FF, (ulong)regs + 0x200);
 			udelay(1);
 		}
+		/* PRxxxx: War for 5354 failures. */
+		if (sb_corerev(sbh) == 1) {
+			uint32 tmp;
+
+			/* Change Flush control reg */
+			tmp = readl((uintptr)regs + 0x400);
+			tmp &= ~8;
+			writel(tmp, (uintptr)regs + 0x400);
+			tmp = readl((uintptr)regs + 0x400);
+			printk("USB20H fcr: 0x%x\n", tmp);
+
+			/* Change Shim control reg */
+			tmp = readl((uintptr)regs + 0x304);
+			tmp &= ~0x100;
+			writel(tmp, (uintptr)regs + 0x304);
+			tmp = readl((uintptr)regs + 0x304);
+			printk("USB20H shim cr: 0x%x\n", tmp);
+		}
+
 	} else
 		sb_core_reset(sbh, 0, 0);