X-Git-Url: https://git.rohieb.name/openwrt.git/blobdiff_plain/809c03fe4c0f90c640b26e6a2792553b592c68f2..6d195f8820b7d274116aa3ff8abb34c6edb52737:/target/linux/xburst/files-2.6.32/arch/mips/jz4740/pm.c diff --git a/target/linux/xburst/files-2.6.32/arch/mips/jz4740/pm.c b/target/linux/xburst/files-2.6.32/arch/mips/jz4740/pm.c index d19bb81f0..e7e463ef3 100644 --- a/target/linux/xburst/files-2.6.32/arch/mips/jz4740/pm.c +++ b/target/linux/xburst/files-2.6.32/arch/mips/jz4740/pm.c @@ -18,44 +18,32 @@ #include #include #include +#include + +#include "clock.h" extern void jz4740_intc_suspend(void); extern void jz4740_intc_resume(void); +extern void jz_gpio_suspend(void); +extern void jz_gpio_resume(void); static int jz_pm_enter(suspend_state_t state) { - unsigned long nfcsr = REG_EMC_NFCSR; - uint32_t scr = REG_CPM_SCR; - - /* Disable nand flash */ - REG_EMC_NFCSR = ~0xff; - - udelay(100); - - /*stop udc and usb*/ - REG_CPM_SCR &= ~( 1<<6 | 1<<7); - REG_CPM_SCR |= 0<<6 | 1<<7; - + jz_gpio_suspend(); jz4740_intc_suspend(); + jz4740_clock_suspend(); + + jz4740_clock_set_wait_mode(JZ4740_WAIT_MODE_SLEEP); - /* Enter SLEEP mode */ - REG_CPM_LCR &= ~CPM_LCR_LPM_MASK; - REG_CPM_LCR |= CPM_LCR_LPM_SLEEP; __asm__(".set\tmips3\n\t" "wait\n\t" ".set\tmips0"); - /* Restore to IDLE mode */ - REG_CPM_LCR &= ~CPM_LCR_LPM_MASK; - REG_CPM_LCR |= CPM_LCR_LPM_IDLE; - - /* Restore nand flash control register */ - REG_EMC_NFCSR = nfcsr; + jz4740_clock_set_wait_mode(JZ4740_WAIT_MODE_IDLE); + jz4740_clock_resume(); jz4740_intc_resume(); - - /* Restore sleep control register */ - REG_CPM_SCR = scr; + jz_gpio_resume(); return 0; }