X-Git-Url: https://git.rohieb.name/openwrt.git/blobdiff_plain/a5c4f544067e9cf7a79342bd20547beb41d80fba..82084b03eab7d814f82c74f7f325357c11a357c8:/target/linux/atheros/patches-2.6.28/120-spiflash.patch

diff --git a/target/linux/atheros/patches-2.6.28/120-spiflash.patch b/target/linux/atheros/patches-2.6.28/120-spiflash.patch
index e66136506..e33733ecf 100644
--- a/target/linux/atheros/patches-2.6.28/120-spiflash.patch
+++ b/target/linux/atheros/patches-2.6.28/120-spiflash.patch
@@ -288,10 +288,10 @@
 +}
 +
 +static void
-+spiflash_wait_complete(struct spiflash_priv *priv)
++spiflash_wait_complete(struct spiflash_priv *priv, unsigned int timeout)
 +{
 +	busy_wait(priv, spiflash_sendcmd(priv, SPI_RD_STATUS, 0) &
-+		SPI_STATUS_WIP, 20);
++		SPI_STATUS_WIP, timeout);
 +	spiflash_done(priv);
 +}
 +
@@ -321,7 +321,7 @@
 +	reg |= op->tx_cnt | SPI_CTL_START;
 +	spiflash_write_reg(priv, SPI_FLASH_CTL, reg);
 +
-+	spiflash_wait_complete(priv);
++	spiflash_wait_complete(priv, 20);
 +
 +	instr->state = MTD_ERASE_DONE;
 +	if (instr->callback)
@@ -418,7 +418,7 @@
 +		reg |= (read_len + 4) | SPI_CTL_START;
 +		spiflash_write_reg(priv, SPI_FLASH_CTL, reg);
 +
-+		spiflash_wait_complete(priv);
++		spiflash_wait_complete(priv, 1);
 +
 +		bytes_left -= read_len;
 +		to += read_len;