X-Git-Url: https://git.rohieb.name/openwrt.git/blobdiff_plain/a850143071b5d5e48ce580bae1d744be2db6b6fb..0dc7fb2669e5eebf487494243b15f82b1addf206:/package/mac80211/patches/550-ath9k_pending_work.patch?ds=sidebyside diff --git a/package/mac80211/patches/550-ath9k_pending_work.patch b/package/mac80211/patches/550-ath9k_pending_work.patch index 1a6f06d20..7e0c70182 100644 --- a/package/mac80211/patches/550-ath9k_pending_work.patch +++ b/package/mac80211/patches/550-ath9k_pending_work.patch @@ -1,24 +1,49 @@ --- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c +++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c -@@ -852,7 +852,8 @@ static int ar5008_hw_process_ini(struct +@@ -852,7 +852,7 @@ static int ar5008_hw_process_ini(struct REG_WRITE_ARRAY(&ah->iniBB_RfGain, freqIndex, regWrites); - if (AR_SREV_9280_20(ah) && IS_CHAN_A_5MHZ_SPACED(chan)) { -+ if (AR_SREV_9280_20(ah) && -+ (ah->caps.hw_caps & ATH9K_HW_CAP_FASTCLOCK)) { ++ if (IS_CHAN_A_FAST_CLOCK(ah, chan)) { REG_WRITE_ARRAY(&ah->iniModesAdditional, modesIndex, regWrites); } -@@ -895,7 +896,7 @@ static void ar5008_hw_set_rfmode(struct +@@ -894,8 +894,7 @@ static void ar5008_hw_set_rfmode(struct + rfMode |= (IS_CHAN_5GHZ(chan)) ? AR_PHY_MODE_RF5GHZ : AR_PHY_MODE_RF2GHZ; - if ((AR_SREV_9280_20(ah) || AR_SREV_9300_20_OR_LATER(ah)) +- if ((AR_SREV_9280_20(ah) || AR_SREV_9300_20_OR_LATER(ah)) - && IS_CHAN_A_5MHZ_SPACED(chan)) -+ && (ah->caps.hw_caps & ATH9K_HW_CAP_FASTCLOCK)) ++ if (IS_CHAN_A_FAST_CLOCK(ah, chan)) rfMode |= (AR_PHY_MODE_DYNAMIC | AR_PHY_MODE_DYN_CCK_DISABLE); REG_WRITE(ah, AR_PHY_MODE, rfMode); +--- a/drivers/net/wireless/ath/ath9k/ar9002_phy.c ++++ b/drivers/net/wireless/ath/ath9k/ar9002_phy.c +@@ -455,16 +455,12 @@ static u32 ar9002_hw_compute_pll_control + pll |= SM(0x2, AR_RTC_9160_PLL_CLKSEL); + + if (chan && IS_CHAN_5GHZ(chan)) { +- pll |= SM(0x28, AR_RTC_9160_PLL_DIV); +- +- +- if (AR_SREV_9280_20(ah)) { +- if (((chan->channel % 20) == 0) +- || ((chan->channel % 10) == 0)) +- pll = 0x2850; +- else +- pll = 0x142c; +- } ++ if (IS_CHAN_A_FAST_CLOCK(ah, chan)) ++ pll = 0x142c; ++ else if (AR_SREV_9280_20(ah)) ++ pll = 0x2850; ++ else ++ pll |= SM(0x28, AR_RTC_9160_PLL_DIV); + } else { + pll |= SM(0x2c, AR_RTC_9160_PLL_DIV); + } --- a/drivers/net/wireless/ath/ath9k/ar9003_calib.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_calib.c @@ -755,7 +755,8 @@ static bool ar9003_hw_init_cal(struct at @@ -31,6 +56,44 @@ /* Revert chainmasks to their original values before NF cal */ ar9003_hw_set_chain_masks(ah, ah->rxchainmask, ah->txchainmask); +--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c ++++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c +@@ -659,6 +659,9 @@ static void ar9300_swap_eeprom(struct ar + word = swab16(eep->baseEepHeader.regDmn[1]); + eep->baseEepHeader.regDmn[1] = word; + ++ dword = swab32(eep->baseEepHeader.swreg); ++ eep->baseEepHeader.swreg = dword; ++ + dword = swab32(eep->modalHeader2G.antCtrlCommon); + eep->modalHeader2G.antCtrlCommon = dword; + +@@ -1200,7 +1203,7 @@ static u8 ar9003_hw_eeprom_get_tgt_pwr(s + u8 *pFreqBin; + + if (is2GHz) { +- numPiers = AR9300_NUM_5G_20_TARGET_POWERS; ++ numPiers = AR9300_NUM_2G_20_TARGET_POWERS; + pEepromTargetPwr = eep->calTargetPower2G; + pFreqBin = eep->calTarget_freqbin_2G; + } else { +@@ -1236,7 +1239,7 @@ static u8 ar9003_hw_eeprom_get_ht20_tgt_ + u8 *pFreqBin; + + if (is2GHz) { +- numPiers = AR9300_NUM_5G_20_TARGET_POWERS; ++ numPiers = AR9300_NUM_2G_20_TARGET_POWERS; + pEepromTargetPwr = eep->calTargetPower2GHT20; + pFreqBin = eep->calTarget_freqbin_2GHT20; + } else { +@@ -1817,6 +1820,7 @@ static void ath9k_hw_ar9300_set_txpower( + u8 twiceMaxRegulatoryPower, + u8 powerLimit) + { ++ ah->txpower_limit = powerLimit; + ar9003_hw_set_target_power_eeprom(ah, chan->channel); + ar9003_hw_calibration_apply(ah, chan->channel); + } --- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h +++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h @@ -265,7 +265,7 @@ struct cal_ctl_edge_pwr { @@ -372,6 +435,18 @@ {0x00004040, 0x08213e5e}, {0x00004040, 0x0008003b}, {0x00004044, 0x00000000}, +--- a/drivers/net/wireless/ath/ath9k/ar9003_mac.c ++++ b/drivers/net/wireless/ath/ath9k/ar9003_mac.c +@@ -311,6 +311,9 @@ static void ar9003_hw_set11n_txdesc(stru + { + struct ar9003_txc *ads = (struct ar9003_txc *) ds; + ++ if (txpower > ah->txpower_limit) ++ txpower = ah->txpower_limit; ++ + txpower += ah->txpower_indexoffset; + if (txpower > 63) + txpower = 63; --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c @@ -375,16 +375,7 @@ static u32 ar9003_hw_compute_pll_control @@ -397,7 +472,7 @@ * different modal values. */ - if (IS_CHAN_A_5MHZ_SPACED(chan)) -+ if (ah->caps.hw_caps & ATH9K_HW_CAP_FASTCLOCK) ++ if (IS_CHAN_A_FAST_CLOCK(ah, chan)) REG_WRITE_ARRAY(&ah->iniModesAdditional, modesIndex, regWrites); @@ -406,10 +481,41 @@ ? AR_PHY_MODE_DYNAMIC : AR_PHY_MODE_OFDM; - if (IS_CHAN_A_5MHZ_SPACED(chan)) -+ if (ah->caps.hw_caps & ATH9K_HW_CAP_FASTCLOCK) ++ if (IS_CHAN_A_FAST_CLOCK(ah, chan)) rfMode |= (AR_PHY_MODE_DYNAMIC | AR_PHY_MODE_DYN_CCK_DISABLE); REG_WRITE(ah, AR_PHY_MODE, rfMode); +@@ -1102,6 +1093,7 @@ static void ar9003_hw_loadnf(struct ath_ + ath_print(common, ATH_DBG_ANY, "Timeout while waiting for nf " + "to load: AR_PHY_AGC_CONTROL=0x%x\n", + REG_READ(ah, AR_PHY_AGC_CONTROL)); ++ return; + } + + /* +--- a/drivers/net/wireless/ath/ath9k/eeprom.h ++++ b/drivers/net/wireless/ath/ath9k/eeprom.h +@@ -300,7 +300,8 @@ struct base_eep_header { + u32 binBuildNumber; + u8 deviceType; + u8 pwdclkind; +- u8 futureBase_1[2]; ++ u8 fastClk5g; ++ u8 divChain; + u8 rxGainType; + u8 dacHiPwrMode_5G; + u8 openLoopPwrCntl; +--- a/drivers/net/wireless/ath/ath9k/eeprom_def.c ++++ b/drivers/net/wireless/ath/ath9k/eeprom_def.c +@@ -274,6 +274,8 @@ static u32 ath9k_hw_def_get_eeprom(struc + return pBase->txMask; + case EEP_RX_MASK: + return pBase->rxMask; ++ case EEP_FSTCLK_5G: ++ return pBase->fastClk5g; + case EEP_RXGAIN_TYPE: + return pBase->rxGainType; + case EEP_TXGAIN_TYPE: --- a/drivers/net/wireless/ath/ath9k/hw.c +++ b/drivers/net/wireless/ath/ath9k/hw.c @@ -29,6 +29,7 @@ @@ -438,15 +544,25 @@ /* + * Tx IQ Calibration (ah->config.tx_iq_calibration) is only -+ * used by AR9003 but it is busted right now, it will take a -+ * while to fix so this is currently disabled. ++ * used by AR9003, but it is showing reliability issues. ++ * It will take a while to fix so this is currently disabled. + */ + + /* * We need this for PCI devices only (Cardbus, PCI, miniPCI) * _and_ if on non-uniprocessor systems (Multiprocessor/HT). * This means we use it for all AR5416 devices, and the few -@@ -2198,7 +2209,8 @@ int ath9k_hw_fill_cap_info(struct ath_hw +@@ -1233,8 +1244,7 @@ int ath9k_hw_reset(struct ath_hw *ah, st + (chan->channel != ah->curchan->channel) && + ((chan->channelFlags & CHANNEL_ALL) == + (ah->curchan->channelFlags & CHANNEL_ALL)) && +- !(AR_SREV_9280(ah) || IS_CHAN_A_5MHZ_SPACED(chan) || +- IS_CHAN_A_5MHZ_SPACED(ah->curchan))) { ++ !AR_SREV_9280(ah)) { + + if (ath9k_hw_channel_change(ah, chan)) { + ath9k_hw_loadnf(ah, ah->curchan); +@@ -2198,7 +2208,8 @@ int ath9k_hw_fill_cap_info(struct ath_hw } if (AR_SREV_9300_20_OR_LATER(ah)) { @@ -456,6 +572,18 @@ pCap->rx_hp_qdepth = ATH9K_HW_RX_HP_QDEPTH; pCap->rx_lp_qdepth = ATH9K_HW_RX_LP_QDEPTH; pCap->rx_status_len = sizeof(struct ar9003_rxs); +@@ -2206,6 +2217,11 @@ int ath9k_hw_fill_cap_info(struct ath_hw + pCap->txs_len = sizeof(struct ar9003_txs); + } else { + pCap->tx_desc_len = sizeof(struct ath_desc); ++ if (AR_SREV_9280_20(ah) && ++ ((ah->eep_ops->get_eeprom(ah, EEP_MINOR_REV) <= ++ AR5416_EEP_MINOR_VER_16) || ++ ah->eep_ops->get_eeprom(ah, EEP_FSTCLK_5G))) ++ pCap->hw_caps |= ATH9K_HW_CAP_FASTCLOCK; + } + + if (AR_SREV_9300_20_OR_LATER(ah)) --- a/drivers/net/wireless/ath/ath9k/hw.h +++ b/drivers/net/wireless/ath/ath9k/hw.h @@ -198,6 +198,7 @@ enum ath9k_hw_caps { @@ -474,3 +602,54 @@ int spurmode; u16 spurchans[AR_EEPROM_MODAL_SPURS][2]; u8 max_txtrig_level; +@@ -367,10 +369,9 @@ struct ath9k_channel { + #define IS_CHAN_2GHZ(_c) (((_c)->channelFlags & CHANNEL_2GHZ) != 0) + #define IS_CHAN_HALF_RATE(_c) (((_c)->channelFlags & CHANNEL_HALF) != 0) + #define IS_CHAN_QUARTER_RATE(_c) (((_c)->channelFlags & CHANNEL_QUARTER) != 0) +-#define IS_CHAN_A_5MHZ_SPACED(_c) \ ++#define IS_CHAN_A_FAST_CLOCK(_ah, _c) \ + ((((_c)->channelFlags & CHANNEL_5GHZ) != 0) && \ +- (((_c)->channel % 20) != 0) && \ +- (((_c)->channel % 10) != 0)) ++ ((_ah)->caps.hw_caps & ATH9K_HW_CAP_FASTCLOCK)) + + /* These macros check chanmode and not channelFlags */ + #define IS_CHAN_B(_c) ((_c)->chanmode == CHANNEL_B) +@@ -718,6 +719,7 @@ struct ath_hw { + u32 *addac5416_21; + u32 *bank6Temp; + ++ u8 txpower_limit; + int16_t txpower_indexoffset; + int coverage_class; + u32 beacon_interval; +--- a/drivers/net/wireless/ath/ath9k/mac.c ++++ b/drivers/net/wireless/ath/ath9k/mac.c +@@ -878,10 +878,12 @@ enum ath9k_int ath9k_hw_set_interrupts(s + if (ints & ATH9K_INT_TX) { + if (ah->config.tx_intr_mitigation) + mask |= AR_IMR_TXMINTR | AR_IMR_TXINTM; +- if (ah->txok_interrupt_mask) +- mask |= AR_IMR_TXOK; +- if (ah->txdesc_interrupt_mask) +- mask |= AR_IMR_TXDESC; ++ else { ++ if (ah->txok_interrupt_mask) ++ mask |= AR_IMR_TXOK; ++ if (ah->txdesc_interrupt_mask) ++ mask |= AR_IMR_TXDESC; ++ } + if (ah->txerr_interrupt_mask) + mask |= AR_IMR_TXERR; + if (ah->txeol_interrupt_mask) +--- a/drivers/net/wireless/ath/ath9k/xmit.c ++++ b/drivers/net/wireless/ath/ath9k/xmit.c +@@ -2291,6 +2291,8 @@ void ath_tx_edma_tasklet(struct ath_soft + ath_tx_complete_buf(sc, bf, txq, &bf_head, + &txs, txok, 0); + ++ ath_wake_mac80211_queue(sc, txq); ++ + spin_lock_bh(&txq->axq_lock); + if (!list_empty(&txq->txq_fifo_pending)) { + INIT_LIST_HEAD(&bf_head);