X-Git-Url: https://git.rohieb.name/openwrt.git/blobdiff_plain/be7ba8de2fdef858152092df620fd82981659d50..8fb9ab479d4b4df9d66ea4f2f92fa7cf7ff43db5:/target/linux/ramips/files/arch/mips/ralink/common/setup.c diff --git a/target/linux/ramips/files/arch/mips/ralink/common/setup.c b/target/linux/ramips/files/arch/mips/ralink/common/setup.c index 81a1ba4fa..3030fcd15 100644 --- a/target/linux/ramips/files/arch/mips/ralink/common/setup.c +++ b/target/linux/ramips/files/arch/mips/ralink/common/setup.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include @@ -43,6 +44,30 @@ static void __init detect_mem_size(void) add_memory_region(RALINK_SOC_SDRAM_BASE, size, BOOT_MEM_RAM); } +void __init ramips_early_serial_setup(int line, unsigned base, unsigned freq, + unsigned irq) +{ + struct uart_port p; + int err; + + memset(&p, 0, sizeof(p)); + p.flags = UPF_SKIP_TEST; + p.iotype = UPIO_AU; + p.uartclk = freq; + p.regshift = 2; + p.type = PORT_16550A; + + p.mapbase = base; + p.membase = ioremap_nocache(p.mapbase, PAGE_SIZE); + p.line = line; + p.irq = irq; + + err = early_serial_setup(&p); + if (err) + printk(KERN_ERR "early serial%d registration failed %d\n", + line, err); +} + void __init plat_mem_setup(void) { set_io_port_base(KSEG1);