X-Git-Url: https://git.rohieb.name/openwrt.git/blobdiff_plain/d6de09a810f691c069f5d350fe261ee2761b590b..bdb465749d0bc1d806cc3d678b8f5c0766f1a810:/target/linux/lantiq/patches/105-header_xway.patch

diff --git a/target/linux/lantiq/patches/105-header_xway.patch b/target/linux/lantiq/patches/105-header_xway.patch
index 8f5d8d9ee..18e37a70b 100644
--- a/target/linux/lantiq/patches/105-header_xway.patch
+++ b/target/linux/lantiq/patches/105-header_xway.patch
@@ -165,15 +165,15 @@
 + */
 +typedef void (*timer_callback)(unsigned long arg);
 +
-+extern int ifxmips_request_timer(unsigned int, unsigned int, unsigned long, unsigned long, unsigned long);
-+extern int ifxmips_free_timer(unsigned int);
-+extern int ifxmips_start_timer(unsigned int, int);
-+extern int ifxmips_stop_timer(unsigned int);
-+extern int ifxmips_reset_counter_flags(u32 timer, u32 flags);
-+extern int ifxmips_get_count_value(unsigned int, unsigned long *);
-+extern u32 ifxmips_cal_divider(unsigned long);
-+extern int ifxmips_set_timer(unsigned int, unsigned int, int, int, unsigned int, unsigned long, unsigned long);
-+extern int ifxmips_set_counter(unsigned int timer, unsigned int flag,
++extern int lq_request_timer(unsigned int, unsigned int, unsigned long, unsigned long, unsigned long);
++extern int lq_free_timer(unsigned int);
++extern int lq_start_timer(unsigned int, int);
++extern int lq_stop_timer(unsigned int);
++extern int lq_reset_counter_flags(u32 timer, u32 flags);
++extern int lq_get_count_value(unsigned int, unsigned long *);
++extern u32 lq_cal_divider(unsigned long);
++extern int lq_set_timer(unsigned int, unsigned int, int, int, unsigned int, unsigned long, unsigned long);
++extern int lq_set_counter(unsigned int timer, unsigned int flag,
 +	u32 reload, unsigned long arg1, unsigned long arg2);
 +
 +#endif /* __DANUBE_GPTU_DEV_H__2005_07_26__10_19__ */
@@ -273,8 +273,8 @@
 +#define PCI_CS_PR_BASE_ADDR	(KSEG1 + 0x17000000)
 +
 +/*------------ WDT */
-+#define LQ_WDT_BASE			0x1F880000
-+#define LQ_WDT_SIZE			0x400
++#define LQ_WDT_BASE			0x1F8803F0
++#define LQ_WDT_SIZE			0x10
 +
 +/*------------ Serial To Parallel conversion  */
 +#define LQ_STP_BASE			0x1E100BB0