X-Git-Url: https://git.rohieb.name/openwrt.git/blobdiff_plain/d92ab4b98c9d797587af5c81c3ffa6fbe15d206c..08c054f87ef8029e51097be4d7ec71117aa198e9:/target/linux/ar7-2.6/files/arch/mips/ar7/clock.c

diff --git a/target/linux/ar7-2.6/files/arch/mips/ar7/clock.c b/target/linux/ar7-2.6/files/arch/mips/ar7/clock.c
index 6da0c20aa..43e36ec90 100644
--- a/target/linux/ar7-2.6/files/arch/mips/ar7/clock.c
+++ b/target/linux/ar7-2.6/files/arch/mips/ar7/clock.c
@@ -41,12 +41,12 @@
 #define BOOT_PLL_2TO1_MODE 0x00008000
 
 struct tnetd7300_clock {
-	u32 ctrl;
+	volatile u32 ctrl;
 #define PREDIV_MASK 0x001f0000
 #define PREDIV_SHIFT 16
 #define POSTDIV_MASK 0x0000001f
 	u32 unused1[3];
-	u32 pll;
+	volatile u32 pll;
 #define MUL_MASK 0x0000f000
 #define MUL_SHIFT 12
 #define PLL_MODE_MASK 0x00000001
@@ -64,16 +64,16 @@ struct tnetd7300_clocks {
 } __attribute__ ((packed));
 
 struct tnetd7200_clock {
-	u32 ctrl;
+	volatile u32 ctrl;
 	u32 unused1[3];
 #define DIVISOR_ENABLE_MASK 0x00008000
-	u32 mul;
-	u32 prediv;
-	u32 postdiv;
+	volatile u32 mul;
+	volatile u32 prediv;
+	volatile u32 postdiv;
 	u32 unused2[7];
-	u32 cmd;
-	u32 status;
-	u32 cmden;
+	volatile u32 cmd;
+	volatile u32 status;
+	volatile u32 cmden;
 	u32 padding[15];
 };
 
@@ -174,10 +174,12 @@ static int tnetd7300_get_clock(u32 shift, struct tnetd7300_clock *clock,
 {
 	int product;
 	int base_clock = ar7_ref_clock;
-	int prediv = ((clock->ctrl & PREDIV_MASK) >> PREDIV_SHIFT) + 1;
-	int postdiv = (clock->ctrl & POSTDIV_MASK) + 1;
+	u32 ctrl = clock->ctrl;
+	u32 pll = clock->pll;
+	int prediv = ((ctrl & PREDIV_MASK) >> PREDIV_SHIFT) + 1;
+	int postdiv = (ctrl & POSTDIV_MASK) + 1;
 	int divisor = prediv * postdiv;
-	int mul = ((clock->pll & MUL_MASK) >> MUL_SHIFT) + 1;
+	int mul = ((pll & MUL_MASK) >> MUL_SHIFT) + 1;
 
 	switch ((*bootcr & (BOOT_PLL_SOURCE_MASK << shift)) >> shift) {
 	case BOOT_PLL_SOURCE_BUS:
@@ -197,10 +199,10 @@ static int tnetd7300_get_clock(u32 shift, struct tnetd7300_clock *clock,
 	if (*bootcr & BOOT_PLL_BYPASS)
 		return base_clock / divisor;
 
-	if ((clock->pll & PLL_MODE_MASK) == 0)
+	if ((pll & PLL_MODE_MASK) == 0)
 		return (base_clock >> (mul / 16 + 1)) / divisor;
 
-	if ((clock->pll & (PLL_NDIV | PLL_DIV)) == (PLL_NDIV | PLL_DIV)) {
+	if ((pll & (PLL_NDIV | PLL_DIV)) == (PLL_NDIV | PLL_DIV)) {
 		product = (mul & 1) ? 
 			(base_clock * mul) >> 1 :
 			(base_clock * (mul - 1)) >> 2;
@@ -216,7 +218,7 @@ static int tnetd7300_get_clock(u32 shift, struct tnetd7300_clock *clock,
 static void tnetd7300_set_clock(u32 shift, struct tnetd7300_clock *clock,
 				u32 *bootcr, u32 frequency)
 {
-	volatile u32 status;
+	u32 status;
 	int prediv, postdiv, mul;
 	int base_clock = ar7_bus_clock;
 
@@ -290,7 +292,7 @@ static int tnetd7200_get_clock(int base, struct tnetd7200_clock *clock,
 static void tnetd7200_set_clock(int base, struct tnetd7200_clock *clock,
 				u32 *bootcr, u32 frequency) 
 {
-	volatile u32 status;
+	u32 status;
 	int prediv, postdiv, mul;
 
 	calculate(base, frequency, &prediv, &postdiv, &mul);