X-Git-Url: https://git.rohieb.name/openwrt.git/blobdiff_plain/d983336e06bb4ebfd653c0fd5992ab9700e9d0c0..c1679af6b381809d1c133fbc609f0c5c465a512a:/target/linux/brcm63xx/patches-3.0/240-spi.patch

diff --git a/target/linux/brcm63xx/patches-3.0/240-spi.patch b/target/linux/brcm63xx/patches-3.0/240-spi.patch
index 5e3f1f51c..4c5cfa6cb 100644
--- a/target/linux/brcm63xx/patches-3.0/240-spi.patch
+++ b/target/linux/brcm63xx/patches-3.0/240-spi.patch
@@ -170,7 +170,7 @@
  #define BCM_6358_OHCI0_IRQ		(IRQ_INTERNAL_BASE + 5)
 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
 +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -771,4 +771,116 @@
+@@ -805,4 +805,116 @@
  #define DMIPSPLLCFG_N2_SHIFT		29
  #define DMIPSPLLCFG_N2_MASK		(0x7 << DMIPSPLLCFG_N2_SHIFT)
  
@@ -919,12 +919,12 @@
  #include <board_bcm963xx.h>
  
  #define PFX	"board_bcm963xx: "
-@@ -939,6 +940,8 @@ int __init board_register_devices(void)
+@@ -933,6 +934,8 @@ int __init board_register_devices(void)
  	if (board.num_spis)
  		spi_register_board_info(board.spis, board.num_spis);
  
 +	bcm63xx_spi_register();
 +
  	/* read base address of boot chip select (0) */
- 	if (BCMCPU_IS_6345())
- 		val = 0x1fc00000;
+ 	val = bcm_mpi_readl(MPI_CSBASE_REG(0));
+ 	val &= MPI_CSBASE_BASE_MASK;