X-Git-Url: https://git.rohieb.name/openwrt.git/blobdiff_plain/da030183afb2b6def6cfe87af7cf2796c4a4fb9c..f9330b47eabb5e7584e9a0c5c775cb3ace652c35:/target/linux/brcm-2.4/patches/001-bcm47xx.patch diff --git a/target/linux/brcm-2.4/patches/001-bcm47xx.patch b/target/linux/brcm-2.4/patches/001-bcm47xx.patch index 557d24ff3..9c954fa92 100644 --- a/target/linux/brcm-2.4/patches/001-bcm47xx.patch +++ b/target/linux/brcm-2.4/patches/001-bcm47xx.patch @@ -1,59 +1,7 @@ -diff -urN linux.old/arch/mips/Makefile linux.dev/arch/mips/Makefile ---- linux.old/arch/mips/Makefile 2006-04-27 18:04:37.000000000 +0200 -+++ linux.dev/arch/mips/Makefile 2006-04-27 19:24:19.000000000 +0200 -@@ -726,6 +726,19 @@ - endif - - # -+# Broadcom BCM947XX variants -+# -+ifdef CONFIG_BCM947XX -+LIBS += arch/mips/bcm947xx/generic/brcm.o arch/mips/bcm947xx/bcm947xx.o -+SUBDIRS += arch/mips/bcm947xx/generic arch/mips/bcm947xx -+LOADADDR := 0x80001000 -+ -+zImage: vmlinux -+ $(MAKE) -C arch/$(ARCH)/bcm947xx/compressed -+export LOADADDR -+endif -+ -+# - # Choosing incompatible machines durings configuration will result in - # error messages during linking. Select a default linkscript if - # none has been choosen above. -@@ -778,6 +791,7 @@ - $(MAKE) -C arch/$(ARCH)/tools clean - $(MAKE) -C arch/mips/baget clean - $(MAKE) -C arch/mips/lasat clean -+ $(MAKE) -C arch/mips/bcm947xx/compressed clean - - archmrproper: - @$(MAKEBOOT) mrproper -diff -urN linux.old/arch/mips/bcm947xx/Makefile linux.dev/arch/mips/bcm947xx/Makefile ---- linux.old/arch/mips/bcm947xx/Makefile 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/Makefile 2006-05-02 17:46:22.000000000 +0200 -@@ -0,0 +1,17 @@ -+# -+# Makefile for the BCM947xx specific kernel interface routines -+# under Linux. -+# -+ -+EXTRA_CFLAGS+=-I$(TOPDIR)/arch/mips/bcm947xx/include -DBCMDRIVER -+ -+O_TARGET := bcm947xx.o -+ -+export-objs := export.o -+obj-y := prom.o setup.o time.o sbmips.o gpio.o -+obj-y += nvram.o nvram_linux.o sflash.o cfe_env.o -+obj-y += sbutils.o bcmutils.o bcmsrom.o hndchipc.o -+obj-$(CONFIG_PCI) += sbpci.o pcibios.o -+obj-y += export.o -+ -+include $(TOPDIR)/Rules.make diff -urN linux.old/arch/mips/bcm947xx/bcmsrom.c linux.dev/arch/mips/bcm947xx/bcmsrom.c --- linux.old/arch/mips/bcm947xx/bcmsrom.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/bcmsrom.c 2006-04-27 20:32:48.000000000 +0200 -@@ -0,0 +1,1212 @@ ++++ linux.dev/arch/mips/bcm947xx/bcmsrom.c 2006-10-02 21:19:59.000000000 +0200 +@@ -0,0 +1,1213 @@ +/* + * Misc useful routines to access NIC SROM/OTP . + * @@ -200,12 +148,12 @@ diff -urN linux.old/arch/mips/bcm947xx/bcmsrom.c linux.dev/arch/mips/bcm947xx/bc + + nw = crc_range / 2; + /* read first 64 words from srom */ -+ if (srom_read(bustype, curmap, osh, 0, nw * 2, image)) ++ if (srom_read(bustype, curmap, osh, 0, crc_range, image)) + return 1; + if (image[SROM4_SIGN] == SROM4_SIGNATURE) { + crc_range = SROM4_WORDS; + nw = crc_range / 2; -+ if (srom_read(bustype, curmap, osh, 0, nw * 2, image)) ++ if (srom_read(bustype, curmap, osh, 0, crc_range, image)) + return 1; + } + /* make changes */ @@ -748,18 +696,17 @@ diff -urN linux.old/arch/mips/bcm947xx/bcmsrom.c linux.dev/arch/mips/bcm947xx/bc + + err = sprom_read_pci(osh, (void*)((int8*)curmap + PCI_BAR0_SPROM_OFFSET), 0, b, + 64, TRUE); -+ if (err == 0) { ++ if (b[SROM4_SIGN] == SROM4_SIGNATURE) { ++ /* sromrev >= 4, read more */ ++ err = sprom_read_pci(osh, (void*)((int8*)curmap + PCI_BAR0_SPROM_OFFSET), 0, b, SROM4_WORDS, TRUE); ++ sromrev = b[SROM4_WORDS - 1] & 0xff; ++ } else if (err == 0) { + /* srom is good and is rev < 4 */ + /* top word of sprom contains version and crc8 */ + sromrev = b[63] & 0xff; + /* bcm4401 sroms misprogrammed */ + if (sromrev == 0x10) + sromrev = 1; -+ } else if (b[SROM4_SIGN] == SROM4_SIGNATURE) { -+ /* If sromrev >= 4, read more */ -+ err = sprom_read_pci(osh, (void*)((int8*)curmap + PCI_BAR0_SPROM_OFFSET), 0, b, -+ SROM4_WORDS, TRUE); -+ sromrev = b[SROM4_WORDS - 1] & 0xff; + } + + if (err) { @@ -869,11 +816,13 @@ diff -urN linux.old/arch/mips/bcm947xx/bcmsrom.c linux.dev/arch/mips/bcm947xx/bc + vp++; + } + /* LED Powersave duty cycle (oncount >> 24) (offcount >> 8) */ -+ w = b[SROM4_LEDDC]; -+ w32 = ((uint32)((unsigned char)(w >> 8) & 0xff) << 24) | /* oncount */ -+ ((uint32)((unsigned char)(w & 0xff)) << 8); /* offcount */ -+ vp += sprintf(vp, "leddc=%d", w32); -+ vp++; ++ if (w != 0xffff) { ++ w = b[SROM4_LEDDC]; ++ w32 = ((uint32)((unsigned char)(w >> 8) & 0xff) << 24) | /* oncount */ ++ ((uint32)((unsigned char)(w & 0xff)) << 8); /* offcount */ ++ vp += sprintf(vp, "leddc=%d", w32); ++ vp++; ++ } + + w = b[SROM4_AA]; + vp += sprintf(vp, "aa2g=%d", w & SROM4_AA2G_MASK); @@ -1268,7 +1217,7 @@ diff -urN linux.old/arch/mips/bcm947xx/bcmsrom.c linux.dev/arch/mips/bcm947xx/bc + diff -urN linux.old/arch/mips/bcm947xx/bcmutils.c linux.dev/arch/mips/bcm947xx/bcmutils.c --- linux.old/arch/mips/bcm947xx/bcmutils.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/bcmutils.c 2006-04-28 00:34:02.000000000 +0200 ++++ linux.dev/arch/mips/bcm947xx/bcmutils.c 2006-10-02 21:19:59.000000000 +0200 @@ -0,0 +1,247 @@ +/* + * Misc useful OS-independent routines. @@ -1519,7 +1468,7 @@ diff -urN linux.old/arch/mips/bcm947xx/bcmutils.c linux.dev/arch/mips/bcm947xx/b + diff -urN linux.old/arch/mips/bcm947xx/cfe_env.c linux.dev/arch/mips/bcm947xx/cfe_env.c --- linux.old/arch/mips/bcm947xx/cfe_env.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/cfe_env.c 2006-04-27 19:24:19.000000000 +0200 ++++ linux.dev/arch/mips/bcm947xx/cfe_env.c 2006-10-02 21:19:59.000000000 +0200 @@ -0,0 +1,234 @@ +/* + * NVRAM variable manipulation (Linux kernel half) @@ -1757,7 +1706,7 @@ diff -urN linux.old/arch/mips/bcm947xx/cfe_env.c linux.dev/arch/mips/bcm947xx/cf + diff -urN linux.old/arch/mips/bcm947xx/compressed/Makefile linux.dev/arch/mips/bcm947xx/compressed/Makefile --- linux.old/arch/mips/bcm947xx/compressed/Makefile 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/compressed/Makefile 2006-04-27 19:24:19.000000000 +0200 ++++ linux.dev/arch/mips/bcm947xx/compressed/Makefile 2006-10-02 21:19:59.000000000 +0200 @@ -0,0 +1,33 @@ +# +# Makefile for Broadcom BCM947XX boards @@ -1794,8 +1743,8 @@ diff -urN linux.old/arch/mips/bcm947xx/compressed/Makefile linux.dev/arch/mips/b + rm -f vmlinuz piggy diff -urN linux.old/arch/mips/bcm947xx/export.c linux.dev/arch/mips/bcm947xx/export.c --- linux.old/arch/mips/bcm947xx/export.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/export.c 2006-04-28 02:57:34.000000000 +0200 -@@ -0,0 +1,65 @@ ++++ linux.dev/arch/mips/bcm947xx/export.c 2006-10-02 21:19:59.000000000 +0200 +@@ -0,0 +1,71 @@ +#include + +#define _export(n) \ @@ -1824,17 +1773,21 @@ diff -urN linux.old/arch/mips/bcm947xx/export.c linux.dev/arch/mips/bcm947xx/exp +_export(sb_coreflags) +_export(sb_coreflagshi) +_export(sb_coreidx) ++_export(sb_coreregs) +_export(sb_corerev) +_export(sb_coreunit) +_export(sb_detach) +_export(sb_deviceremoved) +_export(sb_gpiosetcore) +_export(sb_gpiocontrol) ++_export(sb_gpiointmask) ++_export(sb_gpiointpolarity) +_export(sb_gpioled) +_export(sb_gpioin) +_export(sb_gpioout) +_export(sb_gpioouten) +_export(sb_gpiotimerval) ++_export(sb_irq) +_export(sb_iscoreup) +_export(sb_pci_setup) +_export(sb_pcirev) @@ -1842,7 +1795,9 @@ diff -urN linux.old/arch/mips/bcm947xx/export.c linux.dev/arch/mips/bcm947xx/exp +_export(sb_pcmciarev) +_export(sb_register_intr_callback) +_export(sb_setcore) ++_export(sb_setcoreidx) +_export(sb_war16165) ++_export(sb_war32414_forceHT) +_export(sb_osh) + +_export(getvar) @@ -1861,28 +1816,9 @@ diff -urN linux.old/arch/mips/bcm947xx/export.c linux.dev/arch/mips/bcm947xx/exp +_export(srom_read) +_export(srom_write) + -diff -urN linux.old/arch/mips/bcm947xx/generic/Makefile linux.dev/arch/mips/bcm947xx/generic/Makefile ---- linux.old/arch/mips/bcm947xx/generic/Makefile 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/generic/Makefile 2006-04-27 19:24:19.000000000 +0200 -@@ -0,0 +1,15 @@ -+# -+# Makefile for the BCM947xx specific kernel interface routines -+# under Linux. -+# -+ -+.S.s: -+ $(CPP) $(AFLAGS) $< -o $*.s -+.S.o: -+ $(CC) $(AFLAGS) -c $< -o $*.o -+ -+O_TARGET := brcm.o -+ -+obj-y := int-handler.o irq.o -+ -+include $(TOPDIR)/Rules.make diff -urN linux.old/arch/mips/bcm947xx/generic/int-handler.S linux.dev/arch/mips/bcm947xx/generic/int-handler.S --- linux.old/arch/mips/bcm947xx/generic/int-handler.S 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/generic/int-handler.S 2006-04-27 19:24:19.000000000 +0200 ++++ linux.dev/arch/mips/bcm947xx/generic/int-handler.S 2006-10-02 21:19:59.000000000 +0200 @@ -0,0 +1,51 @@ +/* + * Generic interrupt handler for Broadcom MIPS boards @@ -1937,7 +1873,7 @@ diff -urN linux.old/arch/mips/bcm947xx/generic/int-handler.S linux.dev/arch/mips + END(brcmIRQ) diff -urN linux.old/arch/mips/bcm947xx/generic/irq.c linux.dev/arch/mips/bcm947xx/generic/irq.c --- linux.old/arch/mips/bcm947xx/generic/irq.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/generic/irq.c 2006-04-27 19:24:19.000000000 +0200 ++++ linux.dev/arch/mips/bcm947xx/generic/irq.c 2006-10-02 21:19:59.000000000 +0200 @@ -0,0 +1,130 @@ +/* + * Generic interrupt control functions for Broadcom MIPS boards @@ -2069,9 +2005,25 @@ diff -urN linux.old/arch/mips/bcm947xx/generic/irq.c linux.dev/arch/mips/bcm947x + breakpoint(); +#endif +} +diff -urN linux.old/arch/mips/bcm947xx/generic/Makefile linux.dev/arch/mips/bcm947xx/generic/Makefile +--- linux.old/arch/mips/bcm947xx/generic/Makefile 1970-01-01 01:00:00.000000000 +0100 ++++ linux.dev/arch/mips/bcm947xx/generic/Makefile 2006-10-02 21:26:29.000000000 +0200 +@@ -0,0 +1,12 @@ ++# ++# Makefile for the BCM947xx specific kernel interface routines ++# under Linux. ++# ++EXTRA_CFLAGS += -fno-delayed-branch ++USE_STANDARD_AS_RULE := true ++ ++O_TARGET := brcm.o ++ ++obj-y := int-handler.o irq.o ++ ++include $(TOPDIR)/Rules.make diff -urN linux.old/arch/mips/bcm947xx/gpio.c linux.dev/arch/mips/bcm947xx/gpio.c --- linux.old/arch/mips/bcm947xx/gpio.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/gpio.c 2006-04-27 23:09:33.000000000 +0200 ++++ linux.dev/arch/mips/bcm947xx/gpio.c 2006-10-02 21:19:59.000000000 +0200 @@ -0,0 +1,159 @@ +/* + * GPIO char driver @@ -2234,7 +2186,7 @@ diff -urN linux.old/arch/mips/bcm947xx/gpio.c linux.dev/arch/mips/bcm947xx/gpio. +module_exit(gpio_exit); diff -urN linux.old/arch/mips/bcm947xx/hndchipc.c linux.dev/arch/mips/bcm947xx/hndchipc.c --- linux.old/arch/mips/bcm947xx/hndchipc.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/hndchipc.c 2006-04-28 00:33:05.000000000 +0200 ++++ linux.dev/arch/mips/bcm947xx/hndchipc.c 2006-10-02 21:19:59.000000000 +0200 @@ -0,0 +1,158 @@ +/* + * BCM47XX support code for some chipcommon (old extif) facilities (uart) @@ -2396,7 +2348,7 @@ diff -urN linux.old/arch/mips/bcm947xx/hndchipc.c linux.dev/arch/mips/bcm947xx/h + diff -urN linux.old/arch/mips/bcm947xx/include/bcm4710.h linux.dev/arch/mips/bcm947xx/include/bcm4710.h --- linux.old/arch/mips/bcm947xx/include/bcm4710.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/include/bcm4710.h 2006-04-27 22:30:01.000000000 +0200 ++++ linux.dev/arch/mips/bcm947xx/include/bcm4710.h 2006-10-02 21:19:59.000000000 +0200 @@ -0,0 +1,91 @@ +/* + * BCM4710 address space map and definitions @@ -2491,7 +2443,7 @@ diff -urN linux.old/arch/mips/bcm947xx/include/bcm4710.h linux.dev/arch/mips/bcm +#endif /* _bcm4710_h_ */ diff -urN linux.old/arch/mips/bcm947xx/include/bcmdefs.h linux.dev/arch/mips/bcm947xx/include/bcmdefs.h --- linux.old/arch/mips/bcm947xx/include/bcmdefs.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/include/bcmdefs.h 2006-04-27 20:12:21.000000000 +0200 ++++ linux.dev/arch/mips/bcm947xx/include/bcmdefs.h 2006-10-02 21:19:59.000000000 +0200 @@ -0,0 +1,106 @@ +/* + * Misc system wide definitions @@ -2599,27 +2551,26 @@ diff -urN linux.old/arch/mips/bcm947xx/include/bcmdefs.h linux.dev/arch/mips/bcm + + +#endif /* _bcmdefs_h_ */ -diff -urN linux.old/arch/mips/bcm947xx/include/bcmdevs.h linux.dev/arch/mips/bcm947xx/include/bcmdevs.h ---- linux.old/arch/mips/bcm947xx/include/bcmdevs.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/include/bcmdevs.h 2006-04-27 22:30:25.000000000 +0200 -@@ -0,0 +1,369 @@ +diff -urN linux.old/arch/mips/bcm947xx/include/bcmdevs1.h linux.dev/arch/mips/bcm947xx/include/bcmdevs1.h +--- linux.old/arch/mips/bcm947xx/include/bcmdevs1.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux.dev/arch/mips/bcm947xx/include/bcmdevs1.h 2006-10-02 21:19:59.000000000 +0200 +@@ -0,0 +1,391 @@ +/* + * Broadcom device-specific manifest constants. + * -+ * Copyright 2006, Broadcom Corporation -+ * All Rights Reserved. -+ * -+ * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY -+ * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM -+ * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS -+ * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. -+ * $Id: bcmdevs.h,v 1.1.1.17 2006/04/15 01:29:08 michael Exp $ ++ * Copyright 2005, Broadcom Corporation ++ * All Rights Reserved. ++ * ++ * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY ++ * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM ++ * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS ++ * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. ++ * $Id$ + */ + +#ifndef _BCMDEVS_H +#define _BCMDEVS_H + -+#include "bcm4710.h" + +/* Known PCI vendor Id's */ +#define VENDOR_EPIGRAM 0xfeda @@ -2659,22 +2610,30 @@ diff -urN linux.old/arch/mips/bcm947xx/include/bcmdevs.h linux.dev/arch/mips/bcm +#define BCM47XX_ROBO_ID 0x4719 /* 47xx/53xx roboswitch core */ +#define BCM47XX_USB20H_ID 0x471a /* 47xx usb 2.0 host */ +#define BCM47XX_USB20D_ID 0x471b /* 47xx usb 2.0 device */ -+#define BCM47XX_ATA100_ID 0x471d /* 47xx parallel ATA */ -+#define BCM47XX_SATAXOR_ID 0x471e /* 47xx serial ATA & XOR DMA */ -+#define BCM47XX_GIGETH_ID 0x471f /* 47xx GbE (5700) */ + -+#define BCM47XX_SMBUS_EMU_ID 0x47fe /* 47xx emulated SMBus device */ -+#define BCM47XX_XOR_EMU_ID 0x47ff /* 47xx emulated XOR engine */ -+ -+#define BCM4710_CHIP_ID 0x4710 /* 4710 chipid returned by sb_chip() */ +#define BCM4710_DEVICE_ID 0x4710 /* 4710 primary function 0 */ + -+#define BCM4402_CHIP_ID 0x4402 /* 4402 chipid */ ++#define BCM4610_DEVICE_ID 0x4610 /* 4610 primary function 0 */ ++#define BCM4610_ILINE_ID 0x4611 /* 4610 iline100 */ ++#define BCM4610_V90_ID 0x4612 /* 4610 v90 codec */ ++#define BCM4610_ENET_ID 0x4613 /* 4610 enet */ ++#define BCM4610_EXT_ID 0x4614 /* 4610 external i/f */ ++#define BCM4610_USB_ID 0x4615 /* 4610 usb */ ++ ++#define BCM4402_DEVICE_ID 0x4402 /* 4402 primary function 0 */ +#define BCM4402_ENET_ID 0x4402 /* 4402 enet */ +#define BCM4402_V90_ID 0x4403 /* 4402 v90 codec */ +#define BCM4401_ENET_ID 0x170c /* 4401b0 production enet cards */ + -+#define BCM4306_CHIP_ID 0x4306 /* 4306 chipcommon chipid */ ++#define BCM4301_DEVICE_ID 0x4301 /* 4301 primary function 0 */ ++#define BCM4301_D11B_ID 0x4301 /* 4301 802.11b */ ++ ++#define BCM4307_DEVICE_ID 0x4307 /* 4307 primary function 0 */ ++#define BCM4307_V90_ID 0x4305 /* 4307 v90 codec */ ++#define BCM4307_ENET_ID 0x4306 /* 4307 enet */ ++#define BCM4307_D11B_ID 0x4307 /* 4307 802.11b */ ++ ++#define BCM4306_DEVICE_ID 0x4306 /* 4306 chipcommon chipid */ +#define BCM4306_D11G_ID 0x4320 /* 4306 802.11g */ +#define BCM4306_D11G_ID2 0x4325 +#define BCM4306_D11A_ID 0x4321 /* 4306 802.11a */ @@ -2684,63 +2643,77 @@ diff -urN linux.old/arch/mips/bcm947xx/include/bcmdevs.h linux.dev/arch/mips/bcm + +#define BCM4309_PKG_ID 1 /* 4309 package id */ + -+#define BCM4311_CHIP_ID 0x4311 /* 4311 PCIe 802.11a/b/g */ -+#define BCM4311_D11G_ID 0x4311 /* 4311 802.11b/g id */ -+#define BCM4311_D11DUAL_ID 0x4312 /* 4311 802.11a/b/g id */ -+#define BCM4311_D11A_ID 0x4313 /* 4311 802.11a id */ -+ +#define BCM4303_D11B_ID 0x4303 /* 4303 802.11b */ +#define BCM4303_PKG_ID 2 /* 4303 package id */ + ++#define BCM4310_DEVICE_ID 0x4310 /* 4310 chipcommon chipid */ ++#define BCM4310_D11B_ID 0x4311 /* 4310 802.11b */ ++#define BCM4310_UART_ID 0x4312 /* 4310 uart */ ++#define BCM4310_ENET_ID 0x4313 /* 4310 enet */ ++#define BCM4310_USB_ID 0x4315 /* 4310 usb */ ++ +#define BCMGPRS_UART_ID 0x4333 /* Uart id used by 4306/gprs card */ +#define BCMGPRS2_UART_ID 0x4344 /* Uart id used by 4306/gprs card */ + -+#define BCM4704_CHIP_ID 0x4704 /* 4704 chipcommon chipid */ ++ ++#define BCM4704_DEVICE_ID 0x4704 /* 4704 chipcommon chipid */ +#define BCM4704_ENET_ID 0x4706 /* 4704 enet (Use 47XX_ENET_ID instead!) */ + -+#define BCM4318_CHIP_ID 0x4318 /* 4318 chip common chipid */ -+#define BCM4318_D11G_ID 0x4318 /* 4318 802.11b/g id */ -+#define BCM4318_D11DUAL_ID 0x4319 /* 4318 802.11a/b/g id */ -+#define BCM4318_D11A_ID 0x431a /* 4318 802.11a id */ ++#define BCM4317_DEVICE_ID 0x4317 /* 4317 chip common chipid */ + -+#define BCM4321_CHIP_ID 0x4321 /* 4321 chip common chipid */ -+#define BCM4321_D11N_ID 0x4328 /* 4321 802.11n dualband id */ -+#define BCM4321_D11N2G_ID 0x4329 /* 4321 802.11n 2.4Hgz band id */ -+#define BCM4321_D11N5G_ID 0x432a /* 4321 802.11n 5Ghz band id */ ++#define BCM4318_DEVICE_ID 0x4318 /* 4318 chip common chipid */ ++#define BCM4318_D11G_ID 0x4318 /* 4318 801.11b/g id */ ++#define BCM4318_D11DUAL_ID 0x4319 /* 4318 801.11a/b/g id */ ++#define BCM4318_JTAGM_ID 0x4331 /* 4318 jtagm device id */ + -+#define BCM4331_CHIP_ID 0x4331 /* 4331 chip common chipid */ -+#define BCM4331_D11N2G_ID 0x4330 /* 4331 802.11n 2.4Ghz band id */ -+#define BCM4331_D11N_ID 0x4331 /* 4331 802.11n dualband id */ -+#define BCM4331_D11N5G_ID 0x4332 /* 4331 802.11n 5Ghz band id */ ++#define FPGA_JTAGM_ID 0x4330 /* ??? */ + -+#define HDLSIM5350_PKG_ID 1 /* HDL simulator package id for a 5350 */ -+#define HDLSIM_PKG_ID 14 /* HDL simulator package id */ -+#define HWSIM_PKG_ID 15 /* Hardware simulator package id */ ++/* Address map */ ++#define BCM4710_SDRAM 0x00000000 /* Physical SDRAM */ ++#define BCM4710_PCI_MEM 0x08000000 /* Host Mode PCI memory access space (64 MB) */ ++#define BCM4710_PCI_CFG 0x0c000000 /* Host Mode PCI configuration space (64 MB) */ ++#define BCM4710_PCI_DMA 0x40000000 /* Client Mode PCI memory access space (1 GB) */ ++#define BCM4710_SDRAM_SWAPPED 0x10000000 /* Byteswapped Physical SDRAM */ ++#define BCM4710_ENUM 0x18000000 /* Beginning of core enumeration space */ + -+#define BCM4712_CHIP_ID 0x4712 /* 4712 chipcommon chipid */ -+#define BCM4712_MIPS_ID 0x4720 /* 4712 base devid */ -+#define BCM4712LARGE_PKG_ID 0 /* 340pin 4712 package id */ -+#define BCM4712SMALL_PKG_ID 1 /* 200pin 4712 package id */ -+#define BCM4712MID_PKG_ID 2 /* 225pin 4712 package id */ ++/* Core register space */ ++#define BCM4710_REG_SDRAM 0x18000000 /* SDRAM core registers */ ++#define BCM4710_REG_ILINE20 0x18001000 /* InsideLine20 core registers */ ++#define BCM4710_REG_EMAC0 0x18002000 /* Ethernet MAC 0 core registers */ ++#define BCM4710_REG_CODEC 0x18003000 /* Codec core registers */ ++#define BCM4710_REG_USB 0x18004000 /* USB core registers */ ++#define BCM4710_REG_PCI 0x18005000 /* PCI core registers */ ++#define BCM4710_REG_MIPS 0x18006000 /* MIPS core registers */ ++#define BCM4710_REG_EXTIF 0x18007000 /* External Interface core registers */ ++#define BCM4710_REG_EMAC1 0x18008000 /* Ethernet MAC 1 core registers */ + -+#define BCM5365_CHIP_ID 0x5365 /* 5365 chipcommon chipid */ -+#define BCM5350_CHIP_ID 0x5350 /* bcm5350 chipcommon chipid */ -+#define BCM5352_CHIP_ID 0x5352 /* bcm5352 chipcommon chipid */ ++#define BCM4710_EXTIF 0x1f000000 /* External Interface base address */ ++#define BCM4710_PCMCIA_MEM 0x1f000000 /* External Interface PCMCIA memory access */ ++#define BCM4710_PCMCIA_IO 0x1f100000 /* PCMCIA I/O access */ ++#define BCM4710_PCMCIA_CONF 0x1f200000 /* PCMCIA configuration */ ++#define BCM4710_PROG 0x1f800000 /* Programable interface */ ++#define BCM4710_FLASH 0x1fc00000 /* Flash */ + -+#define BCM4320_CHIP_ID 0x4320 /* bcm4320 chipcommon chipid */ ++#define BCM4710_EJTAG 0xff200000 /* MIPS EJTAG space (2M) */ + -+#define BCM4328_CHIP_ID 0x4328 /* bcm4328 chipcommon chipid */ ++#define BCM4710_UART (BCM4710_REG_EXTIF + 0x00000300) + -+#define FPGA_JTAGM_ID 0x43f0 /* FPGA jtagm device id */ -+#define BCM43XX_JTAGM_ID 0x43f1 /* 43xx jtagm device id */ -+#define BCM43XXOLD_JTAGM_ID 0x4331 /* 43xx old jtagm device id */ ++#define BCM4710_EUART (BCM4710_EXTIF + 0x00800000) ++#define BCM4710_LED (BCM4710_EXTIF + 0x00900000) + -+#define SDIOH_FPGA_ID 0x43f2 /* sdio host fpga */ -+#define SDIOD_FPGA_ID 0x43f4 /* sdio device fpga */ ++#define BCM4712_DEVICE_ID 0x4712 /* 4712 chipcommon chipid */ ++#define BCM4712_MIPS_ID 0x4720 /* 4712 base devid */ ++#define BCM4712LARGE_PKG_ID 0 /* 340pin 4712 package id */ ++#define BCM4712SMALL_PKG_ID 1 /* 200pin 4712 package id */ ++#define BCM4712MID_PKG_ID 2 /* 225pin 4712 package id */ + -+#define MIMO_FPGA_ID 0x43f8 /* FPGA mimo minimacphy device id */ ++#define SDIOH_FPGA_ID 0x4380 /* sdio host fpga */ + -+#define BCM4785_CHIP_ID 0x4785 /* 4785 chipcommon chipid */ ++#define BCM5365_DEVICE_ID 0x5365 /* 5365 chipcommon chipid */ ++#define BCM5350_DEVICE_ID 0x5350 /* bcm5350 chipcommon chipid */ ++#define BCM5352_DEVICE_ID 0x5352 /* bcm5352 chipcommon chipid */ ++ ++#define BCM4320_DEVICE_ID 0x4320 /* bcm4320 chipcommon chipid */ + +/* PCMCIA vendor Id's */ + @@ -2766,12 +2739,8 @@ diff -urN linux.old/arch/mips/bcm947xx/include/bcmdevs.h linux.dev/arch/mips/bcm +#define BFL_BTCMOD 0x4000 /* This board' BTCOEXIST is in the alternate gpios */ +#define BFL_ALTIQ 0x8000 /* Alternate I/Q settings */ + -+/* boardflags2 */ -+#define BFL2_RXBB_INT_REG_DIS 0x00000001 /* This board has an external rxbb regulator */ -+#define BFL2_SSWITCH_AVAIL 0x00000002 /* This board has a superswitch for > 2 antennas */ -+#define BFL2_TXPWRCTRL_EN 0x00000004 /* This board permits TX Power Control to be enabled */ -+ +/* board specific GPIO assignment, gpio 0-3 are also customer-configurable led */ ++#define BOARD_GPIO_HWRAD_B 0x010 /* bit 4 is HWRAD input on 4301 */ +#define BOARD_GPIO_BTCMOD_IN 0x010 /* bit 4 is the alternate BT Coexistance Input */ +#define BOARD_GPIO_BTCMOD_OUT 0x020 /* bit 5 is the alternate BT Coexistance Out */ +#define BOARD_GPIO_BTC_IN 0x080 /* bit 7 is BT Coexistance Input */ @@ -2782,6 +2751,20 @@ diff -urN linux.old/arch/mips/bcm947xx/include/bcmdevs.h linux.dev/arch/mips/bcm +#define PCI_CFG_GPIO_XTAL 0x40 /* PCI config space GPIO 14 for Xtal powerup */ +#define PCI_CFG_GPIO_PLL 0x80 /* PCI config space GPIO 15 for PLL powerdown */ + ++/* Bus types */ ++#define SB_BUS 0 /* Silicon Backplane */ ++#define PCI_BUS 1 /* PCI target */ ++#define PCMCIA_BUS 2 /* PCMCIA target */ ++#define SDIO_BUS 3 /* SDIO target */ ++#define JTAG_BUS 4 /* JTAG */ ++ ++/* Allows optimization for single-bus support */ ++#ifdef BCMBUSTYPE ++#define BUSTYPE(bus) (BCMBUSTYPE) ++#else ++#define BUSTYPE(bus) (bus) ++#endif ++ +/* power control defines */ +#define PLL_DELAY 150 /* us pll on delay */ +#define FREF_DELAY 200 /* us fref change delay */ @@ -2794,6 +2777,16 @@ diff -urN linux.old/arch/mips/bcm947xx/include/bcmdevs.h linux.dev/arch/mips/bcm +#define VSIM4710_BOARD 0x0401 +#define QT4710_BOARD 0x0402 + ++#define BU4610_BOARD 0x0403 ++#define VSIM4610_BOARD 0x0404 ++ ++#define BU4307_BOARD 0x0405 ++#define BCM94301CB_BOARD 0x0406 ++#define BCM94301PC_BOARD 0x0406 /* Pcmcia 5v card */ ++#define BCM94301MP_BOARD 0x0407 ++#define BCM94307MP_BOARD 0x0408 ++#define BCMAP4307_BOARD 0x0409 ++ +#define BU4309_BOARD 0x040a +#define BCM94309CB_BOARD 0x040b +#define BCM94309MP_BOARD 0x040c @@ -2801,6 +2794,12 @@ diff -urN linux.old/arch/mips/bcm947xx/include/bcmdevs.h linux.dev/arch/mips/bcm + +#define BCM94302MP_BOARD 0x040e + ++#define VSIM4310_BOARD 0x040f ++#define BU4711_BOARD 0x0410 ++#define BCM94310U_BOARD 0x0411 ++#define BCM94310AP_BOARD 0x0412 ++#define BCM94310MP_BOARD 0x0414 ++ +#define BU4306_BOARD 0x0416 +#define BCM94306CB_BOARD 0x0417 +#define BCM94306MP_BOARD 0x0418 @@ -2810,16 +2809,21 @@ diff -urN linux.old/arch/mips/bcm947xx/include/bcmdevs.h linux.dev/arch/mips/bcm +#define BCM94710R4_BOARD 0x041c +#define BCM94710AP_BOARD 0x041d + ++ +#define BU2050_BOARD 0x041f + + +#define BCM94309G_BOARD 0x0421 + ++#define BCM94301PC3_BOARD 0x0422 /* Pcmcia 3.3v card */ ++ +#define BU4704_BOARD 0x0423 +#define BU4702_BOARD 0x0424 + +#define BCM94306PC_BOARD 0x0425 /* pcmcia 3.3v 4306 card */ + ++#define BU4317_BOARD 0x0426 ++ + +#define BCM94702MN_BOARD 0x0428 + @@ -2832,6 +2836,9 @@ diff -urN linux.old/arch/mips/bcm947xx/include/bcmdevs.h linux.dev/arch/mips/bcm +/* cb4306 with SiGe PA */ +#define BCM94306CBSG_BOARD 0x042b + ++/* mp4301 with 2050 radio */ ++#define BCM94301MPL_BOARD 0x042c ++ +/* cb4306 with SiGe PA */ +#define PCSG94306_BOARD 0x042d + @@ -2846,6 +2853,12 @@ diff -urN linux.old/arch/mips/bcm947xx/include/bcmdevs.h linux.dev/arch/mips/bcm + + + ++/* BCM94317 boards */ ++#define BCM94317CB_BOARD 0x0440 ++#define BCM94317MP_BOARD 0x0441 ++#define BCM94317PCMCIA_BOARD 0x0442 ++#define BCM94317SDIO_BOARD 0x0443 ++ +#define BU4712_BOARD 0x0444 +#define BU4712SD_BOARD 0x045d +#define BU4712L_BOARD 0x045f @@ -2863,11 +2876,15 @@ diff -urN linux.old/arch/mips/bcm947xx/include/bcmdevs.h linux.dev/arch/mips/bcm + +/* BCM63XX boards */ +#define BCM96338_BOARD 0x6338 ++#define BCM96345_BOARD 0x6345 +#define BCM96348_BOARD 0x6348 + +/* Another mp4306 with SiGe */ +#define BCM94306P_BOARD 0x044c + ++/* CF-like 4317 modules */ ++#define BCM94317CF_BOARD 0x044d ++ +/* mp4303 */ +#define BCM94303MP_BOARD 0x044e + @@ -2881,6 +2898,9 @@ diff -urN linux.old/arch/mips/bcm947xx/include/bcmdevs.h linux.dev/arch/mips/bcm +/* 4712agr */ +#define BCM94712AGR_BOARD 0x0451 + ++/* The real CF 4317 board */ ++#define CFI4317_BOARD 0x0452 ++ +/* pcmcia 4303 */ +#define PC4303_BOARD 0x0454 + @@ -2916,82 +2936,37 @@ diff -urN linux.old/arch/mips/bcm947xx/include/bcmdevs.h linux.dev/arch/mips/bcm + +#define BCM94318MPGH_BOARD 0x0463 + -+#define BU4311_BOARD 0x0464 -+#define BCM94311MC_BOARD 0x0465 -+#define BCM94311MCAG_BOARD 0x0466 + +#define BCM95352GR_BOARD 0x0467 + +/* bcm95351agr */ +#define BCM95351AGR_BOARD 0x0470 + -+/* bcm94704mpcb */ -+#define BCM94704MPCB_BOARD 0x0472 -+ -+/* 4785 boards */ -+#define BU4785_BOARD 0x0478 -+ -+/* 4321 boards */ -+#define BU4321_BOARD 0x046b -+#define BU4321E_BOARD 0x047c -+#define MP4321_BOARD 0x046c -+#define CB2_4321_BOARD 0x046d -+#define MC4321_BOARD 0x046e -+ +/* # of GPIO pins */ +#define GPIO_NUMPINS 16 + -+/* radio ID codes */ -+#define NORADIO_ID 0xe4f5 -+#define NORADIO_IDCODE 0x4e4f5246 -+ -+#define BCM2050_ID 0x2050 -+#define BCM2050_IDCODE 0x02050000 -+#define BCM2050A0_IDCODE 0x1205017f -+#define BCM2050A1_IDCODE 0x2205017f -+#define BCM2050R8_IDCODE 0x8205017f -+ -+#define BCM2055_ID 0x2055 -+#define BCM2055_IDCODE 0x02055000 -+#define BCM2055A0_IDCODE 0x1205517f -+ -+#define BCM2060_ID 0x2060 -+#define BCM2060_IDCODE 0x02060000 -+#define BCM2060WW_IDCODE 0x1206017f -+ -+#define BCM2062_ID 0x2062 -+#define BCM2062_IDCODE 0x02062000 -+#define BCM2062A0_IDCODE 0x0206217f -+ -+/* parts of an idcode: */ -+#define IDCODE_MFG_MASK 0x00000fff -+#define IDCODE_MFG_SHIFT 0 -+#define IDCODE_ID_MASK 0x0ffff000 -+#define IDCODE_ID_SHIFT 12 -+#define IDCODE_REV_MASK 0xf0000000 -+#define IDCODE_REV_SHIFT 28 -+ +#endif /* _BCMDEVS_H */ -diff -urN linux.old/arch/mips/bcm947xx/include/bcmdevs1.h linux.dev/arch/mips/bcm947xx/include/bcmdevs1.h ---- linux.old/arch/mips/bcm947xx/include/bcmdevs1.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/include/bcmdevs1.h 2006-05-02 04:32:03.000000000 +0200 -@@ -0,0 +1,391 @@ +diff -urN linux.old/arch/mips/bcm947xx/include/bcmdevs.h linux.dev/arch/mips/bcm947xx/include/bcmdevs.h +--- linux.old/arch/mips/bcm947xx/include/bcmdevs.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux.dev/arch/mips/bcm947xx/include/bcmdevs.h 2006-10-02 21:19:59.000000000 +0200 +@@ -0,0 +1,369 @@ +/* + * Broadcom device-specific manifest constants. + * -+ * Copyright 2005, Broadcom Corporation -+ * All Rights Reserved. -+ * -+ * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY -+ * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM -+ * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS -+ * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. -+ * $Id$ ++ * Copyright 2006, Broadcom Corporation ++ * All Rights Reserved. ++ * ++ * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY ++ * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM ++ * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS ++ * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. ++ * $Id: bcmdevs.h,v 1.1.1.17 2006/04/15 01:29:08 michael Exp $ + */ + +#ifndef _BCMDEVS_H +#define _BCMDEVS_H + ++#include "bcm4710.h" + +/* Known PCI vendor Id's */ +#define VENDOR_EPIGRAM 0xfeda @@ -3031,30 +3006,22 @@ diff -urN linux.old/arch/mips/bcm947xx/include/bcmdevs1.h linux.dev/arch/mips/bc +#define BCM47XX_ROBO_ID 0x4719 /* 47xx/53xx roboswitch core */ +#define BCM47XX_USB20H_ID 0x471a /* 47xx usb 2.0 host */ +#define BCM47XX_USB20D_ID 0x471b /* 47xx usb 2.0 device */ ++#define BCM47XX_ATA100_ID 0x471d /* 47xx parallel ATA */ ++#define BCM47XX_SATAXOR_ID 0x471e /* 47xx serial ATA & XOR DMA */ ++#define BCM47XX_GIGETH_ID 0x471f /* 47xx GbE (5700) */ + -+#define BCM4710_DEVICE_ID 0x4710 /* 4710 primary function 0 */ ++#define BCM47XX_SMBUS_EMU_ID 0x47fe /* 47xx emulated SMBus device */ ++#define BCM47XX_XOR_EMU_ID 0x47ff /* 47xx emulated XOR engine */ + -+#define BCM4610_DEVICE_ID 0x4610 /* 4610 primary function 0 */ -+#define BCM4610_ILINE_ID 0x4611 /* 4610 iline100 */ -+#define BCM4610_V90_ID 0x4612 /* 4610 v90 codec */ -+#define BCM4610_ENET_ID 0x4613 /* 4610 enet */ -+#define BCM4610_EXT_ID 0x4614 /* 4610 external i/f */ -+#define BCM4610_USB_ID 0x4615 /* 4610 usb */ ++#define BCM4710_CHIP_ID 0x4710 /* 4710 chipid returned by sb_chip() */ ++#define BCM4710_DEVICE_ID 0x4710 /* 4710 primary function 0 */ + -+#define BCM4402_DEVICE_ID 0x4402 /* 4402 primary function 0 */ ++#define BCM4402_CHIP_ID 0x4402 /* 4402 chipid */ +#define BCM4402_ENET_ID 0x4402 /* 4402 enet */ +#define BCM4402_V90_ID 0x4403 /* 4402 v90 codec */ +#define BCM4401_ENET_ID 0x170c /* 4401b0 production enet cards */ + -+#define BCM4301_DEVICE_ID 0x4301 /* 4301 primary function 0 */ -+#define BCM4301_D11B_ID 0x4301 /* 4301 802.11b */ -+ -+#define BCM4307_DEVICE_ID 0x4307 /* 4307 primary function 0 */ -+#define BCM4307_V90_ID 0x4305 /* 4307 v90 codec */ -+#define BCM4307_ENET_ID 0x4306 /* 4307 enet */ -+#define BCM4307_D11B_ID 0x4307 /* 4307 802.11b */ -+ -+#define BCM4306_DEVICE_ID 0x4306 /* 4306 chipcommon chipid */ ++#define BCM4306_CHIP_ID 0x4306 /* 4306 chipcommon chipid */ +#define BCM4306_D11G_ID 0x4320 /* 4306 802.11g */ +#define BCM4306_D11G_ID2 0x4325 +#define BCM4306_D11A_ID 0x4321 /* 4306 802.11a */ @@ -3064,77 +3031,63 @@ diff -urN linux.old/arch/mips/bcm947xx/include/bcmdevs1.h linux.dev/arch/mips/bc + +#define BCM4309_PKG_ID 1 /* 4309 package id */ + ++#define BCM4311_CHIP_ID 0x4311 /* 4311 PCIe 802.11a/b/g */ ++#define BCM4311_D11G_ID 0x4311 /* 4311 802.11b/g id */ ++#define BCM4311_D11DUAL_ID 0x4312 /* 4311 802.11a/b/g id */ ++#define BCM4311_D11A_ID 0x4313 /* 4311 802.11a id */ ++ +#define BCM4303_D11B_ID 0x4303 /* 4303 802.11b */ +#define BCM4303_PKG_ID 2 /* 4303 package id */ + -+#define BCM4310_DEVICE_ID 0x4310 /* 4310 chipcommon chipid */ -+#define BCM4310_D11B_ID 0x4311 /* 4310 802.11b */ -+#define BCM4310_UART_ID 0x4312 /* 4310 uart */ -+#define BCM4310_ENET_ID 0x4313 /* 4310 enet */ -+#define BCM4310_USB_ID 0x4315 /* 4310 usb */ -+ +#define BCMGPRS_UART_ID 0x4333 /* Uart id used by 4306/gprs card */ +#define BCMGPRS2_UART_ID 0x4344 /* Uart id used by 4306/gprs card */ + ++#define BCM4704_CHIP_ID 0x4704 /* 4704 chipcommon chipid */ ++#define BCM4704_ENET_ID 0x4706 /* 4704 enet (Use 47XX_ENET_ID instead!) */ + -+#define BCM4704_DEVICE_ID 0x4704 /* 4704 chipcommon chipid */ -+#define BCM4704_ENET_ID 0x4706 /* 4704 enet (Use 47XX_ENET_ID instead!) */ -+ -+#define BCM4317_DEVICE_ID 0x4317 /* 4317 chip common chipid */ -+ -+#define BCM4318_DEVICE_ID 0x4318 /* 4318 chip common chipid */ -+#define BCM4318_D11G_ID 0x4318 /* 4318 801.11b/g id */ -+#define BCM4318_D11DUAL_ID 0x4319 /* 4318 801.11a/b/g id */ -+#define BCM4318_JTAGM_ID 0x4331 /* 4318 jtagm device id */ -+ -+#define FPGA_JTAGM_ID 0x4330 /* ??? */ -+ -+/* Address map */ -+#define BCM4710_SDRAM 0x00000000 /* Physical SDRAM */ -+#define BCM4710_PCI_MEM 0x08000000 /* Host Mode PCI memory access space (64 MB) */ -+#define BCM4710_PCI_CFG 0x0c000000 /* Host Mode PCI configuration space (64 MB) */ -+#define BCM4710_PCI_DMA 0x40000000 /* Client Mode PCI memory access space (1 GB) */ -+#define BCM4710_SDRAM_SWAPPED 0x10000000 /* Byteswapped Physical SDRAM */ -+#define BCM4710_ENUM 0x18000000 /* Beginning of core enumeration space */ -+ -+/* Core register space */ -+#define BCM4710_REG_SDRAM 0x18000000 /* SDRAM core registers */ -+#define BCM4710_REG_ILINE20 0x18001000 /* InsideLine20 core registers */ -+#define BCM4710_REG_EMAC0 0x18002000 /* Ethernet MAC 0 core registers */ -+#define BCM4710_REG_CODEC 0x18003000 /* Codec core registers */ -+#define BCM4710_REG_USB 0x18004000 /* USB core registers */ -+#define BCM4710_REG_PCI 0x18005000 /* PCI core registers */ -+#define BCM4710_REG_MIPS 0x18006000 /* MIPS core registers */ -+#define BCM4710_REG_EXTIF 0x18007000 /* External Interface core registers */ -+#define BCM4710_REG_EMAC1 0x18008000 /* Ethernet MAC 1 core registers */ -+ -+#define BCM4710_EXTIF 0x1f000000 /* External Interface base address */ -+#define BCM4710_PCMCIA_MEM 0x1f000000 /* External Interface PCMCIA memory access */ -+#define BCM4710_PCMCIA_IO 0x1f100000 /* PCMCIA I/O access */ -+#define BCM4710_PCMCIA_CONF 0x1f200000 /* PCMCIA configuration */ -+#define BCM4710_PROG 0x1f800000 /* Programable interface */ -+#define BCM4710_FLASH 0x1fc00000 /* Flash */ -+ -+#define BCM4710_EJTAG 0xff200000 /* MIPS EJTAG space (2M) */ ++#define BCM4318_CHIP_ID 0x4318 /* 4318 chip common chipid */ ++#define BCM4318_D11G_ID 0x4318 /* 4318 802.11b/g id */ ++#define BCM4318_D11DUAL_ID 0x4319 /* 4318 802.11a/b/g id */ ++#define BCM4318_D11A_ID 0x431a /* 4318 802.11a id */ + -+#define BCM4710_UART (BCM4710_REG_EXTIF + 0x00000300) ++#define BCM4321_CHIP_ID 0x4321 /* 4321 chip common chipid */ ++#define BCM4321_D11N_ID 0x4328 /* 4321 802.11n dualband id */ ++#define BCM4321_D11N2G_ID 0x4329 /* 4321 802.11n 2.4Hgz band id */ ++#define BCM4321_D11N5G_ID 0x432a /* 4321 802.11n 5Ghz band id */ + -+#define BCM4710_EUART (BCM4710_EXTIF + 0x00800000) -+#define BCM4710_LED (BCM4710_EXTIF + 0x00900000) ++#define BCM4331_CHIP_ID 0x4331 /* 4331 chip common chipid */ ++#define BCM4331_D11N2G_ID 0x4330 /* 4331 802.11n 2.4Ghz band id */ ++#define BCM4331_D11N_ID 0x4331 /* 4331 802.11n dualband id */ ++#define BCM4331_D11N5G_ID 0x4332 /* 4331 802.11n 5Ghz band id */ + -+#define BCM4712_DEVICE_ID 0x4712 /* 4712 chipcommon chipid */ ++#define HDLSIM5350_PKG_ID 1 /* HDL simulator package id for a 5350 */ ++#define HDLSIM_PKG_ID 14 /* HDL simulator package id */ ++#define HWSIM_PKG_ID 15 /* Hardware simulator package id */ ++ ++#define BCM4712_CHIP_ID 0x4712 /* 4712 chipcommon chipid */ +#define BCM4712_MIPS_ID 0x4720 /* 4712 base devid */ +#define BCM4712LARGE_PKG_ID 0 /* 340pin 4712 package id */ +#define BCM4712SMALL_PKG_ID 1 /* 200pin 4712 package id */ +#define BCM4712MID_PKG_ID 2 /* 225pin 4712 package id */ + -+#define SDIOH_FPGA_ID 0x4380 /* sdio host fpga */ ++#define BCM5365_CHIP_ID 0x5365 /* 5365 chipcommon chipid */ ++#define BCM5350_CHIP_ID 0x5350 /* bcm5350 chipcommon chipid */ ++#define BCM5352_CHIP_ID 0x5352 /* bcm5352 chipcommon chipid */ + -+#define BCM5365_DEVICE_ID 0x5365 /* 5365 chipcommon chipid */ -+#define BCM5350_DEVICE_ID 0x5350 /* bcm5350 chipcommon chipid */ -+#define BCM5352_DEVICE_ID 0x5352 /* bcm5352 chipcommon chipid */ ++#define BCM4320_CHIP_ID 0x4320 /* bcm4320 chipcommon chipid */ + -+#define BCM4320_DEVICE_ID 0x4320 /* bcm4320 chipcommon chipid */ ++#define BCM4328_CHIP_ID 0x4328 /* bcm4328 chipcommon chipid */ ++ ++#define FPGA_JTAGM_ID 0x43f0 /* FPGA jtagm device id */ ++#define BCM43XX_JTAGM_ID 0x43f1 /* 43xx jtagm device id */ ++#define BCM43XXOLD_JTAGM_ID 0x4331 /* 43xx old jtagm device id */ ++ ++#define SDIOH_FPGA_ID 0x43f2 /* sdio host fpga */ ++#define SDIOD_FPGA_ID 0x43f4 /* sdio device fpga */ ++ ++#define MIMO_FPGA_ID 0x43f8 /* FPGA mimo minimacphy device id */ ++ ++#define BCM4785_CHIP_ID 0x4785 /* 4785 chipcommon chipid */ + +/* PCMCIA vendor Id's */ + @@ -3160,8 +3113,12 @@ diff -urN linux.old/arch/mips/bcm947xx/include/bcmdevs1.h linux.dev/arch/mips/bc +#define BFL_BTCMOD 0x4000 /* This board' BTCOEXIST is in the alternate gpios */ +#define BFL_ALTIQ 0x8000 /* Alternate I/Q settings */ + ++/* boardflags2 */ ++#define BFL2_RXBB_INT_REG_DIS 0x00000001 /* This board has an external rxbb regulator */ ++#define BFL2_SSWITCH_AVAIL 0x00000002 /* This board has a superswitch for > 2 antennas */ ++#define BFL2_TXPWRCTRL_EN 0x00000004 /* This board permits TX Power Control to be enabled */ ++ +/* board specific GPIO assignment, gpio 0-3 are also customer-configurable led */ -+#define BOARD_GPIO_HWRAD_B 0x010 /* bit 4 is HWRAD input on 4301 */ +#define BOARD_GPIO_BTCMOD_IN 0x010 /* bit 4 is the alternate BT Coexistance Input */ +#define BOARD_GPIO_BTCMOD_OUT 0x020 /* bit 5 is the alternate BT Coexistance Out */ +#define BOARD_GPIO_BTC_IN 0x080 /* bit 7 is BT Coexistance Input */ @@ -3172,20 +3129,6 @@ diff -urN linux.old/arch/mips/bcm947xx/include/bcmdevs1.h linux.dev/arch/mips/bc +#define PCI_CFG_GPIO_XTAL 0x40 /* PCI config space GPIO 14 for Xtal powerup */ +#define PCI_CFG_GPIO_PLL 0x80 /* PCI config space GPIO 15 for PLL powerdown */ + -+/* Bus types */ -+#define SB_BUS 0 /* Silicon Backplane */ -+#define PCI_BUS 1 /* PCI target */ -+#define PCMCIA_BUS 2 /* PCMCIA target */ -+#define SDIO_BUS 3 /* SDIO target */ -+#define JTAG_BUS 4 /* JTAG */ -+ -+/* Allows optimization for single-bus support */ -+#ifdef BCMBUSTYPE -+#define BUSTYPE(bus) (BCMBUSTYPE) -+#else -+#define BUSTYPE(bus) (bus) -+#endif -+ +/* power control defines */ +#define PLL_DELAY 150 /* us pll on delay */ +#define FREF_DELAY 200 /* us fref change delay */ @@ -3198,16 +3141,6 @@ diff -urN linux.old/arch/mips/bcm947xx/include/bcmdevs1.h linux.dev/arch/mips/bc +#define VSIM4710_BOARD 0x0401 +#define QT4710_BOARD 0x0402 + -+#define BU4610_BOARD 0x0403 -+#define VSIM4610_BOARD 0x0404 -+ -+#define BU4307_BOARD 0x0405 -+#define BCM94301CB_BOARD 0x0406 -+#define BCM94301PC_BOARD 0x0406 /* Pcmcia 5v card */ -+#define BCM94301MP_BOARD 0x0407 -+#define BCM94307MP_BOARD 0x0408 -+#define BCMAP4307_BOARD 0x0409 -+ +#define BU4309_BOARD 0x040a +#define BCM94309CB_BOARD 0x040b +#define BCM94309MP_BOARD 0x040c @@ -3215,12 +3148,6 @@ diff -urN linux.old/arch/mips/bcm947xx/include/bcmdevs1.h linux.dev/arch/mips/bc + +#define BCM94302MP_BOARD 0x040e + -+#define VSIM4310_BOARD 0x040f -+#define BU4711_BOARD 0x0410 -+#define BCM94310U_BOARD 0x0411 -+#define BCM94310AP_BOARD 0x0412 -+#define BCM94310MP_BOARD 0x0414 -+ +#define BU4306_BOARD 0x0416 +#define BCM94306CB_BOARD 0x0417 +#define BCM94306MP_BOARD 0x0418 @@ -3230,21 +3157,16 @@ diff -urN linux.old/arch/mips/bcm947xx/include/bcmdevs1.h linux.dev/arch/mips/bc +#define BCM94710R4_BOARD 0x041c +#define BCM94710AP_BOARD 0x041d + -+ +#define BU2050_BOARD 0x041f + + +#define BCM94309G_BOARD 0x0421 + -+#define BCM94301PC3_BOARD 0x0422 /* Pcmcia 3.3v card */ -+ +#define BU4704_BOARD 0x0423 +#define BU4702_BOARD 0x0424 + +#define BCM94306PC_BOARD 0x0425 /* pcmcia 3.3v 4306 card */ + -+#define BU4317_BOARD 0x0426 -+ + +#define BCM94702MN_BOARD 0x0428 + @@ -3257,9 +3179,6 @@ diff -urN linux.old/arch/mips/bcm947xx/include/bcmdevs1.h linux.dev/arch/mips/bc +/* cb4306 with SiGe PA */ +#define BCM94306CBSG_BOARD 0x042b + -+/* mp4301 with 2050 radio */ -+#define BCM94301MPL_BOARD 0x042c -+ +/* cb4306 with SiGe PA */ +#define PCSG94306_BOARD 0x042d + @@ -3274,12 +3193,6 @@ diff -urN linux.old/arch/mips/bcm947xx/include/bcmdevs1.h linux.dev/arch/mips/bc + + + -+/* BCM94317 boards */ -+#define BCM94317CB_BOARD 0x0440 -+#define BCM94317MP_BOARD 0x0441 -+#define BCM94317PCMCIA_BOARD 0x0442 -+#define BCM94317SDIO_BOARD 0x0443 -+ +#define BU4712_BOARD 0x0444 +#define BU4712SD_BOARD 0x045d +#define BU4712L_BOARD 0x045f @@ -3297,15 +3210,11 @@ diff -urN linux.old/arch/mips/bcm947xx/include/bcmdevs1.h linux.dev/arch/mips/bc + +/* BCM63XX boards */ +#define BCM96338_BOARD 0x6338 -+#define BCM96345_BOARD 0x6345 +#define BCM96348_BOARD 0x6348 + +/* Another mp4306 with SiGe */ +#define BCM94306P_BOARD 0x044c + -+/* CF-like 4317 modules */ -+#define BCM94317CF_BOARD 0x044d -+ +/* mp4303 */ +#define BCM94303MP_BOARD 0x044e + @@ -3319,9 +3228,6 @@ diff -urN linux.old/arch/mips/bcm947xx/include/bcmdevs1.h linux.dev/arch/mips/bc +/* 4712agr */ +#define BCM94712AGR_BOARD 0x0451 + -+/* The real CF 4317 board */ -+#define CFI4317_BOARD 0x0452 -+ +/* pcmcia 4303 */ +#define PC4303_BOARD 0x0454 + @@ -3357,19 +3263,65 @@ diff -urN linux.old/arch/mips/bcm947xx/include/bcmdevs1.h linux.dev/arch/mips/bc + +#define BCM94318MPGH_BOARD 0x0463 + ++#define BU4311_BOARD 0x0464 ++#define BCM94311MC_BOARD 0x0465 ++#define BCM94311MCAG_BOARD 0x0466 + +#define BCM95352GR_BOARD 0x0467 + +/* bcm95351agr */ +#define BCM95351AGR_BOARD 0x0470 + ++/* bcm94704mpcb */ ++#define BCM94704MPCB_BOARD 0x0472 ++ ++/* 4785 boards */ ++#define BU4785_BOARD 0x0478 ++ ++/* 4321 boards */ ++#define BU4321_BOARD 0x046b ++#define BU4321E_BOARD 0x047c ++#define MP4321_BOARD 0x046c ++#define CB2_4321_BOARD 0x046d ++#define MC4321_BOARD 0x046e ++ +/* # of GPIO pins */ +#define GPIO_NUMPINS 16 + ++/* radio ID codes */ ++#define NORADIO_ID 0xe4f5 ++#define NORADIO_IDCODE 0x4e4f5246 ++ ++#define BCM2050_ID 0x2050 ++#define BCM2050_IDCODE 0x02050000 ++#define BCM2050A0_IDCODE 0x1205017f ++#define BCM2050A1_IDCODE 0x2205017f ++#define BCM2050R8_IDCODE 0x8205017f ++ ++#define BCM2055_ID 0x2055 ++#define BCM2055_IDCODE 0x02055000 ++#define BCM2055A0_IDCODE 0x1205517f ++ ++#define BCM2060_ID 0x2060 ++#define BCM2060_IDCODE 0x02060000 ++#define BCM2060WW_IDCODE 0x1206017f ++ ++#define BCM2062_ID 0x2062 ++#define BCM2062_IDCODE 0x02062000 ++#define BCM2062A0_IDCODE 0x0206217f ++ ++/* parts of an idcode: */ ++#define IDCODE_MFG_MASK 0x00000fff ++#define IDCODE_MFG_SHIFT 0 ++#define IDCODE_ID_MASK 0x0ffff000 ++#define IDCODE_ID_SHIFT 12 ++#define IDCODE_REV_MASK 0xf0000000 ++#define IDCODE_REV_SHIFT 28 ++ +#endif /* _BCMDEVS_H */ diff -urN linux.old/arch/mips/bcm947xx/include/bcmendian.h linux.dev/arch/mips/bcm947xx/include/bcmendian.h --- linux.old/arch/mips/bcm947xx/include/bcmendian.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/include/bcmendian.h 2006-04-27 20:08:35.000000000 +0200 ++++ linux.dev/arch/mips/bcm947xx/include/bcmendian.h 2006-10-02 21:19:59.000000000 +0200 @@ -0,0 +1,198 @@ +/* + * local version of endian.h - byte order defines @@ -3571,7 +3523,7 @@ diff -urN linux.old/arch/mips/bcm947xx/include/bcmendian.h linux.dev/arch/mips/b +#endif /* _BCMENDIAN_H_ */ diff -urN linux.old/arch/mips/bcm947xx/include/bcmnvram.h linux.dev/arch/mips/bcm947xx/include/bcmnvram.h --- linux.old/arch/mips/bcm947xx/include/bcmnvram.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/include/bcmnvram.h 2006-04-27 23:29:18.000000000 +0200 ++++ linux.dev/arch/mips/bcm947xx/include/bcmnvram.h 2006-10-02 21:19:59.000000000 +0200 @@ -0,0 +1,159 @@ +/* + * NVRAM variable manipulation @@ -3734,7 +3686,7 @@ diff -urN linux.old/arch/mips/bcm947xx/include/bcmnvram.h linux.dev/arch/mips/bc +#endif /* _bcmnvram_h_ */ diff -urN linux.old/arch/mips/bcm947xx/include/bcmsrom.h linux.dev/arch/mips/bcm947xx/include/bcmsrom.h --- linux.old/arch/mips/bcm947xx/include/bcmsrom.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/include/bcmsrom.h 2006-04-27 20:27:33.000000000 +0200 ++++ linux.dev/arch/mips/bcm947xx/include/bcmsrom.h 2006-10-02 21:19:59.000000000 +0200 @@ -0,0 +1,108 @@ +/* + * Misc useful routines to access NIC local SROM/OTP . @@ -3846,7 +3798,7 @@ diff -urN linux.old/arch/mips/bcm947xx/include/bcmsrom.h linux.dev/arch/mips/bcm +#endif /* _bcmsrom_h_ */ diff -urN linux.old/arch/mips/bcm947xx/include/bcmutils.h linux.dev/arch/mips/bcm947xx/include/bcmutils.h --- linux.old/arch/mips/bcm947xx/include/bcmutils.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/include/bcmutils.h 2006-05-02 01:52:12.000000000 +0200 ++++ linux.dev/arch/mips/bcm947xx/include/bcmutils.h 2006-10-02 21:19:59.000000000 +0200 @@ -0,0 +1,433 @@ +/* + * Misc useful os-independent macros and functions. @@ -4283,7 +4235,7 @@ diff -urN linux.old/arch/mips/bcm947xx/include/bcmutils.h linux.dev/arch/mips/bc +#endif /* _bcmutils_h_ */ diff -urN linux.old/arch/mips/bcm947xx/include/hndcpu.h linux.dev/arch/mips/bcm947xx/include/hndcpu.h --- linux.old/arch/mips/bcm947xx/include/hndcpu.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/include/hndcpu.h 2006-04-27 22:14:38.000000000 +0200 ++++ linux.dev/arch/mips/bcm947xx/include/hndcpu.h 2006-10-02 21:19:59.000000000 +0200 @@ -0,0 +1,28 @@ +/* + * HND SiliconBackplane MIPS/ARM cores software interface. @@ -4315,7 +4267,7 @@ diff -urN linux.old/arch/mips/bcm947xx/include/hndcpu.h linux.dev/arch/mips/bcm9 +#endif /* _hndcpu_h_ */ diff -urN linux.old/arch/mips/bcm947xx/include/hndmips.h linux.dev/arch/mips/bcm947xx/include/hndmips.h --- linux.old/arch/mips/bcm947xx/include/hndmips.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/include/hndmips.h 2006-04-27 20:43:42.000000000 +0200 ++++ linux.dev/arch/mips/bcm947xx/include/hndmips.h 2006-10-02 21:19:59.000000000 +0200 @@ -0,0 +1,45 @@ +/* + * HND SiliconBackplane MIPS core software interface. @@ -4364,7 +4316,7 @@ diff -urN linux.old/arch/mips/bcm947xx/include/hndmips.h linux.dev/arch/mips/bcm +#endif /* _hndmips_h_ */ diff -urN linux.old/arch/mips/bcm947xx/include/hndpci.h linux.dev/arch/mips/bcm947xx/include/hndpci.h --- linux.old/arch/mips/bcm947xx/include/hndpci.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/include/hndpci.h 2006-04-27 20:36:48.000000000 +0200 ++++ linux.dev/arch/mips/bcm947xx/include/hndpci.h 2006-10-02 21:19:59.000000000 +0200 @@ -0,0 +1,30 @@ +/* + * HND SiliconBackplane PCI core software interface. @@ -4398,7 +4350,7 @@ diff -urN linux.old/arch/mips/bcm947xx/include/hndpci.h linux.dev/arch/mips/bcm9 +#endif /* _hndpci_h_ */ diff -urN linux.old/arch/mips/bcm947xx/include/linuxver.h linux.dev/arch/mips/bcm947xx/include/linuxver.h --- linux.old/arch/mips/bcm947xx/include/linuxver.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/include/linuxver.h 2006-04-27 20:10:08.000000000 +0200 ++++ linux.dev/arch/mips/bcm947xx/include/linuxver.h 2006-10-02 21:19:59.000000000 +0200 @@ -0,0 +1,417 @@ +/* + * Linux-specific abstractions to gain some independence from linux kernel versions. @@ -4819,7 +4771,7 @@ diff -urN linux.old/arch/mips/bcm947xx/include/linuxver.h linux.dev/arch/mips/bc +#endif /* _linuxver_h_ */ diff -urN linux.old/arch/mips/bcm947xx/include/mipsinc.h linux.dev/arch/mips/bcm947xx/include/mipsinc.h --- linux.old/arch/mips/bcm947xx/include/mipsinc.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/include/mipsinc.h 2006-04-27 22:12:20.000000000 +0200 ++++ linux.dev/arch/mips/bcm947xx/include/mipsinc.h 2006-10-02 21:19:59.000000000 +0200 @@ -0,0 +1,541 @@ +/* + * HND Run Time Environment for standalone MIPS programs. @@ -5364,8 +5316,8 @@ diff -urN linux.old/arch/mips/bcm947xx/include/mipsinc.h linux.dev/arch/mips/bcm +#endif /* _MISPINC_H */ diff -urN linux.old/arch/mips/bcm947xx/include/osl.h linux.dev/arch/mips/bcm947xx/include/osl.h --- linux.old/arch/mips/bcm947xx/include/osl.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/include/osl.h 2006-05-02 17:40:43.000000000 +0200 -@@ -0,0 +1,179 @@ ++++ linux.dev/arch/mips/bcm947xx/include/osl.h 2006-10-02 21:19:59.000000000 +0200 +@@ -0,0 +1,181 @@ +#ifndef __osl_h +#define __osl_h + @@ -5378,13 +5330,15 @@ diff -urN linux.old/arch/mips/bcm947xx/include/osl.h linux.dev/arch/mips/bcm947x +#define ASSERT(n) + +/* Pkttag flag should be part of public information */ -+struct osl_pubinfo { ++typedef struct { + bool pkttag; + uint pktalloced; /* Number of allocated packet buffers */ -+}; ++ void *tx_fn; ++ void *tx_ctx; ++} osl_pubinfo_t; + +struct osl_info { -+ struct osl_pubinfo pub; ++ osl_pubinfo_t pub; + uint magic; + void *pdev; + uint malloced; @@ -5547,7 +5501,7 @@ diff -urN linux.old/arch/mips/bcm947xx/include/osl.h linux.dev/arch/mips/bcm947x +#endif diff -urN linux.old/arch/mips/bcm947xx/include/pcicfg.h linux.dev/arch/mips/bcm947xx/include/pcicfg.h --- linux.old/arch/mips/bcm947xx/include/pcicfg.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/include/pcicfg.h 2006-04-27 20:31:41.000000000 +0200 ++++ linux.dev/arch/mips/bcm947xx/include/pcicfg.h 2006-10-02 21:19:59.000000000 +0200 @@ -0,0 +1,495 @@ +/* + * pcicfg.h: PCI configuration constants and structures. @@ -6046,7 +6000,7 @@ diff -urN linux.old/arch/mips/bcm947xx/include/pcicfg.h linux.dev/arch/mips/bcm9 +#endif /* _h_pcicfg_ */ diff -urN linux.old/arch/mips/bcm947xx/include/sbchipc.h linux.dev/arch/mips/bcm947xx/include/sbchipc.h --- linux.old/arch/mips/bcm947xx/include/sbchipc.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/include/sbchipc.h 2006-04-27 22:11:01.000000000 +0200 ++++ linux.dev/arch/mips/bcm947xx/include/sbchipc.h 2006-10-02 21:19:59.000000000 +0200 @@ -0,0 +1,516 @@ +/* + * SiliconBackplane Chipcommon core hardware definitions. @@ -6566,7 +6520,7 @@ diff -urN linux.old/arch/mips/bcm947xx/include/sbchipc.h linux.dev/arch/mips/bcm +#endif /* _SBCHIPC_H */ diff -urN linux.old/arch/mips/bcm947xx/include/sbconfig.h linux.dev/arch/mips/bcm947xx/include/sbconfig.h --- linux.old/arch/mips/bcm947xx/include/sbconfig.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/include/sbconfig.h 2006-04-27 22:14:11.000000000 +0200 ++++ linux.dev/arch/mips/bcm947xx/include/sbconfig.h 2006-10-02 21:19:59.000000000 +0200 @@ -0,0 +1,369 @@ +/* + * Broadcom SiliconBackplane hardware register definitions. @@ -6939,7 +6893,7 @@ diff -urN linux.old/arch/mips/bcm947xx/include/sbconfig.h linux.dev/arch/mips/bc +#endif /* _SBCONFIG_H */ diff -urN linux.old/arch/mips/bcm947xx/include/sbextif.h linux.dev/arch/mips/bcm947xx/include/sbextif.h --- linux.old/arch/mips/bcm947xx/include/sbextif.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/include/sbextif.h 2006-04-27 22:13:03.000000000 +0200 ++++ linux.dev/arch/mips/bcm947xx/include/sbextif.h 2006-10-02 21:19:59.000000000 +0200 @@ -0,0 +1,243 @@ +/* + * Hardware-specific External Interface I/O core definitions @@ -7186,7 +7140,7 @@ diff -urN linux.old/arch/mips/bcm947xx/include/sbextif.h linux.dev/arch/mips/bcm +#endif /* _SBEXTIF_H */ diff -urN linux.old/arch/mips/bcm947xx/include/sbhndmips.h linux.dev/arch/mips/bcm947xx/include/sbhndmips.h --- linux.old/arch/mips/bcm947xx/include/sbhndmips.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/include/sbhndmips.h 2006-04-27 20:43:56.000000000 +0200 ++++ linux.dev/arch/mips/bcm947xx/include/sbhndmips.h 2006-10-02 21:19:59.000000000 +0200 @@ -0,0 +1,47 @@ +/* + * Broadcom SiliconBackplane MIPS definitions @@ -7237,7 +7191,7 @@ diff -urN linux.old/arch/mips/bcm947xx/include/sbhndmips.h linux.dev/arch/mips/b +#endif /* _sbhndmips_h_ */ diff -urN linux.old/arch/mips/bcm947xx/include/sbmemc.h linux.dev/arch/mips/bcm947xx/include/sbmemc.h --- linux.old/arch/mips/bcm947xx/include/sbmemc.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/include/sbmemc.h 2006-04-27 22:12:41.000000000 +0200 ++++ linux.dev/arch/mips/bcm947xx/include/sbmemc.h 2006-10-02 21:19:59.000000000 +0200 @@ -0,0 +1,147 @@ +/* + * BCM47XX Sonics SiliconBackplane DDR/SDRAM controller core hardware definitions. @@ -7343,170 +7297,52 @@ diff -urN linux.old/arch/mips/bcm947xx/include/sbmemc.h linux.dev/arch/mips/bcm9 +#define MEMC_RDNCDLCOR_INIT 0x00000000 +#define MEMC_RDNCDLCOR_SIMINIT 0xf6f6f6f6 /* For hdl sim */ +#define MEMC_WRNCDLCOR_INIT 0x49351200 -+#define MEMC_1_WRNCDLCOR_INIT 0x14500200 -+#define MEMC_DQSGATENCDL_INIT 0x00030000 -+#define MEMC_MISCDLYCTL_INIT 0x21061c1b -+#define MEMC_1_MISCDLYCTL_INIT 0x21021400 -+#define MEMC_NCDLCTL_INIT 0x00002001 -+#define MEMC_CONTROL_INIT0 0x00000002 -+#define MEMC_CONTROL_INIT1 0x00000008 -+#define MEMC_MODEBUF_INIT0 0x00004000 -+#define MEMC_CONTROL_INIT2 0x00000010 -+#define MEMC_MODEBUF_INIT1 0x00000100 -+#define MEMC_CONTROL_INIT3 0x00000010 -+#define MEMC_CONTROL_INIT4 0x00000008 -+#define MEMC_REFRESH_INIT 0x0000840f -+#define MEMC_CONTROL_INIT5 0x00000004 -+#define MEMC_MODEBUF_INIT2 0x00000000 -+#define MEMC_CONTROL_INIT6 0x00000010 -+#define MEMC_CONTROL_INIT7 0x00000001 -+ -+ -+/* This is for DDRM16X16X2 */ -+#define MEMC_DDR_INIT 0x0009 -+#define MEMC_DDR_MODE 0x62 -+#define MEMC_DDR_NCDL 0x0005050a -+#define MEMC_DDR1_NCDL 0x00000a0a /* For corerev 1 (4712) */ -+ -+/* mask for sdr/ddr calibration registers */ -+#define MEMC_RDNCDLCOR_RD_MASK 0x000000ff -+#define MEMC_WRNCDLCOR_WR_MASK 0x000000ff -+#define MEMC_DQSGATENCDL_G_MASK 0x000000ff -+ -+/* masks for miscdlyctl registers */ -+#define MEMC_MISC_SM_MASK 0x30000000 -+#define MEMC_MISC_SM_SHIFT 28 -+#define MEMC_MISC_SD_MASK 0x0f000000 -+#define MEMC_MISC_SD_SHIFT 24 -+ -+/* hw threshhold for calculating wr/rd for sdr memc */ -+#define MEMC_CD_THRESHOLD 128 -+ -+/* Low bit of init register says if memc is ddr or sdr */ -+#define MEMC_CONFIG_DDR 0x00000001 -+ -+#endif /* _SBMEMC_H */ -diff -urN linux.old/arch/mips/bcm947xx/include/sbpci.h linux.dev/arch/mips/bcm947xx/include/sbpci.h ---- linux.old/arch/mips/bcm947xx/include/sbpci.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/include/sbpci.h 2006-05-02 17:20:14.000000000 +0200 -@@ -0,0 +1,114 @@ -+/* -+ * HND SiliconBackplane PCI core hardware definitions. -+ * -+ * Copyright 2006, Broadcom Corporation -+ * All Rights Reserved. -+ * -+ * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY -+ * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM -+ * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS -+ * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. -+ * -+ * $Id: sbpci.h,v 1.1.1.11 2006/02/27 03:43:16 honor Exp $ -+ */ -+ -+#ifndef _sbpci_h_ -+#define _sbpci_h_ -+ -+#ifndef _LANGUAGE_ASSEMBLY -+ -+/* cpp contortions to concatenate w/arg prescan */ -+#ifndef PAD -+#define _PADLINE(line) pad ## line -+#define _XSTR(line) _PADLINE(line) -+#define PAD _XSTR(__LINE__) -+#endif -+ -+/* Sonics side: PCI core and host control registers */ -+typedef struct sbpciregs { -+ uint32 control; /* PCI control */ -+ uint32 PAD[3]; -+ uint32 arbcontrol; /* PCI arbiter control */ -+ uint32 PAD[3]; -+ uint32 intstatus; /* Interrupt status */ -+ uint32 intmask; /* Interrupt mask */ -+ uint32 sbtopcimailbox; /* Sonics to PCI mailbox */ -+ uint32 PAD[9]; -+ uint32 bcastaddr; /* Sonics broadcast address */ -+ uint32 bcastdata; /* Sonics broadcast data */ -+ uint32 PAD[2]; -+ uint32 gpioin; /* ro: gpio input (>=rev2) */ -+ uint32 gpioout; /* rw: gpio output (>=rev2) */ -+ uint32 gpioouten; /* rw: gpio output enable (>= rev2) */ -+ uint32 gpiocontrol; /* rw: gpio control (>= rev2) */ -+ uint32 PAD[36]; -+ uint32 sbtopci0; /* Sonics to PCI translation 0 */ -+ uint32 sbtopci1; /* Sonics to PCI translation 1 */ -+ uint32 sbtopci2; /* Sonics to PCI translation 2 */ -+ uint32 PAD[189]; -+ uint32 pcicfg[4][64]; /* 0x400 - 0x7FF, PCI Cfg Space (>=rev8) */ -+ uint16 sprom[36]; /* SPROM shadow Area */ -+ uint32 PAD[46]; -+} sbpciregs_t; -+ -+#endif /* _LANGUAGE_ASSEMBLY */ -+ -+/* PCI control */ -+#define PCI_RST_OE 0x01 /* When set, drives PCI_RESET out to pin */ -+#define PCI_RST 0x02 /* Value driven out to pin */ -+#define PCI_CLK_OE 0x04 /* When set, drives clock as gated by PCI_CLK out to pin */ -+#define PCI_CLK 0x08 /* Gate for clock driven out to pin */ ++#define MEMC_1_WRNCDLCOR_INIT 0x14500200 ++#define MEMC_DQSGATENCDL_INIT 0x00030000 ++#define MEMC_MISCDLYCTL_INIT 0x21061c1b ++#define MEMC_1_MISCDLYCTL_INIT 0x21021400 ++#define MEMC_NCDLCTL_INIT 0x00002001 ++#define MEMC_CONTROL_INIT0 0x00000002 ++#define MEMC_CONTROL_INIT1 0x00000008 ++#define MEMC_MODEBUF_INIT0 0x00004000 ++#define MEMC_CONTROL_INIT2 0x00000010 ++#define MEMC_MODEBUF_INIT1 0x00000100 ++#define MEMC_CONTROL_INIT3 0x00000010 ++#define MEMC_CONTROL_INIT4 0x00000008 ++#define MEMC_REFRESH_INIT 0x0000840f ++#define MEMC_CONTROL_INIT5 0x00000004 ++#define MEMC_MODEBUF_INIT2 0x00000000 ++#define MEMC_CONTROL_INIT6 0x00000010 ++#define MEMC_CONTROL_INIT7 0x00000001 + -+/* PCI arbiter control */ -+#define PCI_INT_ARB 0x01 /* When set, use an internal arbiter */ -+#define PCI_EXT_ARB 0x02 /* When set, use an external arbiter */ -+/* ParkID - for PCI corerev >= 8 */ -+#define PCI_PARKID_MASK 0x1c /* Selects which agent is parked on an idle bus */ -+#define PCI_PARKID_SHIFT 2 -+#define PCI_PARKID_EXT0 0 /* External master 0 */ -+#define PCI_PARKID_EXT1 1 /* External master 1 */ -+#define PCI_PARKID_EXT2 2 /* External master 2 */ -+#define PCI_PARKID_INT 3 /* Internal master */ -+#define PCI_PARKID_LAST 4 /* Last active master */ + -+/* Interrupt status/mask */ -+#define PCI_INTA 0x01 /* PCI INTA# is asserted */ -+#define PCI_INTB 0x02 /* PCI INTB# is asserted */ -+#define PCI_SERR 0x04 /* PCI SERR# has been asserted (write one to clear) */ -+#define PCI_PERR 0x08 /* PCI PERR# has been asserted (write one to clear) */ -+#define PCI_PME 0x10 /* PCI PME# is asserted */ ++/* This is for DDRM16X16X2 */ ++#define MEMC_DDR_INIT 0x0009 ++#define MEMC_DDR_MODE 0x62 ++#define MEMC_DDR_NCDL 0x0005050a ++#define MEMC_DDR1_NCDL 0x00000a0a /* For corerev 1 (4712) */ + -+/* (General) PCI/SB mailbox interrupts, two bits per pci function */ -+#define MAILBOX_F0_0 0x100 /* function 0, int 0 */ -+#define MAILBOX_F0_1 0x200 /* function 0, int 1 */ -+#define MAILBOX_F1_0 0x400 /* function 1, int 0 */ -+#define MAILBOX_F1_1 0x800 /* function 1, int 1 */ -+#define MAILBOX_F2_0 0x1000 /* function 2, int 0 */ -+#define MAILBOX_F2_1 0x2000 /* function 2, int 1 */ -+#define MAILBOX_F3_0 0x4000 /* function 3, int 0 */ -+#define MAILBOX_F3_1 0x8000 /* function 3, int 1 */ ++/* mask for sdr/ddr calibration registers */ ++#define MEMC_RDNCDLCOR_RD_MASK 0x000000ff ++#define MEMC_WRNCDLCOR_WR_MASK 0x000000ff ++#define MEMC_DQSGATENCDL_G_MASK 0x000000ff + -+/* Sonics broadcast address */ -+#define BCAST_ADDR_MASK 0xff /* Broadcast register address */ ++/* masks for miscdlyctl registers */ ++#define MEMC_MISC_SM_MASK 0x30000000 ++#define MEMC_MISC_SM_SHIFT 28 ++#define MEMC_MISC_SD_MASK 0x0f000000 ++#define MEMC_MISC_SD_SHIFT 24 + -+/* Sonics to PCI translation types */ -+#define SBTOPCI0_MASK 0xfc000000 -+#define SBTOPCI1_MASK 0xfc000000 -+#define SBTOPCI2_MASK 0xc0000000 -+#define SBTOPCI_MEM 0 -+#define SBTOPCI_IO 1 -+#define SBTOPCI_CFG0 2 -+#define SBTOPCI_CFG1 3 -+#define SBTOPCI_PREF 0x4 /* prefetch enable */ -+#define SBTOPCI_BURST 0x8 /* burst enable */ -+#define SBTOPCI_RC_MASK 0x30 /* read command (>= rev11) */ -+#define SBTOPCI_RC_READ 0x00 /* memory read */ -+#define SBTOPCI_RC_READLINE 0x10 /* memory read line */ -+#define SBTOPCI_RC_READMULTI 0x20 /* memory read multiple */ ++/* hw threshhold for calculating wr/rd for sdr memc */ ++#define MEMC_CD_THRESHOLD 128 + -+/* PCI core index in SROM shadow area */ -+#define SRSH_PI_OFFSET 0 /* first word */ -+#define SRSH_PI_MASK 0xf000 /* bit 15:12 */ -+#define SRSH_PI_SHIFT 12 /* bit 15:12 */ ++/* Low bit of init register says if memc is ddr or sdr */ ++#define MEMC_CONFIG_DDR 0x00000001 + -+#endif /* _sbpci_h_ */ ++#endif /* _SBMEMC_H */ diff -urN linux.old/arch/mips/bcm947xx/include/sbpcie.h linux.dev/arch/mips/bcm947xx/include/sbpcie.h --- linux.old/arch/mips/bcm947xx/include/sbpcie.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/include/sbpcie.h 2006-04-27 20:42:22.000000000 +0200 ++++ linux.dev/arch/mips/bcm947xx/include/sbpcie.h 2006-10-02 21:19:59.000000000 +0200 @@ -0,0 +1,200 @@ +/* + * BCM43XX SiliconBackplane PCIE core hardware definitions. @@ -7708,9 +7544,127 @@ diff -urN linux.old/arch/mips/bcm947xx/include/sbpcie.h linux.dev/arch/mips/bcm9 +#define SERDES_RX_CDRBW 7 /* CDR BW */ + +#endif /* _SBPCIE_H */ +diff -urN linux.old/arch/mips/bcm947xx/include/sbpci.h linux.dev/arch/mips/bcm947xx/include/sbpci.h +--- linux.old/arch/mips/bcm947xx/include/sbpci.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux.dev/arch/mips/bcm947xx/include/sbpci.h 2006-10-02 21:19:59.000000000 +0200 +@@ -0,0 +1,114 @@ ++/* ++ * HND SiliconBackplane PCI core hardware definitions. ++ * ++ * Copyright 2006, Broadcom Corporation ++ * All Rights Reserved. ++ * ++ * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY ++ * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM ++ * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS ++ * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. ++ * ++ * $Id: sbpci.h,v 1.1.1.11 2006/02/27 03:43:16 honor Exp $ ++ */ ++ ++#ifndef _sbpci_h_ ++#define _sbpci_h_ ++ ++#ifndef _LANGUAGE_ASSEMBLY ++ ++/* cpp contortions to concatenate w/arg prescan */ ++#ifndef PAD ++#define _PADLINE(line) pad ## line ++#define _XSTR(line) _PADLINE(line) ++#define PAD _XSTR(__LINE__) ++#endif ++ ++/* Sonics side: PCI core and host control registers */ ++typedef struct sbpciregs { ++ uint32 control; /* PCI control */ ++ uint32 PAD[3]; ++ uint32 arbcontrol; /* PCI arbiter control */ ++ uint32 PAD[3]; ++ uint32 intstatus; /* Interrupt status */ ++ uint32 intmask; /* Interrupt mask */ ++ uint32 sbtopcimailbox; /* Sonics to PCI mailbox */ ++ uint32 PAD[9]; ++ uint32 bcastaddr; /* Sonics broadcast address */ ++ uint32 bcastdata; /* Sonics broadcast data */ ++ uint32 PAD[2]; ++ uint32 gpioin; /* ro: gpio input (>=rev2) */ ++ uint32 gpioout; /* rw: gpio output (>=rev2) */ ++ uint32 gpioouten; /* rw: gpio output enable (>= rev2) */ ++ uint32 gpiocontrol; /* rw: gpio control (>= rev2) */ ++ uint32 PAD[36]; ++ uint32 sbtopci0; /* Sonics to PCI translation 0 */ ++ uint32 sbtopci1; /* Sonics to PCI translation 1 */ ++ uint32 sbtopci2; /* Sonics to PCI translation 2 */ ++ uint32 PAD[189]; ++ uint32 pcicfg[4][64]; /* 0x400 - 0x7FF, PCI Cfg Space (>=rev8) */ ++ uint16 sprom[36]; /* SPROM shadow Area */ ++ uint32 PAD[46]; ++} sbpciregs_t; ++ ++#endif /* _LANGUAGE_ASSEMBLY */ ++ ++/* PCI control */ ++#define PCI_RST_OE 0x01 /* When set, drives PCI_RESET out to pin */ ++#define PCI_RST 0x02 /* Value driven out to pin */ ++#define PCI_CLK_OE 0x04 /* When set, drives clock as gated by PCI_CLK out to pin */ ++#define PCI_CLK 0x08 /* Gate for clock driven out to pin */ ++ ++/* PCI arbiter control */ ++#define PCI_INT_ARB 0x01 /* When set, use an internal arbiter */ ++#define PCI_EXT_ARB 0x02 /* When set, use an external arbiter */ ++/* ParkID - for PCI corerev >= 8 */ ++#define PCI_PARKID_MASK 0x1c /* Selects which agent is parked on an idle bus */ ++#define PCI_PARKID_SHIFT 2 ++#define PCI_PARKID_EXT0 0 /* External master 0 */ ++#define PCI_PARKID_EXT1 1 /* External master 1 */ ++#define PCI_PARKID_EXT2 2 /* External master 2 */ ++#define PCI_PARKID_INT 3 /* Internal master */ ++#define PCI_PARKID_LAST 4 /* Last active master */ ++ ++/* Interrupt status/mask */ ++#define PCI_INTA 0x01 /* PCI INTA# is asserted */ ++#define PCI_INTB 0x02 /* PCI INTB# is asserted */ ++#define PCI_SERR 0x04 /* PCI SERR# has been asserted (write one to clear) */ ++#define PCI_PERR 0x08 /* PCI PERR# has been asserted (write one to clear) */ ++#define PCI_PME 0x10 /* PCI PME# is asserted */ ++ ++/* (General) PCI/SB mailbox interrupts, two bits per pci function */ ++#define MAILBOX_F0_0 0x100 /* function 0, int 0 */ ++#define MAILBOX_F0_1 0x200 /* function 0, int 1 */ ++#define MAILBOX_F1_0 0x400 /* function 1, int 0 */ ++#define MAILBOX_F1_1 0x800 /* function 1, int 1 */ ++#define MAILBOX_F2_0 0x1000 /* function 2, int 0 */ ++#define MAILBOX_F2_1 0x2000 /* function 2, int 1 */ ++#define MAILBOX_F3_0 0x4000 /* function 3, int 0 */ ++#define MAILBOX_F3_1 0x8000 /* function 3, int 1 */ ++ ++/* Sonics broadcast address */ ++#define BCAST_ADDR_MASK 0xff /* Broadcast register address */ ++ ++/* Sonics to PCI translation types */ ++#define SBTOPCI0_MASK 0xfc000000 ++#define SBTOPCI1_MASK 0xfc000000 ++#define SBTOPCI2_MASK 0xc0000000 ++#define SBTOPCI_MEM 0 ++#define SBTOPCI_IO 1 ++#define SBTOPCI_CFG0 2 ++#define SBTOPCI_CFG1 3 ++#define SBTOPCI_PREF 0x4 /* prefetch enable */ ++#define SBTOPCI_BURST 0x8 /* burst enable */ ++#define SBTOPCI_RC_MASK 0x30 /* read command (>= rev11) */ ++#define SBTOPCI_RC_READ 0x00 /* memory read */ ++#define SBTOPCI_RC_READLINE 0x10 /* memory read line */ ++#define SBTOPCI_RC_READMULTI 0x20 /* memory read multiple */ ++ ++/* PCI core index in SROM shadow area */ ++#define SRSH_PI_OFFSET 0 /* first word */ ++#define SRSH_PI_MASK 0xf000 /* bit 15:12 */ ++#define SRSH_PI_SHIFT 12 /* bit 15:12 */ ++ ++#endif /* _sbpci_h_ */ diff -urN linux.old/arch/mips/bcm947xx/include/sbpcmcia.h linux.dev/arch/mips/bcm947xx/include/sbpcmcia.h --- linux.old/arch/mips/bcm947xx/include/sbpcmcia.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/include/sbpcmcia.h 2006-04-27 20:29:47.000000000 +0200 ++++ linux.dev/arch/mips/bcm947xx/include/sbpcmcia.h 2006-10-02 21:19:59.000000000 +0200 @@ -0,0 +1,147 @@ +/* + * BCM43XX Sonics SiliconBackplane PCMCIA core hardware definitions. @@ -7861,7 +7815,7 @@ diff -urN linux.old/arch/mips/bcm947xx/include/sbpcmcia.h linux.dev/arch/mips/bc +#endif /* _SBPCMCIA_H */ diff -urN linux.old/arch/mips/bcm947xx/include/sbsdram.h linux.dev/arch/mips/bcm947xx/include/sbsdram.h --- linux.old/arch/mips/bcm947xx/include/sbsdram.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/include/sbsdram.h 2006-04-27 20:36:08.000000000 +0200 ++++ linux.dev/arch/mips/bcm947xx/include/sbsdram.h 2006-10-02 21:19:59.000000000 +0200 @@ -0,0 +1,85 @@ +/* + * BCM47XX Sonics SiliconBackplane SDRAM controller core hardware definitions. @@ -7950,7 +7904,7 @@ diff -urN linux.old/arch/mips/bcm947xx/include/sbsdram.h linux.dev/arch/mips/bcm +#endif /* _SBSDRAM_H */ diff -urN linux.old/arch/mips/bcm947xx/include/sbsocram.h linux.dev/arch/mips/bcm947xx/include/sbsocram.h --- linux.old/arch/mips/bcm947xx/include/sbsocram.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/include/sbsocram.h 2006-04-27 22:13:19.000000000 +0200 ++++ linux.dev/arch/mips/bcm947xx/include/sbsocram.h 2006-10-02 21:19:59.000000000 +0200 @@ -0,0 +1,64 @@ +/* + * BCM47XX Sonics SiliconBackplane embedded ram core @@ -8018,8 +7972,8 @@ diff -urN linux.old/arch/mips/bcm947xx/include/sbsocram.h linux.dev/arch/mips/bc +#endif /* _SBSOCRAM_H */ diff -urN linux.old/arch/mips/bcm947xx/include/sbutils.h linux.dev/arch/mips/bcm947xx/include/sbutils.h --- linux.old/arch/mips/bcm947xx/include/sbutils.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/include/sbutils.h 2006-04-27 23:09:25.000000000 +0200 -@@ -0,0 +1,150 @@ ++++ linux.dev/arch/mips/bcm947xx/include/sbutils.h 2006-10-02 21:19:59.000000000 +0200 +@@ -0,0 +1,151 @@ +/* + * Misc utility routines for accessing chip-specific features + * of Broadcom HNBU SiliconBackplane-based chips. @@ -8165,6 +8119,7 @@ diff -urN linux.old/arch/mips/bcm947xx/include/sbutils.h linux.dev/arch/mips/bcm +/* GPIO usage priorities */ +#define GPIO_DRV_PRIORITY 0 /* Driver */ +#define GPIO_APP_PRIORITY 1 /* Application */ ++#define GPIO_HI_PRIORITY 2 /* Highest priority. Ignore GPIO reservation */ + +/* device path */ +#define SB_DEVPATH_BUFSZ 16 /* min buffer size in bytes */ @@ -8172,7 +8127,7 @@ diff -urN linux.old/arch/mips/bcm947xx/include/sbutils.h linux.dev/arch/mips/bcm +#endif /* _sbutils_h_ */ diff -urN linux.old/arch/mips/bcm947xx/include/sflash.h linux.dev/arch/mips/bcm947xx/include/sflash.h --- linux.old/arch/mips/bcm947xx/include/sflash.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/include/sflash.h 2006-04-27 22:13:51.000000000 +0200 ++++ linux.dev/arch/mips/bcm947xx/include/sflash.h 2006-10-02 21:19:59.000000000 +0200 @@ -0,0 +1,36 @@ +/* + * Broadcom SiliconBackplane chipcommon serial flash interface @@ -8212,7 +8167,7 @@ diff -urN linux.old/arch/mips/bcm947xx/include/sflash.h linux.dev/arch/mips/bcm9 +#endif /* _sflash_h_ */ diff -urN linux.old/arch/mips/bcm947xx/include/trxhdr.h linux.dev/arch/mips/bcm947xx/include/trxhdr.h --- linux.old/arch/mips/bcm947xx/include/trxhdr.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/include/trxhdr.h 2006-04-27 19:24:19.000000000 +0200 ++++ linux.dev/arch/mips/bcm947xx/include/trxhdr.h 2006-10-02 21:19:59.000000000 +0200 @@ -0,0 +1,33 @@ +/* + * TRX image file header format. @@ -8249,7 +8204,7 @@ diff -urN linux.old/arch/mips/bcm947xx/include/trxhdr.h linux.dev/arch/mips/bcm9 +typedef struct trx_header TRXHDR, *PTRXHDR; diff -urN linux.old/arch/mips/bcm947xx/include/typedefs.h linux.dev/arch/mips/bcm947xx/include/typedefs.h --- linux.old/arch/mips/bcm947xx/include/typedefs.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/include/typedefs.h 2006-04-27 23:47:30.000000000 +0200 ++++ linux.dev/arch/mips/bcm947xx/include/typedefs.h 2006-10-02 21:19:59.000000000 +0200 @@ -0,0 +1,361 @@ +/* + * Copyright 2006, Broadcom Corporation @@ -8612,9 +8567,30 @@ diff -urN linux.old/arch/mips/bcm947xx/include/typedefs.h linux.dev/arch/mips/bc +#include "bcmdefs.h" + +#endif /* _TYPEDEFS_H_ */ +diff -urN linux.old/arch/mips/bcm947xx/Makefile linux.dev/arch/mips/bcm947xx/Makefile +--- linux.old/arch/mips/bcm947xx/Makefile 1970-01-01 01:00:00.000000000 +0100 ++++ linux.dev/arch/mips/bcm947xx/Makefile 2006-10-02 21:26:08.000000000 +0200 +@@ -0,0 +1,17 @@ ++# ++# Makefile for the BCM947xx specific kernel interface routines ++# under Linux. ++# ++ ++EXTRA_CFLAGS+=-I$(TOPDIR)/arch/mips/bcm947xx/include -DBCMDRIVER -fno-delayed-branch ++ ++O_TARGET := bcm947xx.o ++ ++export-objs := export.o ++obj-y := prom.o setup.o time.o sbmips.o gpio.o ++obj-y += nvram.o nvram_linux.o sflash.o cfe_env.o ++obj-y += sbutils.o bcmutils.o bcmsrom.o hndchipc.o ++obj-$(CONFIG_PCI) += sbpci.o pcibios.o ++obj-y += export.o ++ ++include $(TOPDIR)/Rules.make diff -urN linux.old/arch/mips/bcm947xx/nvram.c linux.dev/arch/mips/bcm947xx/nvram.c --- linux.old/arch/mips/bcm947xx/nvram.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/nvram.c 2006-04-27 23:11:58.000000000 +0200 ++++ linux.dev/arch/mips/bcm947xx/nvram.c 2006-10-02 21:19:59.000000000 +0200 @@ -0,0 +1,315 @@ +/* + * NVRAM variable manipulation (common) @@ -8933,7 +8909,7 @@ diff -urN linux.old/arch/mips/bcm947xx/nvram.c linux.dev/arch/mips/bcm947xx/nvra +} diff -urN linux.old/arch/mips/bcm947xx/nvram_linux.c linux.dev/arch/mips/bcm947xx/nvram_linux.c --- linux.old/arch/mips/bcm947xx/nvram_linux.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/nvram_linux.c 2006-04-27 23:30:07.000000000 +0200 ++++ linux.dev/arch/mips/bcm947xx/nvram_linux.c 2006-10-02 21:19:59.000000000 +0200 @@ -0,0 +1,723 @@ +/* + * NVRAM variable manipulation (Linux kernel half) @@ -9660,7 +9636,7 @@ diff -urN linux.old/arch/mips/bcm947xx/nvram_linux.c linux.dev/arch/mips/bcm947x +module_exit(dev_nvram_exit); diff -urN linux.old/arch/mips/bcm947xx/pcibios.c linux.dev/arch/mips/bcm947xx/pcibios.c --- linux.old/arch/mips/bcm947xx/pcibios.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/pcibios.c 2006-04-27 23:42:50.000000000 +0200 ++++ linux.dev/arch/mips/bcm947xx/pcibios.c 2006-10-02 21:22:56.000000000 +0200 @@ -0,0 +1,380 @@ +/* + * Low-Level PCI and SB support for BCM47xx (Linux support code) @@ -10044,7 +10020,7 @@ diff -urN linux.old/arch/mips/bcm947xx/pcibios.c linux.dev/arch/mips/bcm947xx/pc + diff -urN linux.old/arch/mips/bcm947xx/prom.c linux.dev/arch/mips/bcm947xx/prom.c --- linux.old/arch/mips/bcm947xx/prom.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/prom.c 2006-04-27 19:24:19.000000000 +0200 ++++ linux.dev/arch/mips/bcm947xx/prom.c 2006-10-02 21:19:59.000000000 +0200 @@ -0,0 +1,41 @@ +/* + * Early initialization code for BCM94710 boards @@ -10089,7 +10065,7 @@ diff -urN linux.old/arch/mips/bcm947xx/prom.c linux.dev/arch/mips/bcm947xx/prom. +} diff -urN linux.old/arch/mips/bcm947xx/sbmips.c linux.dev/arch/mips/bcm947xx/sbmips.c --- linux.old/arch/mips/bcm947xx/sbmips.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/sbmips.c 2006-05-02 04:43:13.000000000 +0200 ++++ linux.dev/arch/mips/bcm947xx/sbmips.c 2006-10-02 21:19:59.000000000 +0200 @@ -0,0 +1,1132 @@ +/* + * BCM47XX Sonics SiliconBackplane MIPS core routines @@ -11225,7 +11201,7 @@ diff -urN linux.old/arch/mips/bcm947xx/sbmips.c linux.dev/arch/mips/bcm947xx/sbm +#endif /* BCMINTERNAL | BCMPERFSTATS */ diff -urN linux.old/arch/mips/bcm947xx/sbpci.c linux.dev/arch/mips/bcm947xx/sbpci.c --- linux.old/arch/mips/bcm947xx/sbpci.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/sbpci.c 2006-05-02 17:37:13.000000000 +0200 ++++ linux.dev/arch/mips/bcm947xx/sbpci.c 2006-10-02 21:19:59.000000000 +0200 @@ -0,0 +1,768 @@ +/* + * Low-Level PCI and SB support for BCM47xx @@ -11997,8 +11973,8 @@ diff -urN linux.old/arch/mips/bcm947xx/sbpci.c linux.dev/arch/mips/bcm947xx/sbpc + diff -urN linux.old/arch/mips/bcm947xx/sbutils.c linux.dev/arch/mips/bcm947xx/sbutils.c --- linux.old/arch/mips/bcm947xx/sbutils.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/sbutils.c 2006-05-02 04:33:16.000000000 +0200 -@@ -0,0 +1,3081 @@ ++++ linux.dev/arch/mips/bcm947xx/sbutils.c 2006-10-02 21:19:59.000000000 +0200 +@@ -0,0 +1,3103 @@ +/* + * Misc utility routines for accessing chip-specific features + * of the SiliconBackplane-based Broadcom chips. @@ -12143,6 +12119,11 @@ diff -urN linux.old/arch/mips/bcm947xx/sbutils.c linux.dev/arch/mips/bcm947xx/sb +#define PCIE_CONFIGREGS 1 /* Access to config space */ +#define PCIE_PCIEREGS 2 /* Access to pcie registers */ + ++/* force HT war check */ ++#define FORCEHT_WAR32414(si) \ ++ ((PCIE(si)) && (((si->sb.chip == BCM4311_CHIP_ID) && (si->sb.chiprev == 1)) || \ ++ ((si->sb.chip == BCM4321_CHIP_ID) && (si->sb.chiprev <= 3)))) ++ +/* GPIO Based LED powersave defines */ +#define DEFAULT_GPIO_ONTIME 10 /* Default: 10% on */ +#define DEFAULT_GPIO_OFFTIME 90 /* Default: 10% on */ @@ -12296,6 +12277,23 @@ diff -urN linux.old/arch/mips/bcm947xx/sbutils.c linux.dev/arch/mips/bcm947xx/sb +} +#endif /* !BCMBUSTYPE || (BCMBUSTYPE == SB_BUS) */ + ++void ++BCMINITFN(sb_war32414_forceHT)(sb_t *sbh, bool forceHT) ++{ ++ sb_info_t *si; ++ ++ si = SB_INFO(sbh); ++ ++ ++ if (FORCEHT_WAR32414(si)) { ++ uint32 val = 0; ++ if (forceHT) ++ val = SYCC_HR; ++ sb_corereg((void*)si, SB_CC_IDX, OFFSETOF(chipcregs_t, system_clk_ctl), ++ SYCC_HR, val); ++ } ++} ++ +static sb_info_t * +BCMINITFN(sb_doattach)(sb_info_t *si, uint devid, osl_t *osh, void *regs, + uint bustype, void *sdh, char **vars, uint *varsz) @@ -12478,17 +12476,17 @@ diff -urN linux.old/arch/mips/bcm947xx/sbutils.c linux.dev/arch/mips/bcm947xx/sb + w = DEFAULT_GPIOTIMERVAL; + sb_corereg(si, 0, OFFSETOF(chipcregs_t, gpiotimerval), ~0, w); + } -+ if ((si->sb.chip == BCM4311_CHIP_ID) && (si->sb.chiprev <= 1)) { ++ if (FORCEHT_WAR32414(si)) { + /* set proper clk setup delays before forcing HT */ + sb_clkctl_init((void *)si); -+ sb_corereg((void*)si, SB_CC_IDX, OFFSETOF(chipcregs_t, system_clk_ctl), -+ SYCC_HR, SYCC_HR); ++ sb_war32414_forceHT((void *)si, 1); + } + + + return (si); +} + ++ +uint +sb_coreid(sb_t *sbh) +{ @@ -12797,7 +12795,7 @@ diff -urN linux.old/arch/mips/bcm947xx/sbutils.c linux.dev/arch/mips/bcm947xx/sb +#define read_pci_cfg_byte(a) \ + (BYTE_VAL(OSL_PCI_READ_CONFIG(si->osh, DWORD_ALIGN(a), 4), a) & 0xff) + -+#define read_pci_cfg_write(a) \ ++#define read_pci_cfg_word(a) \ + (WORD_VAL(OSL_PCI_READ_CONFIG(si->osh, DWORD_ALIGN(a), 4), a) & 0xffff) + + @@ -15082,7 +15080,7 @@ diff -urN linux.old/arch/mips/bcm947xx/sbutils.c linux.dev/arch/mips/bcm947xx/sb + diff -urN linux.old/arch/mips/bcm947xx/setup.c linux.dev/arch/mips/bcm947xx/setup.c --- linux.old/arch/mips/bcm947xx/setup.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/setup.c 2006-04-27 23:22:53.000000000 +0200 ++++ linux.dev/arch/mips/bcm947xx/setup.c 2006-10-02 21:19:59.000000000 +0200 @@ -0,0 +1,241 @@ +/* + * Generic setup routines for Broadcom MIPS boards @@ -15327,7 +15325,7 @@ diff -urN linux.old/arch/mips/bcm947xx/setup.c linux.dev/arch/mips/bcm947xx/setu + diff -urN linux.old/arch/mips/bcm947xx/sflash.c linux.dev/arch/mips/bcm947xx/sflash.c --- linux.old/arch/mips/bcm947xx/sflash.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/sflash.c 2006-04-27 22:11:27.000000000 +0200 ++++ linux.dev/arch/mips/bcm947xx/sflash.c 2006-10-02 21:19:59.000000000 +0200 @@ -0,0 +1,422 @@ +/* + * Broadcom SiliconBackplane chipcommon serial flash interface @@ -15753,7 +15751,7 @@ diff -urN linux.old/arch/mips/bcm947xx/sflash.c linux.dev/arch/mips/bcm947xx/sfl +} diff -urN linux.old/arch/mips/bcm947xx/time.c linux.dev/arch/mips/bcm947xx/time.c --- linux.old/arch/mips/bcm947xx/time.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/time.c 2006-04-28 00:45:40.000000000 +0200 ++++ linux.dev/arch/mips/bcm947xx/time.c 2006-10-02 21:19:59.000000000 +0200 @@ -0,0 +1,104 @@ +/* + * Copyright 2006, Broadcom Corporation @@ -15860,8 +15858,8 @@ diff -urN linux.old/arch/mips/bcm947xx/time.c linux.dev/arch/mips/bcm947xx/time. + setup_irq(7, &bcm947xx_timer_irqaction); +} diff -urN linux.old/arch/mips/config-shared.in linux.dev/arch/mips/config-shared.in ---- linux.old/arch/mips/config-shared.in 2006-04-27 18:04:37.000000000 +0200 -+++ linux.dev/arch/mips/config-shared.in 2006-04-27 19:24:19.000000000 +0200 +--- linux.old/arch/mips/config-shared.in 2006-10-02 21:23:10.000000000 +0200 ++++ linux.dev/arch/mips/config-shared.in 2006-10-02 21:19:59.000000000 +0200 @@ -208,6 +208,14 @@ fi define_bool CONFIG_MIPS_RTC y @@ -15902,7 +15900,7 @@ diff -urN linux.old/arch/mips/config-shared.in linux.dev/arch/mips/config-shared if [ "$CONFIG_SNI_RM200_PCI" = "y" ]; then define_bool CONFIG_ARC32 y define_bool CONFIG_ARC_MEMORY y -@@ -1042,7 +1062,11 @@ +@@ -1042,7 +1061,11 @@ bool 'Are you using a crosscompiler' CONFIG_CROSSCOMPILE bool 'Enable run-time debugging' CONFIG_RUNTIME_DEBUG @@ -15916,8 +15914,8 @@ diff -urN linux.old/arch/mips/config-shared.in linux.dev/arch/mips/config-shared if [ "$CONFIG_KGDB" = "y" ]; then define_bool CONFIG_DEBUG_INFO y diff -urN linux.old/arch/mips/kernel/cpu-probe.c linux.dev/arch/mips/kernel/cpu-probe.c ---- linux.old/arch/mips/kernel/cpu-probe.c 2006-04-27 18:04:37.000000000 +0200 -+++ linux.dev/arch/mips/kernel/cpu-probe.c 2006-04-27 19:24:19.000000000 +0200 +--- linux.old/arch/mips/kernel/cpu-probe.c 2006-10-02 21:23:10.000000000 +0200 ++++ linux.dev/arch/mips/kernel/cpu-probe.c 2006-10-02 21:19:59.000000000 +0200 @@ -162,7 +162,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c) @@ -16038,8 +16036,8 @@ diff -urN linux.old/arch/mips/kernel/cpu-probe.c linux.dev/arch/mips/kernel/cpu- cpu_probe_sibyte(c); break; diff -urN linux.old/arch/mips/kernel/head.S linux.dev/arch/mips/kernel/head.S ---- linux.old/arch/mips/kernel/head.S 2006-04-27 18:04:37.000000000 +0200 -+++ linux.dev/arch/mips/kernel/head.S 2006-04-27 19:24:19.000000000 +0200 +--- linux.old/arch/mips/kernel/head.S 2006-10-02 21:23:10.000000000 +0200 ++++ linux.dev/arch/mips/kernel/head.S 2006-10-02 21:19:59.000000000 +0200 @@ -28,12 +28,20 @@ #include #include @@ -16063,8 +16061,8 @@ diff -urN linux.old/arch/mips/kernel/head.S linux.dev/arch/mips/kernel/head.S /* The following two symbols are used for kernel profiling. */ EXPORT(stext) diff -urN linux.old/arch/mips/kernel/proc.c linux.dev/arch/mips/kernel/proc.c ---- linux.old/arch/mips/kernel/proc.c 2006-04-27 18:04:37.000000000 +0200 -+++ linux.dev/arch/mips/kernel/proc.c 2006-04-27 19:24:19.000000000 +0200 +--- linux.old/arch/mips/kernel/proc.c 2006-10-02 21:23:10.000000000 +0200 ++++ linux.dev/arch/mips/kernel/proc.c 2006-10-02 21:19:59.000000000 +0200 @@ -78,9 +78,10 @@ [CPU_AU1550] "Au1550", [CPU_24K] "MIPS 24K", @@ -16078,8 +16076,8 @@ diff -urN linux.old/arch/mips/kernel/proc.c linux.dev/arch/mips/kernel/proc.c { unsigned int version = current_cpu_data.processor_id; diff -urN linux.old/arch/mips/kernel/setup.c linux.dev/arch/mips/kernel/setup.c ---- linux.old/arch/mips/kernel/setup.c 2006-04-27 18:04:37.000000000 +0200 -+++ linux.dev/arch/mips/kernel/setup.c 2006-04-27 19:24:19.000000000 +0200 +--- linux.old/arch/mips/kernel/setup.c 2006-10-02 21:23:10.000000000 +0200 ++++ linux.dev/arch/mips/kernel/setup.c 2006-10-02 21:19:59.000000000 +0200 @@ -493,6 +493,7 @@ void swarm_setup(void); void hp_setup(void); @@ -16101,8 +16099,8 @@ diff -urN linux.old/arch/mips/kernel/setup.c linux.dev/arch/mips/kernel/setup.c panic("Unsupported architecture"); } diff -urN linux.old/arch/mips/kernel/traps.c linux.dev/arch/mips/kernel/traps.c ---- linux.old/arch/mips/kernel/traps.c 2006-04-27 18:04:37.000000000 +0200 -+++ linux.dev/arch/mips/kernel/traps.c 2006-04-27 19:24:19.000000000 +0200 +--- linux.old/arch/mips/kernel/traps.c 2006-10-02 21:23:10.000000000 +0200 ++++ linux.dev/arch/mips/kernel/traps.c 2006-10-02 21:19:59.000000000 +0200 @@ -920,6 +920,7 @@ void __init trap_init(void) { @@ -16132,9 +16130,40 @@ diff -urN linux.old/arch/mips/kernel/traps.c linux.dev/arch/mips/kernel/traps.c if (cpu_has_fpu && !cpu_has_nofpuex) set_except_vector(15, handle_fpe); +diff -urN linux.old/arch/mips/Makefile linux.dev/arch/mips/Makefile +--- linux.old/arch/mips/Makefile 2006-10-02 21:23:10.000000000 +0200 ++++ linux.dev/arch/mips/Makefile 2006-10-02 21:19:59.000000000 +0200 +@@ -726,6 +726,19 @@ + endif + + # ++# Broadcom BCM947XX variants ++# ++ifdef CONFIG_BCM947XX ++LIBS += arch/mips/bcm947xx/generic/brcm.o arch/mips/bcm947xx/bcm947xx.o ++SUBDIRS += arch/mips/bcm947xx/generic arch/mips/bcm947xx ++LOADADDR := 0x80001000 ++ ++zImage: vmlinux ++ $(MAKE) -C arch/$(ARCH)/bcm947xx/compressed ++export LOADADDR ++endif ++ ++# + # Choosing incompatible machines durings configuration will result in + # error messages during linking. Select a default linkscript if + # none has been choosen above. +@@ -778,6 +791,7 @@ + $(MAKE) -C arch/$(ARCH)/tools clean + $(MAKE) -C arch/mips/baget clean + $(MAKE) -C arch/mips/lasat clean ++ $(MAKE) -C arch/mips/bcm947xx/compressed clean + + archmrproper: + @$(MAKEBOOT) mrproper diff -urN linux.old/arch/mips/mm/c-r4k.c linux.dev/arch/mips/mm/c-r4k.c ---- linux.old/arch/mips/mm/c-r4k.c 2006-04-27 18:04:37.000000000 +0200 -+++ linux.dev/arch/mips/mm/c-r4k.c 2006-04-27 19:24:19.000000000 +0200 +--- linux.old/arch/mips/mm/c-r4k.c 2006-10-02 21:23:10.000000000 +0200 ++++ linux.dev/arch/mips/mm/c-r4k.c 2006-10-02 21:19:59.000000000 +0200 @@ -1166,3 +1166,47 @@ build_clear_page(); build_copy_page(); @@ -16184,8 +16213,8 @@ diff -urN linux.old/arch/mips/mm/c-r4k.c linux.dev/arch/mips/mm/c-r4k.c + + diff -urN linux.old/arch/mips/pci/Makefile linux.dev/arch/mips/pci/Makefile ---- linux.old/arch/mips/pci/Makefile 2006-04-27 18:04:37.000000000 +0200 -+++ linux.dev/arch/mips/pci/Makefile 2006-04-27 19:24:19.000000000 +0200 +--- linux.old/arch/mips/pci/Makefile 2006-10-02 21:23:10.000000000 +0200 ++++ linux.dev/arch/mips/pci/Makefile 2006-10-02 21:19:59.000000000 +0200 @@ -13,7 +13,9 @@ obj-$(CONFIG_MIPS_MSC) += ops-msc.o obj-$(CONFIG_MIPS_NILE4) += ops-nile4.o @@ -16197,8 +16226,8 @@ diff -urN linux.old/arch/mips/pci/Makefile linux.dev/arch/mips/pci/Makefile include $(TOPDIR)/Rules.make diff -urN linux.old/drivers/char/serial.c linux.dev/drivers/char/serial.c ---- linux.old/drivers/char/serial.c 2006-04-27 18:04:37.000000000 +0200 -+++ linux.dev/drivers/char/serial.c 2006-04-27 19:24:19.000000000 +0200 +--- linux.old/drivers/char/serial.c 2006-10-02 21:23:10.000000000 +0200 ++++ linux.dev/drivers/char/serial.c 2006-10-02 21:19:59.000000000 +0200 @@ -444,6 +444,10 @@ return inb(info->port+1); #endif @@ -16268,8 +16297,8 @@ diff -urN linux.old/drivers/char/serial.c linux.dev/drivers/char/serial.c #if defined(__powerpc__) || defined(__alpha__) cval >>= 8; diff -urN linux.old/drivers/net/Makefile linux.dev/drivers/net/Makefile ---- linux.old/drivers/net/Makefile 2006-04-27 18:04:38.000000000 +0200 -+++ linux.dev/drivers/net/Makefile 2006-05-04 01:41:03.000000000 +0200 +--- linux.old/drivers/net/Makefile 2006-10-02 21:23:10.000000000 +0200 ++++ linux.dev/drivers/net/Makefile 2006-10-02 21:19:59.000000000 +0200 @@ -3,6 +3,8 @@ # Makefile for the Linux network (ethercard) device drivers. # @@ -16280,8 +16309,8 @@ diff -urN linux.old/drivers/net/Makefile linux.dev/drivers/net/Makefile obj-m := obj-n := diff -urN linux.old/drivers/parport/Config.in linux.dev/drivers/parport/Config.in ---- linux.old/drivers/parport/Config.in 2006-04-27 18:04:38.000000000 +0200 -+++ linux.dev/drivers/parport/Config.in 2006-04-27 19:24:19.000000000 +0200 +--- linux.old/drivers/parport/Config.in 2006-10-02 21:23:10.000000000 +0200 ++++ linux.dev/drivers/parport/Config.in 2006-10-02 21:19:59.000000000 +0200 @@ -11,6 +11,7 @@ tristate 'Parallel port support' CONFIG_PARPORT if [ "$CONFIG_PARPORT" != "n" ]; then @@ -16291,8 +16320,8 @@ diff -urN linux.old/drivers/parport/Config.in linux.dev/drivers/parport/Config.i if [ "$CONFIG_SERIAL" = "m" ]; then define_tristate CONFIG_PARPORT_PC_CML1 m diff -urN linux.old/drivers/parport/Makefile linux.dev/drivers/parport/Makefile ---- linux.old/drivers/parport/Makefile 2006-04-27 18:04:38.000000000 +0200 -+++ linux.dev/drivers/parport/Makefile 2006-04-27 19:24:19.000000000 +0200 +--- linux.old/drivers/parport/Makefile 2006-10-02 21:23:10.000000000 +0200 ++++ linux.dev/drivers/parport/Makefile 2006-10-02 21:19:59.000000000 +0200 @@ -22,6 +22,7 @@ obj-$(CONFIG_PARPORT) += parport.o @@ -16303,7 +16332,7 @@ diff -urN linux.old/drivers/parport/Makefile linux.dev/drivers/parport/Makefile obj-$(CONFIG_PARPORT_MFC3) += parport_mfc3.o diff -urN linux.old/drivers/parport/parport_splink.c linux.dev/drivers/parport/parport_splink.c --- linux.old/drivers/parport/parport_splink.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/drivers/parport/parport_splink.c 2006-04-27 19:24:19.000000000 +0200 ++++ linux.dev/drivers/parport/parport_splink.c 2006-10-02 21:19:59.000000000 +0200 @@ -0,0 +1,345 @@ +/* Low-level parallel port routines for the ASUS WL-500g built-in port + * @@ -16651,8 +16680,8 @@ diff -urN linux.old/drivers/parport/parport_splink.c linux.dev/drivers/parport/p +module_exit(parport_splink_cleanup) + diff -urN linux.old/include/asm-mips/bootinfo.h linux.dev/include/asm-mips/bootinfo.h ---- linux.old/include/asm-mips/bootinfo.h 2006-04-27 18:04:38.000000000 +0200 -+++ linux.dev/include/asm-mips/bootinfo.h 2006-04-27 19:24:19.000000000 +0200 +--- linux.old/include/asm-mips/bootinfo.h 2006-10-02 21:23:10.000000000 +0200 ++++ linux.dev/include/asm-mips/bootinfo.h 2006-10-02 21:19:59.000000000 +0200 @@ -37,6 +37,7 @@ #define MACH_GROUP_HP_LJ 20 /* Hewlett Packard LaserJet */ #define MACH_GROUP_LASAT 21 @@ -16678,8 +16707,8 @@ diff -urN linux.old/include/asm-mips/bootinfo.h linux.dev/include/asm-mips/booti */ #define MACH_TITAN_YOSEMITE 1 /* PMC-Sierra Yosemite */ diff -urN linux.old/include/asm-mips/cpu.h linux.dev/include/asm-mips/cpu.h ---- linux.old/include/asm-mips/cpu.h 2006-04-27 18:04:38.000000000 +0200 -+++ linux.dev/include/asm-mips/cpu.h 2006-04-27 19:24:19.000000000 +0200 +--- linux.old/include/asm-mips/cpu.h 2006-10-02 21:23:10.000000000 +0200 ++++ linux.dev/include/asm-mips/cpu.h 2006-10-02 21:19:59.000000000 +0200 @@ -22,6 +22,11 @@ spec. */ @@ -16729,8 +16758,8 @@ diff -urN linux.old/include/asm-mips/cpu.h linux.dev/include/asm-mips/cpu.h /* * ISA Level encodings diff -urN linux.old/include/asm-mips/r4kcache.h linux.dev/include/asm-mips/r4kcache.h ---- linux.old/include/asm-mips/r4kcache.h 2006-04-27 18:04:38.000000000 +0200 -+++ linux.dev/include/asm-mips/r4kcache.h 2006-04-27 19:24:19.000000000 +0200 +--- linux.old/include/asm-mips/r4kcache.h 2006-10-02 21:23:10.000000000 +0200 ++++ linux.dev/include/asm-mips/r4kcache.h 2006-10-02 21:19:59.000000000 +0200 @@ -658,4 +658,17 @@ cache128_unroll32(addr|ws,Index_Writeback_Inv_SD); } @@ -16750,8 +16779,8 @@ diff -urN linux.old/include/asm-mips/r4kcache.h linux.dev/include/asm-mips/r4kca + #endif /* __ASM_R4KCACHE_H */ diff -urN linux.old/include/asm-mips/serial.h linux.dev/include/asm-mips/serial.h ---- linux.old/include/asm-mips/serial.h 2006-04-27 18:04:38.000000000 +0200 -+++ linux.dev/include/asm-mips/serial.h 2006-04-27 19:24:19.000000000 +0200 +--- linux.old/include/asm-mips/serial.h 2006-10-02 21:23:10.000000000 +0200 ++++ linux.dev/include/asm-mips/serial.h 2006-10-02 21:19:59.000000000 +0200 @@ -223,6 +223,13 @@ #define TXX927_SERIAL_PORT_DEFNS #endif @@ -16775,8 +16804,8 @@ diff -urN linux.old/include/asm-mips/serial.h linux.dev/include/asm-mips/serial. DDB5477_SERIAL_PORT_DEFNS \ EV96100_SERIAL_PORT_DEFNS \ diff -urN linux.old/init/do_mounts.c linux.dev/init/do_mounts.c ---- linux.old/init/do_mounts.c 2006-04-27 18:04:38.000000000 +0200 -+++ linux.dev/init/do_mounts.c 2006-04-27 19:24:19.000000000 +0200 +--- linux.old/init/do_mounts.c 2006-10-02 21:23:10.000000000 +0200 ++++ linux.dev/init/do_mounts.c 2006-10-02 21:19:59.000000000 +0200 @@ -254,7 +254,13 @@ { "ftlb", 0x2c08 }, { "ftlc", 0x2c10 },