X-Git-Url: https://git.rohieb.name/openwrt.git/blobdiff_plain/f2a69b10a80476c014ba9d9ce4115f5ab696d620..9d012c4aae5fbbbb0a87700d18f2a7f7374e7ddf:/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h

diff --git a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h
index 791dd6d87..47ad8a4ba 100644
--- a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h
+++ b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h
@@ -70,8 +70,11 @@
 #define AR91XX_WMAC_BASE	(AR71XX_APB_BASE + 0x000C0000)
 #define AR91XX_WMAC_SIZE	0x30000
 
+#define AR933X_UART_BASE	(AR71XX_APB_BASE + 0x00020000)
+#define AR933X_UART_SIZE	0x14
+
 #define AR934X_WMAC_BASE	(AR71XX_APB_BASE + 0x00100000)
-#define AR934X_WMAC_SIZE	0x1ffff
+#define AR934X_WMAC_SIZE	0x20000
 
 #define AR71XX_MEM_SIZE_MIN	0x0200000
 #define AR71XX_MEM_SIZE_MAX	0x10000000
@@ -127,6 +130,8 @@ enum ar71xx_soc_type {
 	AR71XX_SOC_AR7242,
 	AR71XX_SOC_AR9130,
 	AR71XX_SOC_AR9132,
+	AR71XX_SOC_AR9330,
+	AR71XX_SOC_AR9331,
 	AR71XX_SOC_AR9341,
 	AR71XX_SOC_AR9342,
 	AR71XX_SOC_AR9344,
@@ -166,6 +171,8 @@ extern enum ar71xx_soc_type ar71xx_soc;
 #define AR724X_DDR_DIV_SHIFT		22
 #define AR724X_DDR_DIV_MASK		0x3
 
+#define AR7242_PLL_REG_ETH0_INT_CLOCK	0x2c
+
 #define AR91XX_PLL_REG_CPU_CONFIG	0x00
 #define AR91XX_PLL_REG_ETH_CONFIG	0x04
 #define AR91XX_PLL_REG_ETH0_INT_CLOCK	0x14
@@ -639,6 +646,8 @@ void ar71xx_ddr_flush(u32 reg);
 #define REV_ID_MAJOR_AR7240	0x00c0
 #define REV_ID_MAJOR_AR7241	0x0100
 #define REV_ID_MAJOR_AR7242	0x1100
+#define REV_ID_MAJOR_AR9330	0x0110
+#define REV_ID_MAJOR_AR9331	0x1110
 #define REV_ID_MAJOR_AR9341	0x0120
 #define REV_ID_MAJOR_AR9342	0x1120
 #define REV_ID_MAJOR_AR9344	0x2120
@@ -658,6 +667,8 @@ void ar71xx_ddr_flush(u32 reg);
 
 #define AR724X_REV_ID_REVISION_MASK	0x3
 
+#define AR933X_REV_ID_REVISION_MASK	0xf
+
 #define AR934X_REV_ID_REVISION_MASK	0xf
 
 extern void __iomem *ar71xx_reset_base;