X-Git-Url: https://git.rohieb.name/openwrt.git/blobdiff_plain/f52d66ff00b24111f87c274d3d7085ef2e1d27b1..c92885c466d11dc3b8e2837a8be1fd3b6b7e2e01:/target/linux/aruba-2.6/patches/002-irq.patch

diff --git a/target/linux/aruba-2.6/patches/002-irq.patch b/target/linux/aruba-2.6/patches/002-irq.patch
index f6b9425d8..cc5ea84c4 100644
--- a/target/linux/aruba-2.6/patches/002-irq.patch
+++ b/target/linux/aruba-2.6/patches/002-irq.patch
@@ -1,7 +1,7 @@
 diff -Nur linux-2.6.17/arch/mips/aruba/irq.c linux-2.6.17-openwrt/arch/mips/aruba/irq.c
 --- linux-2.6.17/arch/mips/aruba/irq.c	1970-01-01 01:00:00.000000000 +0100
 +++ linux-2.6.17-openwrt/arch/mips/aruba/irq.c	2006-10-12 14:32:40.026285000 -0700
-@@ -0,0 +1,282 @@
+@@ -0,0 +1,285 @@
 +#include <linux/errno.h>
 +#include <linux/init.h>
 +#include <linux/kernel_stat.h>
@@ -93,6 +93,9 @@ diff -Nur linux-2.6.17/arch/mips/aruba/irq.c linux-2.6.17-openwrt/arch/mips/arub
 +		int ip = irq - GROUP0_IRQ_BASE;
 +		switch (mips_machtype) {
 +			case MACH_ARUBA_AP70:
++				if (irq >= GROUP4_IRQ_BASE)
++					idt_gpio->gpioistat &= ~(1 << (irq - GROUP4_IRQ_BASE));
++
 +				// irqs are in groups of 32
 +				// ip is set to the remainder
 +				group = ip >> 5;
@@ -217,7 +220,7 @@ diff -Nur linux-2.6.17/arch/mips/aruba/irq.c linux-2.6.17-openwrt/arch/mips/arub
 +		irq_desc[i].status = IRQ_DISABLED;
 +		irq_desc[i].action = NULL;
 +		irq_desc[i].depth = 1;
-+		irq_desc[i].handler = &aruba_irq_type;
++		irq_desc[i].chip = &aruba_irq_type;
 +		spin_lock_init(&irq_desc[i].lock);
 +	}
 +}
@@ -260,7 +263,7 @@ diff -Nur linux-2.6.17/arch/mips/aruba/irq.c linux-2.6.17-openwrt/arch/mips/arub
 +				pend = READ_PEND_MUSCAT(addr);
 +				pend &= ~READ_MASK_MUSCAT(addr); // only unmasked interrupts
 +				pend = 39 - rc32434_clz(pend);
-+				do_IRQ(pend + (group << 5), regs);
++				do_IRQ(pend + (group << 5));
 +			}
 +			break;
 +		case MACH_ARUBA_AP65:
@@ -275,11 +278,11 @@ diff -Nur linux-2.6.17/arch/mips/aruba/irq.c linux-2.6.17-openwrt/arch/mips/arub
 +				pend = READ_PEND_MERLOT(addr);
 +				pend &= READ_MASK_MERLOT(addr);	// only unmasked interrupts
 +				pend = 31 - rc32434_clz(pend);
-+				do_IRQ(pend + GROUP0_IRQ_BASE, regs);
++				do_IRQ(pend + GROUP0_IRQ_BASE);
 +			}
 +			if ((ip = (cp0_cause & 0x3c00))) { // irq 2-5
 +				pend = 31 - rc32434_clz(ip);
-+				do_IRQ(pend - GROUP0_IRQ_BASE, regs);
++				do_IRQ(pend - GROUP0_IRQ_BASE);
 +			}
 +			break;
 +	}