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(parent: 2c16cf4) | patch
ar71xx: fix pll value for the eth0 interface on the TL-WR1043ND board
authorjuhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73>
Wed, 24 Feb 2010 13:38:51 +0000 (13:38 +0000)
committerjuhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73>
Wed, 24 Feb 2010 13:38:51 +0000 (13:38 +0000)
commit147a9455b717a06e70fa16287c8665ab687cdcfd
tree96fef0cce1aa72514f975a3be7b4bfbfbc81fa22tree | snapshot
parent2c16cf4acb73523c6bd2bec07a1e5317eea1db40commit | diff
ar71xx: fix pll value for the eth0 interface on the TL-WR1043ND board

Thanks to Andrew Tarabaras

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@19835 3c298f89-4303-0410-b956-a3cf2f4a3e73
target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-wr1043nd.c diff | blob | history
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