[adm5120] use the global register access macros in the flash driver
authorjuhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73>
Sun, 9 Sep 2007 13:28:24 +0000 (13:28 +0000)
committerjuhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73>
Sun, 9 Sep 2007 13:28:24 +0000 (13:28 +0000)
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@8707 3c298f89-4303-0410-b956-a3cf2f4a3e73

target/linux/adm5120/files/drivers/mtd/maps/adm5120-flash.c

index 0a2590e..7a55396 100644 (file)
 
 #include <asm/io.h>
 
-#include <asm/mach-adm5120/adm5120_defs.h>
-#include <asm/mach-adm5120/adm5120_switch.h>
-#include <asm/mach-adm5120/adm5120_mpmc.h>
-#include <asm/mach-adm5120/adm5120_platform.h>
+#include <adm5120_defs.h>
+#include <adm5120_switch.h>
+#include <adm5120_mpmc.h>
+#include <adm5120_platform.h>
 
 #define DRV_NAME       "adm5120-flash"
 #define DRV_DESC       "ADM5120 flash MAP driver"
@@ -78,7 +78,6 @@ struct adm5120_flash_info {
 struct flash_desc {
        u32     phys;
        u32     srs_shift;
-       u32     mpmc_reg;
 };
 
 /*
@@ -98,11 +97,9 @@ static u32 flash_sizes[8] = {
 static struct flash_desc flash_descs[2] = {
        {
                .phys           = ADM5120_SRAM0_BASE,
-               .mpmc_reg       = MPMC_REG_SC1,
                .srs_shift      = MEMCTRL_SRS0_SHIFT,
        }, {
                .phys           = ADM5120_SRAM1_BASE,
-               .mpmc_reg       = MPMC_REG_SC0,
                .srs_shift      = MEMCTRL_SRS1_SHIFT,
        }
 };
@@ -242,11 +239,6 @@ out:
        return err;
 }
 
-#define SWITCH_READ(r) *(u32 *)(KSEG1ADDR(ADM5120_SWITCH_BASE)+(r))
-#define SWITCH_WRITE(r,v) *(u32 *)(KSEG1ADDR(ADM5120_SWITCH_BASE)+(r))=(v)
-#define MPMC_READ(r) *(u32 *)(KSEG1ADDR(ADM5120_MPMC_BASE)+(r))
-#define MPMC_WRITE(r,v) *(u32 *)(KSEG1ADDR(ADM5120_MPMC_BASE)+(r))=(v)
-
 static int adm5120_flash_initinfo(struct adm5120_flash_info *info,
                struct platform_device *dev)
 {
@@ -265,7 +257,7 @@ static int adm5120_flash_initinfo(struct adm5120_flash_info *info,
        fdesc = &flash_descs[dev->id];
 
        /* get memory window size */
-       t = SWITCH_READ(SWITCH_REG_MEMCTRL) >> fdesc->srs_shift;
+       t = SW_READ_REG(MEMCTRL) >> fdesc->srs_shift;
        t &= MEMCTRL_SRS_MASK;
        info->amap.window_size = flash_sizes[t];
        if (info->amap.window_size == 0) {
@@ -274,7 +266,14 @@ static int adm5120_flash_initinfo(struct adm5120_flash_info *info,
        }
 
        /* get flash bus width */
-       t = MPMC_READ(fdesc->mpmc_reg) & SC_MW_MASK;
+       switch (dev->id) {
+       case 0:
+               t = MPMC_READ_REG(SC1) & SC_MW_MASK;
+               break;
+       case 1:
+               t = MPMC_READ_REG(SC0) & SC_MW_MASK;
+               break;
+       }
        map->bankwidth = flash_bankwidths[t];
        if (map->bankwidth == 0) {
                MAP_ERR(map, "invalid bus width detected\n");
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