ar71xx: enable access to the WAN port PHY on a few devices, adds WAN link detection
authornbd <nbd@3c298f89-4303-0410-b956-a3cf2f4a3e73>
Sat, 2 Apr 2011 00:47:33 +0000 (00:47 +0000)
committernbd <nbd@3c298f89-4303-0410-b956-a3cf2f4a3e73>
Sat, 2 Apr 2011 00:47:33 +0000 (00:47 +0000)
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@26394 3c298f89-4303-0410-b956-a3cf2f4a3e73

target/linux/ar71xx/files/arch/mips/ar71xx/mach-dir-600-a1.c
target/linux/ar71xx/files/arch/mips/ar71xx/mach-rb750.c
target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-mr3x20.c
target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-wr741nd.c

index bb59dfb..c076489 100644 (file)
@@ -140,6 +140,7 @@ static void __init dir_600_a1_setup(void)
        ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
        ar71xx_eth0_data.speed = SPEED_100;
        ar71xx_eth0_data.duplex = DUPLEX_FULL;
+       ar71xx_eth0_data.phy_mask = BIT(4);
 
        /* LAN ports */
        ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
index 5ed383f..547ad12 100644 (file)
@@ -124,6 +124,7 @@ static void __init rb750_setup(void)
        ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
        ar71xx_eth0_data.speed = SPEED_100;
        ar71xx_eth0_data.duplex = DUPLEX_FULL;
+       ar71xx_eth0_data.phy_mask = BIT(4);
 
        /* LAN ports */
        ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
index 7e8ab4c..8bf853b 100644 (file)
@@ -130,6 +130,7 @@ static void __init tl_mr3x20_setup(void)
        ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
        ar71xx_eth0_data.speed = SPEED_100;
        ar71xx_eth0_data.duplex = DUPLEX_FULL;
+       ar71xx_eth0_data.phy_mask = BIT(4);
 
        /* LAN ports */
        ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
index 24f7272..909327a 100644 (file)
@@ -115,6 +115,7 @@ static void __init tl_wr741nd_setup(void)
        ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
        ar71xx_eth0_data.speed = SPEED_100;
        ar71xx_eth0_data.duplex = DUPLEX_FULL;
+       ar71xx_eth0_data.phy_mask = BIT(4);
 
        /* LAN ports */
        ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
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