From: juhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73>
Date: Mon, 5 Oct 2009 18:44:10 +0000 (+0000)
Subject: ramips: cleanup coding-style of the rt288x pci code
X-Git-Url: https://git.rohieb.name/openwrt.git/commitdiff_plain/1a03e70f1670e914db99349b33e564be7c3a2caa
ramips: cleanup coding-style of the rt288x pci code
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@17915 3c298f89-4303-0410-b956-a3cf2f4a3e73
---
diff --git a/target/linux/ramips/files/arch/mips/pci/pci-rt288x.c b/target/linux/ramips/files/arch/mips/pci/pci-rt288x.c
index f6b680609..dc4aa4837 100644
--- a/target/linux/ramips/files/arch/mips/pci/pci-rt288x.c
+++ b/target/linux/ramips/files/arch/mips/pci/pci-rt288x.c
@@ -24,116 +24,127 @@
#define PCI_ACCESS_WRITE 1
static int config_access(unsigned char access_type, struct pci_bus *bus,
- unsigned int devfn, unsigned char where, u32 * data)
+ unsigned int devfn, unsigned char where, u32 *data)
{
unsigned int slot = PCI_SLOT(devfn);
unsigned int address;
u8 func = PCI_FUNC(devfn);
- address = (bus->number << 16) | (slot << 11) | (func << 8) | (where& 0xfc) | 0x80000000;
+
+ address = (bus->number << 16) | (slot << 11) | (func << 8) |
+ (where & 0xfc) | 0x80000000;
+
writel(address, RT2880_PCI_CONFIG_ADDR);
if (access_type == PCI_ACCESS_WRITE)
writel(*data, RT2880_PCI_CONFIG_DATA);
else
*data = readl(RT2880_PCI_CONFIG_DATA);
+
return 0;
}
-int
-pci_config_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 * val)
+int pci_config_read(struct pci_bus *bus, unsigned int devfn, int where,
+ int size, u32 *val)
{
u32 data = 0;
- if(config_access(PCI_ACCESS_READ, bus, devfn, where, &data))
+
+ if (config_access(PCI_ACCESS_READ, bus, devfn, where, &data))
return PCIBIOS_DEVICE_NOT_FOUND;
- if(size == 1)
+
+ if (size == 1)
*val = (data >> ((where & 3) << 3)) & 0xff;
- else if(size == 2)
+ else if (size == 2)
*val = (data >> ((where & 3) << 3)) & 0xffff;
else
*val = data;
+
return PCIBIOS_SUCCESSFUL;
}
-int
-pci_config_write(struct pci_bus *bus, unsigned int devfn,
- int where, int size, u32 val)
+int pci_config_write(struct pci_bus *bus, unsigned int devfn,
+ int where, int size, u32 val)
{
u32 data = 0;
- if(size == 4)
- {
+
+ if (size == 4) {
data = val;
} else {
- if(config_access(PCI_ACCESS_READ, bus, devfn, where, &data))
+ if (config_access(PCI_ACCESS_READ, bus, devfn, where, &data))
return PCIBIOS_DEVICE_NOT_FOUND;
- if(size == 1)
+ if (size == 1)
data = (data & ~(0xff << ((where & 3) << 3))) |
- (val << ((where & 3) << 3));
- else if(size == 2)
+ (val << ((where & 3) << 3));
+ else if (size == 2)
data = (data & ~(0xffff << ((where & 3) << 3))) |
- (val << ((where & 3) << 3));
+ (val << ((where & 3) << 3));
}
- if(config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data))
+
+ if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data))
return PCIBIOS_DEVICE_NOT_FOUND;
+
return PCIBIOS_SUCCESSFUL;
}
struct pci_ops rt2880_pci_ops = {
- .read = pci_config_read,
- .write = pci_config_write,
+ .read = pci_config_read,
+ .write = pci_config_write,
};
static struct resource pci_io_resource = {
- .name = "pci MEM space",
- .start = 0x20000000,
- .end = 0x2FFFFFFF,
- .flags = IORESOURCE_MEM,
+ .name = "pci MEM space",
+ .start = 0x20000000,
+ .end = 0x2FFFFFFF,
+ .flags = IORESOURCE_MEM,
};
static struct resource pci_mem_resource = {
- .name = "pci IO space",
- .start = 0x00460000,
- .end = 0x0046FFFF,
- .flags = IORESOURCE_IO,
+ .name = "pci IO space",
+ .start = 0x00460000,
+ .end = 0x0046FFFF,
+ .flags = IORESOURCE_IO,
};
struct pci_controller rt2880_controller = {
- .pci_ops = &rt2880_pci_ops,
- .mem_resource = &pci_io_resource,
- .io_resource = &pci_mem_resource,
- .mem_offset = 0x00000000UL,
- .io_offset = 0x00000000UL,
+ .pci_ops = &rt2880_pci_ops,
+ .mem_resource = &pci_io_resource,
+ .io_resource = &pci_mem_resource,
+ .mem_offset = 0x00000000UL,
+ .io_offset = 0x00000000UL,
};
-void inline
-read_config(unsigned long bus, unsigned long dev, unsigned long func,
- unsigned long reg, unsigned long *val)
+void inline read_config(unsigned long bus, unsigned long dev,
+ unsigned long func, unsigned long reg,
+ unsigned long *val)
{
- unsigned long address =
- (bus << 16) | (dev << 11) | (func << 8) | (reg & 0xfc) | 0x80000000;
+ unsigned long address;
+
+ address = (bus << 16) | (dev << 11) | (func << 8) | (reg & 0xfc) |
+ 0x80000000;
writel(address, RT2880_PCI_CONFIG_ADDR);
*val = readl(RT2880_PCI_CONFIG_DATA);
}
-void inline
-write_config(unsigned long bus, unsigned long dev, unsigned long func,
- unsigned long reg, unsigned long val)
+void inline write_config(unsigned long bus, unsigned long dev,
+ unsigned long func, unsigned long reg,
+ unsigned long val)
{
- unsigned long address =
- (bus << 16) | (dev << 11) | (func << 8) | (reg & 0xfc) | 0x80000000;
+ unsigned long address;
+
+ address = (bus << 16) | (dev << 11) | (func << 8) | (reg & 0xfc) |
+ 0x80000000;
writel(address, RT2880_PCI_CONFIG_ADDR);
writel(val, RT2880_PCI_CONFIG_DATA);
}
-int __init
-pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
+int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{
u16 cmd;
unsigned long val;
int irq = -1;
+
if (dev->bus->number != 0)
return 0;
- switch(PCI_SLOT(dev->devfn))
- {
+ switch (PCI_SLOT(dev->devfn)) {
case 0x00:
write_config(0, 0, 0, PCI_BASE_ADDRESS_0, 0x08000000);
read_config(0, 0, 0, PCI_BASE_ADDRESS_0, &val);
@@ -142,7 +153,8 @@ pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
irq = RT288X_CPU_IRQ_PCI;
break;
default:
- printk("%s:%s[%d] trying to alloc unknown pci irq\n", __FILE__, __func__, __LINE__);
+ printk("%s:%s[%d] trying to alloc unknown pci irq\n",
+ __FILE__, __func__, __LINE__);
BUG();
break;
}
@@ -150,21 +162,23 @@ pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
pci_write_config_byte((struct pci_dev*)dev, PCI_CACHE_LINE_SIZE, 0x14);
pci_write_config_byte((struct pci_dev*)dev, PCI_LATENCY_TIMER, 0xFF);
pci_read_config_word((struct pci_dev*)dev, PCI_COMMAND, &cmd);
- cmd = cmd | PCI_COMMAND_MASTER | PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
- PCI_COMMAND_INVALIDATE | PCI_COMMAND_FAST_BACK | PCI_COMMAND_SERR |
- PCI_COMMAND_WAIT | PCI_COMMAND_PARITY;
+ cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
+ PCI_COMMAND_INVALIDATE | PCI_COMMAND_FAST_BACK |
+ PCI_COMMAND_SERR | PCI_COMMAND_WAIT | PCI_COMMAND_PARITY;
pci_write_config_word((struct pci_dev*)dev, PCI_COMMAND, cmd);
- pci_write_config_byte((struct pci_dev*)dev, PCI_INTERRUPT_LINE, dev->irq);
+ pci_write_config_byte((struct pci_dev*)dev, PCI_INTERRUPT_LINE,
+ dev->irq);
return irq;
}
-int
-init_rt2880pci(void)
+int init_rt2880pci(void)
{
unsigned long val = 0;
int i;
+
writel(0, RT2880_PCI_PCICFG_ADDR);
for(i = 0; i < 0xfffff; i++) {}
+
writel(0x79, RT2880_PCI_ARBCTL);
writel(0x07FF0001, RT2880_PCI_BAR0SETUP_ADDR);
writel(RT2880_PCI_SLOT1_BASE, RT2880_PCI_MEMBASE);
@@ -176,12 +190,12 @@ init_rt2880pci(void)
writel(0x000c0000, RT2880_PCI_PCIMSK_ADDR);
write_config(0, 0, 0, PCI_BASE_ADDRESS_0, 0x08000000);
read_config(0, 0, 0, PCI_BASE_ADDRESS_0, &val);
+
register_pci_controller(&rt2880_controller);
return 0;
}
-int
-pcibios_plat_dev_init(struct pci_dev *dev)
+int pcibios_plat_dev_init(struct pci_dev *dev)
{
return 0;
}