From: lars <lars@3c298f89-4303-0410-b956-a3cf2f4a3e73>
Date: Sun, 11 Apr 2010 16:24:06 +0000 (+0000)
Subject: [xburst] time.c: Timer enable registers are only 8bit width.
X-Git-Url: https://git.rohieb.name/openwrt.git/commitdiff_plain/3d00b9bbe1ed2b958c6940b3b16f0f6907f1471c

[xburst] time.c: Timer enable registers are only 8bit width.


git-svn-id: svn://svn.openwrt.org/openwrt/trunk@20796 3c298f89-4303-0410-b956-a3cf2f4a3e73
---

diff --git a/target/linux/xburst/files-2.6.32/arch/mips/jz4740/time.c b/target/linux/xburst/files-2.6.32/arch/mips/jz4740/time.c
index d9c5eba61..77fc2012e 100644
--- a/target/linux/xburst/files-2.6.32/arch/mips/jz4740/time.c
+++ b/target/linux/xburst/files-2.6.32/arch/mips/jz4740/time.c
@@ -98,12 +98,12 @@ static void jz4740_init_timer(void)
 static void jz4740_timer_enable(unsigned int timer)
 {
 	writel(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_STOP_CLEAR);
-	writel(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_ENABLE_SET);
+	writeb(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_ENABLE_SET);
 }
 
 static void jz4740_timer_disable(unsigned int timer)
 {
-	writel(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_ENABLE_CLEAR);
+	writeb(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_ENABLE_CLEAR);
 	writel(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_STOP_SET);
 }