[ar71xx] handle PCI_CORE interrupt as well
[openwrt.git] / target / linux / ar71xx / files / arch / mips / pci / pci-ar71xx.c
2008-11-26 juhosg[ar71xx] rename DDR registers
2008-09-17 juhosg[ar71xx] fix the PCI byte lane enable generation code...
2008-07-21 juhosgsurprise :p
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