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ar71xx: fix pll_1000 values for the WNDR3700
[openwrt.git] / target / linux / ar71xx / files / arch / mips / pci / pci-ar71xx.c
2009-10-01 juhosgar71xx: use ar71xx_pci_fixup on ar71xx SoCs only blob | commitdiff | raw
2009-07-05 juhosg[ar71xx] reorganize PCI code blob | commitdiff | raw | diff to current
2008-11-26 juhosg[ar71xx] rename DDR registers blob | commitdiff | raw | diff to current
2008-09-17 juhosg[ar71xx] fix the PCI byte lane enable generation code... blob | commitdiff | raw | diff to current
2008-07-21 juhosgsurprise :p blob | commitdiff | raw | diff to current
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