From 51aeb843d06b25fb8a67880b99d56b93df3e5ca1 Mon Sep 17 00:00:00 2001 From: nbd Date: Wed, 4 Jul 2007 00:48:59 +0000 Subject: [PATCH] more fixes for the crazy cpu cache issues on brcm47xx-2.6 (mainly affects 4704) - turns out some of the previous fixes were incorrect and a coherency setup functions was missing git-svn-id: svn://svn.openwrt.org/openwrt/trunk@7865 3c298f89-4303-0410-b956-a3cf2f4a3e73 --- .../patches-2.6.22/150-cpu_fixes.patch | 79 +++++++++++++------ .../patches-2.6.22/160-kmap_coherent.patch | 47 ++--------- 2 files changed, 63 insertions(+), 63 deletions(-) diff --git a/target/linux/brcm47xx-2.6/patches-2.6.22/150-cpu_fixes.patch b/target/linux/brcm47xx-2.6/patches-2.6.22/150-cpu_fixes.patch index ef297a4c0..a3531852c 100644 --- a/target/linux/brcm47xx-2.6/patches-2.6.22/150-cpu_fixes.patch +++ b/target/linux/brcm47xx-2.6/patches-2.6.22/150-cpu_fixes.patch @@ -1,7 +1,7 @@ -Index: linux-2.6.22-rc4/arch/mips/kernel/genex.S +Index: linux-2.6.22-rc6/arch/mips/kernel/genex.S =================================================================== ---- linux-2.6.22-rc4.orig/arch/mips/kernel/genex.S 2007-06-10 21:32:12.000000000 +0100 -+++ linux-2.6.22-rc4/arch/mips/kernel/genex.S 2007-06-10 21:33:19.000000000 +0100 +--- linux-2.6.22-rc6.orig/arch/mips/kernel/genex.S 2007-07-04 01:52:47.812492000 +0200 ++++ linux-2.6.22-rc6/arch/mips/kernel/genex.S 2007-07-04 01:53:01.585352750 +0200 @@ -51,6 +51,10 @@ NESTED(except_vec3_generic, 0, sp) .set push @@ -13,10 +13,10 @@ Index: linux-2.6.22-rc4/arch/mips/kernel/genex.S #if R5432_CP0_INTERRUPT_WAR mfc0 k0, CP0_INDEX #endif -Index: linux-2.6.22-rc4/arch/mips/mm/c-r4k.c +Index: linux-2.6.22-rc6/arch/mips/mm/c-r4k.c =================================================================== ---- linux-2.6.22-rc4.orig/arch/mips/mm/c-r4k.c 2007-06-10 21:33:17.000000000 +0100 -+++ linux-2.6.22-rc4/arch/mips/mm/c-r4k.c 2007-06-10 21:33:19.000000000 +0100 +--- linux-2.6.22-rc6.orig/arch/mips/mm/c-r4k.c 2007-07-04 01:53:01.545350250 +0200 ++++ linux-2.6.22-rc6/arch/mips/mm/c-r4k.c 2007-07-04 02:17:11.435962750 +0200 @@ -29,6 +29,9 @@ #include /* for run_uncached() */ @@ -76,11 +76,28 @@ Index: linux-2.6.22-rc4/arch/mips/mm/c-r4k.c if (dc_lsize) protected_writeback_dcache_line(addr & ~(dc_lsize - 1)); if (!cpu_icache_snoops_remote_store && scache_size) -@@ -1173,6 +1190,15 @@ - +@@ -1144,6 +1161,17 @@ + * silly idea of putting something else there ... + */ + switch (current_cpu_data.cputype) { ++ case CPU_BCM3302: ++ { ++ u32 cm; ++ cm = read_c0_diag(); ++ /* Enable icache */ ++ cm |= (1 << 31); ++ /* Enable dcache */ ++ cm |= (1 << 30); ++ write_c0_diag(cm); ++ } ++ break; + case CPU_R4000PC: + case CPU_R4000SC: + case CPU_R4000MC: +@@ -1174,6 +1202,15 @@ /* Default cache error handler for R4000 and R5000 family */ set_uncached_handler (0x100, &except_vec2_generic, 0x80); -+ + + /* Check if special workarounds are required */ +#ifdef CONFIG_BCM947XX + if (current_cpu_data.cputype == CPU_BCM4710 && (current_cpu_data.processor_id & 0xff) == 0) { @@ -89,13 +106,28 @@ Index: linux-2.6.22-rc4/arch/mips/mm/c-r4k.c + } else +#endif + bcm4710 = 0; - ++ probe_pcache(); setup_scache(); -Index: linux-2.6.22-rc4/arch/mips/mm/tlbex.c + +@@ -1219,5 +1256,13 @@ + build_clear_page(); + build_copy_page(); + local_r4k___flush_cache_all(NULL); ++#ifdef CONFIG_BCM947XX ++ { ++ static void (*_coherency_setup)(void); ++ _coherency_setup = (void (*)(void)) KSEG1ADDR(coherency_setup); ++ _coherency_setup(); ++ } ++#else + coherency_setup(); ++#endif + } +Index: linux-2.6.22-rc6/arch/mips/mm/tlbex.c =================================================================== ---- linux-2.6.22-rc4.orig/arch/mips/mm/tlbex.c 2007-06-10 21:33:12.000000000 +0100 -+++ linux-2.6.22-rc4/arch/mips/mm/tlbex.c 2007-06-10 21:33:19.000000000 +0100 +--- linux-2.6.22-rc6.orig/arch/mips/mm/tlbex.c 2007-07-04 01:53:01.193328250 +0200 ++++ linux-2.6.22-rc6/arch/mips/mm/tlbex.c 2007-07-04 02:17:26.112880000 +0200 @@ -1229,6 +1229,10 @@ #endif } @@ -107,23 +139,22 @@ Index: linux-2.6.22-rc4/arch/mips/mm/tlbex.c static void __init build_r4000_tlb_refill_handler(void) { u32 *p = tlb_handler; -@@ -1243,6 +1247,12 @@ +@@ -1243,6 +1247,11 @@ memset(relocs, 0, sizeof(relocs)); memset(final_handler, 0, sizeof(final_handler)); +#ifdef CONFIG_BCM947XX -+ if (bcm4710) { ++ if (current_cpu_data.cputype == CPU_BCM3302) + i_nop(&p); -+ } +#endif -+ ++ /* * create the plain linear handler */ -Index: linux-2.6.22-rc4/include/asm-mips/r4kcache.h +Index: linux-2.6.22-rc6/include/asm-mips/r4kcache.h =================================================================== ---- linux-2.6.22-rc4.orig/include/asm-mips/r4kcache.h 2007-06-10 21:32:12.000000000 +0100 -+++ linux-2.6.22-rc4/include/asm-mips/r4kcache.h 2007-06-10 21:33:19.000000000 +0100 +--- linux-2.6.22-rc6.orig/include/asm-mips/r4kcache.h 2007-07-04 01:52:47.840493750 +0200 ++++ linux-2.6.22-rc6/include/asm-mips/r4kcache.h 2007-07-04 01:53:01.673358250 +0200 @@ -17,6 +17,20 @@ #include #include @@ -326,11 +357,11 @@ Index: linux-2.6.22-rc4/include/asm-mips/r4kcache.h +__BUILD_BLAST_CACHE_RANGE(inv_s, scache, Hit_Invalidate_SD,,, ) #endif /* _ASM_R4KCACHE_H */ -Index: linux-2.6.22-rc4/include/asm-mips/stackframe.h +Index: linux-2.6.22-rc6/include/asm-mips/stackframe.h =================================================================== ---- linux-2.6.22-rc4.orig/include/asm-mips/stackframe.h 2007-06-10 21:32:12.000000000 +0100 -+++ linux-2.6.22-rc4/include/asm-mips/stackframe.h 2007-06-10 21:33:19.000000000 +0100 -@@ -352,6 +352,10 @@ +--- linux-2.6.22-rc6.orig/include/asm-mips/stackframe.h 2007-07-04 01:52:47.852494500 +0200 ++++ linux-2.6.22-rc6/include/asm-mips/stackframe.h 2007-07-04 01:53:01.697359750 +0200 +@@ -350,6 +350,10 @@ .macro RESTORE_SP_AND_RET LONG_L sp, PT_R29(sp) .set mips3 diff --git a/target/linux/brcm47xx-2.6/patches-2.6.22/160-kmap_coherent.patch b/target/linux/brcm47xx-2.6/patches-2.6.22/160-kmap_coherent.patch index 0b13f3b58..12676025b 100644 --- a/target/linux/brcm47xx-2.6/patches-2.6.22/160-kmap_coherent.patch +++ b/target/linux/brcm47xx-2.6/patches-2.6.22/160-kmap_coherent.patch @@ -1,7 +1,7 @@ -Index: linux-2.6.22-rc5/arch/mips/mm/init.c +Index: linux-2.6.22-rc6/arch/mips/mm/init.c =================================================================== ---- linux-2.6.22-rc5.orig/arch/mips/mm/init.c 2007-06-27 23:40:06.406545264 +0200 -+++ linux-2.6.22-rc5/arch/mips/mm/init.c 2007-06-27 23:40:08.920163136 +0200 +--- linux-2.6.22-rc6.orig/arch/mips/mm/init.c 2007-07-04 02:17:11.423962000 +0200 ++++ linux-2.6.22-rc6/arch/mips/mm/init.c 2007-07-04 02:17:31.269202250 +0200 @@ -207,7 +207,7 @@ void *vfrom, *vto; @@ -29,10 +29,10 @@ Index: linux-2.6.22-rc5/arch/mips/mm/init.c void *vfrom = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK); memcpy(dst, vfrom, len); -Index: linux-2.6.22-rc5/include/asm-mips/mach-bcm947xx/cpu-feature-overrides.h +Index: linux-2.6.22-rc6/include/asm-mips/mach-bcm947xx/cpu-feature-overrides.h =================================================================== --- /dev/null 1970-01-01 00:00:00.000000000 +0000 -+++ linux-2.6.22-rc5/include/asm-mips/mach-bcm947xx/cpu-feature-overrides.h 2007-06-27 23:40:08.921162984 +0200 ++++ linux-2.6.22-rc6/include/asm-mips/mach-bcm947xx/cpu-feature-overrides.h 2007-07-04 02:17:31.273202500 +0200 @@ -0,0 +1,13 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public @@ -47,10 +47,10 @@ Index: linux-2.6.22-rc5/include/asm-mips/mach-bcm947xx/cpu-feature-overrides.h +#define cpu_use_kmap_coherent 0 + +#endif /* __ASM_MACH_BCM947XX_CPU_FEATURE_OVERRIDES_H */ -Index: linux-2.6.22-rc5/include/asm-mips/cpu-features.h +Index: linux-2.6.22-rc6/include/asm-mips/cpu-features.h =================================================================== ---- linux-2.6.22-rc5.orig/include/asm-mips/cpu-features.h 2007-06-27 23:40:06.419543288 +0200 -+++ linux-2.6.22-rc5/include/asm-mips/cpu-features.h 2007-06-27 23:40:08.921162984 +0200 +--- linux-2.6.22-rc6.orig/include/asm-mips/cpu-features.h 2007-07-04 02:17:11.455964000 +0200 ++++ linux-2.6.22-rc6/include/asm-mips/cpu-features.h 2007-07-04 02:17:31.305204500 +0200 @@ -101,6 +101,9 @@ #ifndef cpu_has_pindexed_dcache #define cpu_has_pindexed_dcache (cpu_data[0].dcache.flags & MIPS_CACHE_PINDEX) @@ -61,34 +61,3 @@ Index: linux-2.6.22-rc5/include/asm-mips/cpu-features.h /* * I-Cache snoops remote store. This only matters on SMP. Some multiprocessors -Index: linux-2.6.22-rc5/arch/mips/mm/c-r4k.c -=================================================================== ---- linux-2.6.22-rc5.orig/arch/mips/mm/c-r4k.c 2007-06-27 23:40:45.883543848 +0200 -+++ linux-2.6.22-rc5/arch/mips/mm/c-r4k.c 2007-06-27 23:42:06.682260576 +0200 -@@ -339,7 +339,7 @@ - - static void r4k_flush_cache_all(void) - { -- if (!cpu_has_dc_aliases) -+ if (!cpu_has_dc_aliases || !cpu_use_kmap_coherent) - return; - - r4k_on_each_cpu(local_r4k_flush_cache_all, NULL, 1, 1); -@@ -380,7 +380,7 @@ - static void r4k_flush_cache_range(struct vm_area_struct *vma, - unsigned long start, unsigned long end) - { -- if (!cpu_has_dc_aliases) -+ if (!cpu_has_dc_aliases || !cpu_use_kmap_coherent) - return; - - r4k_on_each_cpu(local_r4k_flush_cache_range, vma, 1, 1); -@@ -412,7 +412,7 @@ - - static void r4k_flush_cache_mm(struct mm_struct *mm) - { -- if (!cpu_has_dc_aliases) -+ if (!cpu_has_dc_aliases || !cpu_use_kmap_coherent) - return; - - r4k_on_each_cpu(local_r4k_flush_cache_mm, mm, 1, 1); -- 2.20.1