From f42393b3c61487ce0ac9c6571c46ffa0d728f543 Mon Sep 17 00:00:00 2001
From: juhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73>
Date: Sat, 12 Nov 2011 12:50:18 +0000
Subject: [PATCH] ar71xx: implement SoC specific phy interface setup
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@28988 3c298f89-4303-0410-b956-a3cf2f4a3e73
---
.../ar71xx/files/arch/mips/ar71xx/devices.c | 102 +++++++++++++++---
1 file changed, 85 insertions(+), 17 deletions(-)
diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/devices.c b/target/linux/ar71xx/files/arch/mips/ar71xx/devices.c
index 0091ac276..e62d1123d 100644
--- a/target/linux/ar71xx/files/arch/mips/ar71xx/devices.c
+++ b/target/linux/ar71xx/files/arch/mips/ar71xx/devices.c
@@ -590,33 +590,101 @@ static int __init ar71xx_setup_phy_if_mode(unsigned int id,
{
switch (id) {
case 0:
- switch (pdata->phy_if_mode) {
- case PHY_INTERFACE_MODE_MII:
- pdata->mii_if = MII0_CTRL_IF_MII;
- break;
- case PHY_INTERFACE_MODE_GMII:
- pdata->mii_if = MII0_CTRL_IF_GMII;
+ switch (ar71xx_soc) {
+ case AR71XX_SOC_AR7130:
+ case AR71XX_SOC_AR7141:
+ case AR71XX_SOC_AR7161:
+ case AR71XX_SOC_AR9130:
+ case AR71XX_SOC_AR9132:
+ switch (pdata->phy_if_mode) {
+ case PHY_INTERFACE_MODE_MII:
+ pdata->mii_if = MII0_CTRL_IF_MII;
+ break;
+ case PHY_INTERFACE_MODE_GMII:
+ pdata->mii_if = MII0_CTRL_IF_GMII;
+ break;
+ case PHY_INTERFACE_MODE_RGMII:
+ pdata->mii_if = MII0_CTRL_IF_RGMII;
+ break;
+ case PHY_INTERFACE_MODE_RMII:
+ pdata->mii_if = MII0_CTRL_IF_RMII;
+ break;
+ default:
+ return -EINVAL;
+ }
break;
- case PHY_INTERFACE_MODE_RGMII:
- pdata->mii_if = MII0_CTRL_IF_RGMII;
+
+ case AR71XX_SOC_AR7240:
+ case AR71XX_SOC_AR7241:
+ case AR71XX_SOC_AR9330:
+ case AR71XX_SOC_AR9331:
+ pdata->phy_if_mode = PHY_INTERFACE_MODE_MII;
break;
- case PHY_INTERFACE_MODE_RMII:
- pdata->mii_if = MII0_CTRL_IF_RMII;
+
+ case AR71XX_SOC_AR7242:
+ /* FIXME */
+
+ case AR71XX_SOC_AR9341:
+ case AR71XX_SOC_AR9342:
+ case AR71XX_SOC_AR9344:
+ switch (pdata->phy_if_mode) {
+ case PHY_INTERFACE_MODE_MII:
+ case PHY_INTERFACE_MODE_GMII:
+ case PHY_INTERFACE_MODE_RGMII:
+ case PHY_INTERFACE_MODE_RMII:
+ break;
+ default:
+ return -EINVAL;
+ }
break;
+
default:
- return -EINVAL;
+ BUG();
}
break;
case 1:
- switch (pdata->phy_if_mode) {
- case PHY_INTERFACE_MODE_RMII:
- pdata->mii_if = MII1_CTRL_IF_RMII;
+ switch (ar71xx_soc) {
+ case AR71XX_SOC_AR7130:
+ case AR71XX_SOC_AR7141:
+ case AR71XX_SOC_AR7161:
+ case AR71XX_SOC_AR9130:
+ case AR71XX_SOC_AR9132:
+ switch (pdata->phy_if_mode) {
+ case PHY_INTERFACE_MODE_RMII:
+ pdata->mii_if = MII1_CTRL_IF_RMII;
+ break;
+ case PHY_INTERFACE_MODE_RGMII:
+ pdata->mii_if = MII1_CTRL_IF_RGMII;
+ break;
+ default:
+ return -EINVAL;
+ }
+ break;
+
+ case AR71XX_SOC_AR7240:
+ case AR71XX_SOC_AR7241:
+ case AR71XX_SOC_AR9330:
+ case AR71XX_SOC_AR9331:
+ pdata->phy_if_mode = PHY_INTERFACE_MODE_GMII;
break;
- case PHY_INTERFACE_MODE_RGMII:
- pdata->mii_if = MII1_CTRL_IF_RGMII;
+
+ case AR71XX_SOC_AR7242:
+ /* FIXME */
+
+ case AR71XX_SOC_AR9341:
+ case AR71XX_SOC_AR9342:
+ case AR71XX_SOC_AR9344:
+ switch (pdata->phy_if_mode) {
+ case PHY_INTERFACE_MODE_MII:
+ case PHY_INTERFACE_MODE_GMII:
+ break;
+ default:
+ return -EINVAL;
+ }
break;
+
default:
- return -EINVAL;
+ BUG();
}
break;
}
--
2.20.1