Added PN532 I2C Address
[hackover2013-badge-firmware.git] / projectconfig.h
1 /**************************************************************************/
2 /*!
3 @file projectconfig.h
4 @author K. Townsend (microBuilder.eu)
5
6 @section LICENSE
7
8 Software License Agreement (BSD License)
9
10 Copyright (c) 2010, microBuilder SARL
11 All rights reserved.
12
13 Redistribution and use in source and binary forms, with or without
14 modification, are permitted provided that the following conditions are met:
15 1. Redistributions of source code must retain the above copyright
16 notice, this list of conditions and the following disclaimer.
17 2. Redistributions in binary form must reproduce the above copyright
18 notice, this list of conditions and the following disclaimer in the
19 documentation and/or other materials provided with the distribution.
20 3. Neither the name of the copyright holders nor the
21 names of its contributors may be used to endorse or promote products
22 derived from this software without specific prior written permission.
23
24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY
25 EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
26 WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY
28 DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
29 (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
30 LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
31 ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32 (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
33 SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 */
35 /**************************************************************************/
36
37 #ifndef _PROJECTCONFIG_H_
38 #define _PROJECTCONFIG_H_
39
40 #include "lpc134x.h"
41 #include "sysdefs.h"
42
43 /*=========================================================================
44 BOARD SELECTION
45
46 Because several boards use this code library with sometimes slightly
47 different pin configuration, you will need to specify which board you
48 are using by enabling one of the following definitions. The code base
49 will then try to configure itself accordingly for that board.
50
51 CFG_BRD_LPC1343_REFDESIGN
52 =========================
53
54 microBuilder.eu LPC1343 Reference Design base board with
55 on-board peripherals initialised (EEPROM, USB or UART CLI, etc.)
56
57 This is the recommended starting point for new development
58 since it makes it easy to send printf output to USB CDC, access
59 the on-board EEPROM, etc.
60
61 CFG_BRD_LPC1343_REFDESIGN_MINIMAL
62 =================================
63
64 microBuilder.eu LPC1343 Reference Design base board with
65 only the most common peripherals initialised by default.
66
67 Results in smallest code since EEPROM, USB, etc., are not
68 initialised on startup. By default, only the following
69 peripherals are initialised by systemInit():
70
71 - CPU (Configures the PLL, etc.)
72 - GPIO
73 - SysTick Timer
74 - UART (with printf support) *
75
76 * Can be removed to save 0.8kb in debug and 0.3 kb in
77 release. Comment out 'CFG_PRINTF_UART' to disable it.
78
79 The code size can be further reduced by several KB by removing
80 any IRQ Handlers that are not used. The I2C IRQHandler, for
81 example, uses ~1KB of flash in debug and ~400KB in release mode,
82 but because it is referenced in the startup code it is always
83 included even if I2C is never used in the project.
84
85 Other IRQ Handlers that you might be able to comment out
86 to save some space are:
87
88 IRQ Handler Debug Release
89 ------------------------- ------ -------
90 I2C_IRQHandler 1160 b 400 b
91 SSP_IRQHandler 160 b 76 b
92 UART_IRQHandler 246 b 116 b
93 WAKEUP_IRQHandler 160 b 100 b
94 WDT_IRQHandler 50 b 28 b
95
96 CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
97 ====================================
98
99 microBuilder.eu/Adafruit Stand-Alone "Smart LCD" with USB enabled
100 for the CLI interface.
101
102 CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
103 =====================================
104
105 microBuilder.eu/Adafruit Stand-Alone "Smart LCD" with UART enabled
106 for the CLI interface.
107
108 CFG_BRD_LPC1343_802154USBSTICK
109 ==============================
110
111 microBuilder.eu USB stick 802.15.4 868/915MHz RF transceiver
112
113 -----------------------------------------------------------------------*/
114 #define CFG_BRD_LPC1343_REFDESIGN
115 // #define CFG_BRD_LPC1343_REFDESIGN_MINIMAL
116 // #define CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
117 // #define CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
118 // #define CFG_BRD_LPC1343_802154USBSTICK
119 // #define CFG_BRD_LPC1343_OLIMEX_P
120 /*=========================================================================*/
121
122
123 /**************************************************************************
124 PIN USAGE
125 -----------------------------------------------------------------------
126 This table tries to give an indication of which GPIO pins and
127 peripherals are used by the available drivers and SW examples. Only
128 dedicated GPIO pins available on the LPC1343 Reference Board are shown
129 below. Any unused peripheral blocks like I2C, SSP, ADC, etc., can
130 also be used as GPIO if they are available.
131
132 PORT 1 PORT 2 PORT 3
133 ========= ================= =======
134 8 9 10 11 1 2 3 4 5 6 7 8 9 0 1 2 3
135
136 SDCARD . . . . . . . . . . . . . X . . .
137 PWM . X . . . . . . . . . . . . . . .
138 STEPPER . . . . . . . . . . . . . X X X X
139 CHIBI X X X . . . . . . . . . . . . . .
140 ILI9325/8 X X X X X X X X X X X X X . . . X
141 ST7565 X X X X X X X X X X X X X . . . X
142 ST7735 . . . . X X X X X X . . . . . . .
143 SHARPMEM . . . . X X X X . . . . . . . . .
144 SSD1306 . . . . X X X . X X . . . . . . .
145 SSD1351 . . . . X X X X X . . . . . . . .
146 MCP121 . . . . . . . . . . . . . . X . .
147 PN532 [3] . . . . . . . . . . . . . . X X .
148
149 TIMERS SSP ADC UART
150 ====================== === ======= ====
151 16B0 16B1 32B0 32B1 0 0 1 2 3 0
152
153 SDCARD . . . . X . . . . .
154 PWM . X . . . . . . . .
155 PMU [1] . . X . . . . . . .
156 USB . . . X . . . . . .
157 STEPPER . . X . . . . . . .
158 CHIBI x . . . X . . . . .
159 ILI9325/8 . . . . . X X X X .
160 ST7565 . . . . . X X X X .
161 ST7535 . . . . . . . . . .
162 SHARPMEM . . . . . . . . . .
163 SSD1306 . . . . . . . . . .
164 INTERFACE . . . . . . . . . X[2]
165
166 [1] PMU uses 32-bit Timer 0 for SW wakeup from deep-sleep. This timer
167 can safely be used by other peripherals, but may need to be
168 reconfigured when you wakeup from deep-sleep.
169 [2] INTERFACE can be configured to use either USBCDC or UART
170 [3] 3.2 only used when with the I2C bus (for IRQ)
171
172 **************************************************************************/
173
174
175 /**************************************************************************
176 I2C Addresses
177 -----------------------------------------------------------------------
178 The following addresses are used by the different I2C sensors included
179 in the code base [1]
180
181 HEX BINARY
182 ==== ========
183 ISL12022M (RTC) 0xDE 1101111x
184 ISL12022M (SRAM) 0xAE 1010111x
185 LM75B 0x90 1001000x
186 MCP24AA 0xA0 1010000x
187 MCP4725 0xC0 1100000x
188 TSL2561 0x72 0111001x
189 TCS3414 0x72 0111001x
190 PN532 0x48 0100100x
191
192 [1] Alternative addresses may exists, but the addresses listed in this
193 table are the values used in the code base
194
195 **************************************************************************/
196
197
198 /*=========================================================================
199 FIRMWARE VERSION SETTINGS
200 -----------------------------------------------------------------------*/
201 #define CFG_FIRMWARE_VERSION_MAJOR (0)
202 #define CFG_FIRMWARE_VERSION_MINOR (9)
203 #define CFG_FIRMWARE_VERSION_REVISION (8)
204 /*=========================================================================*/
205
206
207 /*=========================================================================
208 CORE CPU SETTINGS
209 -----------------------------------------------------------------------
210
211 CFG_CPU_CCLK Value is for reference only. 'core/cpu/cpu.c' must
212 be modified to change the clock speed, but the value
213 should be indicated here since CFG_CPU_CCLK is used by
214 other peripherals to determine timing.
215
216 -----------------------------------------------------------------------*/
217 #define CFG_CPU_CCLK (72000000) // 1 tick = 13.88nS
218 /*=========================================================================*/
219
220
221 /*=========================================================================
222 SYSTICK TIMER
223 -----------------------------------------------------------------------
224
225 CFG_SYSTICK_DELAY_IN_MS The number of milliseconds between each tick
226 of the systick timer.
227
228 -----------------------------------------------------------------------*/
229 #define CFG_SYSTICK_DELAY_IN_MS (1)
230 /*=========================================================================*/
231
232
233 /*=========================================================================
234 ALTERNATE RESET PIN
235 -----------------------------------------------------------------------
236
237 CFG_ALTRESET If defined, indicates that a GPIO pin should be
238 configured as an alternate reset pin in addition
239 to the dedicated reset pin.
240 CFG_ALTRESET_PORT The GPIO port where the alt reset pin is located
241 CFG_ALTRESET_PIN The GPIO pin where the alt reset pin is located
242
243 -----------------------------------------------------------------------*/
244 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
245 #define CFG_ALTRESET
246 #define CFG_ALTRESET_PORT (1)
247 #define CFG_ALTRESET_PIN (5) // P1.5 = RTS
248 #endif
249 /*=========================================================================*/
250
251
252 /*=========================================================================
253 UART
254 -----------------------------------------------------------------------
255
256 CFG_UART_BAUDRATE The default UART speed. This value is used
257 when initialising UART, and should be a
258 standard value like 57600, 9600, etc.
259 NOTE: This value may be overridden if
260 another value is stored in EEPROM!
261 CFG_UART_BUFSIZE The length in bytes of the UART RX FIFO. This
262 will determine the maximum number of received
263 characters to store in memory.
264
265 -----------------------------------------------------------------------*/
266 #ifdef CFG_BRD_LPC1343_REFDESIGN
267 #define CFG_UART_BAUDRATE (115200)
268 #define CFG_UART_BUFSIZE (512)
269 #endif
270
271 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
272 #define CFG_UART_BAUDRATE (115200)
273 #define CFG_UART_BUFSIZE (512)
274 #endif
275
276 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
277 #define CFG_UART_BAUDRATE (115200)
278 #define CFG_UART_BUFSIZE (512)
279 #endif
280
281 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
282 #define CFG_UART_BAUDRATE (57600)
283 #define CFG_UART_BUFSIZE (512)
284 #endif
285
286 #ifdef CFG_BRD_LPC1343_802154USBSTICK
287 #define CFG_UART_BAUDRATE (115200)
288 #define CFG_UART_BUFSIZE (512)
289 #endif
290
291 #ifdef CFG_BRD_LPC1343_OLIMEX_P
292 #define CFG_UART_BAUDRATE (115200)
293 #define CFG_UART_BUFSIZE (512)
294 #endif
295 /*=========================================================================*/
296
297
298 /*=========================================================================
299 SSP
300 -----------------------------------------------------------------------
301
302 CFG_SSP0_SCKPIN_2_11 Indicates which pin should be used for SCK0
303 CFG_SSP0_SCKPIN_0_6
304
305 -----------------------------------------------------------------------*/
306 #ifdef CFG_BRD_LPC1343_REFDESIGN
307 #define CFG_SSP0_SCKPIN_2_11
308 // #define CFG_SSP0_SCKPIN_0_6
309 #endif
310
311 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
312 #define CFG_SSP0_SCKPIN_2_11
313 // #define CFG_SSP0_SCKPIN_0_6
314 #endif
315
316 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
317 #define CFG_SSP0_SCKPIN_2_11
318 // #define CFG_SSP0_SCKPIN_0_6
319 #endif
320
321 #ifdef CFG_BRD_LPC1343_802154USBSTICK
322 // #define CFG_SSP0_SCKPIN_2_11
323 #define CFG_SSP0_SCKPIN_0_6
324 #endif
325
326 #ifdef CFG_BRD_LPC1343_OLIMEX_P
327 #define CFG_SSP0_SCKPIN_2_11
328 // #define CFG_SSP0_SCKPIN_0_6
329 #endif
330 /*=========================================================================*/
331
332
333 /*=========================================================================
334 ON-BOARD LED
335 -----------------------------------------------------------------------
336
337 CFG_LED_PORT The port for the on board LED
338 CFG_LED_PIN The pin for the on board LED
339 CFG_LED_ON The pin state to turn the LED on (0 = low, 1 = high)
340 CFG_LED_OFF The pin state to turn the LED off (0 = low, 1 = high)
341
342 -----------------------------------------------------------------------*/
343 #ifdef CFG_BRD_LPC1343_REFDESIGN
344 #define CFG_LED_PORT (2)
345 #define CFG_LED_PIN (10)
346 #define CFG_LED_ON (0)
347 #define CFG_LED_OFF (1)
348 #endif
349
350 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
351 #define CFG_LED_PORT (2)
352 #define CFG_LED_PIN (10)
353 #define CFG_LED_ON (0)
354 #define CFG_LED_OFF (1)
355 #endif
356
357 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
358 #define CFG_LED_PORT (2)
359 #define CFG_LED_PIN (10)
360 #define CFG_LED_ON (0)
361 #define CFG_LED_OFF (1)
362 #endif
363
364 #ifdef CFG_BRD_LPC1343_802154USBSTICK
365 #define CFG_LED_PORT (3)
366 #define CFG_LED_PIN (2)
367 #define CFG_LED_ON (0)
368 #define CFG_LED_OFF (1)
369 #endif
370
371 #ifdef CFG_BRD_LPC1343_OLIMEX_P
372 #define CFG_LED_PORT (3)
373 #define CFG_LED_PIN (2)
374 #define CFG_LED_ON (0)
375 #define CFG_LED_OFF (1)
376 #endif
377 /*=========================================================================*/
378
379
380 /*=========================================================================
381 MICRO-SD CARD
382 -----------------------------------------------------------------------
383
384 CFG_SDCARD If this field is defined SD Card and FAT32
385 file system support will be included
386 CFG_SDCARD_READONLY If this is set to 1, all commands to
387 write to the SD card will be removed
388 saving some flash space.
389 CFG_SDCARD_CDPORT The card detect port number
390 CFG_SDCARD_CDPIN The card detect pin number
391
392 NOTE: All config settings for FAT32 are defined
393 in ffconf.h
394
395 BENCHMARK: With SPI set to 6.0MHz, FATFS can read
396 ~300KB/s (w/512 byte read buffer)
397
398 PIN LAYOUT: The pin layout that is used by this driver
399 can be seen in the following schematic:
400 /tools/schematics/Breakout_TFTLCD_ILI9325_v1.3
401
402 DEPENDENCIES: SDCARD requires the use of SSP0.
403 -----------------------------------------------------------------------*/
404 #ifdef CFG_BRD_LPC1343_REFDESIGN
405 // #define CFG_SDCARD
406 #define CFG_SDCARD_READONLY (1) // Must be 0 or 1
407 #define CFG_SDCARD_CDPORT (3)
408 #define CFG_SDCARD_CDPIN (0)
409 #endif
410
411 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
412 // #define CFG_SDCARD
413 #define CFG_SDCARD_READONLY (1) // Must be 0 or 1
414 #define CFG_SDCARD_CDPORT (3)
415 #define CFG_SDCARD_CDPIN (0)
416 #endif
417
418 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
419 #define CFG_SDCARD
420 #define CFG_SDCARD_READONLY (1) // Must be 0 or 1
421 #define CFG_SDCARD_CDPORT (3)
422 #define CFG_SDCARD_CDPIN (0)
423 #endif
424
425 #ifdef CFG_BRD_LPC1343_802154USBSTICK
426 // #define CFG_SDCARD
427 #define CFG_SDCARD_READONLY (1) // Must be 0 or 1
428 #define CFG_SDCARD_CDPORT (3)
429 #define CFG_SDCARD_CDPIN (0)
430 #endif
431
432 #ifdef CFG_BRD_LPC1343_OLIMEX_P
433 // #define CFG_SDCARD
434 #define CFG_SDCARD_READONLY (1) // Must be 0 or 1
435 #define CFG_SDCARD_CDPORT (3)
436 #define CFG_SDCARD_CDPIN (0)
437 #endif
438 /*=========================================================================*/
439
440
441 /*=========================================================================
442 USB
443 -----------------------------------------------------------------------
444
445 CFG_USBHID If this field is defined USB HID support will
446 be included. Currently uses ROM-based USB HID
447 CFG_USBCDC If this field is defined USB CDC support will
448 be included, with the USB Serial Port speed
449 set to 115200 BPS by default
450 CFG_USBCDC_BAUDRATE The default TX/RX speed. This value is used
451 when initialising USBCDC, and should be a
452 standard value like 57600, 9600, etc.
453 CFG_USBCDC_INITTIMEOUT The maximum delay in milliseconds to wait for
454 USB to connect. Must be a multiple of 10!
455 CFG_USBCDC_BUFFERSIZE Size of the buffer (in bytes) that stores
456 printf data until it can be sent out in
457 64 byte frames. The buffer is required since
458 only one frame per ms can be sent using USB
459 CDC (see 'puts' in systeminit.c).
460
461 -----------------------------------------------------------------------*/
462 #define CFG_USB_VID (0x239A)
463 #define CFG_USB_PID (0x1002)
464
465 #ifdef CFG_BRD_LPC1343_REFDESIGN
466 // #define CFG_USBHID
467 #define CFG_USBCDC
468 #define CFG_USBCDC_BAUDRATE (115200)
469 #define CFG_USBCDC_INITTIMEOUT (5000)
470 #define CFG_USBCDC_BUFFERSIZE (256)
471 #endif
472
473 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
474 // #define CFG_USBHID
475 // #define CFG_USBCDC
476 #define CFG_USBCDC_BAUDRATE (115200)
477 #define CFG_USBCDC_INITTIMEOUT (5000)
478 #define CFG_USBCDC_BUFFERSIZE (256)
479 #endif
480
481 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
482 // #define CFG_USBHID
483 #define CFG_USBCDC
484 #define CFG_USBCDC_BAUDRATE (115200)
485 #define CFG_USBCDC_INITTIMEOUT (5000)
486 #define CFG_USBCDC_BUFFERSIZE (256)
487 #endif
488
489 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
490 // #define CFG_USBHID
491 // #define CFG_USBCDC
492 #define CFG_USBCDC_BAUDRATE (57600)
493 #define CFG_USBCDC_INITTIMEOUT (5000)
494 #define CFG_USBCDC_BUFFERSIZE (256)
495 #endif
496
497 #ifdef CFG_BRD_LPC1343_802154USBSTICK
498 // #define CFG_USBHID
499 #define CFG_USBCDC
500 #define CFG_USBCDC_BAUDRATE (115200)
501 #define CFG_USBCDC_INITTIMEOUT (5000)
502 #define CFG_USBCDC_BUFFERSIZE (256)
503 #endif
504
505 #ifdef CFG_BRD_LPC1343_OLIMEX_P
506 // #define CFG_USBHID
507 #define CFG_USBCDC
508 #define CFG_USBCDC_BAUDRATE (115200)
509 #define CFG_USBCDC_INITTIMEOUT (5000)
510 #define CFG_USBCDC_BUFFERSIZE (256)
511 #endif
512 /*=========================================================================*/
513
514
515 /*=========================================================================
516 PRINTF REDIRECTION
517 -----------------------------------------------------------------------
518
519 CFG_PRINTF_UART Will cause all printf statements to be
520 redirected to UART
521 CFG_PRINTF_USBCDC Will cause all printf statements to be
522 redirect to USB Serial
523 CFG_PRINTF_NEWLINE This is typically "\r\n" for Windows or
524 "\n" for *nix
525
526 Note: If no printf redirection definitions are present, all printf
527 output will be ignored.
528 -----------------------------------------------------------------------*/
529 #ifdef CFG_BRD_LPC1343_REFDESIGN
530 // #define CFG_PRINTF_UART
531 #define CFG_PRINTF_USBCDC
532 #define CFG_PRINTF_NEWLINE "\r\n"
533 #endif
534
535 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
536 #define CFG_PRINTF_UART
537 // #define CFG_PRINTF_USBCDC
538 #define CFG_PRINTF_NEWLINE "\r\n"
539 #endif
540
541 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
542 // #define CFG_PRINTF_UART
543 #define CFG_PRINTF_USBCDC
544 #define CFG_PRINTF_NEWLINE "\r\n"
545 #endif
546
547 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
548 #define CFG_PRINTF_UART
549 // #define CFG_PRINTF_USBCDC
550 #define CFG_PRINTF_NEWLINE "\n"
551 #endif
552
553 #ifdef CFG_BRD_LPC1343_802154USBSTICK
554 // #define CFG_PRINTF_UART
555 #define CFG_PRINTF_USBCDC
556 #define CFG_PRINTF_NEWLINE "\r\n"
557 #endif
558
559 #ifdef CFG_BRD_LPC1343_OLIMEX_P
560 // #define CFG_PRINTF_UART
561 #define CFG_PRINTF_USBCDC
562 #define CFG_PRINTF_NEWLINE "\r\n"
563 #endif
564 /*=========================================================================*/
565
566
567 /*=========================================================================
568 COMMAND LINE INTERFACE
569 -----------------------------------------------------------------------
570
571 CFG_INTERFACE If this field is defined the UART or USBCDC
572 based command-line interface will be included
573 CFG_INTERFACE_MAXMSGSIZE The maximum number of bytes to accept for an
574 incoming command
575 CFG_INTERFACE_PROMPT The command prompt to display at the start
576 of every new data entry line
577 CFG_INTERFACE_SILENTMODE If this is set to 1 only text generated in
578 response to commands will be send to the
579 output buffer. The command prompt will not
580 be displayed and incoming text will not be
581 echoed back to the output buffer (allowing
582 you to see the text you have input). This
583 is normally only desirable in a situation
584 where another MCU is communicating with
585 the LPC1343.
586 CFG_INTERFACE_DROPCR If this is set to 1 all incoming \r
587 characters will be dropped
588 CFG_INTERFACE_ENABLEIRQ If this is set to 1 the IRQ pin will be
589 set high when a command starts executing
590 and will go low when the command has
591 finished executing or the LCD is not busy.
592 This allows another device to know when a
593 new command can safely be sent.
594 CFG_INTERFACE_IRQPORT The gpio port for the IRQ/busy pin
595 CFG_INTERFACE_IRQPIN The gpio pin number for the IRQ/busy pin
596 CFG_INTERFACE_SHORTERRORS If this is enabled only short 1 character
597 error messages will be returned (followed
598 by CFG_PRINTF_NEWLINE), rather than more
599 verbose error messages. The specific
600 characters used are defined below.
601 CFG_INTERFACE_CONFIRMREADY If this is set to 1 a text confirmation
602 will be sent when the command prompt is
603 ready for a new command. This is in
604 addition to CFG_INTERFACE_ENABLEIRQ if
605 this is also enabled. The character used
606 is defined below.
607
608 NOTE: The command-line interface will use either
609 USB-CDC or UART depending on whether
610 CFG_PRINTF_UART or CFG_PRINTF_USBCDC are
611 selected.
612 -----------------------------------------------------------------------*/
613 #ifdef CFG_BRD_LPC1343_REFDESIGN
614 #define CFG_INTERFACE
615 #define CFG_INTERFACE_MAXMSGSIZE (256)
616 #define CFG_INTERFACE_PROMPT "LPC1343 >> "
617 #define CFG_INTERFACE_SILENTMODE (0)
618 #define CFG_INTERFACE_DROPCR (0)
619 #define CFG_INTERFACE_ENABLEIRQ (0)
620 #define CFG_INTERFACE_IRQPORT (0)
621 #define CFG_INTERFACE_IRQPIN (7)
622 #define CFG_INTERFACE_SHORTERRORS (0)
623 #define CFG_INTERFACE_CONFIRMREADY (0)
624 #endif
625
626 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
627 // #define CFG_INTERFACE
628 #define CFG_INTERFACE_MAXMSGSIZE (256)
629 #define CFG_INTERFACE_PROMPT "LPC1343 >> "
630 #define CFG_INTERFACE_SILENTMODE (0)
631 #define CFG_INTERFACE_DROPCR (0)
632 #define CFG_INTERFACE_ENABLEIRQ (0)
633 #define CFG_INTERFACE_IRQPORT (0)
634 #define CFG_INTERFACE_IRQPIN (7)
635 #define CFG_INTERFACE_SHORTERRORS (0)
636 #define CFG_INTERFACE_CONFIRMREADY (0)
637 #endif
638
639 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
640 #define CFG_INTERFACE
641 #define CFG_INTERFACE_MAXMSGSIZE (256)
642 #define CFG_INTERFACE_PROMPT "CMD >> "
643 #define CFG_INTERFACE_SILENTMODE (0)
644 #define CFG_INTERFACE_DROPCR (0)
645 #define CFG_INTERFACE_ENABLEIRQ (0)
646 #define CFG_INTERFACE_IRQPORT (0)
647 #define CFG_INTERFACE_IRQPIN (7)
648 #define CFG_INTERFACE_SHORTERRORS (0)
649 #define CFG_INTERFACE_CONFIRMREADY (0)
650 #define CFG_INTERFACE_SHORTERRORS_UNKNOWNCOMMAND "?"
651 #define CFG_INTERFACE_SHORTERRORS_TOOMANYARGS ">"
652 #define CFG_INTERFACE_SHORTERRORS_TOOFEWARGS "<"
653 #define CFG_INTERFACE_CONFIRMREADY_TEXT "."
654 #endif
655
656 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
657 #define CFG_INTERFACE
658 #define CFG_INTERFACE_MAXMSGSIZE (256)
659 #define CFG_INTERFACE_PROMPT ">>"
660 #define CFG_INTERFACE_SILENTMODE (1)
661 #define CFG_INTERFACE_DROPCR (1)
662 #define CFG_INTERFACE_ENABLEIRQ (1)
663 #define CFG_INTERFACE_IRQPORT (0)
664 #define CFG_INTERFACE_IRQPIN (7)
665 #define CFG_INTERFACE_SHORTERRORS (1)
666 #define CFG_INTERFACE_CONFIRMREADY (0)
667 #define CFG_INTERFACE_SHORTERRORS_UNKNOWNCOMMAND "?"
668 #define CFG_INTERFACE_SHORTERRORS_TOOMANYARGS ">"
669 #define CFG_INTERFACE_SHORTERRORS_TOOFEWARGS "<"
670 #define CFG_INTERFACE_CONFIRMREADY_TEXT "."
671 #endif
672
673 #ifdef CFG_BRD_LPC1343_802154USBSTICK
674 // #define CFG_INTERFACE
675 #define CFG_INTERFACE_MAXMSGSIZE (256)
676 #define CFG_INTERFACE_PROMPT "CMD >> "
677 #define CFG_INTERFACE_SILENTMODE (0)
678 #define CFG_INTERFACE_DROPCR (0)
679 #define CFG_INTERFACE_ENABLEIRQ (0)
680 #define CFG_INTERFACE_IRQPORT (0)
681 #define CFG_INTERFACE_IRQPIN (7)
682 #define CFG_INTERFACE_SHORTERRORS (0)
683 #define CFG_INTERFACE_CONFIRMREADY (0)
684 #endif
685
686 #ifdef CFG_BRD_LPC1343_OLIMEX_P
687 #define CFG_INTERFACE
688 #define CFG_INTERFACE_MAXMSGSIZE (256)
689 #define CFG_INTERFACE_PROMPT "LPC-P1343 >> "
690 #define CFG_INTERFACE_SILENTMODE (0)
691 #define CFG_INTERFACE_DROPCR (0)
692 #define CFG_INTERFACE_ENABLEIRQ (0)
693 #define CFG_INTERFACE_IRQPORT (0)
694 #define CFG_INTERFACE_IRQPIN (7)
695 #define CFG_INTERFACE_SHORTERRORS (0)
696 #define CFG_INTERFACE_CONFIRMREADY (0)
697 #endif
698 /*=========================================================================*/
699
700
701 /*=========================================================================
702 PWM SETTINGS
703 -----------------------------------------------------------------------
704
705 CFG_PWM If this is defined, a basic PWM driver
706 will be included using 16-bit Timer 1 and
707 Pin 1.9 (MAT0) for the PWM output. In
708 order to allow for a fixed number of
709 pulses to be generated, some PWM-specific
710 code is required in the 16-Bit Timer 1
711 ISR. See "core/timer16/timer16.c" for
712 more information.
713 CFG_PWM_DEFAULT_PULSEWIDTH The default pulse width in ticks
714 CFG_PWM_DEFAULT_DUTYCYCLE The default duty cycle in percent
715
716 DEPENDENCIES: PWM output requires the use of 16-bit
717 timer 1 and pin 1.9 (CT16B1_MAT0).
718 -----------------------------------------------------------------------*/
719 // #define CFG_PWM
720 #define CFG_PWM_DEFAULT_PULSEWIDTH (CFG_CPU_CCLK / 1000)
721 #define CFG_PWM_DEFAULT_DUTYCYCLE (50)
722 /*=========================================================================*/
723
724
725 /*=========================================================================
726 STEPPER MOTOR SETTINGS
727 -----------------------------------------------------------------------
728
729 CFG_STEPPER If this is defined, a simple bi-polar
730 stepper motor will be included for common
731 H-bridge chips like the L293D or SN754410N
732
733 DEPENDENCIES: STEPPER requires the use of pins 3.0-3 and
734 32-bit Timer 0.
735 -----------------------------------------------------------------------*/
736 // #define CFG_STEPPER
737 /*=========================================================================*/
738
739
740 /*=========================================================================
741 EEPROM
742 -----------------------------------------------------------------------
743
744 CFG_I2CEEPROM If defined, drivers for the onboard EEPROM
745 will be included during build
746 CFG_I2CEEPROM_SIZE The number of bytes available on the EEPROM
747
748 -----------------------------------------------------------------------*/
749 #ifdef CFG_BRD_LPC1343_REFDESIGN
750 #define CFG_I2CEEPROM
751 #define CFG_I2CEEPROM_SIZE (3072)
752 #endif
753
754 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
755 // #define CFG_I2CEEPROM
756 #define CFG_I2CEEPROM_SIZE (3072)
757 #endif
758
759 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
760 #define CFG_I2CEEPROM
761 #define CFG_I2CEEPROM_SIZE (3072)
762 #endif
763
764 #ifdef CFG_BRD_LPC1343_802154USBSTICK
765 #define CFG_I2CEEPROM
766 #define CFG_I2CEEPROM_SIZE (3072)
767 #endif
768
769 #ifdef CFG_BRD_LPC1343_OLIMEX_P
770 // #define CFG_I2CEEPROM
771 #define CFG_I2CEEPROM_SIZE (3072)
772 #endif
773 /*=========================================================================*/
774
775
776 /*=========================================================================
777 EEPROM MEMORY MAP
778 -----------------------------------------------------------------------
779 EEPROM is used to persist certain user modifiable values to make
780 sure that these changes remain in effect after a reset or hard
781 power-down. The addresses in EEPROM for these various system
782 settings/values are defined below. The first 256 bytes of EEPROM
783 are reserved for this (0x0000..0x00FF).
784
785 CFG_EEPROM_RESERVED The last byte of reserved EEPROM memory
786
787 EEPROM Address (0x0000..0x00FF)
788 ===============================
789 0 1 2 3 4 5 6 7 8 9 A B C D E F
790 000x x x x x x x x x . x x . . . . . Chibi
791 001x . . . . . . . . . . . . . . . .
792 002x x x x x . . . . . . . . . . . . UART
793 003x x x x x x x x x x x x x x x x x Touch Screen Calibration
794 004x x x x x x x x x x x x x x x . . Touch Screen Calibration
795 005x . . . . . . . . . . . . . . . .
796 006x . . . . . . . . . . . . . . . .
797 007x . . . . . . . . . . . . . . . .
798 008x . . . . . . . . . . . . . . . .
799 009x . . . . . . . . . . . . . . . .
800 00Ax . . . . . . . . . . . . . . . .
801 00Bx . . . . . . . . . . . . . . . .
802 00Cx . . . . . . . . . . . . . . . .
803 00Dx . . . . . . . . . . . . . . . .
804 00Ex . . . . . . . . . . . . . . . .
805 00Fx . . . . . . . . . . . . . . . .
806
807 -----------------------------------------------------------------------*/
808 #define CFG_EEPROM_RESERVED (0x00FF) // Protect first 256 bytes of memory
809 #define CFG_EEPROM_CHIBI_IEEEADDR (uint16_t)(0x0000) // 8
810 #define CFG_EEPROM_CHIBI_SHORTADDR (uint16_t)(0x0009) // 2
811 #define CFG_EEPROM_UART_SPEED (uint16_t)(0x0020) // 4
812 #define CFG_EEPROM_TOUCHSCREEN_CALIBRATED (uint16_t)(0x0030) // 1
813 #define CFG_EEPROM_TOUCHSCREEN_CAL_AN (uint16_t)(0x0031) // 4
814 #define CFG_EEPROM_TOUCHSCREEN_CAL_BN (uint16_t)(0x0035) // 4
815 #define CFG_EEPROM_TOUCHSCREEN_CAL_CN (uint16_t)(0x0039) // 4
816 #define CFG_EEPROM_TOUCHSCREEN_CAL_DN (uint16_t)(0x003D) // 4
817 #define CFG_EEPROM_TOUCHSCREEN_CAL_EN (uint16_t)(0x0041) // 4
818 #define CFG_EEPROM_TOUCHSCREEN_CAL_FN (uint16_t)(0x0045) // 4
819 #define CFG_EEPROM_TOUCHSCREEN_CAL_DIVIDER (uint16_t)(0x0049) // 4
820 #define CFG_EEPROM_TOUCHSCREEN_THRESHHOLD (uint16_t)(0x004D) // 1
821 /*=========================================================================*/
822
823
824 /*=========================================================================
825 LM75B TEMPERATURE SENSOR
826 -----------------------------------------------------------------------
827
828 CFG_LM75B If defined, drivers for an optional LM75B
829 temperature sensor will be included during
830 build (requires external HW)
831
832 -----------------------------------------------------------------------*/
833 // #define CFG_LM75B
834 /*=========================================================================*/
835
836
837 /*=========================================================================
838 CHIBI WIRELESS STACK
839 -----------------------------------------------------------------------
840
841 CFG_CHIBI If defined, the CHIBI wireless stack will be
842 included during build. Requires external HW.
843 CFG_CHIBI_MODE The mode to use when receiving and transmitting
844 wireless data. See chb_drvr.h for possible values
845 CFG_CHIBI_POWER The power level to use when transmitting. See
846 chb_drvr.h for possible values
847 CFG_CHIBI_CHANNEL 802.15.4 Channel (0 = 868MHz, 1-10 = 915MHz)
848 CFG_CHIBI_PANID 16-bit PAN Identifier (ex.0x1234)
849 CFG_CHIBI_PROMISCUOUS Set to 1 to enabled promiscuous mode or
850 0 to disable it. If promiscuous mode is
851 enabled be sure to set CFG_CHIBI_BUFFERSIZE
852 to an appropriately large value (ex. 1024)
853 CFG_CHIBI_BUFFERSIZE The size of the message buffer in bytes
854
855 DEPENDENCIES: Chibi requires the use of SSP0, 16-bit timer
856 0 and pins 3.1, 3.2, 3.3. It also requires
857 the presence of CFG_I2CEEPROM.
858
859 NOTE: These settings are not relevant to all boards!
860 'tools/schematics/AT86RF212LPC1114_v1.6.pdf'
861 show how 'CHIBI' is meant to be connected
862 -----------------------------------------------------------------------*/
863 #ifdef CFG_BRD_LPC1343_REFDESIGN
864 // #define CFG_CHIBI
865 #define CFG_CHIBI_MODE (0) // OQPSK_868MHZ
866 #define CFG_CHIBI_POWER (0xE9) // CHB_PWR_EU2_3DBM
867 #define CFG_CHIBI_CHANNEL (0) // 868-868.6 MHz
868 #define CFG_CHIBI_PANID (0x1234)
869 #define CFG_CHIBI_PROMISCUOUS (0)
870 #define CFG_CHIBI_BUFFERSIZE (128)
871 #endif
872
873 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
874 // #define CFG_CHIBI
875 #define CFG_CHIBI_MODE (0) // OQPSK_868MHZ
876 #define CFG_CHIBI_POWER (0xE9) // CHB_PWR_EU2_3DBM
877 #define CFG_CHIBI_CHANNEL (0) // 868-868.6 MHz
878 #define CFG_CHIBI_PANID (0x1234)
879 #define CFG_CHIBI_PROMISCUOUS (0)
880 #define CFG_CHIBI_BUFFERSIZE (128)
881 #endif
882
883 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
884 // #define CFG_CHIBI
885 #define CFG_CHIBI_MODE (0) // OQPSK_868MHZ
886 #define CFG_CHIBI_POWER (0xE9) // CHB_PWR_EU2_3DBM
887 #define CFG_CHIBI_CHANNEL (0) // 868-868.6 MHz
888 #define CFG_CHIBI_PANID (0x1234)
889 #define CFG_CHIBI_PROMISCUOUS (0)
890 #define CFG_CHIBI_BUFFERSIZE (128)
891 #endif
892
893 #ifdef CFG_BRD_LPC1343_802154USBSTICK
894 #define CFG_CHIBI
895 #define CFG_CHIBI_MODE (0) // OQPSK_868MHZ
896 #define CFG_CHIBI_POWER (0xE9) // CHB_PWR_EU2_3DBM
897 #define CFG_CHIBI_CHANNEL (0) // 868-868.6 MHz
898 #define CFG_CHIBI_PANID (0x1234)
899 #define CFG_CHIBI_PROMISCUOUS (0)
900 #define CFG_CHIBI_BUFFERSIZE (1024)
901 #endif
902
903 #ifdef CFG_BRD_LPC1343_OLIMEX_P
904 // #define CFG_CHIBI
905 #define CFG_CHIBI_MODE (0) // OQPSK_868MHZ
906 #define CFG_CHIBI_POWER (0xE9) // CHB_PWR_EU2_3DBM
907 #define CFG_CHIBI_CHANNEL (0) // 868-868.6 MHz
908 #define CFG_CHIBI_PANID (0x1234)
909 #define CFG_CHIBI_PROMISCUOUS (0)
910 #define CFG_CHIBI_BUFFERSIZE (128)
911 #endif
912 /*=========================================================================*/
913
914
915 /*=========================================================================
916 TFT LCD
917 -----------------------------------------------------------------------
918
919 CFG_TFTLCD If defined, this will cause drivers for
920 a pre-determined LCD screen to be included
921 during build. Only one LCD driver can be
922 included during the build process (for ex.
923 'drivers/lcd/hw/ILI9325.c')
924 CFG_TFTLCD_INCLUDESMALLFONTS If set to 1, smallfont support will be
925 included for 3x6, 5x8, 7x8 and 8x8 fonts.
926 This should only be enabled if these small
927 fonts are required since there is already
928 support for larger fonts generated with
929 Dot Factory
930 http://www.pavius.net/downloads/tools/53-the-dot-factory
931 CFG_TFTLCD_TS_DEFAULTTHRESHOLD Default minimum threshold to trigger a
932 touch event with the touch screen (and exit
933 from 'tsWaitForEvent' in touchscreen.c).
934 Should be an 8-bit value somewhere between
935 8 and 75 in normal circumstances. This is
936 the default value and may be overriden by
937 a value stored in EEPROM.
938 CFG_TFTLCD_TS_KEYPADDELAY The delay in milliseconds between key
939 presses in dialogue boxes
940
941 PIN LAYOUT: The pin layout that is used by this driver
942 can be seen in the following schematic:
943 /tools/schematics/Breakout_TFTLCD_ILI9325_v1.3
944
945 DEPENDENCIES: TFTLCD requires the use of pins 1.8, 1.9,
946 1.10, 1.11, 3.3 and 2.1-9.
947 -----------------------------------------------------------------------*/
948 #ifdef CFG_BRD_LPC1343_REFDESIGN
949 // #define CFG_TFTLCD
950 #define CFG_TFTLCD_INCLUDESMALLFONTS (0)
951 #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
952 #define CFG_TFTLCD_TS_KEYPADDELAY (100)
953 #endif
954
955 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
956 // #define CFG_TFTLCD
957 #define CFG_TFTLCD_INCLUDESMALLFONTS (0)
958 #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
959 #define CFG_TFTLCD_TS_KEYPADDELAY (100)
960 #endif
961
962 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
963 #define CFG_TFTLCD
964 #define CFG_TFTLCD_INCLUDESMALLFONTS (0)
965 #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
966 #define CFG_TFTLCD_TS_KEYPADDELAY (100)
967 #endif
968
969 #ifdef CFG_BRD_LPC1343_802154USBSTICK
970 // #define CFG_TFTLCD
971 #define CFG_TFTLCD_INCLUDESMALLFONTS (0)
972 #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
973 #define CFG_TFTLCD_TS_KEYPADDELAY (100)
974 #endif
975
976 #ifdef CFG_BRD_LPC1343_OLIMEX_P
977 // #define CFG_TFTLCD
978 #define CFG_TFTLCD_INCLUDESMALLFONTS (0)
979 #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
980 #define CFG_TFTLCD_TS_KEYPADDELAY (100)
981 #endif
982 /*=========================================================================*/
983
984
985 /*=========================================================================
986 Monochrome/Bitmap Graphic LCDs
987 -----------------------------------------------------------------------
988
989 CFG_ST7565 If defined, this will cause drivers for
990 the 128x64 pixel ST7565 LCD to be included
991 CFG_SSD1306 If defined, this will cause drivers for
992 the 128x64 pixel SSD1306 OLED display to be
993 included
994 CFG_SHARPMEM If defined, this will cause drivers for
995 Sharp Memory Displays to be included
996
997 DEPENDENCIES: ST7565 requires the use of pins 2.1-6.
998 DEPENDENCIES: SSD1306 requires the use of pins 2.1-6.
999 DEPENDENCIES: SHARPMEM requires the use of pins 2.1-4.
1000 -----------------------------------------------------------------------*/
1001 // #define CFG_ST7565
1002 // #define CFG_SSD1306
1003 // #define CFG_SHARPMEM
1004 /*=========================================================================*/
1005
1006
1007 /*=========================================================================
1008 RSA Encryption
1009 -----------------------------------------------------------------------
1010
1011 CFG_RSA If defined, support for basic RSA
1012 encryption will be included.
1013 CFG_RSA_BITS Indicates the number of bits used for
1014 RSA encryption keys. To keep code size
1015 reasonable, RSA encryption is currently
1016 limited to using 64-bit or 32-bit numbers,
1017 with 64-bit providing higher security, and
1018 32-bit providing smaller encrypted text
1019 size.
1020
1021 NOTE: Please note that Printf can not be
1022 used to display 64-bit values (%lld)!
1023 -----------------------------------------------------------------------*/
1024 // #define CFG_RSA
1025 #define CFG_RSA_BITS (32)
1026 /*=========================================================================*/
1027
1028
1029
1030
1031 /*=========================================================================
1032 CONFIG FILE VALIDATION
1033 -------------------------------------------------------------------------
1034 Basic error checking to make sure that incompatible defines are not
1035 enabled at the same time, etc.
1036
1037 =========================================================================*/
1038
1039 #if !defined CFG_BRD_LPC1343_REFDESIGN && \
1040 !defined CFG_BRD_LPC1343_REFDESIGN_MINIMAL && \
1041 !defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB && \
1042 !defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART && \
1043 !defined CFG_BRD_LPC1343_802154USBSTICK && \
1044 !defined CFG_BRD_LPC1343_OLIMEX_P
1045 #error "You must defined a target board (CFG_BRD_LPC1343_REFDESIGN or CFG_BRD_LPC1343_REFDESIGN_MINIMAL or CFG_BRD_LPC1343_TFTLCDSTANDALONE or CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART or CFG_BRD_LPC1343_802154USBSTICK)"
1046 #endif
1047
1048 #if defined CFG_PRINTF_USBCDC && defined CFG_PRINTF_UART
1049 #error "CFG_PRINTF_UART or CFG_PRINTF_USBCDC cannot both be defined at once"
1050 #endif
1051
1052 #if defined CFG_PRINTF_USBCDC && !defined CFG_USBCDC
1053 #error "CFG_PRINTF_CDC requires CFG_USBCDC to be defined as well"
1054 #endif
1055
1056 #if defined CFG_USBCDC && defined CFG_USBHID
1057 #error "Only one USB class can be defined at a time (CFG_USBCDC or CFG_USBHID)"
1058 #endif
1059
1060 #if defined CFG_SSP0_SCKPIN_2_11 && defined CFG_SSP0_SCKPIN_0_6
1061 #error "Only one SCK pin can be defined at a time for SSP0"
1062 #endif
1063
1064 #if !defined CFG_SSP0_SCKPIN_2_11 && !defined CFG_SSP0_SCKPIN_0_6
1065 #error "An SCK pin must be selected for SSP0 (CFG_SSP0_SCKPIN_2_11 or CFG_SSP0_SCKPIN_0_6)"
1066 #endif
1067
1068 #ifdef CFG_INTERFACE
1069 #if !defined CFG_PRINTF_UART && !defined CFG_PRINTF_USBCDC
1070 #error "CFG_PRINTF_UART or CFG_PRINTF_USBCDC must be defined for for CFG_INTERFACE Input/Output"
1071 #endif
1072 #if defined CFG_PRINTF_USBCDC && CFG_INTERFACE_SILENTMODE == 1
1073 #error "CFG_INTERFACE_SILENTMODE typically isn't enabled with CFG_PRINTF_USBCDC"
1074 #endif
1075 #endif
1076
1077 #ifdef CFG_CHIBI
1078 #if !defined CFG_I2CEEPROM
1079 #error "CFG_CHIBI requires CFG_I2CEEPROM to store and retrieve addresses"
1080 #endif
1081 #ifdef CFG_SDCARD
1082 #error "CFG_CHIBI and CFG_SDCARD can not be defined at the same time. Only one SPI block is available on the LPC1343."
1083 #endif
1084 #ifdef CFG_TFTLCD
1085 #error "CFG_CHIBI and CFG_TFTLCD can not be defined at the same time since they both use pins 1.8, 1.9 and 1.10."
1086 #endif
1087 #ifdef CFG_PWM
1088 #error "CFG_CHIBI and CFG_PWM can not be defined at the same time since they both use pin 1.9."
1089 #endif
1090 #if CFG_CHIBI_PROMISCUOUS != 0 && CFG_CHIBI_PROMISCUOUS != 1
1091 #error "CFG_CHIBI_PROMISCUOUS must be equal to either 1 or 0"
1092 #endif
1093 #endif
1094
1095 #ifdef CFG_TFTLCD
1096 #ifdef CFG_ST7565
1097 #error "CFG_TFTLCD and CFG_ST7565 can not be defined at the same time."
1098 #endif
1099 #ifdef CFG_SSD1306
1100 #error "CFG_TFTLCD and CFG_SSD1306 can not be defined at the same time."
1101 #endif
1102 #ifdef CFG_SHARPMEM
1103 #error "CFG_TFTLCD and CFG_SHARPMEM can not be defined at the same time."
1104 #endif
1105 #ifdef CFG_PWM
1106 #error "CFG_TFTLCD and CFG_PWM can not be defined at the same time since they both use pin 1.9."
1107 #endif
1108 #if !defined CFG_I2CEEPROM
1109 #error "CFG_TFTLCD requires CFG_I2CEEPROM to store and retrieve configuration settings"
1110 #endif
1111 #endif
1112
1113 #ifdef CFG_SDCARD
1114 #ifdef CFG_STEPPER
1115 #error "CFG_SDCARD and CFG_STEPPER can not be defined at the same time since they both use pin 3.0."
1116 #endif
1117 #endif
1118
1119 #ifdef CFG_ST7565
1120 #ifdef CFG_SSD1306
1121 #error "CFG_ST7565 and CFG_SSD1306 can not be defined at the same time"
1122 #endif
1123 #endif
1124
1125 #ifdef CFG_RSA
1126 #if CFG_RSA_BITS != 64 && CFG_RSA_BITS != 32
1127 #error "CFG_RSA_BITS must be equal to either 32 or 64."
1128 #endif
1129 #endif
1130
1131 #endif
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