New LCD drivers
[hackover2013-badge-firmware.git] / projectconfig.h
1 /**************************************************************************/
2 /*!
3 @file projectconfig.h
4 @author K. Townsend (microBuilder.eu)
5
6 @section LICENSE
7
8 Software License Agreement (BSD License)
9
10 Copyright (c) 2010, microBuilder SARL
11 All rights reserved.
12
13 Redistribution and use in source and binary forms, with or without
14 modification, are permitted provided that the following conditions are met:
15 1. Redistributions of source code must retain the above copyright
16 notice, this list of conditions and the following disclaimer.
17 2. Redistributions in binary form must reproduce the above copyright
18 notice, this list of conditions and the following disclaimer in the
19 documentation and/or other materials provided with the distribution.
20 3. Neither the name of the copyright holders nor the
21 names of its contributors may be used to endorse or promote products
22 derived from this software without specific prior written permission.
23
24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY
25 EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
26 WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY
28 DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
29 (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
30 LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
31 ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32 (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
33 SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 */
35 /**************************************************************************/
36
37 #ifndef _PROJECTCONFIG_H_
38 #define _PROJECTCONFIG_H_
39
40 #include "lpc134x.h"
41 #include "sysdefs.h"
42
43 /*=========================================================================
44 BOARD SELECTION
45
46 Because several boards use this code library with sometimes slightly
47 different pin configuration, you will need to specify which board you
48 are using by enabling one of the following definitions. The code base
49 will then try to configure itself accordingly for that board.
50
51 CFG_BRD_LPC1343_REFDESIGN
52 =========================
53
54 microBuilder.eu LPC1343 Reference Design base board with
55 on-board peripherals initialised (EEPROM, USB or UART CLI, etc.)
56
57 This is the recommended starting point for new development
58 since it makes it easy to send printf output to USB CDC, access
59 the on-board EEPROM, etc.
60
61 CFG_BRD_LPC1343_REFDESIGN_MINIMAL
62 =================================
63
64 microBuilder.eu LPC1343 Reference Design base board with
65 only the most common peripherals initialised by default.
66
67 Results in smallest code since EEPROM, USB, etc., are not
68 initialised on startup. By default, only the following
69 peripherals are initialised by systemInit():
70
71 - CPU (Configures the PLL, etc.)
72 - GPIO
73 - SysTick Timer
74 - UART (with printf support) *
75
76 * Can be removed to save 0.8kb in debug and 0.3 kb in
77 release. Comment out 'CFG_PRINTF_UART' to disable it.
78
79 The code size can be further reduced by several KB by removing
80 any IRQ Handlers that are not used. The I2C IRQHandler, for
81 example, uses ~1KB of flash in debug and ~400KB in release mode,
82 but because it is referenced in the startup code it is always
83 included even if I2C is never used in the project.
84
85 Other IRQ Handlers that you might be able to comment out
86 to save some space are:
87
88 IRQ Handler Debug Release
89 ------------------------- ------ -------
90 I2C_IRQHandler 1160 b 400 b
91 SSP_IRQHandler 160 b 76 b
92 UART_IRQHandler 246 b 116 b
93 WAKEUP_IRQHandler 160 b 100 b
94 WDT_IRQHandler 50 b 28 b
95
96 CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
97 ====================================
98
99 microBuilder.eu/Adafruit Stand-Alone "Smart LCD" with USB enabled
100 for the CLI interface.
101
102 CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
103 =====================================
104
105 microBuilder.eu/Adafruit Stand-Alone "Smart LCD" with UART enabled
106 for the CLI interface.
107
108 CFG_BRD_LPC1343_802154USBSTICK
109 ==============================
110
111 microBuilder.eu USB stick 802.15.4 868/915MHz RF transceiver
112
113 -----------------------------------------------------------------------*/
114 #define CFG_BRD_LPC1343_REFDESIGN
115 // #define CFG_BRD_LPC1343_REFDESIGN_MINIMAL
116 // #define CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
117 // #define CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
118 // #define CFG_BRD_LPC1343_802154USBSTICK
119 /*=========================================================================*/
120
121
122 /**************************************************************************
123 PIN USAGE
124 -----------------------------------------------------------------------
125 This table tries to give an indication of which GPIO pins and
126 peripherals are used by the available drivers and SW examples. Only
127 dedicated GPIO pins available on the LPC1343 Reference Board are shown
128 below. Any unused peripheral blocks like I2C, SSP, ADC, etc., can
129 also be used as GPIO if they are available.
130
131 PORT 1 PORT 2 PORT 3
132 ========= ================= =======
133 8 9 10 11 1 2 3 4 5 6 7 8 9 0 1 2 3
134
135 SDCARD . . . . . . . . . . . . . X . . .
136 PWM . X . . . . . . . . . . . . . . .
137 STEPPER . . . . . . . . . . . . . X X X X
138 CHIBI X X X . . . . . . . . . . . . . .
139 ILI9325/8 X X X X X X X X X X X X X . . . X
140 ST7565 X X X X X X X X X X X X X . . . X
141 ST7735 . . . . X X X X X X . . . . . . .
142 SHARPMEM . . . . X X X X . . . . . . . . .
143 SSD1306 . . . . X X X . X X . . . . . . .
144 SSD1351 . . . . X X X X X . . . . . . . .
145 MCP121 . . . . . . . . . . . . . . X . .
146
147 TIMERS SSP ADC UART
148 ====================== === ======= ====
149 16B0 16B1 32B0 32B1 0 0 1 2 3 0
150
151 SDCARD . . . . X . . . . .
152 PWM . X . . . . . . . .
153 PMU [1] . . X . . . . . . .
154 USB . . . X . . . . . .
155 STEPPER . . X . . . . . . .
156 CHIBI x . . . X . . . . .
157 ILI9325/8 . . . . . X X X X .
158 ST7565 . . . . . X X X X .
159 ST7535 . . . . . . . . . .
160 SHARPMEM . . . . . . . . . .
161 SSD1306 . . . . . . . . . .
162 INTERFACE . . . . . . . . . X[2]
163
164 [1] PMU uses 32-bit Timer 0 for SW wakeup from deep-sleep. This timer
165 can safely be used by other peripherals, but may need to be
166 reconfigured when you wakeup from deep-sleep.
167 [2] INTERFACE can be configured to use either USBCDC or UART
168
169 **************************************************************************/
170
171
172 /**************************************************************************
173 I2C Addresses
174 -----------------------------------------------------------------------
175 The following addresses are used by the different I2C sensors included
176 in the code base [1]
177
178 HEX BINARY
179 ==== ========
180 ISL12022M (RTC) 0xDE 1101111x
181 ISL12022M (SRAM) 0xAE 1010111x
182 LM75B 0x90 1001000x
183 MCP24AA 0xA0 1010000x
184 MCP4725 0xC0 1100000x
185 TSL2561 0x72 0111001x
186 TCS3414 0x72 0111001x
187
188 [1] Alternative addresses may exists, but the addresses listed in this
189 table are the values used in the code base
190
191 **************************************************************************/
192
193
194 /*=========================================================================
195 FIRMWARE VERSION SETTINGS
196 -----------------------------------------------------------------------*/
197 #define CFG_FIRMWARE_VERSION_MAJOR (0)
198 #define CFG_FIRMWARE_VERSION_MINOR (9)
199 #define CFG_FIRMWARE_VERSION_REVISION (8)
200 /*=========================================================================*/
201
202
203 /*=========================================================================
204 CORE CPU SETTINGS
205 -----------------------------------------------------------------------
206
207 CFG_CPU_CCLK Value is for reference only. 'core/cpu/cpu.c' must
208 be modified to change the clock speed, but the value
209 should be indicated here since CFG_CPU_CCLK is used by
210 other peripherals to determine timing.
211
212 -----------------------------------------------------------------------*/
213 #define CFG_CPU_CCLK (72000000) // 1 tick = 13.88nS
214 /*=========================================================================*/
215
216
217 /*=========================================================================
218 SYSTICK TIMER
219 -----------------------------------------------------------------------
220
221 CFG_SYSTICK_DELAY_IN_MS The number of milliseconds between each tick
222 of the systick timer.
223
224 -----------------------------------------------------------------------*/
225 #define CFG_SYSTICK_DELAY_IN_MS (1)
226 /*=========================================================================*/
227
228
229 /*=========================================================================
230 ALTERNATE RESET PIN
231 -----------------------------------------------------------------------
232
233 CFG_ALTRESET If defined, indicates that a GPIO pin should be
234 configured as an alternate reset pin in addition
235 to the dedicated reset pin.
236 CFG_ALTRESET_PORT The GPIO port where the alt reset pin is located
237 CFG_ALTRESET_PIN The GPIO pin where the alt reset pin is located
238
239 -----------------------------------------------------------------------*/
240 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
241 #define CFG_ALTRESET
242 #define CFG_ALTRESET_PORT (1)
243 #define CFG_ALTRESET_PIN (5) // P1.5 = RTS
244 #endif
245 /*=========================================================================*/
246
247
248 /*=========================================================================
249 UART
250 -----------------------------------------------------------------------
251
252 CFG_UART_BAUDRATE The default UART speed. This value is used
253 when initialising UART, and should be a
254 standard value like 57600, 9600, etc.
255 NOTE: This value may be overridden if
256 another value is stored in EEPROM!
257 CFG_UART_BUFSIZE The length in bytes of the UART RX FIFO. This
258 will determine the maximum number of received
259 characters to store in memory.
260
261 -----------------------------------------------------------------------*/
262 #ifdef CFG_BRD_LPC1343_REFDESIGN
263 #define CFG_UART_BAUDRATE (115200)
264 #define CFG_UART_BUFSIZE (512)
265 #endif
266
267 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
268 #define CFG_UART_BAUDRATE (115200)
269 #define CFG_UART_BUFSIZE (512)
270 #endif
271
272 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
273 #define CFG_UART_BAUDRATE (115200)
274 #define CFG_UART_BUFSIZE (512)
275 #endif
276
277 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
278 #define CFG_UART_BAUDRATE (57600)
279 #define CFG_UART_BUFSIZE (512)
280 #endif
281
282 #ifdef CFG_BRD_LPC1343_802154USBSTICK
283 #define CFG_UART_BAUDRATE (115200)
284 #define CFG_UART_BUFSIZE (512)
285 #endif
286 /*=========================================================================*/
287
288
289 /*=========================================================================
290 SSP
291 -----------------------------------------------------------------------
292
293 CFG_SSP0_SCKPIN_2_11 Indicates which pin should be used for SCK0
294 CFG_SSP0_SCKPIN_0_6
295
296 -----------------------------------------------------------------------*/
297 #ifdef CFG_BRD_LPC1343_REFDESIGN
298 #define CFG_SSP0_SCKPIN_2_11
299 // #define CFG_SSP0_SCKPIN_0_6
300 #endif
301
302 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
303 #define CFG_SSP0_SCKPIN_2_11
304 // #define CFG_SSP0_SCKPIN_0_6
305 #endif
306
307 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
308 #define CFG_SSP0_SCKPIN_2_11
309 // #define CFG_SSP0_SCKPIN_0_6
310 #endif
311
312 #ifdef CFG_BRD_LPC1343_802154USBSTICK
313 // #define CFG_SSP0_SCKPIN_2_11
314 #define CFG_SSP0_SCKPIN_0_6
315 #endif
316 /*=========================================================================*/
317
318
319 /*=========================================================================
320 ON-BOARD LED
321 -----------------------------------------------------------------------
322
323 CFG_LED_PORT The port for the on board LED
324 CFG_LED_PIN The pin for the on board LED
325 CFG_LED_ON The pin state to turn the LED on (0 = low, 1 = high)
326 CFG_LED_OFF The pin state to turn the LED off (0 = low, 1 = high)
327
328 -----------------------------------------------------------------------*/
329 #ifdef CFG_BRD_LPC1343_REFDESIGN
330 #define CFG_LED_PORT (2)
331 #define CFG_LED_PIN (10)
332 #define CFG_LED_ON (0)
333 #define CFG_LED_OFF (1)
334 #endif
335
336 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
337 #define CFG_LED_PORT (2)
338 #define CFG_LED_PIN (10)
339 #define CFG_LED_ON (0)
340 #define CFG_LED_OFF (1)
341 #endif
342
343 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
344 #define CFG_LED_PORT (2)
345 #define CFG_LED_PIN (10)
346 #define CFG_LED_ON (0)
347 #define CFG_LED_OFF (1)
348 #endif
349
350 #ifdef CFG_BRD_LPC1343_802154USBSTICK
351 #define CFG_LED_PORT (3)
352 #define CFG_LED_PIN (2)
353 #define CFG_LED_ON (0)
354 #define CFG_LED_OFF (1)
355 #endif
356 /*=========================================================================*/
357
358
359 /*=========================================================================
360 MICRO-SD CARD
361 -----------------------------------------------------------------------
362
363 CFG_SDCARD If this field is defined SD Card and FAT32
364 file system support will be included
365 CFG_SDCARD_READONLY If this is set to 1, all commands to
366 write to the SD card will be removed
367 saving some flash space.
368 CFG_SDCARD_CDPORT The card detect port number
369 CFG_SDCARD_CDPIN The card detect pin number
370
371 NOTE: All config settings for FAT32 are defined
372 in ffconf.h
373
374 BENCHMARK: With SPI set to 6.0MHz, FATFS can read
375 ~300KB/s (w/512 byte read buffer)
376
377 PIN LAYOUT: The pin layout that is used by this driver
378 can be seen in the following schematic:
379 /tools/schematics/Breakout_TFTLCD_ILI9325_v1.3
380
381 DEPENDENCIES: SDCARD requires the use of SSP0.
382 -----------------------------------------------------------------------*/
383 #ifdef CFG_BRD_LPC1343_REFDESIGN
384 // #define CFG_SDCARD
385 #define CFG_SDCARD_READONLY (1) // Must be 0 or 1
386 #define CFG_SDCARD_CDPORT (3)
387 #define CFG_SDCARD_CDPIN (0)
388 #endif
389
390 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
391 // #define CFG_SDCARD
392 #define CFG_SDCARD_READONLY (1) // Must be 0 or 1
393 #define CFG_SDCARD_CDPORT (3)
394 #define CFG_SDCARD_CDPIN (0)
395 #endif
396
397 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
398 #define CFG_SDCARD
399 #define CFG_SDCARD_READONLY (1) // Must be 0 or 1
400 #define CFG_SDCARD_CDPORT (3)
401 #define CFG_SDCARD_CDPIN (0)
402 #endif
403
404 #ifdef CFG_BRD_LPC1343_802154USBSTICK
405 // #define CFG_SDCARD
406 #define CFG_SDCARD_READONLY (1) // Must be 0 or 1
407 #define CFG_SDCARD_CDPORT (3)
408 #define CFG_SDCARD_CDPIN (0)
409 #endif
410 /*=========================================================================*/
411
412
413 /*=========================================================================
414 USB
415 -----------------------------------------------------------------------
416
417 CFG_USBHID If this field is defined USB HID support will
418 be included. Currently uses ROM-based USB HID
419 CFG_USBCDC If this field is defined USB CDC support will
420 be included, with the USB Serial Port speed
421 set to 115200 BPS by default
422 CFG_USBCDC_BAUDRATE The default TX/RX speed. This value is used
423 when initialising USBCDC, and should be a
424 standard value like 57600, 9600, etc.
425 CFG_USBCDC_INITTIMEOUT The maximum delay in milliseconds to wait for
426 USB to connect. Must be a multiple of 10!
427 CFG_USBCDC_BUFFERSIZE Size of the buffer (in bytes) that stores
428 printf data until it can be sent out in
429 64 byte frames. The buffer is required since
430 only one frame per ms can be sent using USB
431 CDC (see 'puts' in systeminit.c).
432
433 -----------------------------------------------------------------------*/
434 #define CFG_USB_VID (0x239A)
435 #define CFG_USB_PID (0x1002)
436
437 #ifdef CFG_BRD_LPC1343_REFDESIGN
438 // #define CFG_USBHID
439 #define CFG_USBCDC
440 #define CFG_USBCDC_BAUDRATE (115200)
441 #define CFG_USBCDC_INITTIMEOUT (5000)
442 #define CFG_USBCDC_BUFFERSIZE (256)
443 #endif
444
445 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
446 // #define CFG_USBHID
447 // #define CFG_USBCDC
448 #define CFG_USBCDC_BAUDRATE (115200)
449 #define CFG_USBCDC_INITTIMEOUT (5000)
450 #define CFG_USBCDC_BUFFERSIZE (256)
451 #endif
452
453 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
454 // #define CFG_USBHID
455 #define CFG_USBCDC
456 #define CFG_USBCDC_BAUDRATE (115200)
457 #define CFG_USBCDC_INITTIMEOUT (5000)
458 #define CFG_USBCDC_BUFFERSIZE (256)
459 #endif
460
461 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
462 // #define CFG_USBHID
463 // #define CFG_USBCDC
464 #define CFG_USBCDC_BAUDRATE (57600)
465 #define CFG_USBCDC_INITTIMEOUT (5000)
466 #define CFG_USBCDC_BUFFERSIZE (256)
467 #endif
468
469 #ifdef CFG_BRD_LPC1343_802154USBSTICK
470 // #define CFG_USBHID
471 #define CFG_USBCDC
472 #define CFG_USBCDC_BAUDRATE (115200)
473 #define CFG_USBCDC_INITTIMEOUT (5000)
474 #define CFG_USBCDC_BUFFERSIZE (256)
475 #endif
476 /*=========================================================================*/
477
478
479 /*=========================================================================
480 PRINTF REDIRECTION
481 -----------------------------------------------------------------------
482
483 CFG_PRINTF_UART Will cause all printf statements to be
484 redirected to UART
485 CFG_PRINTF_USBCDC Will cause all printf statements to be
486 redirect to USB Serial
487 CFG_PRINTF_NEWLINE This is typically "\r\n" for Windows or
488 "\n" for *nix
489
490 Note: If no printf redirection definitions are present, all printf
491 output will be ignored.
492 -----------------------------------------------------------------------*/
493 #ifdef CFG_BRD_LPC1343_REFDESIGN
494 // #define CFG_PRINTF_UART
495 #define CFG_PRINTF_USBCDC
496 #define CFG_PRINTF_NEWLINE "\r\n"
497 #endif
498
499 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
500 #define CFG_PRINTF_UART
501 // #define CFG_PRINTF_USBCDC
502 #define CFG_PRINTF_NEWLINE "\r\n"
503 #endif
504
505 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
506 // #define CFG_PRINTF_UART
507 #define CFG_PRINTF_USBCDC
508 #define CFG_PRINTF_NEWLINE "\r\n"
509 #endif
510
511 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
512 #define CFG_PRINTF_UART
513 // #define CFG_PRINTF_USBCDC
514 #define CFG_PRINTF_NEWLINE "\n"
515 #endif
516
517 #ifdef CFG_BRD_LPC1343_802154USBSTICK
518 // #define CFG_PRINTF_UART
519 #define CFG_PRINTF_USBCDC
520 #define CFG_PRINTF_NEWLINE "\r\n"
521 #endif
522 /*=========================================================================*/
523
524
525 /*=========================================================================
526 COMMAND LINE INTERFACE
527 -----------------------------------------------------------------------
528
529 CFG_INTERFACE If this field is defined the UART or USBCDC
530 based command-line interface will be included
531 CFG_INTERFACE_MAXMSGSIZE The maximum number of bytes to accept for an
532 incoming command
533 CFG_INTERFACE_PROMPT The command prompt to display at the start
534 of every new data entry line
535 CFG_INTERFACE_SILENTMODE If this is set to 1 only text generated in
536 response to commands will be send to the
537 output buffer. The command prompt will not
538 be displayed and incoming text will not be
539 echoed back to the output buffer (allowing
540 you to see the text you have input). This
541 is normally only desirable in a situation
542 where another MCU is communicating with
543 the LPC1343.
544 CFG_INTERFACE_DROPCR If this is set to 1 all incoming \r
545 characters will be dropped
546 CFG_INTERFACE_ENABLEIRQ If this is set to 1 the IRQ pin will be
547 set high when a command starts executing
548 and will go low when the command has
549 finished executing or the LCD is not busy.
550 This allows another device to know when a
551 new command can safely be sent.
552 CFG_INTERFACE_IRQPORT The gpio port for the IRQ/busy pin
553 CFG_INTERFACE_IRQPIN The gpio pin number for the IRQ/busy pin
554 CFG_INTERFACE_SHORTERRORS If this is enabled only short 1 character
555 error messages will be returned (followed
556 by CFG_PRINTF_NEWLINE), rather than more
557 verbose error messages. The specific
558 characters used are defined below.
559 CFG_INTERFACE_CONFIRMREADY If this is set to 1 a text confirmation
560 will be sent when the command prompt is
561 ready for a new command. This is in
562 addition to CFG_INTERFACE_ENABLEIRQ if
563 this is also enabled. The character used
564 is defined below.
565
566 NOTE: The command-line interface will use either
567 USB-CDC or UART depending on whether
568 CFG_PRINTF_UART or CFG_PRINTF_USBCDC are
569 selected.
570 -----------------------------------------------------------------------*/
571 #ifdef CFG_BRD_LPC1343_REFDESIGN
572 #define CFG_INTERFACE
573 #define CFG_INTERFACE_MAXMSGSIZE (256)
574 #define CFG_INTERFACE_PROMPT "LPC1343 >> "
575 #define CFG_INTERFACE_SILENTMODE (0)
576 #define CFG_INTERFACE_DROPCR (0)
577 #define CFG_INTERFACE_ENABLEIRQ (0)
578 #define CFG_INTERFACE_IRQPORT (0)
579 #define CFG_INTERFACE_IRQPIN (7)
580 #define CFG_INTERFACE_SHORTERRORS (0)
581 #define CFG_INTERFACE_CONFIRMREADY (0)
582 #endif
583
584 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
585 // #define CFG_INTERFACE
586 #define CFG_INTERFACE_MAXMSGSIZE (256)
587 #define CFG_INTERFACE_PROMPT "LPC1343 >> "
588 #define CFG_INTERFACE_SILENTMODE (0)
589 #define CFG_INTERFACE_DROPCR (0)
590 #define CFG_INTERFACE_ENABLEIRQ (0)
591 #define CFG_INTERFACE_IRQPORT (0)
592 #define CFG_INTERFACE_IRQPIN (7)
593 #define CFG_INTERFACE_SHORTERRORS (0)
594 #define CFG_INTERFACE_CONFIRMREADY (0)
595 #endif
596
597 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
598 #define CFG_INTERFACE
599 #define CFG_INTERFACE_MAXMSGSIZE (256)
600 #define CFG_INTERFACE_PROMPT "CMD >> "
601 #define CFG_INTERFACE_SILENTMODE (0)
602 #define CFG_INTERFACE_DROPCR (0)
603 #define CFG_INTERFACE_ENABLEIRQ (0)
604 #define CFG_INTERFACE_IRQPORT (0)
605 #define CFG_INTERFACE_IRQPIN (7)
606 #define CFG_INTERFACE_SHORTERRORS (0)
607 #define CFG_INTERFACE_CONFIRMREADY (0)
608 #define CFG_INTERFACE_SHORTERRORS_UNKNOWNCOMMAND "?"
609 #define CFG_INTERFACE_SHORTERRORS_TOOMANYARGS ">"
610 #define CFG_INTERFACE_SHORTERRORS_TOOFEWARGS "<"
611 #define CFG_INTERFACE_CONFIRMREADY_TEXT "."
612 #endif
613
614 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
615 #define CFG_INTERFACE
616 #define CFG_INTERFACE_MAXMSGSIZE (256)
617 #define CFG_INTERFACE_PROMPT ">>"
618 #define CFG_INTERFACE_SILENTMODE (1)
619 #define CFG_INTERFACE_DROPCR (1)
620 #define CFG_INTERFACE_ENABLEIRQ (1)
621 #define CFG_INTERFACE_IRQPORT (0)
622 #define CFG_INTERFACE_IRQPIN (7)
623 #define CFG_INTERFACE_SHORTERRORS (1)
624 #define CFG_INTERFACE_CONFIRMREADY (0)
625 #define CFG_INTERFACE_SHORTERRORS_UNKNOWNCOMMAND "?"
626 #define CFG_INTERFACE_SHORTERRORS_TOOMANYARGS ">"
627 #define CFG_INTERFACE_SHORTERRORS_TOOFEWARGS "<"
628 #define CFG_INTERFACE_CONFIRMREADY_TEXT "."
629 #endif
630
631 #ifdef CFG_BRD_LPC1343_802154USBSTICK
632 // #define CFG_INTERFACE
633 #define CFG_INTERFACE_MAXMSGSIZE (256)
634 #define CFG_INTERFACE_PROMPT "CMD >> "
635 #define CFG_INTERFACE_SILENTMODE (0)
636 #define CFG_INTERFACE_DROPCR (0)
637 #define CFG_INTERFACE_ENABLEIRQ (0)
638 #define CFG_INTERFACE_IRQPORT (0)
639 #define CFG_INTERFACE_IRQPIN (7)
640 #define CFG_INTERFACE_SHORTERRORS (0)
641 #define CFG_INTERFACE_CONFIRMREADY (0)
642 #endif
643 /*=========================================================================*/
644
645
646 /*=========================================================================
647 PWM SETTINGS
648 -----------------------------------------------------------------------
649
650 CFG_PWM If this is defined, a basic PWM driver
651 will be included using 16-bit Timer 1 and
652 Pin 1.9 (MAT0) for the PWM output. In
653 order to allow for a fixed number of
654 pulses to be generated, some PWM-specific
655 code is required in the 16-Bit Timer 1
656 ISR. See "core/timer16/timer16.c" for
657 more information.
658 CFG_PWM_DEFAULT_PULSEWIDTH The default pulse width in ticks
659 CFG_PWM_DEFAULT_DUTYCYCLE The default duty cycle in percent
660
661 DEPENDENCIES: PWM output requires the use of 16-bit
662 timer 1 and pin 1.9 (CT16B1_MAT0).
663 -----------------------------------------------------------------------*/
664 // #define CFG_PWM
665 #define CFG_PWM_DEFAULT_PULSEWIDTH (CFG_CPU_CCLK / 1000)
666 #define CFG_PWM_DEFAULT_DUTYCYCLE (50)
667 /*=========================================================================*/
668
669
670 /*=========================================================================
671 STEPPER MOTOR SETTINGS
672 -----------------------------------------------------------------------
673
674 CFG_STEPPER If this is defined, a simple bi-polar
675 stepper motor will be included for common
676 H-bridge chips like the L293D or SN754410N
677
678 DEPENDENCIES: STEPPER requires the use of pins 3.0-3 and
679 32-bit Timer 0.
680 -----------------------------------------------------------------------*/
681 // #define CFG_STEPPER
682 /*=========================================================================*/
683
684
685 /*=========================================================================
686 EEPROM
687 -----------------------------------------------------------------------
688
689 CFG_I2CEEPROM If defined, drivers for the onboard EEPROM
690 will be included during build
691 CFG_I2CEEPROM_SIZE The number of bytes available on the EEPROM
692
693 -----------------------------------------------------------------------*/
694 #ifdef CFG_BRD_LPC1343_REFDESIGN
695 #define CFG_I2CEEPROM
696 #define CFG_I2CEEPROM_SIZE (3072)
697 #endif
698
699 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
700 // #define CFG_I2CEEPROM
701 #define CFG_I2CEEPROM_SIZE (3072)
702 #endif
703
704 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
705 #define CFG_I2CEEPROM
706 #define CFG_I2CEEPROM_SIZE (3072)
707 #endif
708
709 #ifdef CFG_BRD_LPC1343_802154USBSTICK
710 #define CFG_I2CEEPROM
711 #define CFG_I2CEEPROM_SIZE (3072)
712 #endif
713 /*=========================================================================*/
714
715
716 /*=========================================================================
717 EEPROM MEMORY MAP
718 -----------------------------------------------------------------------
719 EEPROM is used to persist certain user modifiable values to make
720 sure that these changes remain in effect after a reset or hard
721 power-down. The addresses in EEPROM for these various system
722 settings/values are defined below. The first 256 bytes of EEPROM
723 are reserved for this (0x0000..0x00FF).
724
725 CFG_EEPROM_RESERVED The last byte of reserved EEPROM memory
726
727 EEPROM Address (0x0000..0x00FF)
728 ===============================
729 0 1 2 3 4 5 6 7 8 9 A B C D E F
730 000x x x x x x x x x . x x . . . . . Chibi
731 001x . . . . . . . . . . . . . . . .
732 002x x x x x . . . . . . . . . . . . UART
733 003x x x x x x x x x x x x x x x x x Touch Screen Calibration
734 004x x x x x x x x x x x x x x x . . Touch Screen Calibration
735 005x . . . . . . . . . . . . . . . .
736 006x . . . . . . . . . . . . . . . .
737 007x . . . . . . . . . . . . . . . .
738 008x . . . . . . . . . . . . . . . .
739 009x . . . . . . . . . . . . . . . .
740 00Ax . . . . . . . . . . . . . . . .
741 00Bx . . . . . . . . . . . . . . . .
742 00Cx . . . . . . . . . . . . . . . .
743 00Dx . . . . . . . . . . . . . . . .
744 00Ex . . . . . . . . . . . . . . . .
745 00Fx . . . . . . . . . . . . . . . .
746
747 -----------------------------------------------------------------------*/
748 #define CFG_EEPROM_RESERVED (0x00FF) // Protect first 256 bytes of memory
749 #define CFG_EEPROM_CHIBI_IEEEADDR (uint16_t)(0x0000) // 8
750 #define CFG_EEPROM_CHIBI_SHORTADDR (uint16_t)(0x0009) // 2
751 #define CFG_EEPROM_UART_SPEED (uint16_t)(0x0020) // 4
752 #define CFG_EEPROM_TOUCHSCREEN_CALIBRATED (uint16_t)(0x0030) // 1
753 #define CFG_EEPROM_TOUCHSCREEN_CAL_AN (uint16_t)(0x0031) // 4
754 #define CFG_EEPROM_TOUCHSCREEN_CAL_BN (uint16_t)(0x0035) // 4
755 #define CFG_EEPROM_TOUCHSCREEN_CAL_CN (uint16_t)(0x0039) // 4
756 #define CFG_EEPROM_TOUCHSCREEN_CAL_DN (uint16_t)(0x003D) // 4
757 #define CFG_EEPROM_TOUCHSCREEN_CAL_EN (uint16_t)(0x0041) // 4
758 #define CFG_EEPROM_TOUCHSCREEN_CAL_FN (uint16_t)(0x0045) // 4
759 #define CFG_EEPROM_TOUCHSCREEN_CAL_DIVIDER (uint16_t)(0x0049) // 4
760 #define CFG_EEPROM_TOUCHSCREEN_THRESHHOLD (uint16_t)(0x004D) // 1
761 /*=========================================================================*/
762
763
764 /*=========================================================================
765 LM75B TEMPERATURE SENSOR
766 -----------------------------------------------------------------------
767
768 CFG_LM75B If defined, drivers for an optional LM75B
769 temperature sensor will be included during
770 build (requires external HW)
771
772 -----------------------------------------------------------------------*/
773 // #define CFG_LM75B
774 /*=========================================================================*/
775
776
777 /*=========================================================================
778 CHIBI WIRELESS STACK
779 -----------------------------------------------------------------------
780
781 CFG_CHIBI If defined, the CHIBI wireless stack will be
782 included during build. Requires external HW.
783 CFG_CHIBI_MODE The mode to use when receiving and transmitting
784 wireless data. See chb_drvr.h for possible values
785 CFG_CHIBI_POWER The power level to use when transmitting. See
786 chb_drvr.h for possible values
787 CFG_CHIBI_CHANNEL 802.15.4 Channel (0 = 868MHz, 1-10 = 915MHz)
788 CFG_CHIBI_PANID 16-bit PAN Identifier (ex.0x1234)
789 CFG_CHIBI_PROMISCUOUS Set to 1 to enabled promiscuous mode or
790 0 to disable it. If promiscuous mode is
791 enabled be sure to set CFG_CHIBI_BUFFERSIZE
792 to an appropriately large value (ex. 1024)
793 CFG_CHIBI_BUFFERSIZE The size of the message buffer in bytes
794
795 DEPENDENCIES: Chibi requires the use of SSP0, 16-bit timer
796 0 and pins 3.1, 3.2, 3.3. It also requires
797 the presence of CFG_I2CEEPROM.
798
799 NOTE: These settings are not relevant to all boards!
800 'tools/schematics/AT86RF212LPC1114_v1.6.pdf'
801 show how 'CHIBI' is meant to be connected
802 -----------------------------------------------------------------------*/
803 #ifdef CFG_BRD_LPC1343_REFDESIGN
804 // #define CFG_CHIBI
805 #define CFG_CHIBI_MODE (0) // OQPSK_868MHZ
806 #define CFG_CHIBI_POWER (0xE9) // CHB_PWR_EU2_3DBM
807 #define CFG_CHIBI_CHANNEL (0) // 868-868.6 MHz
808 #define CFG_CHIBI_PANID (0x1234)
809 #define CFG_CHIBI_PROMISCUOUS (0)
810 #define CFG_CHIBI_BUFFERSIZE (128)
811 #endif
812
813 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
814 // #define CFG_CHIBI
815 #define CFG_CHIBI_MODE (0) // OQPSK_868MHZ
816 #define CFG_CHIBI_POWER (0xE9) // CHB_PWR_EU2_3DBM
817 #define CFG_CHIBI_CHANNEL (0) // 868-868.6 MHz
818 #define CFG_CHIBI_PANID (0x1234)
819 #define CFG_CHIBI_PROMISCUOUS (0)
820 #define CFG_CHIBI_BUFFERSIZE (128)
821 #endif
822
823 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
824 // #define CFG_CHIBI
825 #define CFG_CHIBI_MODE (0) // OQPSK_868MHZ
826 #define CFG_CHIBI_POWER (0xE9) // CHB_PWR_EU2_3DBM
827 #define CFG_CHIBI_CHANNEL (0) // 868-868.6 MHz
828 #define CFG_CHIBI_PANID (0x1234)
829 #define CFG_CHIBI_PROMISCUOUS (0)
830 #define CFG_CHIBI_BUFFERSIZE (128)
831 #endif
832
833 #ifdef CFG_BRD_LPC1343_802154USBSTICK
834 #define CFG_CHIBI
835 #define CFG_CHIBI_MODE (0) // OQPSK_868MHZ
836 #define CFG_CHIBI_POWER (0xE9) // CHB_PWR_EU2_3DBM
837 #define CFG_CHIBI_CHANNEL (0) // 868-868.6 MHz
838 #define CFG_CHIBI_PANID (0x1234)
839 #define CFG_CHIBI_PROMISCUOUS (0)
840 #define CFG_CHIBI_BUFFERSIZE (1024)
841 #endif
842 /*=========================================================================*/
843
844
845 /*=========================================================================
846 TFT LCD
847 -----------------------------------------------------------------------
848
849 CFG_TFTLCD If defined, this will cause drivers for
850 a pre-determined LCD screen to be included
851 during build. Only one LCD driver can be
852 included during the build process (for ex.
853 'drivers/lcd/hw/ILI9325.c')
854 CFG_TFTLCD_INCLUDESMALLFONTS If set to 1, smallfont support will be
855 included for 3x6, 5x8, 7x8 and 8x8 fonts.
856 This should only be enabled if these small
857 fonts are required since there is already
858 support for larger fonts generated with
859 Dot Factory
860 http://www.pavius.net/downloads/tools/53-the-dot-factory
861 CFG_TFTLCD_TS_DEFAULTTHRESHOLD Default minimum threshold to trigger a
862 touch event with the touch screen (and exit
863 from 'tsWaitForEvent' in touchscreen.c).
864 Should be an 8-bit value somewhere between
865 8 and 75 in normal circumstances. This is
866 the default value and may be overriden by
867 a value stored in EEPROM.
868 CFG_TFTLCD_TS_KEYPADDELAY The delay in milliseconds between key
869 presses in dialogue boxes
870
871 PIN LAYOUT: The pin layout that is used by this driver
872 can be seen in the following schematic:
873 /tools/schematics/Breakout_TFTLCD_ILI9325_v1.3
874
875 DEPENDENCIES: TFTLCD requires the use of pins 1.8, 1.9,
876 1.10, 1.11, 3.3 and 2.1-9.
877 -----------------------------------------------------------------------*/
878 #ifdef CFG_BRD_LPC1343_REFDESIGN
879 // #define CFG_TFTLCD
880 #define CFG_TFTLCD_INCLUDESMALLFONTS (0)
881 #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
882 #define CFG_TFTLCD_TS_KEYPADDELAY (100)
883 #endif
884
885 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
886 // #define CFG_TFTLCD
887 #define CFG_TFTLCD_INCLUDESMALLFONTS (0)
888 #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
889 #define CFG_TFTLCD_TS_KEYPADDELAY (100)
890 #endif
891
892 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
893 #define CFG_TFTLCD
894 #define CFG_TFTLCD_INCLUDESMALLFONTS (0)
895 #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
896 #define CFG_TFTLCD_TS_KEYPADDELAY (100)
897 #endif
898
899 #ifdef CFG_BRD_LPC1343_802154USBSTICK
900 // #define CFG_TFTLCD
901 #define CFG_TFTLCD_INCLUDESMALLFONTS (0)
902 #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
903 #define CFG_TFTLCD_TS_KEYPADDELAY (100)
904 #endif
905 /*=========================================================================*/
906
907
908 /*=========================================================================
909 Monochrome/Bitmap Graphic LCDs
910 -----------------------------------------------------------------------
911
912 CFG_ST7565 If defined, this will cause drivers for
913 the 128x64 pixel ST7565 LCD to be included
914 CFG_SSD1306 If defined, this will cause drivers for
915 the 128x64 pixel SSD1306 OLED display to be
916 included
917 CFG_SHARPMEM If defined, this will cause drivers for
918 Sharp Memory Displays to be included
919
920 DEPENDENCIES: ST7565 requires the use of pins 2.1-6.
921 DEPENDENCIES: SSD1306 requires the use of pins 2.1-6.
922 DEPENDENCIES: SHARPMEM requires the use of pins 2.1-4.
923 -----------------------------------------------------------------------*/
924 // #define CFG_ST7565
925 // #define CFG_SSD1306
926 // #define CFG_SHARPMEM
927 /*=========================================================================*/
928
929
930 /*=========================================================================
931 RSA Encryption
932 -----------------------------------------------------------------------
933
934 CFG_RSA If defined, support for basic RSA
935 encryption will be included.
936 CFG_RSA_BITS Indicates the number of bits used for
937 RSA encryption keys. To keep code size
938 reasonable, RSA encryption is currently
939 limited to using 64-bit or 32-bit numbers,
940 with 64-bit providing higher security, and
941 32-bit providing smaller encrypted text
942 size.
943
944 NOTE: Please note that Printf can not be
945 used to display 64-bit values (%lld)!
946 -----------------------------------------------------------------------*/
947 // #define CFG_RSA
948 #define CFG_RSA_BITS (32)
949 /*=========================================================================*/
950
951
952
953
954 /*=========================================================================
955 CONFIG FILE VALIDATION
956 -------------------------------------------------------------------------
957 Basic error checking to make sure that incompatible defines are not
958 enabled at the same time, etc.
959
960 =========================================================================*/
961
962 #if !defined CFG_BRD_LPC1343_REFDESIGN && !defined CFG_BRD_LPC1343_REFDESIGN_MINIMAL && !defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB && !defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART && !defined CFG_BRD_LPC1343_802154USBSTICK
963 #error "You must defined a target board (CFG_BRD_LPC1343_REFDESIGN or CFG_BRD_LPC1343_REFDESIGN_MINIMAL or CFG_BRD_LPC1343_TFTLCDSTANDALONE or CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART or CFG_BRD_LPC1343_802154USBSTICK)"
964 #endif
965
966 #if defined CFG_PRINTF_USBCDC && defined CFG_PRINTF_UART
967 #error "CFG_PRINTF_UART or CFG_PRINTF_USBCDC cannot both be defined at once"
968 #endif
969
970 #if defined CFG_PRINTF_USBCDC && !defined CFG_USBCDC
971 #error "CFG_PRINTF_CDC requires CFG_USBCDC to be defined as well"
972 #endif
973
974 #if defined CFG_USBCDC && defined CFG_USBHID
975 #error "Only one USB class can be defined at a time (CFG_USBCDC or CFG_USBHID)"
976 #endif
977
978 #if defined CFG_SSP0_SCKPIN_2_11 && defined CFG_SSP0_SCKPIN_0_6
979 #error "Only one SCK pin can be defined at a time for SSP0"
980 #endif
981
982 #if !defined CFG_SSP0_SCKPIN_2_11 && !defined CFG_SSP0_SCKPIN_0_6
983 #error "An SCK pin must be selected for SSP0 (CFG_SSP0_SCKPIN_2_11 or CFG_SSP0_SCKPIN_0_6)"
984 #endif
985
986 #ifdef CFG_INTERFACE
987 #if !defined CFG_PRINTF_UART && !defined CFG_PRINTF_USBCDC
988 #error "CFG_PRINTF_UART or CFG_PRINTF_USBCDC must be defined for for CFG_INTERFACE Input/Output"
989 #endif
990 #if defined CFG_PRINTF_USBCDC && CFG_INTERFACE_SILENTMODE == 1
991 #error "CFG_INTERFACE_SILENTMODE typically isn't enabled with CFG_PRINTF_USBCDC"
992 #endif
993 #endif
994
995 #ifdef CFG_CHIBI
996 #if !defined CFG_I2CEEPROM
997 #error "CFG_CHIBI requires CFG_I2CEEPROM to store and retrieve addresses"
998 #endif
999 #ifdef CFG_SDCARD
1000 #error "CFG_CHIBI and CFG_SDCARD can not be defined at the same time. Only one SPI block is available on the LPC1343."
1001 #endif
1002 #ifdef CFG_TFTLCD
1003 #error "CFG_CHIBI and CFG_TFTLCD can not be defined at the same time since they both use pins 1.8, 1.9 and 1.10."
1004 #endif
1005 #ifdef CFG_PWM
1006 #error "CFG_CHIBI and CFG_PWM can not be defined at the same time since they both use pin 1.9."
1007 #endif
1008 #if CFG_CHIBI_PROMISCUOUS != 0 && CFG_CHIBI_PROMISCUOUS != 1
1009 #error "CFG_CHIBI_PROMISCUOUS must be equal to either 1 or 0"
1010 #endif
1011 #endif
1012
1013 #ifdef CFG_TFTLCD
1014 #ifdef CFG_ST7565
1015 #error "CFG_TFTLCD and CFG_ST7565 can not be defined at the same time."
1016 #endif
1017 #ifdef CFG_SSD1306
1018 #error "CFG_TFTLCD and CFG_SSD1306 can not be defined at the same time."
1019 #endif
1020 #ifdef CFG_PWM
1021 #error "CFG_TFTLCD and CFG_PWM can not be defined at the same time since they both use pin 1.9."
1022 #endif
1023 #if !defined CFG_I2CEEPROM
1024 #error "CFG_TFTLCD requires CFG_I2CEEPROM to store and retrieve configuration settings"
1025 #endif
1026 #endif
1027
1028 #ifdef CFG_SDCARD
1029 #ifdef CFG_STEPPER
1030 #error "CFG_SDCARD and CFG_STEPPER can not be defined at the same time since they both use pin 3.0."
1031 #endif
1032 #endif
1033
1034 #ifdef CFG_ST7565
1035 #ifdef CFG_SSD1306
1036 #error "CFG_ST7565 and CFG_SSD1306 can not be defined at the same time"
1037 #endif
1038 #endif
1039
1040 #ifdef CFG_RSA
1041 #if CFG_RSA_BITS != 64 && CFG_RSA_BITS != 32
1042 #error "CFG_RSA_BITS must be equal to either 32 or 64."
1043 #endif
1044 #endif
1045
1046 #endif
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