1 /**************************************************************************/
4 @author K. Townsend (microBuilder.eu)
8 Software License Agreement (BSD License)
10 Copyright (c) 2010, microBuilder SARL
13 Redistribution and use in source and binary forms, with or without
14 modification, are permitted provided that the following conditions are met:
15 1. Redistributions of source code must retain the above copyright
16 notice, this list of conditions and the following disclaimer.
17 2. Redistributions in binary form must reproduce the above copyright
18 notice, this list of conditions and the following disclaimer in the
19 documentation and/or other materials provided with the distribution.
20 3. Neither the name of the copyright holders nor the
21 names of its contributors may be used to endorse or promote products
22 derived from this software without specific prior written permission.
24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY
25 EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
26 WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY
28 DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
29 (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
30 LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
31 ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32 (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
33 SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 /**************************************************************************/
37 #ifndef _PROJECTCONFIG_H_
38 #define _PROJECTCONFIG_H_
43 /*=========================================================================
46 Because several boards use this code library with sometimes slightly
47 different pin configuration, you will need to specify which board you
48 are using by enabling one of the following definitions. The code base
49 will then try to configure itself accordingly for that board.
50 -----------------------------------------------------------------------*/
51 #define CFG_BRD_LPC1343_REFDESIGN
52 // #define CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
53 // #define CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
54 // #define CFG_BRD_LPC1343_802154USBSTICK
55 /*=========================================================================*/
58 /**************************************************************************
60 -----------------------------------------------------------------------
61 This table tries to give an indication of which GPIO pins and
62 peripherals are used by the available drivers and SW examples. Only
63 dedicated GPIO pins available on the LPC1343 Reference Board are shown
64 below. Any unused peripheral blocks like I2C, SSP, ADC, etc., can
65 also be used as GPIO if they are available.
68 ========= ================= =======
69 8 9 10 11 1 2 3 4 5 6 7 8 9 0 1 2 3
71 SDCARD . . . . . . . . . . . . . X . . .
72 PWM . X . . . . . . . . . . . . . . .
73 STEPPER . . . . . . . . . . . . . X X X X
74 CHIBI X X X . . . . . . . . . . . . . .
75 ILI9325/8 X X X X X X X X X X X X X . . . X
76 ST7565 X X X X X X X X X X X X X . . . X
77 ST7735 . . . . X X X X X X . . . . . . .
78 SSD1306 . . . . X X X . X X . . . . . . .
79 MCP121 . . . . . . . . . . . . . . X . .
82 ====================== === ======= ====
83 16B0 16B1 32B0 32B1 0 0 1 2 3 0
85 SDCARD . . . . X . . . . .
86 PWM . X . . . . . . . .
87 PMU [1] . . X . . . . . . .
88 USB . . . X . . . . . .
89 STEPPER . . X . . . . . . .
90 CHIBI x . . . X . . . . .
91 ILI9325/8 . . . . . X X X X .
92 ST7565 . . . . . X X X X .
93 ST7535 . . . . . . . . . .
94 SSD1306 . . . . . . . . . .
95 INTERFACE . . . . . . . . . X[2]
97 [1] PMU uses 32-bit Timer 0 for SW wakeup from deep-sleep. This timer
98 can safely be used by other peripherals, but may need to be
99 reconfigured when you wakeup from deep-sleep.
100 [2] INTERFACE can be configured to use either USBCDC or UART
102 **************************************************************************/
105 /**************************************************************************
107 -----------------------------------------------------------------------
108 The following addresses are used by the different I2C sensors included
113 ISL12022M (RTC) 0xDE 1101111x
114 ISL12022M (SRAM) 0xAE 1010111x
116 MCP24AA 0xA0 1010000x
117 MCP4725 0xC0 1100000x
118 TSL2561 0x72 0111001x
119 TCS3414 0x72 0111001x
121 [1] Alternative addresses may exists, but the addresses listed in this
122 table are the values used in the code base
124 **************************************************************************/
127 /*=========================================================================
128 FIRMWARE VERSION SETTINGS
129 -----------------------------------------------------------------------*/
130 #define CFG_FIRMWARE_VERSION_MAJOR (0)
131 #define CFG_FIRMWARE_VERSION_MINOR (9)
132 #define CFG_FIRMWARE_VERSION_REVISION (2)
133 /*=========================================================================*/
136 /*=========================================================================
138 -----------------------------------------------------------------------
140 CFG_CPU_CCLK Value is for reference only. 'core/cpu/cpu.c' must
141 be modified to change the clock speed, but the value
142 should be indicated here since CFG_CPU_CCLK is used by
143 other peripherals to determine timing.
145 -----------------------------------------------------------------------*/
146 #define CFG_CPU_CCLK (72000000) // 1 tick = 13.88nS
147 /*=========================================================================*/
150 /*=========================================================================
152 -----------------------------------------------------------------------
154 CFG_SYSTICK_DELAY_IN_MS The number of milliseconds between each tick
155 of the systick timer.
157 -----------------------------------------------------------------------*/
158 #define CFG_SYSTICK_DELAY_IN_MS (1)
159 /*=========================================================================*/
162 /*=========================================================================
164 -----------------------------------------------------------------------
166 CFG_UART_BAUDRATE The default UART speed. This value is used
167 when initialising UART, and should be a
168 standard value like 57600, 9600, etc.
169 NOTE: This value may be overridden if
170 another value is stored in EEPROM!
171 CFG_UART_BUFSIZE The length in bytes of the UART RX FIFO. This
172 will determine the maximum number of received
173 characters to store in memory.
175 -----------------------------------------------------------------------*/
176 #ifdef CFG_BRD_LPC1343_REFDESIGN
177 #define CFG_UART_BAUDRATE (115200)
178 #define CFG_UART_BUFSIZE (512)
181 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
182 #define CFG_UART_BAUDRATE (115200)
183 #define CFG_UART_BUFSIZE (512)
186 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
187 #define CFG_UART_BAUDRATE (57600)
188 #define CFG_UART_BUFSIZE (512)
191 #ifdef CFG_BRD_LPC1343_802154USBSTICK
192 #define CFG_UART_BAUDRATE (115200)
193 #define CFG_UART_BUFSIZE (512)
195 /*=========================================================================*/
198 /*=========================================================================
200 -----------------------------------------------------------------------
202 CFG_SSP0_SCKPIN_2_11 Indicates which pin should be used for SCK0
205 -----------------------------------------------------------------------*/
206 #ifdef CFG_BRD_LPC1343_REFDESIGN
207 #define CFG_SSP0_SCKPIN_2_11
208 // #define CFG_SSP0_SCKPIN_0_6
211 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
212 #define CFG_SSP0_SCKPIN_2_11
213 // #define CFG_SSP0_SCKPIN_0_6
216 #ifdef CFG_BRD_LPC1343_802154USBSTICK
217 // #define CFG_SSP0_SCKPIN_2_11
218 #define CFG_SSP0_SCKPIN_0_6
220 /*=========================================================================*/
223 /*=========================================================================
225 -----------------------------------------------------------------------
227 CFG_LED_PORT The port for the on board LED
228 CFG_LED_PIN The pin for the on board LED
229 CFG_LED_ON The pin state to turn the LED on (0 = low, 1 = high)
230 CFG_LED_OFF The pin state to turn the LED off (0 = low, 1 = high)
232 -----------------------------------------------------------------------*/
233 #ifdef CFG_BRD_LPC1343_REFDESIGN
234 #define CFG_LED_PORT (2)
235 #define CFG_LED_PIN (10)
236 #define CFG_LED_ON (0)
237 #define CFG_LED_OFF (1)
240 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
241 #define CFG_LED_PORT (2)
242 #define CFG_LED_PIN (10)
243 #define CFG_LED_ON (0)
244 #define CFG_LED_OFF (1)
247 #ifdef CFG_BRD_LPC1343_802154USBSTICK
248 #define CFG_LED_PORT (3)
249 #define CFG_LED_PIN (2)
250 #define CFG_LED_ON (0)
251 #define CFG_LED_OFF (1)
253 /*=========================================================================*/
256 /*=========================================================================
258 -----------------------------------------------------------------------
260 CFG_SDCARD If this field is defined SD Card and FAT32
261 file system support will be included
262 CFG_SDCARD_READONLY If this is set to 1, all commands to
263 write to the SD card will be removed
264 saving some flash space.
265 CFG_SDCARD_CDPORT The card detect port number
266 CFG_SDCARD_CDPIN The card detect pin number
268 NOTE: All config settings for FAT32 are defined
271 BENCHMARK: With SPI set to 6.0MHz, FATFS can read
272 ~300KB/s (w/512 byte read buffer)
274 PIN LAYOUT: The pin layout that is used by this driver
275 can be seen in the following schematic:
276 /tools/schematics/Breakout_TFTLCD_ILI9325_v1.3
278 DEPENDENCIES: SDCARD requires the use of SSP0.
279 -----------------------------------------------------------------------*/
280 #ifdef CFG_BRD_LPC1343_REFDESIGN
281 // #define CFG_SDCARD
282 #define CFG_SDCARD_READONLY (1) // Must be 0 or 1
283 #define CFG_SDCARD_CDPORT (3)
284 #define CFG_SDCARD_CDPIN (0)
287 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
289 #define CFG_SDCARD_READONLY (1) // Must be 0 or 1
290 #define CFG_SDCARD_CDPORT (3)
291 #define CFG_SDCARD_CDPIN (0)
294 #ifdef CFG_BRD_LPC1343_802154USBSTICK
295 // #define CFG_SDCARD
296 #define CFG_SDCARD_READONLY (1) // Must be 0 or 1
297 #define CFG_SDCARD_CDPORT (3)
298 #define CFG_SDCARD_CDPIN (0)
300 /*=========================================================================*/
303 /*=========================================================================
305 -----------------------------------------------------------------------
307 CFG_USBHID If this field is defined USB HID support will
308 be included. Currently uses ROM-based USB HID
309 CFG_USBCDC If this field is defined USB CDC support will
310 be included, with the USB Serial Port speed
311 set to 115200 BPS by default
312 CFG_USBCDC_BAUDRATE The default TX/RX speed. This value is used
313 when initialising USBCDC, and should be a
314 standard value like 57600, 9600, etc.
315 CFG_USBCDC_INITTIMEOUT The maximum delay in milliseconds to wait for
316 USB to connect. Must be a multiple of 10!
317 CFG_USBCDC_BUFFERSIZE Size of the buffer (in bytes) that stores
318 printf data until it can be sent out in
319 64 byte frames. The buffer is required since
320 only one frame per ms can be sent using USB
321 CDC (see 'puts' in systeminit.c).
323 -----------------------------------------------------------------------*/
324 #define CFG_USB_VID (0x239A)
325 #define CFG_USB_PID (0x1002)
327 #ifdef CFG_BRD_LPC1343_REFDESIGN
328 // #define CFG_USBHID
330 #define CFG_USBCDC_BAUDRATE (115200)
331 #define CFG_USBCDC_INITTIMEOUT (5000)
332 #define CFG_USBCDC_BUFFERSIZE (256)
335 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
336 // #define CFG_USBHID
338 #define CFG_USBCDC_BAUDRATE (115200)
339 #define CFG_USBCDC_INITTIMEOUT (5000)
340 #define CFG_USBCDC_BUFFERSIZE (256)
343 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
344 // #define CFG_USBHID
345 // #define CFG_USBCDC
346 #define CFG_USBCDC_BAUDRATE (115200)
347 #define CFG_USBCDC_INITTIMEOUT (5000)
348 #define CFG_USBCDC_BUFFERSIZE (256)
351 #ifdef CFG_BRD_LPC1343_802154USBSTICK
352 // #define CFG_USBHID
354 #define CFG_USBCDC_BAUDRATE (115200)
355 #define CFG_USBCDC_INITTIMEOUT (5000)
356 #define CFG_USBCDC_BUFFERSIZE (256)
358 /*=========================================================================*/
361 /*=========================================================================
363 -----------------------------------------------------------------------
365 CFG_PRINTF_UART Will cause all printf statements to be
367 CFG_PRINTF_USBCDC Will cause all printf statements to be
368 redirect to USB Serial
369 CFG_PRINTF_NEWLINE This is typically "\r\n" for Windows or
372 Note: If no printf redirection definitions are present, all printf
373 output will be ignored, though this will also save ~350 bytes flash.
375 NOTE: PRINTF Support = ~350 bytes Flash (-Os)
376 -----------------------------------------------------------------------*/
377 #ifdef CFG_BRD_LPC1343_REFDESIGN
378 // #define CFG_PRINTF_UART
379 #define CFG_PRINTF_USBCDC
380 #define CFG_PRINTF_NEWLINE "\r\n"
383 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
384 // #define CFG_PRINTF_UART
385 #define CFG_PRINTF_USBCDC
386 #define CFG_PRINTF_NEWLINE "\r\n"
389 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
390 #define CFG_PRINTF_UART
391 // #define CFG_PRINTF_USBCDC
392 #define CFG_PRINTF_NEWLINE "\n"
395 #ifdef CFG_BRD_LPC1343_802154USBSTICK
396 // #define CFG_PRINTF_UART
397 #define CFG_PRINTF_USBCDC
398 #define CFG_PRINTF_NEWLINE "\r\n"
400 /*=========================================================================*/
403 /*=========================================================================
404 COMMAND LINE INTERFACE
405 -----------------------------------------------------------------------
407 CFG_INTERFACE If this field is defined the UART or USBCDC
408 based command-line interface will be included
409 CFG_INTERFACE_MAXMSGSIZE The maximum number of bytes to accept for an
411 CFG_INTERFACE_PROMPT The command prompt to display at the start
412 of every new data entry line
413 CFG_INTERFACE_SILENTMODE If this is set to 1 only text generated in
414 response to commands will be send to the
415 output buffer. The command prompt will not
416 be displayed and incoming text will not be
417 echoed back to the output buffer (allowing
418 you to see the text you have input). This
419 is normally only desirable in a situation
420 where another MCU is communicating with
422 CFG_INTERFACE_DROPCR If this is set to 1 all incoming \r
423 characters will be dropped
424 CFG_INTERFACE_ENABLEIRQ If this is set to 1 the IRQ pin will be
425 set high when a command starts executing
426 and will go low when the command has
427 finished executing or the LCD is not busy.
428 This allows another device to know when a
429 new command can safely be sent.
430 CFG_INTERFACE_IRQPORT The gpio port for the IRQ/busy pin
431 CFG_INTERFACE_IRQPIN The gpio pin number for the IRQ/busy pin
432 CFG_INTERFACE_SHORTERRORS If this is enabled only short 1 character
433 error messages will be returned (followed
434 by CFG_PRINTF_NEWLINE), rather than more
435 verbose error messages. The specific
436 characters used are defined below.
437 CFG_INTERFACE_CONFIRMREADY If this is set to 1 a text confirmation
438 will be sent when the command prompt is
439 ready for a new command. This is in
440 addition to CFG_INTERFACE_ENABLEIRQ if
441 this is also enabled. The character used
444 NOTE: The command-line interface will use either
445 USB-CDC or UART depending on whether
446 CFG_PRINTF_UART or CFG_PRINTF_USBCDC are
448 -----------------------------------------------------------------------*/
449 #ifdef CFG_BRD_LPC1343_REFDESIGN
450 #define CFG_INTERFACE
451 #define CFG_INTERFACE_MAXMSGSIZE (256)
452 #define CFG_INTERFACE_PROMPT "LPC1343 >> "
453 #define CFG_INTERFACE_SILENTMODE (0)
454 #define CFG_INTERFACE_DROPCR (0)
455 #define CFG_INTERFACE_ENABLEIRQ (0)
456 #define CFG_INTERFACE_IRQPORT (0)
457 #define CFG_INTERFACE_IRQPIN (7)
458 #define CFG_INTERFACE_SHORTERRORS (0)
459 #define CFG_INTERFACE_CONFIRMREADY (0)
462 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
463 #define CFG_INTERFACE
464 #define CFG_INTERFACE_MAXMSGSIZE (256)
465 #define CFG_INTERFACE_PROMPT "LCD >> "
466 #define CFG_INTERFACE_SILENTMODE (0)
467 #define CFG_INTERFACE_DROPCR (0)
468 #define CFG_INTERFACE_ENABLEIRQ (0)
469 #define CFG_INTERFACE_IRQPORT (0)
470 #define CFG_INTERFACE_IRQPIN (7)
471 #define CFG_INTERFACE_SHORTERRORS (0)
472 #define CFG_INTERFACE_CONFIRMREADY (0)
473 #define CFG_INTERFACE_SHORTERRORS_UNKNOWNCOMMAND "?"
474 #define CFG_INTERFACE_SHORTERRORS_TOOMANYARGS ">"
475 #define CFG_INTERFACE_SHORTERRORS_TOOFEWARGS "<"
476 #define CFG_INTERFACE_CONFIRMREADY_TEXT "."
479 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
480 #define CFG_INTERFACE
481 #define CFG_INTERFACE_MAXMSGSIZE (256)
482 #define CFG_INTERFACE_PROMPT "LCD >> "
483 #define CFG_INTERFACE_SILENTMODE (1)
484 #define CFG_INTERFACE_DROPCR (1)
485 #define CFG_INTERFACE_ENABLEIRQ (1)
486 #define CFG_INTERFACE_IRQPORT (0)
487 #define CFG_INTERFACE_IRQPIN (7)
488 #define CFG_INTERFACE_SHORTERRORS (1)
489 #define CFG_INTERFACE_CONFIRMREADY (0)
490 #define CFG_INTERFACE_SHORTERRORS_UNKNOWNCOMMAND "?"
491 #define CFG_INTERFACE_SHORTERRORS_TOOMANYARGS ">"
492 #define CFG_INTERFACE_SHORTERRORS_TOOFEWARGS "<"
493 #define CFG_INTERFACE_CONFIRMREADY_TEXT "."
496 #ifdef CFG_BRD_LPC1343_802154USBSTICK
497 // #define CFG_INTERFACE
498 #define CFG_INTERFACE_MAXMSGSIZE (256)
499 #define CFG_INTERFACE_PROMPT "CMD >> "
500 #define CFG_INTERFACE_SILENTMODE (0)
501 #define CFG_INTERFACE_DROPCR (0)
502 #define CFG_INTERFACE_ENABLEIRQ (0)
503 #define CFG_INTERFACE_IRQPORT (0)
504 #define CFG_INTERFACE_IRQPIN (7)
505 #define CFG_INTERFACE_SHORTERRORS (0)
506 #define CFG_INTERFACE_CONFIRMREADY (0)
508 /*=========================================================================*/
511 /*=========================================================================
513 -----------------------------------------------------------------------
515 CFG_PWM If this is defined, a basic PWM driver
516 will be included using 16-bit Timer 1 and
517 Pin 1.9 (MAT0) for the PWM output. In
518 order to allow for a fixed number of
519 pulses to be generated, some PWM-specific
520 code is required in the 16-Bit Timer 1
521 ISR. See "core/timer16/timer16.c" for
523 CFG_PWM_DEFAULT_PULSEWIDTH The default pulse width in ticks
524 CFG_PWM_DEFAULT_DUTYCYCLE The default duty cycle in percent
526 DEPENDENCIES: PWM output requires the use of 16-bit
527 timer 1 and pin 1.9 (CT16B1_MAT0).
528 -----------------------------------------------------------------------*/
530 #define CFG_PWM_DEFAULT_PULSEWIDTH (CFG_CPU_CCLK / 1000)
531 #define CFG_PWM_DEFAULT_DUTYCYCLE (50)
532 /*=========================================================================*/
535 /*=========================================================================
536 STEPPER MOTOR SETTINGS
537 -----------------------------------------------------------------------
539 CFG_STEPPER If this is defined, a simple bi-polar
540 stepper motor will be included for common
541 H-bridge chips like the L293D or SN754410N
543 DEPENDENCIES: STEPPER requires the use of pins 3.0-3 and
545 -----------------------------------------------------------------------*/
546 // #define CFG_STEPPER
547 /*=========================================================================*/
550 /*=========================================================================
552 -----------------------------------------------------------------------
554 CFG_I2CEEPROM If defined, drivers for the onboard EEPROM
555 will be included during build
556 CFG_I2CEEPROM_SIZE The number of bytes available on the EEPROM
558 -----------------------------------------------------------------------*/
559 #ifdef CFG_BRD_LPC1343_REFDESIGN
560 #define CFG_I2CEEPROM
561 #define CFG_I2CEEPROM_SIZE (3072)
564 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
565 #define CFG_I2CEEPROM
566 #define CFG_I2CEEPROM_SIZE (3072)
569 #ifdef CFG_BRD_LPC1343_802154USBSTICK
570 #define CFG_I2CEEPROM
571 #define CFG_I2CEEPROM_SIZE (3072)
573 /*=========================================================================*/
576 /*=========================================================================
578 -----------------------------------------------------------------------
579 EEPROM is used to persist certain user modifiable values to make
580 sure that these changes remain in effect after a reset or hard
581 power-down. The addresses in EEPROM for these various system
582 settings/values are defined below. The first 256 bytes of EEPROM
583 are reserved for this (0x0000..0x00FF).
585 CFG_EEPROM_RESERVED The last byte of reserved EEPROM memory
587 EEPROM Address (0x0000..0x00FF)
588 ===============================
589 0 1 2 3 4 5 6 7 8 9 A B C D E F
590 000x x x x x x x x x . x x . . . . . Chibi
591 001x . . . . . . . . . . . . . . . .
592 002x x x x x . . . . . . . . . . . . UART
593 003x x x x x x x x x x x x x x x x x Touch Screen Calibration
594 004x x x x x x x x x x x x x x x . . Touch Screen Calibration
595 005x . . . . . . . . . . . . . . . .
596 006x . . . . . . . . . . . . . . . .
597 007x . . . . . . . . . . . . . . . .
598 008x . . . . . . . . . . . . . . . .
599 009x . . . . . . . . . . . . . . . .
600 00Ax . . . . . . . . . . . . . . . .
601 00Bx . . . . . . . . . . . . . . . .
602 00Cx . . . . . . . . . . . . . . . .
603 00Dx . . . . . . . . . . . . . . . .
604 00Ex . . . . . . . . . . . . . . . .
605 00Fx . . . . . . . . . . . . . . . .
607 -----------------------------------------------------------------------*/
608 #define CFG_EEPROM_RESERVED (0x00FF) // Protect first 256 bytes of memory
609 #define CFG_EEPROM_CHIBI_IEEEADDR (uint16_t)(0x0000) // 8
610 #define CFG_EEPROM_CHIBI_SHORTADDR (uint16_t)(0x0009) // 2
611 #define CFG_EEPROM_UART_SPEED (uint16_t)(0x0020) // 4
612 #define CFG_EEPROM_TOUCHSCREEN_CALIBRATED (uint16_t)(0x0030) // 1
613 #define CFG_EEPROM_TOUCHSCREEN_CAL_AN (uint16_t)(0x0031) // 4
614 #define CFG_EEPROM_TOUCHSCREEN_CAL_BN (uint16_t)(0x0035) // 4
615 #define CFG_EEPROM_TOUCHSCREEN_CAL_CN (uint16_t)(0x0039) // 4
616 #define CFG_EEPROM_TOUCHSCREEN_CAL_DN (uint16_t)(0x003D) // 4
617 #define CFG_EEPROM_TOUCHSCREEN_CAL_EN (uint16_t)(0x0041) // 4
618 #define CFG_EEPROM_TOUCHSCREEN_CAL_FN (uint16_t)(0x0045) // 4
619 #define CFG_EEPROM_TOUCHSCREEN_CAL_DIVIDER (uint16_t)(0x0049) // 4
620 #define CFG_EEPROM_TOUCHSCREEN_THRESHHOLD (uint16_t)(0x004D) // 1
621 /*=========================================================================*/
624 /*=========================================================================
625 LM75B TEMPERATURE SENSOR
626 -----------------------------------------------------------------------
628 CFG_LM75B If defined, drivers for an optional LM75B
629 temperature sensor will be included during
630 build (requires external HW)
632 -----------------------------------------------------------------------*/
634 /*=========================================================================*/
637 /*=========================================================================
639 -----------------------------------------------------------------------
641 CFG_CHIBI If defined, the CHIBI wireless stack will be
642 included during build. Requires external HW.
643 CFG_CHIBI_MODE The mode to use when receiving and transmitting
644 wireless data. See chb_drvr.h for possible values
645 CFG_CHIBI_POWER The power level to use when transmitting. See
646 chb_drvr.h for possible values
647 CFG_CHIBI_CHANNEL 802.15.4 Channel (0 = 868MHz, 1-10 = 915MHz)
648 CFG_CHIBI_PANID 16-bit PAN Identifier (ex.0x1234)
649 CFG_CHIBI_PROMISCUOUS Set to 1 to enabled promiscuous mode or
650 0 to disable it. If promiscuous mode is
651 enabled be sure to set CFG_CHIBI_BUFFERSIZE
652 to an appropriately large value (ex. 1024)
653 CFG_CHIBI_BUFFERSIZE The size of the message buffer in bytes
655 DEPENDENCIES: Chibi requires the use of SSP0, 16-bit timer
656 0 and pins 3.1, 3.2, 3.3. It also requires
657 the presence of CFG_I2CEEPROM.
659 NOTE: These settings are not relevant to all boards!
660 'tools/schematics/AT86RF212LPC1114_v1.6.pdf'
661 show how 'CHIBI' is meant to be connected
662 -----------------------------------------------------------------------*/
663 #ifdef CFG_BRD_LPC1343_REFDESIGN
665 #define CFG_CHIBI_MODE (0) // OQPSK_868MHZ
666 #define CFG_CHIBI_POWER (0xE9) // CHB_PWR_EU2_3DBM
667 #define CFG_CHIBI_CHANNEL (0) // 868-868.6 MHz
668 #define CFG_CHIBI_PANID (0x1234)
669 #define CFG_CHIBI_PROMISCUOUS (0)
670 #define CFG_CHIBI_BUFFERSIZE (128)
673 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
675 #define CFG_CHIBI_MODE (0) // OQPSK_868MHZ
676 #define CFG_CHIBI_POWER (0xE9) // CHB_PWR_EU2_3DBM
677 #define CFG_CHIBI_CHANNEL (0) // 868-868.6 MHz
678 #define CFG_CHIBI_PANID (0x1234)
679 #define CFG_CHIBI_PROMISCUOUS (0)
680 #define CFG_CHIBI_BUFFERSIZE (128)
683 #ifdef CFG_BRD_LPC1343_802154USBSTICK
685 #define CFG_CHIBI_MODE (0) // OQPSK_868MHZ
686 #define CFG_CHIBI_POWER (0xE9) // CHB_PWR_EU2_3DBM
687 #define CFG_CHIBI_CHANNEL (0) // 868-868.6 MHz
688 #define CFG_CHIBI_PANID (0x1234)
689 #define CFG_CHIBI_PROMISCUOUS (0)
690 #define CFG_CHIBI_BUFFERSIZE (1024)
692 /*=========================================================================*/
695 /*=========================================================================
697 -----------------------------------------------------------------------
699 CFG_TFTLCD If defined, this will cause drivers for
700 a pre-determined LCD screen to be included
701 during build. Only one LCD driver can be
702 included during the build process (for ex.
703 'drivers/lcd/hw/ILI9325.c')
704 CFG_TFTLCD_INCLUDESMALLFONTS If set to 1, smallfont support will be
705 included for 3x6, 5x8, 7x8 and 8x8 fonts.
706 This should only be enabled if these small
707 fonts are required since there is already
708 support for larger fonts generated with
710 http://www.pavius.net/downloads/tools/53-the-dot-factory
711 CFG_TFTLCD_TS_DEFAULTTHRESHOLD Default minimum threshold to trigger a
712 touch event with the touch screen (and exit
713 from 'tsWaitForEvent' in touchscreen.c).
714 Should be an 8-bit value somewhere between
715 8 and 75 in normal circumstances. This is
716 the default value and may be overriden by
717 a value stored in EEPROM.
718 CFG_TFTLCD_TS_KEYPADDELAY The delay in milliseconds between key
719 presses in dialogue boxes
721 PIN LAYOUT: The pin layout that is used by this driver
722 can be seen in the following schematic:
723 /tools/schematics/Breakout_TFTLCD_ILI9325_v1.3
725 DEPENDENCIES: TFTLCD requires the use of pins 1.8, 1.9,
726 1.10, 1.11, 3.3 and 2.1-9.
727 -----------------------------------------------------------------------*/
728 #ifdef CFG_BRD_LPC1343_REFDESIGN
729 // #define CFG_TFTLCD
730 #define CFG_TFTLCD_INCLUDESMALLFONTS (0)
731 #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
732 #define CFG_TFTLCD_TS_KEYPADDELAY (100)
735 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
737 #define CFG_TFTLCD_INCLUDESMALLFONTS (0)
738 #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
739 #define CFG_TFTLCD_TS_KEYPADDELAY (100)
742 #ifdef CFG_BRD_LPC1343_802154USBSTICK
743 // #define CFG_TFTLCD
744 #define CFG_TFTLCD_INCLUDESMALLFONTS (0)
745 #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
746 #define CFG_TFTLCD_TS_KEYPADDELAY (100)
748 /*=========================================================================*/
751 /*=========================================================================
753 -----------------------------------------------------------------------
755 CFG_ST7565 If defined, this will cause drivers for
756 the 128x64 pixel ST7565 LCD to be included
757 CFG_SSD1306 If defined, this will cause drivers for
758 the 128x64 pixel SSD1306 OLED display to be
761 Note: LPC1114 @ 36MHz and the ST7565 with the
762 backlight enabled consumes ~35mA
764 DEPENDENCIES: ST7565 requires the use of pins 2.1-6.
765 DEPENDENCIES: SSD1306 requires the use of pins 2.1-6.
766 -----------------------------------------------------------------------*/
767 // #define CFG_ST7565
768 // #define CFG_SSD1306
769 /*=========================================================================*/
772 /*=========================================================================
774 -----------------------------------------------------------------------
776 CFG_RSA If defined, support for basic RSA
777 encryption will be included.
778 CFG_RSA_BITS Indicates the number of bits used for
779 RSA encryption keys. To keep code size
780 reasonable, RSA encryption is currently
781 limited to using 64-bit or 32-bit numbers,
782 with 64-bit providing higher security, and
783 32-bit providing smaller encrypted text
786 NOTE: Please note that Printf can not be
787 used to display 64-bit values (%lld)!
788 -----------------------------------------------------------------------*/
790 #define CFG_RSA_BITS (32)
791 /*=========================================================================*/
796 /*=========================================================================
797 CONFIG FILE VALIDATION
798 -------------------------------------------------------------------------
799 Basic error checking to make sure that incompatible defines are not
800 enabled at the same time, etc.
802 =========================================================================*/
804 #if !defined CFG_BRD_LPC1343_REFDESIGN && !defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB && !defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART && !defined CFG_BRD_LPC1343_802154USBSTICK
805 #error "You must defined a target board (CFG_BRD_LPC1343_REFDESIGN or CFG_BRD_LPC1343_TFTLCDSTANDALONE or CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART or CFG_BRD_LPC1343_802154USBSTICK)"
808 #if defined CFG_PRINTF_USBCDC && defined CFG_PRINTF_UART
809 #error "CFG_PRINTF_UART or CFG_PRINTF_USBCDC cannot both be defined at once"
812 #if defined CFG_PRINTF_USBCDC && !defined CFG_USBCDC
813 #error "CFG_PRINTF_CDC requires CFG_USBCDC to be defined as well"
816 #if defined CFG_USBCDC && defined CFG_USBHID
817 #error "Only one USB class can be defined at a time (CFG_USBCDC or CFG_USBHID)"
820 #if defined CFG_SSP0_SCKPIN_2_11 && defined CFG_SSP0_SCKPIN_0_6
821 #error "Only one SCK pin can be defined at a time for SSP0"
824 #if !defined CFG_SSP0_SCKPIN_2_11 && !defined CFG_SSP0_SCKPIN_0_6
825 #error "An SCK pin must be selected for SSP0 (CFG_SSP0_SCKPIN_2_11 or CFG_SSP0_SCKPIN_0_6)"
829 #if !defined CFG_PRINTF_UART && !defined CFG_PRINTF_USBCDC
830 #error "CFG_PRINTF_UART or CFG_PRINTF_USBCDC must be defined for for CFG_INTERFACE Input/Output"
832 #if defined CFG_PRINTF_USBCDC && CFG_INTERFACE_SILENTMODE == 1
833 #error "CFG_INTERFACE_SILENTMODE typically isn't enabled with CFG_PRINTF_USBCDC"
838 #if !defined CFG_I2CEEPROM
839 #error "CFG_CHIBI requires CFG_I2CEEPROM to store and retrieve addresses"
842 #error "CFG_CHIBI and CFG_SDCARD can not be defined at the same time. Only one SPI block is available on the LPC1343."
845 #error "CFG_CHIBI and CFG_TFTLCD can not be defined at the same time since they both use pins 1.8, 1.9 and 1.10."
848 #error "CFG_CHIBI and CFG_PWM can not be defined at the same time since they both use pin 1.9."
850 #if CFG_CHIBI_PROMISCUOUS != 0 && CFG_CHIBI_PROMISCUOUS != 1
851 #error "CFG_CHIBI_PROMISCUOUS must be equal to either 1 or 0"
857 #error "CFG_TFTLCD and CFG_ST7565 can not be defined at the same time."
860 #error "CFG_TFTLCD and CFG_SSD1306 can not be defined at the same time."
863 #error "CFG_TFTLCD and CFG_PWM can not be defined at the same time since they both use pin 1.9."
865 #if !defined CFG_I2CEEPROM
866 #error "CFG_TFTLCD requires CFG_I2CEEPROM to store and retrieve configuration settings"
872 #error "CFG_SDCARD and CFG_STEPPER can not be defined at the same time since they both use pin 3.0."
878 #error "CFG_ST7565 and CFG_SSD1306 can not be defined at the same time"
883 #if CFG_RSA_BITS != 64 && CFG_RSA_BITS != 32
884 #error "CFG_RSA_BITS must be equal to either 32 or 64."
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