projectconfig.h

   1 /**************************************************************************/
   2 /*!
   3     @file     projectconfig.h
   4     @author   K. Townsend (microBuilder.eu)
   5
   6     @section LICENSE
   7
   8     Software License Agreement (BSD License)
   9
  10     Copyright (c) 2012, microBuilder SARL
  11     All rights reserved.
  12
  13     Redistribution and use in source and binary forms, with or without
  14     modification, are permitted provided that the following conditions are met:
  15     1. Redistributions of source code must retain the above copyright
  16     notice, this list of conditions and the following disclaimer.
  17     2. Redistributions in binary form must reproduce the above copyright
  18     notice, this list of conditions and the following disclaimer in the
  19     documentation and/or other materials provided with the distribution.
  20     3. Neither the name of the copyright holders nor the
  21     names of its contributors may be used to endorse or promote products
  22     derived from this software without specific prior written permission.
  23
  24     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY
  25     EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  26     WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY
  28     DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  29     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  30     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  31     ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  32     (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  33     SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34 */
  35 /**************************************************************************/
  36
  37 #ifndef _PROJECTCONFIG_H_
  38 #define _PROJECTCONFIG_H_
  39
  40 #include "lpc134x.h"
  41 #include "sysdefs.h"
  42
  43 /*=========================================================================
  44     BOARD SELECTION
  45
  46     Because several boards use this code library with sometimes slightly
  47     different pin configuration, you will need to specify which board you
  48     are using by enabling one of the following definitions. The code base
  49     will then try to configure itself accordingly for that board.
  50
  51     CFG_BRD_LPC1343_REFDESIGN
  52     =========================
  53
  54         microBuilder.eu LPC1343 Reference Design base board with
  55         on-board peripherals initialised (EEPROM, USB or UART CLI, etc.)
  56
  57                 This is the recommended starting point for new development
  58                 since it makes it easy to send printf output to USB CDC, access
  59                 the on-board EEPROM, etc.
  60
  61     CFG_BRD_LPC1343_REFDESIGN_MINIMAL
  62     =================================
  63
  64         microBuilder.eu LPC1343 Reference Design base board with
  65         only the most common peripherals initialised by default.
  66
  67         Results in smallest code since EEPROM, USB, etc., are not
  68         initialised on startup.  By default, only the following
  69         peripherals are initialised by systemInit():
  70
  71               - CPU (Configures the PLL, etc.)
  72               - GPIO
  73               - SysTick Timer
  74               - UART (with printf support) *
  75
  76         * Can be removed to save 0.8kb in debug and 0.3 kb in
  77         release. Comment out 'CFG_PRINTF_UART' to disable it.
  78
  79         The code size can be further reduced by several KB by removing
  80         any IRQ Handlers that are not used.  The I2C IRQHandler, for
  81         example, uses ~1KB of flash in debug and ~400KB in release mode,
  82         but because it is referenced in the startup code it is always
  83         included even if I2C is never used in the project.
  84
  85         Other IRQ Handlers that you might be able to comment out
  86         to save some space are:
  87
  88         IRQ Handler               Debug   Release
  89         ------------------------- ------  -------
  90         I2C_IRQHandler            1160 b    400 b
  91         SSP_IRQHandler             160 b     76 b
  92         UART_IRQHandler            246 b    116 b
  93         WAKEUP_IRQHandler          160 b    100 b
  94         WDT_IRQHandler              50 b     28 b
  95
  96     CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
  97     ====================================
  98
  99         microBuilder.eu/Adafruit Stand-Alone "Smart LCD" with USB enabled
 100         for the CLI interface.
 101
 102     CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 103     =====================================
 104
 105         microBuilder.eu/Adafruit Stand-Alone "Smart LCD" with UART enabled
 106         for the CLI interface.
 107
 108     CFG_BRD_LPC1343_802154USBSTICK
 109     ==============================
 110
 111         microBuilder.eu USB stick 802.15.4 868/915MHz RF transceiver
 112
 113     CFG_BRD_LPC1343_OLIMEX_P
 114     ==============================
 115
 116         Simple Olimex LPC1343 breakout board
 117
 118     CFG_BRD_LPC1343_LPCXPRESSO
 119     ==============================
 120
 121         LPC1343 LPCXpresso board
 122
 123     -----------------------------------------------------------------------*/
 124     // #define CFG_BRD_LPC1343_REFDESIGN
 125     // #define CFG_BRD_LPC1343_REFDESIGN_MINIMAL
 126     // #define CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
 127     // #define CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 128     // #define CFG_BRD_LPC1343_802154USBSTICK
 129     // #define CFG_BRD_LPC1343_OLIMEX_P
 130     #define CFG_BRD_LPC1343_LPCXPRESSO
 131 /*=========================================================================*/
 132
 133
 134 /**************************************************************************
 135     PIN USAGE
 136     -----------------------------------------------------------------------
 137     This table tries to give an indication of which GPIO pins and
 138     peripherals are used by the available drivers and SW examples.  Only
 139     dedicated GPIO pins available on the LPC1343 Reference Board are shown
 140     below.  Any unused peripheral blocks like I2C, SSP, ADC, etc., can
 141     also be used as GPIO if they are available.
 142
 143                 PORT 1        PORT 2                PORT 3
 144                 =========     =================     =======
 145                 8 9 10 11     1 2 3 4 5 6 7 8 9     0 1 2 3
 146
 147     SDCARD      . .  .  .     . . . . . . . . .     X . . .
 148     PWM         . X  .  .     . . . . . . . . .     . . . .
 149     STEPPER     . .  .  .     . . . . . . . . .     X X X X
 150     CHIBI       X X  X  .     . . . . . . . . .     . . . .
 151     ILI9325/8   X X  X  X     X X X X X X X X X     . . . X
 152     ST7565      X X  X  X     X X X X X X X X X     . . . X
 153     ST7735      . .  .  .     X X X X X X . . .     . . . .
 154     SHARPMEM    . .  .  .     X X X X . . . . .     . . . .
 155     SSD1306     . .  .  .     X X X . X X . . .     . . . .
 156     SSD1351     . .  .  .     X X X X X . . . .     . . . .
 157     MCP121      . .  .  .     . . . . . . . . .     . X . .
 158     PN532 [3]   . .  .  .     . . . . . . . . .     . X X .
 159
 160                 TIMERS                    SSP     ADC         UART
 161                 ======================    ===     =======     ====
 162                 16B0  16B1  32B0  32B1    0       0 1 2 3     0
 163
 164     SDCARD      .     .     .     .       X       . . . .     .
 165     PWM         .     X     .     .       .       . . . .     .
 166     PMU [1]     .     .     X     .       .       . . . .     .
 167     USB         .     .     .     X       .       . . . .     .
 168     STEPPER     .     .     X     .       .       . . . .     .
 169     CHIBI       x     .     .     .       X       . . . .     .
 170     ILI9325/8   .     .     .     .       .       X X X X     .
 171     ST7565      .     .     .     .       .       X X X X     .
 172     ST7535      .     .     .     .       .       . . . .     .
 173     SHARPMEM    .     .     .     .       .       . . . .     .
 174     SSD1306     .     .     .     .       .       . . . .     .
 175     INTERFACE   .     .     .     .       .       . . . .     X[2]
 176
 177     [1]  PMU uses 32-bit Timer 0 for SW wakeup from deep-sleep.  This timer
 178          can safely be used by other peripherals, but may need to be
 179          reconfigured when you wakeup from deep-sleep.
 180     [2]  INTERFACE can be configured to use either USBCDC or UART
 181     [3]  3.2 only used when with the I2C bus (for IRQ)
 182
 183  **************************************************************************/
 184
 185
 186 /**************************************************************************
 187     I2C Addresses
 188     -----------------------------------------------------------------------
 189     The following addresses are used by the different I2C sensors included
 190     in the code base [1]
 191
 192                                 HEX       BINARY
 193                                 ====      ========
 194     ISL12022M (RTC)             0xDE      1101111x
 195     ISL12022M (SRAM)            0xAE      1010111x
 196     LM75B                       0x90      1001000x
 197     MCP24AA                     0xA0      1010000x
 198     MCP4725                     0xC0      1100000x
 199     TSL2561                     0x72      0111001x
 200     TCS3414                     0x72      0111001x
 201     PN532                       0x48      0100100x
 202
 203     [1]  Alternative addresses may exists, but the addresses listed in this
 204          table are the values used in the code base
 205
 206  **************************************************************************/
 207
 208
 209 /*=========================================================================
 210     FIRMWARE VERSION SETTINGS
 211     -----------------------------------------------------------------------*/
 212     #define CFG_FIRMWARE_VERSION_MAJOR            (1)
 213     #define CFG_FIRMWARE_VERSION_MINOR            (0)
 214     #define CFG_FIRMWARE_VERSION_REVISION         (0)
 215 /*=========================================================================*/
 216
 217
 218 /*=========================================================================
 219     CORE CPU SETTINGS
 220     -----------------------------------------------------------------------
 221
 222     CFG_CPU_CCLK    Value is for reference only.  'core/cpu/cpu.c' must
 223                     be modified to change the clock speed, but the value
 224                     should be indicated here since CFG_CPU_CCLK is used by
 225                     other peripherals to determine timing.
 226
 227     -----------------------------------------------------------------------*/
 228     #define CFG_CPU_CCLK                (72000000)  // 1 tick = 13.88nS
 229 /*=========================================================================*/
 230
 231
 232 /*=========================================================================
 233     SYSTICK TIMER
 234     -----------------------------------------------------------------------
 235
 236     CFG_SYSTICK_DELAY_IN_MS   The number of milliseconds between each tick
 237                               of the systick timer.
 238
 239     -----------------------------------------------------------------------*/
 240     #define CFG_SYSTICK_DELAY_IN_MS     (1)
 241 /*=========================================================================*/
 242
 243
 244 /*=========================================================================
 245     GPIO INTERRUPTS
 246     -----------------------------------------------------------------------
 247
 248     IF you wish to use the GPIO interrupt handlers elsewhere in your code,
 249     you should probably define a seperate IRQHandler for the appropriate
 250     GPIO bank rather than using the definitions in core/gpio/gpio.c (to
 251     avoid causing problems in other projects, and to make updates easier,
 252     etc.)  To disable the default IRQHandler, simply comment out the
 253     define below for the appropriate GPIO bank and implement the handler
 254     somewhere else.
 255
 256     GPIO_ENABLE_IRQ0    If defined, PIOINT0_IRQHandler will be declared and
 257                         handled in core/gpio/gpio.c
 258     GPIO_ENABLE_IRQ1    If defined, PIOINT1_IRQHandler will be declared and
 259                         handled in core/gpio/gpio.c
 260     GPIO_ENABLE_IRQ2    If defined, PIOINT2_IRQHandler will be declared and
 261                         handled in core/gpio/gpio.c
 262     GPIO_ENABLE_IRQ3    If defined, PIOINT3_IRQHandler will be declared and
 263                         handled in core/gpio/gpio.c
 264
 265     -----------------------------------------------------------------------*/
 266     #ifdef CFG_BRD_LPC1343_REFDESIGN
 267       // #define GPIO_ENABLE_IRQ0
 268       #define GPIO_ENABLE_IRQ1
 269       // #define GPIO_ENABLE_IRQ2
 270       // #define GPIO_ENABLE_IRQ3
 271     #endif
 272
 273     #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
 274       // #define GPIO_ENABLE_IRQ0
 275       #define GPIO_ENABLE_IRQ1
 276       // #define GPIO_ENABLE_IRQ2
 277       // #define GPIO_ENABLE_IRQ3
 278     #endif
 279
 280     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
 281       // #define GPIO_ENABLE_IRQ0
 282       #define GPIO_ENABLE_IRQ1
 283       // #define GPIO_ENABLE_IRQ2
 284       // #define GPIO_ENABLE_IRQ3
 285     #endif
 286
 287     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 288       // #define GPIO_ENABLE_IRQ0
 289       #define GPIO_ENABLE_IRQ1
 290       // #define GPIO_ENABLE_IRQ2
 291       // #define GPIO_ENABLE_IRQ3
 292     #endif
 293
 294     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 295       // #define GPIO_ENABLE_IRQ0
 296       #define GPIO_ENABLE_IRQ1
 297       // #define GPIO_ENABLE_IRQ2
 298       // #define GPIO_ENABLE_IRQ3
 299     #endif
 300
 301     #ifdef CFG_BRD_LPC1343_OLIMEX_P
 302       // #define GPIO_ENABLE_IRQ0
 303       #define GPIO_ENABLE_IRQ1
 304       // #define GPIO_ENABLE_IRQ2
 305       // #define GPIO_ENABLE_IRQ3
 306     #endif
 307
 308     #ifdef CFG_BRD_LPC1343_LPCXPRESSO
 309       // #define GPIO_ENABLE_IRQ0
 310       #define GPIO_ENABLE_IRQ1
 311       // #define GPIO_ENABLE_IRQ2
 312       // #define GPIO_ENABLE_IRQ3
 313     #endif
 314 /*=========================================================================*/
 315
 316
 317 /*=========================================================================
 318     ALTERNATE RESET PIN
 319     -----------------------------------------------------------------------
 320
 321     CFG_ALTRESET        If defined, indicates that a GPIO pin should be
 322                         configured as an alternate reset pin in addition
 323                         to the dedicated reset pin.
 324     CFG_ALTRESET_PORT   The GPIO port where the alt reset pin is located
 325     CFG_ALTRESET_PIN    The GPIO pin where the alt reset pin is located
 326
 327     -----------------------------------------------------------------------*/
 328     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 329       #define CFG_ALTRESET
 330       #define CFG_ALTRESET_PORT         (1)
 331       #define CFG_ALTRESET_PIN          (5)   // P1.5 = RTS
 332     #endif
 333 /*=========================================================================*/
 334
 335
 336 /*=========================================================================
 337     UART
 338     -----------------------------------------------------------------------
 339
 340     CFG_UART_BAUDRATE         The default UART speed.  This value is used
 341                               when initialising UART, and should be a
 342                               standard value like 57600, 9600, etc.
 343                               NOTE: This value may be overridden if
 344                               another value is stored in EEPROM!
 345     CFG_UART_BUFSIZE          The length in bytes of the UART RX FIFO. This
 346                               will determine the maximum number of received
 347                               characters to store in memory.
 348
 349     -----------------------------------------------------------------------*/
 350     #ifdef CFG_BRD_LPC1343_REFDESIGN
 351       #define CFG_UART_BAUDRATE           (115200)
 352       #define CFG_UART_BUFSIZE            (512)
 353     #endif
 354
 355     #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
 356       #define CFG_UART_BAUDRATE           (115200)
 357       #define CFG_UART_BUFSIZE            (512)
 358     #endif
 359
 360     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
 361       #define CFG_UART_BAUDRATE           (115200)
 362       #define CFG_UART_BUFSIZE            (512)
 363     #endif
 364
 365     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 366       #define CFG_UART_BAUDRATE           (57600)
 367       #define CFG_UART_BUFSIZE            (512)
 368     #endif
 369
 370     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 371       #define CFG_UART_BAUDRATE           (115200)
 372       #define CFG_UART_BUFSIZE            (512)
 373     #endif
 374
 375     #ifdef CFG_BRD_LPC1343_OLIMEX_P
 376       #define CFG_UART_BAUDRATE           (115200)
 377       #define CFG_UART_BUFSIZE            (512)
 378     #endif
 379
 380     #ifdef CFG_BRD_LPC1343_LPCXPRESSO
 381       #define CFG_UART_BAUDRATE           (115200)
 382       #define CFG_UART_BUFSIZE            (512)
 383     #endif
 384 /*=========================================================================*/
 385
 386
 387 /*=========================================================================
 388     SSP
 389     -----------------------------------------------------------------------
 390
 391     CFG_SSP0_SCKPIN_2_11      Indicates which pin should be used for SCK0
 392     CFG_SSP0_SCKPIN_0_6
 393
 394     -----------------------------------------------------------------------*/
 395     #ifdef CFG_BRD_LPC1343_REFDESIGN
 396       #define CFG_SSP0_SCKPIN_2_11
 397       // #define CFG_SSP0_SCKPIN_0_6
 398     #endif
 399
 400     #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
 401       #define CFG_SSP0_SCKPIN_2_11
 402       // #define CFG_SSP0_SCKPIN_0_6
 403     #endif
 404
 405     #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 406       #define CFG_SSP0_SCKPIN_2_11
 407       // #define CFG_SSP0_SCKPIN_0_6
 408     #endif
 409
 410     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 411       // #define CFG_SSP0_SCKPIN_2_11
 412       #define CFG_SSP0_SCKPIN_0_6
 413     #endif
 414
 415     #ifdef CFG_BRD_LPC1343_OLIMEX_P
 416       #define CFG_SSP0_SCKPIN_2_11
 417       // #define CFG_SSP0_SCKPIN_0_6
 418     #endif
 419
 420     #ifdef CFG_BRD_LPC1343_LPCXPRESSO
 421       #define CFG_SSP0_SCKPIN_2_11
 422       // #define CFG_SSP0_SCKPIN_0_6
 423     #endif
 424 /*=========================================================================*/
 425
 426
 427 /*=========================================================================
 428     ADC
 429     -----------------------------------------------------------------------
 430
 431     ADC_AVERAGING_ENABLE      To get better results, the ADC code can take
 432                               a number of samples and return the average
 433                               value.  This is slower, but can give more
 434                               accurate results compared to single-reading.
 435
 436                               To enable averaging, set ADC_AVERAGING_ENABLE
 437                               to a non-zero value.
 438     ADC_AVERAGING_SAMPLES     The number of ADC samples to read and
 439                               average if ADC averaging is enabled.
 440
 441     -----------------------------------------------------------------------*/
 442     #ifdef CFG_BRD_LPC1343_REFDESIGN
 443       #define ADC_AVERAGING_ENABLE    (1)
 444       #define ADC_AVERAGING_SAMPLES   (5)
 445     #endif
 446
 447     #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
 448       #define ADC_AVERAGING_ENABLE    (1)
 449       #define ADC_AVERAGING_SAMPLES   (5)
 450     #endif
 451
 452     #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 453       #define ADC_AVERAGING_ENABLE    (0)
 454       #define ADC_AVERAGING_SAMPLES   (5)
 455     #endif
 456
 457     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 458       #define ADC_AVERAGING_ENABLE    (0)
 459       #define ADC_AVERAGING_SAMPLES   (5)
 460     #endif
 461
 462     #ifdef CFG_BRD_LPC1343_OLIMEX_P
 463       #define ADC_AVERAGING_ENABLE    (0)
 464       #define ADC_AVERAGING_SAMPLES   (5)
 465     #endif
 466
 467     #ifdef CFG_BRD_LPC1343_LPCXPRESSO
 468       #define ADC_AVERAGING_ENABLE    (0)
 469       #define ADC_AVERAGING_SAMPLES   (5)
 470     #endif
 471 /*=========================================================================*/
 472
 473
 474 /*=========================================================================
 475     ON-BOARD LED
 476     -----------------------------------------------------------------------
 477
 478     CFG_LED_PORT              The port for the on board LED
 479     CFG_LED_PIN               The pin for the on board LED
 480     CFG_LED_ON                The pin state to turn the LED on (0 = low, 1 = high)
 481     CFG_LED_OFF               The pin state to turn the LED off (0 = low, 1 = high)
 482
 483     -----------------------------------------------------------------------*/
 484     #ifdef CFG_BRD_LPC1343_REFDESIGN
 485       #define CFG_LED_PORT                (2)
 486       #define CFG_LED_PIN                 (10)
 487       #define CFG_LED_ON                  (0)
 488       #define CFG_LED_OFF                 (1)
 489     #endif
 490
 491     #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
 492       #define CFG_LED_PORT                (2)
 493       #define CFG_LED_PIN                 (10)
 494       #define CFG_LED_ON                  (0)
 495       #define CFG_LED_OFF                 (1)
 496     #endif
 497
 498     #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 499       #define CFG_LED_PORT                (2)
 500       #define CFG_LED_PIN                 (10)
 501       #define CFG_LED_ON                  (0)
 502       #define CFG_LED_OFF                 (1)
 503     #endif
 504
 505     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 506       #define CFG_LED_PORT                (3)
 507       #define CFG_LED_PIN                 (2)
 508       #define CFG_LED_ON                  (0)
 509       #define CFG_LED_OFF                 (1)
 510     #endif
 511
 512     #ifdef CFG_BRD_LPC1343_OLIMEX_P
 513       #define CFG_LED_PORT                (3)
 514       #define CFG_LED_PIN                 (2)
 515       #define CFG_LED_ON                  (0)
 516       #define CFG_LED_OFF                 (1)
 517     #endif
 518
 519     #ifdef CFG_BRD_LPC1343_LPCXPRESSO
 520       #define CFG_LED_PORT                (0)
 521       #define CFG_LED_PIN                 (7)
 522       #define CFG_LED_ON                  (0)
 523       #define CFG_LED_OFF                 (1)
 524     #endif
 525 /*=========================================================================*/
 526
 527
 528 /*=========================================================================
 529     MICRO-SD CARD
 530     -----------------------------------------------------------------------
 531
 532     CFG_SDCARD                If this field is defined SD Card and FAT32
 533                               file system support will be included
 534     CFG_SDCARD_READONLY       If this is set to 1, all commands to
 535                               write to the SD card will be removed
 536                               saving some flash space.
 537     CFG_SDCARD_CDPORT         The card detect port number
 538     CFG_SDCARD_CDPIN          The card detect pin number
 539
 540     NOTE:                     All config settings for FAT32 are defined
 541                               in ffconf.h
 542
 543     BENCHMARK:                With SPI set to 6.0MHz, FATFS can read
 544                               ~300KB/s (w/512 byte read buffer)
 545
 546     PIN LAYOUT:               The pin layout that is used by this driver
 547                               can be seen in the following schematic:
 548                               /tools/schematics/Breakout_TFTLCD_ILI9325_v1.3
 549
 550     DEPENDENCIES:             SDCARD requires the use of SSP0.
 551     -----------------------------------------------------------------------*/
 552     #ifdef CFG_BRD_LPC1343_REFDESIGN
 553       // #define CFG_SDCARD
 554       #define CFG_SDCARD_READONLY         (1)   // Must be 0 or 1
 555       #define CFG_SDCARD_CDPORT           (3)
 556       #define CFG_SDCARD_CDPIN            (0)
 557     #endif
 558
 559     #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
 560       // #define CFG_SDCARD
 561       #define CFG_SDCARD_READONLY         (1)   // Must be 0 or 1
 562       #define CFG_SDCARD_CDPORT           (3)
 563       #define CFG_SDCARD_CDPIN            (0)
 564     #endif
 565
 566     #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 567       #define CFG_SDCARD
 568       #define CFG_SDCARD_READONLY         (1)   // Must be 0 or 1
 569       #define CFG_SDCARD_CDPORT           (3)
 570       #define CFG_SDCARD_CDPIN            (0)
 571     #endif
 572
 573     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 574       // #define CFG_SDCARD
 575       #define CFG_SDCARD_READONLY         (1)   // Must be 0 or 1
 576       #define CFG_SDCARD_CDPORT           (3)
 577       #define CFG_SDCARD_CDPIN            (0)
 578     #endif
 579
 580     #ifdef CFG_BRD_LPC1343_OLIMEX_P
 581       // #define CFG_SDCARD
 582       #define CFG_SDCARD_READONLY         (1) // Must be 0 or 1
 583       #define CFG_SDCARD_CDPORT           (3)
 584       #define CFG_SDCARD_CDPIN            (0)
 585     #endif
 586
 587     #ifdef CFG_BRD_LPC1343_LPCXPRESSO
 588       // #define CFG_SDCARD
 589       #define CFG_SDCARD_READONLY         (1) // Must be 0 or 1
 590       #define CFG_SDCARD_CDPORT           (3)
 591       #define CFG_SDCARD_CDPIN            (0)
 592     #endif
 593 /*=========================================================================*/
 594
 595
 596 /*=========================================================================
 597     USB
 598     -----------------------------------------------------------------------
 599
 600     CFG_USBHID                If this field is defined USB HID support will
 601                               be included.  Currently uses ROM-based USB HID
 602     CFG_USBCDC                If this field is defined USB CDC support will
 603                               be included, with the USB Serial Port speed
 604                               set to 115200 BPS by default
 605     CFG_USBCDC_BAUDRATE       The default TX/RX speed.  This value is used
 606                               when initialising USBCDC, and should be a
 607                               standard value like 57600, 9600, etc.
 608     CFG_USBCDC_INITTIMEOUT    The maximum delay in milliseconds to wait for
 609                               USB to connect.  Must be a multiple of 10!
 610     CFG_USBCDC_BUFFERSIZE     Size of the buffer (in bytes) that stores
 611                               printf data until it can be sent out in
 612                               64 byte frames.  The buffer is required since
 613                               only one frame per ms can be sent using USB
 614                               CDC (see 'puts' in systeminit.c).
 615
 616     -----------------------------------------------------------------------*/
 617     #define CFG_USB_VID                   (0x239A)
 618     #define CFG_USB_PID                   (0x1002)
 619
 620     #ifdef CFG_BRD_LPC1343_REFDESIGN
 621       // #define CFG_USBHID
 622       #define CFG_USBCDC
 623       #define CFG_USBCDC_BAUDRATE         (115200)
 624       #define CFG_USBCDC_INITTIMEOUT      (5000)
 625       #define CFG_USBCDC_BUFFERSIZE       (256)
 626     #endif
 627
 628     #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
 629       // #define CFG_USBHID
 630       // #define CFG_USBCDC
 631       #define CFG_USBCDC_BAUDRATE         (115200)
 632       #define CFG_USBCDC_INITTIMEOUT      (5000)
 633       #define CFG_USBCDC_BUFFERSIZE       (256)
 634     #endif
 635
 636     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
 637       // #define CFG_USBHID
 638       #define CFG_USBCDC
 639       #define CFG_USBCDC_BAUDRATE         (115200)
 640       #define CFG_USBCDC_INITTIMEOUT      (5000)
 641       #define CFG_USBCDC_BUFFERSIZE       (256)
 642     #endif
 643
 644     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 645       // #define CFG_USBHID
 646       // #define CFG_USBCDC
 647       #define CFG_USBCDC_BAUDRATE         (57600)
 648       #define CFG_USBCDC_INITTIMEOUT      (5000)
 649       #define CFG_USBCDC_BUFFERSIZE       (256)
 650     #endif
 651
 652     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 653       // #define CFG_USBHID
 654       #define CFG_USBCDC
 655       #define CFG_USBCDC_BAUDRATE         (115200)
 656       #define CFG_USBCDC_INITTIMEOUT      (5000)
 657       #define CFG_USBCDC_BUFFERSIZE       (256)
 658     #endif
 659
 660     #ifdef CFG_BRD_LPC1343_OLIMEX_P
 661       // #define CFG_USBHID
 662       #define CFG_USBCDC
 663       #define CFG_USBCDC_BAUDRATE         (115200)
 664       #define CFG_USBCDC_INITTIMEOUT      (5000)
 665       #define CFG_USBCDC_BUFFERSIZE       (256)
 666     #endif
 667
 668     #ifdef CFG_BRD_LPC1343_LPCXPRESSO
 669       // #define CFG_USBHID
 670       #define CFG_USBCDC
 671       #define CFG_USBCDC_BAUDRATE         (115200)
 672       #define CFG_USBCDC_INITTIMEOUT      (5000)
 673       #define CFG_USBCDC_BUFFERSIZE       (256)
 674     #endif
 675 /*=========================================================================*/
 676
 677
 678 /*=========================================================================
 679     PRINTF REDIRECTION
 680     -----------------------------------------------------------------------
 681
 682     CFG_PRINTF_MAXSTRINGSIZE  Maximum size of string buffer for printf
 683     CFG_PRINTF_UART           Will cause all printf statements to be
 684                               redirected to UART
 685     CFG_PRINTF_USBCDC         Will cause all printf statements to be
 686                               redirect to USB Serial
 687     CFG_PRINTF_NEWLINE        This is typically "\r\n" for Windows or
 688                               "\n" for *nix
 689
 690     Note: If no printf redirection definitions are present, all printf
 691     output will be ignored.
 692     -----------------------------------------------------------------------*/
 693     #ifdef CFG_BRD_LPC1343_REFDESIGN
 694       #define CFG_PRINTF_MAXSTRINGSIZE    (255)
 695       // #define CFG_PRINTF_UART
 696       #define CFG_PRINTF_USBCDC
 697       #define CFG_PRINTF_NEWLINE          "\r\n"
 698     #endif
 699
 700     #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
 701       #define CFG_PRINTF_MAXSTRINGSIZE    (255)
 702       #define CFG_PRINTF_UART
 703       // #define CFG_PRINTF_USBCDC
 704       #define CFG_PRINTF_NEWLINE          "\r\n"
 705     #endif
 706
 707     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
 708       #define CFG_PRINTF_MAXSTRINGSIZE    (255)
 709       // #define CFG_PRINTF_UART
 710       #define CFG_PRINTF_USBCDC
 711       #define CFG_PRINTF_NEWLINE          "\r\n"
 712     #endif
 713
 714     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 715       #define CFG_PRINTF_MAXSTRINGSIZE    (255)
 716       #define CFG_PRINTF_UART
 717       // #define CFG_PRINTF_USBCDC
 718       #define CFG_PRINTF_NEWLINE          "\n"
 719     #endif
 720
 721     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 722       #define CFG_PRINTF_MAXSTRINGSIZE    (255)
 723       // #define CFG_PRINTF_UART
 724       #define CFG_PRINTF_USBCDC
 725       #define CFG_PRINTF_NEWLINE          "\r\n"
 726     #endif
 727
 728     #ifdef CFG_BRD_LPC1343_OLIMEX_P
 729       #define CFG_PRINTF_MAXSTRINGSIZE    (255)
 730       // #define CFG_PRINTF_UART
 731       #define CFG_PRINTF_USBCDC
 732       #define CFG_PRINTF_NEWLINE          "\r\n"
 733     #endif
 734
 735     #ifdef CFG_BRD_LPC1343_LPCXPRESSO
 736       #define CFG_PRINTF_MAXSTRINGSIZE    (255)
 737       // #define CFG_PRINTF_UART
 738       #define CFG_PRINTF_USBCDC
 739       #define CFG_PRINTF_NEWLINE          "\r\n"
 740     #endif
 741 /*=========================================================================*/
 742
 743
 744 /*=========================================================================
 745     COMMAND LINE INTERFACE
 746     -----------------------------------------------------------------------
 747
 748     CFG_INTERFACE             If this field is defined the UART or USBCDC
 749                               based command-line interface will be included
 750     CFG_INTERFACE_MAXMSGSIZE  The maximum number of bytes to accept for an
 751                               incoming command
 752     CFG_INTERFACE_PROMPT      The command prompt to display at the start
 753                               of every new data entry line
 754     CFG_INTERFACE_SILENTMODE  If this is set to 1 only text generated in
 755                               response to commands will be send to the
 756                               output buffer.  The command prompt will not
 757                               be displayed and incoming text will not be
 758                               echoed back to the output buffer (allowing
 759                               you to see the text you have input).  This
 760                               is normally only desirable in a situation
 761                               where another MCU is communicating with
 762                               the LPC1343.
 763     CFG_INTERFACE_DROPCR      If this is set to 1 all incoming \r
 764                               characters will be dropped
 765     CFG_INTERFACE_ENABLEIRQ   If this is set to 1 the IRQ pin will be
 766                               set high when a command starts executing
 767                               and will go low when the command has
 768                               finished executing or the LCD is not busy.
 769                               This allows another device to know when a
 770                               new command can safely be sent.
 771     CFG_INTERFACE_IRQPORT     The gpio port for the IRQ/busy pin
 772     CFG_INTERFACE_IRQPIN      The gpio pin number for the IRQ/busy pin
 773     CFG_INTERFACE_SHORTERRORS If this is enabled only short 1 character
 774                               error messages will be returned (followed
 775                               by CFG_PRINTF_NEWLINE), rather than more
 776                               verbose error messages.  The specific
 777                               characters used are defined below.
 778     CFG_INTERFACE_CONFIRMREADY  If this is set to 1 a text confirmation
 779                               will be sent when the command prompt is
 780                               ready for a new command.  This is in
 781                               addition to CFG_INTERFACE_ENABLEIRQ if
 782                               this is also enabled.  The character used
 783                               is defined below.
 784
 785     NOTE:                     The command-line interface will use either
 786                               USB-CDC or UART depending on whether
 787                               CFG_PRINTF_UART or CFG_PRINTF_USBCDC are
 788                               selected.
 789     -----------------------------------------------------------------------*/
 790     #ifdef CFG_BRD_LPC1343_REFDESIGN
 791       #define CFG_INTERFACE
 792       #define CFG_INTERFACE_MAXMSGSIZE    (256)
 793       #define CFG_INTERFACE_PROMPT        "LPC1343 >> "
 794       #define CFG_INTERFACE_SILENTMODE    (0)
 795       #define CFG_INTERFACE_DROPCR        (0)
 796       #define CFG_INTERFACE_ENABLEIRQ     (0)
 797       #define CFG_INTERFACE_IRQPORT       (0)
 798       #define CFG_INTERFACE_IRQPIN        (7)
 799       #define CFG_INTERFACE_SHORTERRORS   (0)
 800       #define CFG_INTERFACE_CONFIRMREADY  (0)
 801     #endif
 802
 803     #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
 804       // #define CFG_INTERFACE
 805       #define CFG_INTERFACE_MAXMSGSIZE    (256)
 806       #define CFG_INTERFACE_PROMPT        "LPC1343 >> "
 807       #define CFG_INTERFACE_SILENTMODE    (0)
 808       #define CFG_INTERFACE_DROPCR        (0)
 809       #define CFG_INTERFACE_ENABLEIRQ     (0)
 810       #define CFG_INTERFACE_IRQPORT       (0)
 811       #define CFG_INTERFACE_IRQPIN        (7)
 812       #define CFG_INTERFACE_SHORTERRORS   (0)
 813       #define CFG_INTERFACE_CONFIRMREADY  (0)
 814     #endif
 815
 816     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
 817       #define CFG_INTERFACE
 818       #define CFG_INTERFACE_MAXMSGSIZE    (256)
 819       #define CFG_INTERFACE_PROMPT        "CMD >> "
 820       #define CFG_INTERFACE_SILENTMODE    (0)
 821       #define CFG_INTERFACE_DROPCR        (0)
 822       #define CFG_INTERFACE_ENABLEIRQ     (0)
 823       #define CFG_INTERFACE_IRQPORT       (0)
 824       #define CFG_INTERFACE_IRQPIN        (7)
 825       #define CFG_INTERFACE_SHORTERRORS   (0)
 826       #define CFG_INTERFACE_CONFIRMREADY  (0)
 827       #define CFG_INTERFACE_SHORTERRORS_UNKNOWNCOMMAND    "?"
 828       #define CFG_INTERFACE_SHORTERRORS_TOOMANYARGS       ">"
 829       #define CFG_INTERFACE_SHORTERRORS_TOOFEWARGS        "<"
 830       #define CFG_INTERFACE_CONFIRMREADY_TEXT             "."
 831     #endif
 832
 833     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 834       #define CFG_INTERFACE
 835       #define CFG_INTERFACE_MAXMSGSIZE    (256)
 836       #define CFG_INTERFACE_PROMPT        ">>"
 837       #define CFG_INTERFACE_SILENTMODE    (1)
 838       #define CFG_INTERFACE_DROPCR        (1)
 839       #define CFG_INTERFACE_ENABLEIRQ     (1)
 840       #define CFG_INTERFACE_IRQPORT       (0)
 841       #define CFG_INTERFACE_IRQPIN        (7)
 842       #define CFG_INTERFACE_SHORTERRORS   (1)
 843       #define CFG_INTERFACE_CONFIRMREADY  (0)
 844       #define CFG_INTERFACE_SHORTERRORS_UNKNOWNCOMMAND    "?"
 845       #define CFG_INTERFACE_SHORTERRORS_TOOMANYARGS       ">"
 846       #define CFG_INTERFACE_SHORTERRORS_TOOFEWARGS        "<"
 847       #define CFG_INTERFACE_CONFIRMREADY_TEXT             "."
 848     #endif
 849
 850     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 851       // #define CFG_INTERFACE
 852       #define CFG_INTERFACE_MAXMSGSIZE    (256)
 853       #define CFG_INTERFACE_PROMPT        "CMD >> "
 854       #define CFG_INTERFACE_SILENTMODE    (0)
 855       #define CFG_INTERFACE_DROPCR        (0)
 856       #define CFG_INTERFACE_ENABLEIRQ     (0)
 857       #define CFG_INTERFACE_IRQPORT       (0)
 858       #define CFG_INTERFACE_IRQPIN        (7)
 859       #define CFG_INTERFACE_SHORTERRORS   (0)
 860       #define CFG_INTERFACE_CONFIRMREADY  (0)
 861     #endif
 862
 863     #ifdef CFG_BRD_LPC1343_OLIMEX_P
 864       #define CFG_INTERFACE
 865       #define CFG_INTERFACE_MAXMSGSIZE    (256)
 866       #define CFG_INTERFACE_PROMPT        "LPC-P1343 >> "
 867       #define CFG_INTERFACE_SILENTMODE    (0)
 868       #define CFG_INTERFACE_DROPCR        (0)
 869       #define CFG_INTERFACE_ENABLEIRQ     (0)
 870       #define CFG_INTERFACE_IRQPORT       (0)
 871       #define CFG_INTERFACE_IRQPIN        (7)
 872       #define CFG_INTERFACE_SHORTERRORS   (0)
 873       #define CFG_INTERFACE_CONFIRMREADY  (0)
 874     #endif
 875
 876     #ifdef CFG_BRD_LPC1343_LPCXPRESSO
 877       #define CFG_INTERFACE
 878       #define CFG_INTERFACE_MAXMSGSIZE    (256)
 879       #define CFG_INTERFACE_PROMPT        "LPC-P1343 >> "
 880       #define CFG_INTERFACE_SILENTMODE    (0)
 881       #define CFG_INTERFACE_DROPCR        (0)
 882       #define CFG_INTERFACE_ENABLEIRQ     (0)
 883       #define CFG_INTERFACE_IRQPORT       (0)
 884       #define CFG_INTERFACE_IRQPIN        (7)
 885       #define CFG_INTERFACE_SHORTERRORS   (0)
 886       #define CFG_INTERFACE_CONFIRMREADY  (0)
 887     #endif
 888 /*=========================================================================*/
 889
 890
 891 /*=========================================================================
 892     PWM SETTINGS
 893     -----------------------------------------------------------------------
 894
 895     CFG_PWM                     If this is defined, a basic PWM driver
 896                                 will be included using 16-bit Timer 1 and
 897                                 Pin 1.9 (MAT0) for the PWM output.  In
 898                                 order to allow for a fixed number of
 899                                 pulses to be generated, some PWM-specific
 900                                 code is required in the 16-Bit Timer 1
 901                                 ISR.  See "core/timer16/timer16.c" for
 902                                 more information.
 903     CFG_PWM_DEFAULT_PULSEWIDTH  The default pulse width in ticks
 904     CFG_PWM_DEFAULT_DUTYCYCLE   The default duty cycle in percent
 905
 906     DEPENDENCIES:               PWM output requires the use of 16-bit
 907                                 timer 1 and pin 1.9 (CT16B1_MAT0).
 908     -----------------------------------------------------------------------*/
 909     // #define CFG_PWM
 910     #define CFG_PWM_DEFAULT_PULSEWIDTH  (CFG_CPU_CCLK / 1000)
 911     #define CFG_PWM_DEFAULT_DUTYCYCLE   (50)
 912 /*=========================================================================*/
 913
 914
 915 /*=========================================================================
 916     STEPPER MOTOR SETTINGS
 917     -----------------------------------------------------------------------
 918
 919     CFG_STEPPER                 If this is defined, a simple bi-polar
 920                                 stepper motor will be included for common
 921                                 H-bridge chips like the L293D or SN754410N
 922
 923     DEPENDENCIES:               STEPPER requires the use of pins 3.0-3 and
 924                                 32-bit Timer 0.
 925     -----------------------------------------------------------------------*/
 926     // #define CFG_STEPPER
 927 /*=========================================================================*/
 928
 929
 930 /*=========================================================================
 931     EEPROM
 932     -----------------------------------------------------------------------
 933
 934     CFG_I2CEEPROM             If defined, drivers for the onboard EEPROM
 935                               will be included during build
 936     CFG_I2CEEPROM_SIZE        The number of bytes available on the EEPROM
 937
 938     -----------------------------------------------------------------------*/
 939     #ifdef CFG_BRD_LPC1343_REFDESIGN
 940       #define CFG_I2CEEPROM
 941       #define CFG_I2CEEPROM_SIZE          (3072)
 942     #endif
 943
 944     #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
 945       // #define CFG_I2CEEPROM
 946       #define CFG_I2CEEPROM_SIZE          (3072)
 947     #endif
 948
 949     #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 950       #define CFG_I2CEEPROM
 951       #define CFG_I2CEEPROM_SIZE          (3072)
 952     #endif
 953
 954     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 955       #define CFG_I2CEEPROM
 956       #define CFG_I2CEEPROM_SIZE          (3072)
 957     #endif
 958
 959     #ifdef CFG_BRD_LPC1343_OLIMEX_P
 960       // #define CFG_I2CEEPROM
 961       #define CFG_I2CEEPROM_SIZE          (3072)
 962     #endif
 963
 964     #ifdef CFG_BRD_LPC1343_LPCXPRESSO
 965       // #define CFG_I2CEEPROM
 966       #define CFG_I2CEEPROM_SIZE          (3072)
 967     #endif
 968 /*=========================================================================*/
 969
 970
 971 /*=========================================================================
 972     EEPROM MEMORY MAP
 973     -----------------------------------------------------------------------
 974     EEPROM is used to persist certain user modifiable values to make
 975     sure that these changes remain in effect after a reset or hard
 976     power-down.  The addresses in EEPROM for these various system
 977     settings/values are defined below.  The first 256 bytes of EEPROM
 978     are reserved for this (0x0000..0x00FF).
 979
 980     CFG_EEPROM_RESERVED       The last byte of reserved EEPROM memory
 981
 982           EEPROM Address (0x0000..0x00FF)
 983           ===============================
 984           0 1 2 3 4 5 6 7 8 9 A B C D E F
 985     000x  x x x x x x x x . x x . . . . .   Chibi
 986     001x  . . . . . . . . . . . . . . . .
 987     002x  x x x x . . . . . . . . . . . .   UART
 988     003x  x x x x x x x x x x x x x x x x   Touch Screen Calibration
 989     004x  x x x x x x x x x x x x x x . .   Touch Screen Calibration
 990     005x  . . . . . . . . . . . . . . . .
 991     006x  . . . . . . . . . . . . . . . .
 992     007x  . . . . . . . . . . . . . . . .
 993     008x  . . . . . . . . . . . . . . . .
 994     009x  . . . . . . . . . . . . . . . .
 995     00Ax  . . . . . . . . . . . . . . . .
 996     00Bx  . . . . . . . . . . . . . . . .
 997     00Cx  . . . . . . . . . . . . . . . .
 998     00Dx  . . . . . . . . . . . . . . . .
 999     00Ex  . . . . . . . . . . . . . . . .
1000     00Fx  . . . . . . . . . . . . . . . .
1001
1002     -----------------------------------------------------------------------*/
1003     #define CFG_EEPROM_RESERVED                 (0x00FF)              // Protect first 256 bytes of memory
1004     #define CFG_EEPROM_CHIBI_IEEEADDR           (uint16_t)(0x0000)    // 8
1005     #define CFG_EEPROM_CHIBI_SHORTADDR          (uint16_t)(0x0009)    // 2
1006     #define CFG_EEPROM_UART_SPEED               (uint16_t)(0x0020)    // 4
1007     #define CFG_EEPROM_TOUCHSCREEN_CALIBRATED   (uint16_t)(0x0030)    // 1
1008     #define CFG_EEPROM_TOUCHSCREEN_CAL_AN       (uint16_t)(0x0031)    // 4
1009     #define CFG_EEPROM_TOUCHSCREEN_CAL_BN       (uint16_t)(0x0035)    // 4
1010     #define CFG_EEPROM_TOUCHSCREEN_CAL_CN       (uint16_t)(0x0039)    // 4
1011     #define CFG_EEPROM_TOUCHSCREEN_CAL_DN       (uint16_t)(0x003D)    // 4
1012     #define CFG_EEPROM_TOUCHSCREEN_CAL_EN       (uint16_t)(0x0041)    // 4
1013     #define CFG_EEPROM_TOUCHSCREEN_CAL_FN       (uint16_t)(0x0045)    // 4
1014     #define CFG_EEPROM_TOUCHSCREEN_CAL_DIVIDER  (uint16_t)(0x0049)    // 4
1015     #define CFG_EEPROM_TOUCHSCREEN_THRESHHOLD   (uint16_t)(0x004D)    // 1
1016 /*=========================================================================*/
1017
1018
1019 /*=========================================================================
1020     LM75B TEMPERATURE SENSOR
1021     -----------------------------------------------------------------------
1022
1023     CFG_LM75B                 If defined, drivers for an optional LM75B
1024                               temperature sensor will be included during
1025                               build (requires external HW)
1026
1027     -----------------------------------------------------------------------*/
1028     // #define CFG_LM75B
1029 /*=========================================================================*/
1030
1031
1032 /*=========================================================================
1033     CHIBI WIRELESS STACK
1034     -----------------------------------------------------------------------
1035
1036     CFG_CHIBI                   If defined, the CHIBI wireless stack will be
1037                                 included during build.  Requires external HW.
1038     CFG_CHIBI_MODE              The mode to use when receiving and transmitting
1039                                 wireless data.  See chb_drvr.h for possible values
1040     CFG_CHIBI_POWER             The power level to use when transmitting.  See
1041                                 chb_drvr.h for possible values
1042     CFG_CHIBI_CHANNEL           802.15.4 Channel (0 = 868MHz, 1-10 = 915MHz)
1043     CFG_CHIBI_PANID             16-bit PAN Identifier (ex.0x1234)
1044     CFG_CHIBI_PROMISCUOUS       Set to 1 to enabled promiscuous mode or
1045                                 0 to disable it.  If promiscuous mode is
1046                                 enabled be sure to set CFG_CHIBI_BUFFERSIZE
1047                                 to an appropriately large value (ex. 1024)
1048     CFG_CHIBI_BUFFERSIZE        The size of the message buffer in bytes
1049
1050     DEPENDENCIES:               Chibi requires the use of SSP0, 16-bit timer
1051                                 0 and pins 3.1, 3.2, 3.3.  It also requires
1052                                 the presence of CFG_I2CEEPROM.
1053
1054     NOTE:                       These settings are not relevant to all boards!
1055                                 'tools/schematics/AT86RF212LPC1114_v1.6.pdf'
1056                                 show how 'CHIBI' is meant to be connected
1057     -----------------------------------------------------------------------*/
1058     #ifdef CFG_BRD_LPC1343_REFDESIGN
1059       // #define CFG_CHIBI
1060       #define CFG_CHIBI_MODE              (0)                 // OQPSK_868MHZ
1061       #define CFG_CHIBI_POWER             (0xE9)              // CHB_PWR_EU2_3DBM
1062       #define CFG_CHIBI_CHANNEL           (0)                 // 868-868.6 MHz
1063       #define CFG_CHIBI_PANID             (0x1234)
1064       #define CFG_CHIBI_PROMISCUOUS       (0)
1065       #define CFG_CHIBI_BUFFERSIZE        (128)
1066     #endif
1067
1068     #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
1069       // #define CFG_CHIBI
1070       #define CFG_CHIBI_MODE              (0)                 // OQPSK_868MHZ
1071       #define CFG_CHIBI_POWER             (0xE9)              // CHB_PWR_EU2_3DBM
1072       #define CFG_CHIBI_CHANNEL           (0)                 // 868-868.6 MHz
1073       #define CFG_CHIBI_PANID             (0x1234)
1074       #define CFG_CHIBI_PROMISCUOUS       (0)
1075       #define CFG_CHIBI_BUFFERSIZE        (128)
1076     #endif
1077
1078     #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
1079       // #define CFG_CHIBI
1080       #define CFG_CHIBI_MODE              (0)                 // OQPSK_868MHZ
1081       #define CFG_CHIBI_POWER             (0xE9)              // CHB_PWR_EU2_3DBM
1082       #define CFG_CHIBI_CHANNEL           (0)                 // 868-868.6 MHz
1083       #define CFG_CHIBI_PANID             (0x1234)
1084       #define CFG_CHIBI_PROMISCUOUS       (0)
1085       #define CFG_CHIBI_BUFFERSIZE        (128)
1086     #endif
1087
1088     #ifdef CFG_BRD_LPC1343_802154USBSTICK
1089       #define CFG_CHIBI
1090       #define CFG_CHIBI_MODE              (0)                 // OQPSK_868MHZ
1091       #define CFG_CHIBI_POWER             (0xE9)              // CHB_PWR_EU2_3DBM
1092       #define CFG_CHIBI_CHANNEL           (0)                 // 868-868.6 MHz
1093       #define CFG_CHIBI_PANID             (0x1234)
1094       #define CFG_CHIBI_PROMISCUOUS       (0)
1095       #define CFG_CHIBI_BUFFERSIZE        (1024)
1096     #endif
1097
1098     #ifdef CFG_BRD_LPC1343_OLIMEX_P
1099       // #define CFG_CHIBI
1100       #define CFG_CHIBI_MODE              (0)                 // OQPSK_868MHZ
1101       #define CFG_CHIBI_POWER             (0xE9)              // CHB_PWR_EU2_3DBM
1102       #define CFG_CHIBI_CHANNEL           (0)                 // 868-868.6 MHz
1103       #define CFG_CHIBI_PANID             (0x1234)
1104       #define CFG_CHIBI_PROMISCUOUS       (0)
1105       #define CFG_CHIBI_BUFFERSIZE        (128)
1106     #endif
1107
1108     #ifdef CFG_BRD_LPC1343_LPCXPRESSO
1109       // #define CFG_CHIBI
1110       #define CFG_CHIBI_MODE              (0)                 // OQPSK_868MHZ
1111       #define CFG_CHIBI_POWER             (0xE9)              // CHB_PWR_EU2_3DBM
1112       #define CFG_CHIBI_CHANNEL           (0)                 // 868-868.6 MHz
1113       #define CFG_CHIBI_PANID             (0x1234)
1114       #define CFG_CHIBI_PROMISCUOUS       (0)
1115       #define CFG_CHIBI_BUFFERSIZE        (128)
1116     #endif
1117 /*=========================================================================*/
1118
1119
1120 /*=========================================================================
1121     TFT LCD
1122     -----------------------------------------------------------------------
1123
1124     CFG_TFTLCD                  If defined, this will cause drivers for
1125                                 a pre-determined LCD screen to be included
1126                                 during build.  Only one LCD driver can be
1127                                 included during the build process (for ex.
1128                                 'drivers/displays/hw/ILI9325.c')
1129     CFG_TFTLCD_INCLUDESMALLFONTS If set to 1, smallfont support will be
1130                                 included for 3x6, 5x8, 7x8 and 8x8 fonts.
1131                                 This should only be enabled if these small
1132                                 fonts are required since there is already
1133                                 support for larger fonts generated with
1134                                 Dot Factory
1135                                 http://www.pavius.net/downloads/tools/53-the-dot-factory
1136     CFG_TFTLCD_TS_DEFAULTTHRESHOLD  Default minimum threshold to trigger a
1137                                 touch event with the touch screen (and exit
1138                                 from 'tsWaitForEvent' in touchscreen.c).
1139                                 Should be an 8-bit value somewhere between
1140                                 8 and 75 in normal circumstances.  This is
1141                                 the default value and may be overriden by
1142                                 a value stored in EEPROM.
1143     CFG_TFTLCD_TS_KEYPADDELAY   The delay in milliseconds between key
1144                                 presses in dialogue boxes
1145
1146     PIN LAYOUT:                 The pin layout that is used by this driver
1147                                 can be seen in the following schematic:
1148                                 /tools/schematics/Breakout_TFTLCD_ILI9325_v1.3
1149
1150     DEPENDENCIES:               TFTLCD requires the use of pins 1.8, 1.9,
1151                                 1.10, 1.11, 3.3 and 2.1-9.
1152     -----------------------------------------------------------------------*/
1153     #ifdef CFG_BRD_LPC1343_REFDESIGN
1154       // #define CFG_TFTLCD
1155       #define CFG_TFTLCD_INCLUDESMALLFONTS   (0)
1156       #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
1157       #define CFG_TFTLCD_TS_KEYPADDELAY      (100)
1158     #endif
1159
1160     #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
1161       // #define CFG_TFTLCD
1162       #define CFG_TFTLCD_INCLUDESMALLFONTS   (0)
1163       #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
1164       #define CFG_TFTLCD_TS_KEYPADDELAY      (100)
1165     #endif
1166
1167     #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
1168       #define CFG_TFTLCD
1169       #define CFG_TFTLCD_INCLUDESMALLFONTS   (0)
1170       #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
1171       #define CFG_TFTLCD_TS_KEYPADDELAY      (100)
1172     #endif
1173
1174     #ifdef CFG_BRD_LPC1343_802154USBSTICK
1175       // #define CFG_TFTLCD
1176       #define CFG_TFTLCD_INCLUDESMALLFONTS   (0)
1177       #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
1178       #define CFG_TFTLCD_TS_KEYPADDELAY      (100)
1179     #endif
1180
1181     #ifdef CFG_BRD_LPC1343_OLIMEX_P
1182       // #define CFG_TFTLCD
1183       #define CFG_TFTLCD_INCLUDESMALLFONTS   (0)
1184       #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
1185       #define CFG_TFTLCD_TS_KEYPADDELAY      (100)
1186     #endif
1187
1188     #ifdef CFG_BRD_LPC1343_LPCXPRESSO
1189       // #define CFG_TFTLCD
1190       #define CFG_TFTLCD_INCLUDESMALLFONTS   (0)
1191       #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
1192       #define CFG_TFTLCD_TS_KEYPADDELAY      (100)
1193     #endif
1194 /*=========================================================================*/
1195
1196
1197 /*=========================================================================
1198     Monochrome/Bitmap Graphic LCDs
1199     -----------------------------------------------------------------------
1200
1201     CFG_ST7565                If defined, this will cause drivers for
1202                               the 128x64 pixel ST7565 LCD to be included
1203     CFG_SSD1306               If defined, this will cause drivers for
1204                               the 128x64 pixel SSD1306 OLED display to be
1205                               included
1206     CFG_SHARPMEM              If defined, this will cause drivers for
1207                               Sharp Memory Displays to be included
1208
1209     DEPENDENCIES:             ST7565 requires the use of pins 2.1-6.
1210     DEPENDENCIES:             SSD1306 requires the use of pins 2.1-6.
1211     DEPENDENCIES:             SHARPMEM requires the use of pins 2.1-4.
1212     -----------------------------------------------------------------------*/
1213     // #define CFG_ST7565
1214     // #define CFG_SSD1306
1215     // #define CFG_SHARPMEM
1216 /*=========================================================================*/
1217
1218
1219 /*=========================================================================
1220     RSA Encryption
1221     -----------------------------------------------------------------------
1222
1223     CFG_RSA                     If defined, support for basic RSA
1224                                 encryption will be included.
1225     CFG_RSA_BITS                Indicates the number of bits used for
1226                                 RSA encryption keys.  To keep code size
1227                                 reasonable, RSA encryption is currently
1228                                 limited to using 64-bit or 32-bit numbers,
1229                                 with 64-bit providing higher security, and
1230                                 32-bit providing smaller encrypted text
1231                                 size.
1232
1233     NOTE:                       Please note that Printf can not be
1234                                 used to display 64-bit values (%lld)!
1235     -----------------------------------------------------------------------*/
1236     // #define CFG_RSA
1237     #define CFG_RSA_BITS                  (32)
1238 /*=========================================================================*/
1239
1240
1241
1242
1243 /*=========================================================================
1244   CONFIG FILE VALIDATION
1245   -------------------------------------------------------------------------
1246   Basic error checking to make sure that incompatible defines are not
1247   enabled at the same time, etc.
1248
1249   =========================================================================*/
1250
1251 #if !defined CFG_BRD_LPC1343_REFDESIGN && \
1252   !defined CFG_BRD_LPC1343_REFDESIGN_MINIMAL && \
1253   !defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB && \
1254   !defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART && \
1255   !defined CFG_BRD_LPC1343_802154USBSTICK && \
1256   !defined CFG_BRD_LPC1343_OLIMEX_P && \
1257   !defined CFG_BRD_LPC1343_LPCXPRESSO
1258   #error "You must defined a target board (CFG_BRD_LPC1343_REFDESIGN or CFG_BRD_LPC1343_REFDESIGN_MINIMAL or CFG_BRD_LPC1343_TFTLCDSTANDALONE or CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART or CFG_BRD_LPC1343_802154USBSTICK or CFG_BRD_LPC1343_LPCXPRESSO)"
1259 #endif
1260
1261 #if defined CFG_PRINTF_USBCDC && defined CFG_PRINTF_UART
1262   #error "CFG_PRINTF_UART or CFG_PRINTF_USBCDC cannot both be defined at once"
1263 #endif
1264
1265 #if defined CFG_PRINTF_USBCDC && !defined CFG_USBCDC
1266   #error "CFG_PRINTF_CDC requires CFG_USBCDC to be defined as well"
1267 #endif
1268
1269 #if defined CFG_USBCDC && defined CFG_USBHID
1270   #error "Only one USB class can be defined at a time (CFG_USBCDC or CFG_USBHID)"
1271 #endif
1272
1273 #if defined CFG_SSP0_SCKPIN_2_11 && defined CFG_SSP0_SCKPIN_0_6
1274   #error "Only one SCK pin can be defined at a time for SSP0"
1275 #endif
1276
1277 #if !defined CFG_SSP0_SCKPIN_2_11 && !defined CFG_SSP0_SCKPIN_0_6
1278   #error "An SCK pin must be selected for SSP0 (CFG_SSP0_SCKPIN_2_11 or CFG_SSP0_SCKPIN_0_6)"
1279 #endif
1280
1281 #ifdef CFG_INTERFACE
1282   #if !defined CFG_PRINTF_UART && !defined CFG_PRINTF_USBCDC
1283     #error "CFG_PRINTF_UART or CFG_PRINTF_USBCDC must be defined for for CFG_INTERFACE Input/Output"
1284   #endif
1285   #if defined CFG_PRINTF_USBCDC && CFG_INTERFACE_SILENTMODE == 1
1286     #error "CFG_INTERFACE_SILENTMODE typically isn't enabled with CFG_PRINTF_USBCDC"
1287   #endif
1288 #endif
1289
1290 #ifdef CFG_CHIBI
1291   #if !defined CFG_I2CEEPROM
1292     #error "CFG_CHIBI requires CFG_I2CEEPROM to store and retrieve addresses"
1293   #endif
1294   #ifdef CFG_SDCARD
1295     #error "CFG_CHIBI and CFG_SDCARD can not be defined at the same time. Only one SPI block is available on the LPC1343."
1296   #endif
1297   #ifdef CFG_TFTLCD
1298     #error "CFG_CHIBI and CFG_TFTLCD can not be defined at the same time since they both use pins 1.8, 1.9 and 1.10."
1299   #endif
1300   #ifdef CFG_PWM
1301     #error "CFG_CHIBI and CFG_PWM can not be defined at the same time since they both use pin 1.9."
1302   #endif
1303   #if CFG_CHIBI_PROMISCUOUS != 0 && CFG_CHIBI_PROMISCUOUS != 1
1304     #error "CFG_CHIBI_PROMISCUOUS must be equal to either 1 or 0"
1305   #endif
1306   #if !defined GPIO_ENABLE_IRQ1
1307     #error "GPIO_ENABLE_IRQ1 must be enabled when using Chibi (Chibi IRQ is on GPIO1.8)"
1308   #endif
1309 #endif
1310
1311 #ifdef CFG_TFTLCD
1312   #ifdef CFG_ST7565
1313     #error "CFG_TFTLCD and CFG_ST7565 can not be defined at the same time."
1314   #endif
1315   #ifdef CFG_SSD1306
1316     #error "CFG_TFTLCD and CFG_SSD1306 can not be defined at the same time."
1317   #endif
1318   #ifdef CFG_SHARPMEM
1319     #error "CFG_TFTLCD and CFG_SHARPMEM can not be defined at the same time."
1320   #endif
1321   #ifdef CFG_PWM
1322     #error "CFG_TFTLCD and CFG_PWM can not be defined at the same time since they both use pin 1.9."
1323   #endif
1324   #if !defined CFG_I2CEEPROM
1325     #error "CFG_TFTLCD requires CFG_I2CEEPROM to store and retrieve configuration settings"
1326   #endif
1327 #endif
1328
1329 #ifdef CFG_SDCARD
1330   #ifdef CFG_STEPPER
1331     #error  "CFG_SDCARD and CFG_STEPPER can not be defined at the same time since they both use pin 3.0."
1332   #endif
1333 #endif
1334
1335 #ifdef CFG_ST7565
1336   #ifdef CFG_SSD1306
1337     #error "CFG_ST7565 and CFG_SSD1306 can not be defined at the same time"
1338   #endif
1339 #endif
1340
1341 #ifdef CFG_RSA
1342   #if CFG_RSA_BITS != 64 && CFG_RSA_BITS != 32
1343     #error "CFG_RSA_BITS must be equal to either 32 or 64."
1344   #endif
1345 #endif
1346
1347 #if ADC_AVERAGING_ENABLE && ADC_AVERAGING_SAMPLES < 1
1348   #error "ADC_AVERAGING_SAMPLES must be 1 or higher when ADC averaging is enabled"
1349 #endif
1350
1351 #endif