v1.0.0
[hackover2013-badge-firmware.git] / projectconfig.h
1 /**************************************************************************/
2 /*!
3 @file projectconfig.h
4 @author K. Townsend (microBuilder.eu)
5
6 @section LICENSE
7
8 Software License Agreement (BSD License)
9
10 Copyright (c) 2012, microBuilder SARL
11 All rights reserved.
12
13 Redistribution and use in source and binary forms, with or without
14 modification, are permitted provided that the following conditions are met:
15 1. Redistributions of source code must retain the above copyright
16 notice, this list of conditions and the following disclaimer.
17 2. Redistributions in binary form must reproduce the above copyright
18 notice, this list of conditions and the following disclaimer in the
19 documentation and/or other materials provided with the distribution.
20 3. Neither the name of the copyright holders nor the
21 names of its contributors may be used to endorse or promote products
22 derived from this software without specific prior written permission.
23
24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY
25 EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
26 WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY
28 DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
29 (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
30 LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
31 ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32 (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
33 SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 */
35 /**************************************************************************/
36
37 #ifndef _PROJECTCONFIG_H_
38 #define _PROJECTCONFIG_H_
39
40 #include "lpc134x.h"
41 #include "sysdefs.h"
42
43 /*=========================================================================
44 BOARD SELECTION
45
46 Because several boards use this code library with sometimes slightly
47 different pin configuration, you will need to specify which board you
48 are using by enabling one of the following definitions. The code base
49 will then try to configure itself accordingly for that board.
50
51 CFG_BRD_LPC1343_REFDESIGN
52 =========================
53
54 microBuilder.eu LPC1343 Reference Design base board with
55 on-board peripherals initialised (EEPROM, USB or UART CLI, etc.)
56
57 This is the recommended starting point for new development
58 since it makes it easy to send printf output to USB CDC, access
59 the on-board EEPROM, etc.
60
61 CFG_BRD_LPC1343_REFDESIGN_MINIMAL
62 =================================
63
64 microBuilder.eu LPC1343 Reference Design base board with
65 only the most common peripherals initialised by default.
66
67 Results in smallest code since EEPROM, USB, etc., are not
68 initialised on startup. By default, only the following
69 peripherals are initialised by systemInit():
70
71 - CPU (Configures the PLL, etc.)
72 - GPIO
73 - SysTick Timer
74 - UART (with printf support) *
75
76 * Can be removed to save 0.8kb in debug and 0.3 kb in
77 release. Comment out 'CFG_PRINTF_UART' to disable it.
78
79 The code size can be further reduced by several KB by removing
80 any IRQ Handlers that are not used. The I2C IRQHandler, for
81 example, uses ~1KB of flash in debug and ~400KB in release mode,
82 but because it is referenced in the startup code it is always
83 included even if I2C is never used in the project.
84
85 Other IRQ Handlers that you might be able to comment out
86 to save some space are:
87
88 IRQ Handler Debug Release
89 ------------------------- ------ -------
90 I2C_IRQHandler 1160 b 400 b
91 SSP_IRQHandler 160 b 76 b
92 UART_IRQHandler 246 b 116 b
93 WAKEUP_IRQHandler 160 b 100 b
94 WDT_IRQHandler 50 b 28 b
95
96 CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
97 ====================================
98
99 microBuilder.eu/Adafruit Stand-Alone "Smart LCD" with USB enabled
100 for the CLI interface.
101
102 CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
103 =====================================
104
105 microBuilder.eu/Adafruit Stand-Alone "Smart LCD" with UART enabled
106 for the CLI interface.
107
108 CFG_BRD_LPC1343_802154USBSTICK
109 ==============================
110
111 microBuilder.eu USB stick 802.15.4 868/915MHz RF transceiver
112
113 CFG_BRD_LPC1343_OLIMEX_P
114 ==============================
115
116 Simple Olimex LPC1343 breakout board
117
118 CFG_BRD_LPC1343_LPCXPRESSO
119 ==============================
120
121 LPC1343 LPCXpresso board
122
123 -----------------------------------------------------------------------*/
124 #define CFG_BRD_LPC1343_REFDESIGN
125 // #define CFG_BRD_LPC1343_REFDESIGN_MINIMAL
126 // #define CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
127 // #define CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
128 // #define CFG_BRD_LPC1343_802154USBSTICK
129 // #define CFG_BRD_LPC1343_OLIMEX_P
130 // #define CFG_BRD_LPC1343_LPCXPRESSO
131 /*=========================================================================*/
132
133
134 /**************************************************************************
135 PIN USAGE
136 -----------------------------------------------------------------------
137 This table tries to give an indication of which GPIO pins and
138 peripherals are used by the available drivers and SW examples. Only
139 dedicated GPIO pins available on the LPC1343 Reference Board are shown
140 below. Any unused peripheral blocks like I2C, SSP, ADC, etc., can
141 also be used as GPIO if they are available.
142
143 PORT 1 PORT 2 PORT 3
144 ========= ================= =======
145 8 9 10 11 1 2 3 4 5 6 7 8 9 0 1 2 3
146
147 SDCARD . . . . . . . . . . . . . X . . .
148 PWM . X . . . . . . . . . . . . . . .
149 STEPPER . . . . . . . . . . . . . X X X X
150 CHIBI X X X . . . . . . . . . . . . . .
151 ILI9325/8 X X X X X X X X X X X X X . . . X
152 ST7565 X X X X X X X X X X X X X . . . X
153 ST7735 . . . . X X X X X X . . . . . . .
154 SHARPMEM . . . . X X X X . . . . . . . . .
155 SSD1306 SPI . . . . X X X . X X . . . . . . .
156 SSD1306 I2C . . . . . X . . . . . . . . . . .
157 SSD1351 . . . . X X X X X . . . . . . . .
158 MCP121 . . . . . . . . . . . . . . X . .
159 PN532 [3] . . . . . . . . . . . . . . X X .
160
161 TIMERS SSP ADC UART
162 ====================== === ======= ====
163 16B0 16B1 32B0 32B1 0 0 1 2 3 0
164
165 SDCARD . . . . X . . . . .
166 PWM . X . . . . . . . .
167 PMU [1] . . X . . . . . . .
168 USB . . . X . . . . . .
169 STEPPER . . X . . . . . . .
170 CHIBI x . . . X . . . . .
171 ILI9325/8 . . . . . X X X X .
172 ST7565 . . . . . X X X X .
173 ST7535 . . . . . . . . . .
174 SHARPMEM . . . . . . . . . .
175 SSD1306 SPI . . . . . . . . . .
176 SSD1306 I2C . . . . . . . . . .
177 INTERFACE . . . . . . . . . X[2]
178
179 [1] PMU uses 32-bit Timer 0 for SW wakeup from deep-sleep. This timer
180 can safely be used by other peripherals, but may need to be
181 reconfigured when you wakeup from deep-sleep.
182 [2] INTERFACE can be configured to use either USBCDC or UART
183 [3] P3.2 is only used with the I2C bus (for IRQ)
184
185 **************************************************************************/
186
187
188 /**************************************************************************
189 I2C Addresses
190 -----------------------------------------------------------------------
191 The following addresses are used by the different I2C sensors included
192 in the code base [1]
193
194 HEX BINARY
195 ==== ========
196 ISL12022M (RTC) 0xDE 1101111x
197 ISL12022M (SRAM) 0xAE 1010111x
198 LM75B 0x90 1001000x
199 MCP24AA 0xA0 1010000x
200 MCP4725 0xC0 1100000x
201 TSL2561 0x72 0111001x
202 TCS3414 0x72 0111001x
203 PN532 0x48 0100100x
204 SSD1306_I2C 0x78 0111100x // Assumes SA0 = GND
205
206 [1] Alternative addresses may exists, but the addresses listed in this
207 table are the values used in the code base
208
209 **************************************************************************/
210
211
212 /*=========================================================================
213 FIRMWARE VERSION SETTINGS
214 -----------------------------------------------------------------------*/
215 #define CFG_FIRMWARE_VERSION_MAJOR (1)
216 #define CFG_FIRMWARE_VERSION_MINOR (0)
217 #define CFG_FIRMWARE_VERSION_REVISION (0)
218 /*=========================================================================*/
219
220
221 /*=========================================================================
222 CORE CPU SETTINGS
223 -----------------------------------------------------------------------
224
225 CFG_CPU_CCLK Value is for reference only. 'core/cpu/cpu.c' must
226 be modified to change the clock speed, but the value
227 should be indicated here since CFG_CPU_CCLK is used by
228 other peripherals to determine timing.
229
230 -----------------------------------------------------------------------*/
231 #define CFG_CPU_CCLK (72000000) // 1 tick = 13.88nS
232 /*=========================================================================*/
233
234
235 /*=========================================================================
236 SYSTICK TIMER
237 -----------------------------------------------------------------------
238
239 CFG_SYSTICK_DELAY_IN_MS The number of milliseconds between each tick
240 of the systick timer.
241
242 -----------------------------------------------------------------------*/
243 #define CFG_SYSTICK_DELAY_IN_MS (1)
244 /*=========================================================================*/
245
246
247 /*=========================================================================
248 GPIO INTERRUPTS
249 -----------------------------------------------------------------------
250
251 IF you wish to use the GPIO interrupt handlers elsewhere in your code,
252 you should probably define a seperate IRQHandler for the appropriate
253 GPIO bank rather than using the definitions in core/gpio/gpio.c (to
254 avoid causing problems in other projects, and to make updates easier,
255 etc.) To disable the default IRQHandler, simply comment out the
256 define below for the appropriate GPIO bank and implement the handler
257 somewhere else.
258
259 GPIO_ENABLE_IRQ0 If defined, PIOINT0_IRQHandler will be declared and
260 handled in core/gpio/gpio.c
261 GPIO_ENABLE_IRQ1 If defined, PIOINT1_IRQHandler will be declared and
262 handled in core/gpio/gpio.c
263 GPIO_ENABLE_IRQ2 If defined, PIOINT2_IRQHandler will be declared and
264 handled in core/gpio/gpio.c
265 GPIO_ENABLE_IRQ3 If defined, PIOINT3_IRQHandler will be declared and
266 handled in core/gpio/gpio.c
267
268 -----------------------------------------------------------------------*/
269 #ifdef CFG_BRD_LPC1343_REFDESIGN
270 // #define GPIO_ENABLE_IRQ0
271 #define GPIO_ENABLE_IRQ1
272 // #define GPIO_ENABLE_IRQ2
273 // #define GPIO_ENABLE_IRQ3
274 #endif
275
276 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
277 // #define GPIO_ENABLE_IRQ0
278 #define GPIO_ENABLE_IRQ1
279 // #define GPIO_ENABLE_IRQ2
280 // #define GPIO_ENABLE_IRQ3
281 #endif
282
283 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
284 // #define GPIO_ENABLE_IRQ0
285 #define GPIO_ENABLE_IRQ1
286 // #define GPIO_ENABLE_IRQ2
287 // #define GPIO_ENABLE_IRQ3
288 #endif
289
290 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
291 // #define GPIO_ENABLE_IRQ0
292 #define GPIO_ENABLE_IRQ1
293 // #define GPIO_ENABLE_IRQ2
294 // #define GPIO_ENABLE_IRQ3
295 #endif
296
297 #ifdef CFG_BRD_LPC1343_802154USBSTICK
298 // #define GPIO_ENABLE_IRQ0
299 #define GPIO_ENABLE_IRQ1
300 // #define GPIO_ENABLE_IRQ2
301 // #define GPIO_ENABLE_IRQ3
302 #endif
303
304 #ifdef CFG_BRD_LPC1343_OLIMEX_P
305 // #define GPIO_ENABLE_IRQ0
306 #define GPIO_ENABLE_IRQ1
307 // #define GPIO_ENABLE_IRQ2
308 // #define GPIO_ENABLE_IRQ3
309 #endif
310
311 #ifdef CFG_BRD_LPC1343_LPCXPRESSO
312 // #define GPIO_ENABLE_IRQ0
313 #define GPIO_ENABLE_IRQ1
314 // #define GPIO_ENABLE_IRQ2
315 // #define GPIO_ENABLE_IRQ3
316 #endif
317 /*=========================================================================*/
318
319
320 /*=========================================================================
321 ALTERNATE RESET PIN
322 -----------------------------------------------------------------------
323
324 CFG_ALTRESET If defined, indicates that a GPIO pin should be
325 configured as an alternate reset pin in addition
326 to the dedicated reset pin.
327 CFG_ALTRESET_PORT The GPIO port where the alt reset pin is located
328 CFG_ALTRESET_PIN The GPIO pin where the alt reset pin is located
329
330 -----------------------------------------------------------------------*/
331 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
332 #define CFG_ALTRESET
333 #define CFG_ALTRESET_PORT (1)
334 #define CFG_ALTRESET_PIN (5) // P1.5 = RTS
335 #endif
336 /*=========================================================================*/
337
338
339 /*=========================================================================
340 UART
341 -----------------------------------------------------------------------
342
343 CFG_UART_BAUDRATE The default UART speed. This value is used
344 when initialising UART, and should be a
345 standard value like 57600, 9600, etc.
346 NOTE: This value may be overridden if
347 another value is stored in EEPROM!
348 CFG_UART_BUFSIZE The length in bytes of the UART RX FIFO. This
349 will determine the maximum number of received
350 characters to store in memory.
351
352 -----------------------------------------------------------------------*/
353 #ifdef CFG_BRD_LPC1343_REFDESIGN
354 #define CFG_UART_BAUDRATE (115200)
355 #define CFG_UART_BUFSIZE (512)
356 #endif
357
358 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
359 #define CFG_UART_BAUDRATE (115200)
360 #define CFG_UART_BUFSIZE (512)
361 #endif
362
363 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
364 #define CFG_UART_BAUDRATE (115200)
365 #define CFG_UART_BUFSIZE (512)
366 #endif
367
368 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
369 #define CFG_UART_BAUDRATE (57600)
370 #define CFG_UART_BUFSIZE (512)
371 #endif
372
373 #ifdef CFG_BRD_LPC1343_802154USBSTICK
374 #define CFG_UART_BAUDRATE (115200)
375 #define CFG_UART_BUFSIZE (512)
376 #endif
377
378 #ifdef CFG_BRD_LPC1343_OLIMEX_P
379 #define CFG_UART_BAUDRATE (115200)
380 #define CFG_UART_BUFSIZE (512)
381 #endif
382
383 #ifdef CFG_BRD_LPC1343_LPCXPRESSO
384 #define CFG_UART_BAUDRATE (115200)
385 #define CFG_UART_BUFSIZE (512)
386 #endif
387 /*=========================================================================*/
388
389
390 /*=========================================================================
391 SSP
392 -----------------------------------------------------------------------
393
394 CFG_SSP0_SCKPIN_2_11 Indicates which pin should be used for SCK0
395 CFG_SSP0_SCKPIN_0_6
396
397 -----------------------------------------------------------------------*/
398 #ifdef CFG_BRD_LPC1343_REFDESIGN
399 #define CFG_SSP0_SCKPIN_2_11
400 // #define CFG_SSP0_SCKPIN_0_6
401 #endif
402
403 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
404 #define CFG_SSP0_SCKPIN_2_11
405 // #define CFG_SSP0_SCKPIN_0_6
406 #endif
407
408 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
409 #define CFG_SSP0_SCKPIN_2_11
410 // #define CFG_SSP0_SCKPIN_0_6
411 #endif
412
413 #ifdef CFG_BRD_LPC1343_802154USBSTICK
414 // #define CFG_SSP0_SCKPIN_2_11
415 #define CFG_SSP0_SCKPIN_0_6
416 #endif
417
418 #ifdef CFG_BRD_LPC1343_OLIMEX_P
419 #define CFG_SSP0_SCKPIN_2_11
420 // #define CFG_SSP0_SCKPIN_0_6
421 #endif
422
423 #ifdef CFG_BRD_LPC1343_LPCXPRESSO
424 #define CFG_SSP0_SCKPIN_2_11
425 // #define CFG_SSP0_SCKPIN_0_6
426 #endif
427 /*=========================================================================*/
428
429
430 /*=========================================================================
431 ADC
432 -----------------------------------------------------------------------
433
434 ADC_AVERAGING_ENABLE To get better results, the ADC code can take
435 a number of samples and return the average
436 value. This is slower, but can give more
437 accurate results compared to single-reading.
438
439 To enable averaging, set ADC_AVERAGING_ENABLE
440 to a non-zero value.
441 ADC_AVERAGING_SAMPLES The number of ADC samples to read and
442 average if ADC averaging is enabled.
443
444 -----------------------------------------------------------------------*/
445 #ifdef CFG_BRD_LPC1343_REFDESIGN
446 #define ADC_AVERAGING_ENABLE (1)
447 #define ADC_AVERAGING_SAMPLES (5)
448 #endif
449
450 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
451 #define ADC_AVERAGING_ENABLE (1)
452 #define ADC_AVERAGING_SAMPLES (5)
453 #endif
454
455 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
456 #define ADC_AVERAGING_ENABLE (0)
457 #define ADC_AVERAGING_SAMPLES (5)
458 #endif
459
460 #ifdef CFG_BRD_LPC1343_802154USBSTICK
461 #define ADC_AVERAGING_ENABLE (0)
462 #define ADC_AVERAGING_SAMPLES (5)
463 #endif
464
465 #ifdef CFG_BRD_LPC1343_OLIMEX_P
466 #define ADC_AVERAGING_ENABLE (0)
467 #define ADC_AVERAGING_SAMPLES (5)
468 #endif
469
470 #ifdef CFG_BRD_LPC1343_LPCXPRESSO
471 #define ADC_AVERAGING_ENABLE (0)
472 #define ADC_AVERAGING_SAMPLES (5)
473 #endif
474 /*=========================================================================*/
475
476
477 /*=========================================================================
478 ON-BOARD LED
479 -----------------------------------------------------------------------
480
481 CFG_LED_PORT The port for the on board LED
482 CFG_LED_PIN The pin for the on board LED
483 CFG_LED_ON The pin state to turn the LED on (0 = low, 1 = high)
484 CFG_LED_OFF The pin state to turn the LED off (0 = low, 1 = high)
485
486 -----------------------------------------------------------------------*/
487 #ifdef CFG_BRD_LPC1343_REFDESIGN
488 #define CFG_LED_PORT (2)
489 #define CFG_LED_PIN (10)
490 #define CFG_LED_ON (0)
491 #define CFG_LED_OFF (1)
492 #endif
493
494 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
495 #define CFG_LED_PORT (2)
496 #define CFG_LED_PIN (10)
497 #define CFG_LED_ON (0)
498 #define CFG_LED_OFF (1)
499 #endif
500
501 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
502 #define CFG_LED_PORT (2)
503 #define CFG_LED_PIN (10)
504 #define CFG_LED_ON (0)
505 #define CFG_LED_OFF (1)
506 #endif
507
508 #ifdef CFG_BRD_LPC1343_802154USBSTICK
509 #define CFG_LED_PORT (3)
510 #define CFG_LED_PIN (2)
511 #define CFG_LED_ON (0)
512 #define CFG_LED_OFF (1)
513 #endif
514
515 #ifdef CFG_BRD_LPC1343_OLIMEX_P
516 #define CFG_LED_PORT (3)
517 #define CFG_LED_PIN (2)
518 #define CFG_LED_ON (0)
519 #define CFG_LED_OFF (1)
520 #endif
521
522 #ifdef CFG_BRD_LPC1343_LPCXPRESSO
523 #define CFG_LED_PORT (0)
524 #define CFG_LED_PIN (7)
525 #define CFG_LED_ON (0)
526 #define CFG_LED_OFF (1)
527 #endif
528 /*=========================================================================*/
529
530
531 /*=========================================================================
532 MICRO-SD CARD
533 -----------------------------------------------------------------------
534
535 CFG_SDCARD If this field is defined SD Card and FAT32
536 file system support will be included
537 CFG_SDCARD_READONLY If this is set to 1, all commands to
538 write to the SD card will be removed
539 saving some flash space.
540 CFG_SDCARD_CDPORT The card detect port number
541 CFG_SDCARD_CDPIN The card detect pin number
542
543 NOTE: All config settings for FAT32 are defined
544 in ffconf.h
545
546 BENCHMARK: With SPI set to 6.0MHz, FATFS can read
547 ~300KB/s (w/512 byte read buffer)
548
549 PIN LAYOUT: The pin layout that is used by this driver
550 can be seen in the following schematic:
551 /tools/schematics/Breakout_TFTLCD_ILI9325_v1.3
552
553 DEPENDENCIES: SDCARD requires the use of SSP0.
554 -----------------------------------------------------------------------*/
555 #ifdef CFG_BRD_LPC1343_REFDESIGN
556 // #define CFG_SDCARD
557 #define CFG_SDCARD_READONLY (1) // Must be 0 or 1
558 #define CFG_SDCARD_CDPORT (3)
559 #define CFG_SDCARD_CDPIN (0)
560 #endif
561
562 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
563 // #define CFG_SDCARD
564 #define CFG_SDCARD_READONLY (1) // Must be 0 or 1
565 #define CFG_SDCARD_CDPORT (3)
566 #define CFG_SDCARD_CDPIN (0)
567 #endif
568
569 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
570 #define CFG_SDCARD
571 #define CFG_SDCARD_READONLY (1) // Must be 0 or 1
572 #define CFG_SDCARD_CDPORT (3)
573 #define CFG_SDCARD_CDPIN (0)
574 #endif
575
576 #ifdef CFG_BRD_LPC1343_802154USBSTICK
577 // #define CFG_SDCARD
578 #define CFG_SDCARD_READONLY (1) // Must be 0 or 1
579 #define CFG_SDCARD_CDPORT (3)
580 #define CFG_SDCARD_CDPIN (0)
581 #endif
582
583 #ifdef CFG_BRD_LPC1343_OLIMEX_P
584 // #define CFG_SDCARD
585 #define CFG_SDCARD_READONLY (1) // Must be 0 or 1
586 #define CFG_SDCARD_CDPORT (3)
587 #define CFG_SDCARD_CDPIN (0)
588 #endif
589
590 #ifdef CFG_BRD_LPC1343_LPCXPRESSO
591 // #define CFG_SDCARD
592 #define CFG_SDCARD_READONLY (1) // Must be 0 or 1
593 #define CFG_SDCARD_CDPORT (3)
594 #define CFG_SDCARD_CDPIN (0)
595 #endif
596 /*=========================================================================*/
597
598
599 /*=========================================================================
600 USB
601 -----------------------------------------------------------------------
602
603 CFG_USBHID If this field is defined USB HID support will
604 be included. Currently uses ROM-based USB HID
605 CFG_USBCDC If this field is defined USB CDC support will
606 be included, with the USB Serial Port speed
607 set to 115200 BPS by default
608 CFG_USBCDC_BAUDRATE The default TX/RX speed. This value is used
609 when initialising USBCDC, and should be a
610 standard value like 57600, 9600, etc.
611 CFG_USBCDC_INITTIMEOUT The maximum delay in milliseconds to wait for
612 USB to connect. Must be a multiple of 10!
613 CFG_USBCDC_BUFFERSIZE Size of the buffer (in bytes) that stores
614 printf data until it can be sent out in
615 64 byte frames. The buffer is required since
616 only one frame per ms can be sent using USB
617 CDC (see 'puts' in systeminit.c).
618
619 -----------------------------------------------------------------------*/
620 #define CFG_USB_VID (0x239A)
621 #define CFG_USB_PID (0x1002)
622
623 #ifdef CFG_BRD_LPC1343_REFDESIGN
624 // #define CFG_USBHID
625 #define CFG_USBCDC
626 #define CFG_USBCDC_BAUDRATE (115200)
627 #define CFG_USBCDC_INITTIMEOUT (5000)
628 #define CFG_USBCDC_BUFFERSIZE (256)
629 #endif
630
631 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
632 // #define CFG_USBHID
633 // #define CFG_USBCDC
634 #define CFG_USBCDC_BAUDRATE (115200)
635 #define CFG_USBCDC_INITTIMEOUT (5000)
636 #define CFG_USBCDC_BUFFERSIZE (256)
637 #endif
638
639 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
640 // #define CFG_USBHID
641 #define CFG_USBCDC
642 #define CFG_USBCDC_BAUDRATE (115200)
643 #define CFG_USBCDC_INITTIMEOUT (5000)
644 #define CFG_USBCDC_BUFFERSIZE (256)
645 #endif
646
647 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
648 // #define CFG_USBHID
649 // #define CFG_USBCDC
650 #define CFG_USBCDC_BAUDRATE (57600)
651 #define CFG_USBCDC_INITTIMEOUT (5000)
652 #define CFG_USBCDC_BUFFERSIZE (256)
653 #endif
654
655 #ifdef CFG_BRD_LPC1343_802154USBSTICK
656 // #define CFG_USBHID
657 #define CFG_USBCDC
658 #define CFG_USBCDC_BAUDRATE (115200)
659 #define CFG_USBCDC_INITTIMEOUT (5000)
660 #define CFG_USBCDC_BUFFERSIZE (256)
661 #endif
662
663 #ifdef CFG_BRD_LPC1343_OLIMEX_P
664 // #define CFG_USBHID
665 #define CFG_USBCDC
666 #define CFG_USBCDC_BAUDRATE (115200)
667 #define CFG_USBCDC_INITTIMEOUT (5000)
668 #define CFG_USBCDC_BUFFERSIZE (256)
669 #endif
670
671 #ifdef CFG_BRD_LPC1343_LPCXPRESSO
672 // #define CFG_USBHID
673 #define CFG_USBCDC
674 #define CFG_USBCDC_BAUDRATE (115200)
675 #define CFG_USBCDC_INITTIMEOUT (5000)
676 #define CFG_USBCDC_BUFFERSIZE (256)
677 #endif
678 /*=========================================================================*/
679
680
681 /*=========================================================================
682 PRINTF REDIRECTION
683 -----------------------------------------------------------------------
684
685 CFG_PRINTF_MAXSTRINGSIZE Maximum size of string buffer for printf
686 CFG_PRINTF_UART Will cause all printf statements to be
687 redirected to UART
688 CFG_PRINTF_USBCDC Will cause all printf statements to be
689 redirect to USB Serial
690 CFG_PRINTF_NEWLINE This is typically "\r\n" for Windows or
691 "\n" for *nix
692
693 Note: If no printf redirection definitions are present, all printf
694 output will be ignored.
695 -----------------------------------------------------------------------*/
696 #ifdef CFG_BRD_LPC1343_REFDESIGN
697 #define CFG_PRINTF_MAXSTRINGSIZE (255)
698 // #define CFG_PRINTF_UART
699 #define CFG_PRINTF_USBCDC
700 #define CFG_PRINTF_NEWLINE "\r\n"
701 #endif
702
703 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
704 #define CFG_PRINTF_MAXSTRINGSIZE (255)
705 #define CFG_PRINTF_UART
706 // #define CFG_PRINTF_USBCDC
707 #define CFG_PRINTF_NEWLINE "\r\n"
708 #endif
709
710 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
711 #define CFG_PRINTF_MAXSTRINGSIZE (255)
712 // #define CFG_PRINTF_UART
713 #define CFG_PRINTF_USBCDC
714 #define CFG_PRINTF_NEWLINE "\r\n"
715 #endif
716
717 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
718 #define CFG_PRINTF_MAXSTRINGSIZE (255)
719 #define CFG_PRINTF_UART
720 // #define CFG_PRINTF_USBCDC
721 #define CFG_PRINTF_NEWLINE "\n"
722 #endif
723
724 #ifdef CFG_BRD_LPC1343_802154USBSTICK
725 #define CFG_PRINTF_MAXSTRINGSIZE (255)
726 // #define CFG_PRINTF_UART
727 #define CFG_PRINTF_USBCDC
728 #define CFG_PRINTF_NEWLINE "\r\n"
729 #endif
730
731 #ifdef CFG_BRD_LPC1343_OLIMEX_P
732 #define CFG_PRINTF_MAXSTRINGSIZE (255)
733 // #define CFG_PRINTF_UART
734 #define CFG_PRINTF_USBCDC
735 #define CFG_PRINTF_NEWLINE "\r\n"
736 #endif
737
738 #ifdef CFG_BRD_LPC1343_LPCXPRESSO
739 #define CFG_PRINTF_MAXSTRINGSIZE (255)
740 // #define CFG_PRINTF_UART
741 #define CFG_PRINTF_USBCDC
742 #define CFG_PRINTF_NEWLINE "\r\n"
743 #endif
744 /*=========================================================================*/
745
746
747 /*=========================================================================
748 COMMAND LINE INTERFACE
749 -----------------------------------------------------------------------
750
751 CFG_INTERFACE If this field is defined the UART or USBCDC
752 based command-line interface will be included
753 CFG_INTERFACE_MAXMSGSIZE The maximum number of bytes to accept for an
754 incoming command
755 CFG_INTERFACE_PROMPT The command prompt to display at the start
756 of every new data entry line
757 CFG_INTERFACE_SILENTMODE If this is set to 1 only text generated in
758 response to commands will be send to the
759 output buffer. The command prompt will not
760 be displayed and incoming text will not be
761 echoed back to the output buffer (allowing
762 you to see the text you have input). This
763 is normally only desirable in a situation
764 where another MCU is communicating with
765 the LPC1343.
766 CFG_INTERFACE_DROPCR If this is set to 1 all incoming \r
767 characters will be dropped
768 CFG_INTERFACE_ENABLEIRQ If this is set to 1 the IRQ pin will be
769 set high when a command starts executing
770 and will go low when the command has
771 finished executing or the LCD is not busy.
772 This allows another device to know when a
773 new command can safely be sent.
774 CFG_INTERFACE_IRQPORT The gpio port for the IRQ/busy pin
775 CFG_INTERFACE_IRQPIN The gpio pin number for the IRQ/busy pin
776 CFG_INTERFACE_SHORTERRORS If this is enabled only short 1 character
777 error messages will be returned (followed
778 by CFG_PRINTF_NEWLINE), rather than more
779 verbose error messages. The specific
780 characters used are defined below.
781 CFG_INTERFACE_CONFIRMREADY If this is set to 1 a text confirmation
782 will be sent when the command prompt is
783 ready for a new command. This is in
784 addition to CFG_INTERFACE_ENABLEIRQ if
785 this is also enabled. The character used
786 is defined below.
787
788 NOTE: The command-line interface will use either
789 USB-CDC or UART depending on whether
790 CFG_PRINTF_UART or CFG_PRINTF_USBCDC are
791 selected.
792 -----------------------------------------------------------------------*/
793 #ifdef CFG_BRD_LPC1343_REFDESIGN
794 #define CFG_INTERFACE
795 #define CFG_INTERFACE_MAXMSGSIZE (256)
796 #define CFG_INTERFACE_PROMPT "LPC1343 >> "
797 #define CFG_INTERFACE_SILENTMODE (0)
798 #define CFG_INTERFACE_DROPCR (0)
799 #define CFG_INTERFACE_ENABLEIRQ (0)
800 #define CFG_INTERFACE_IRQPORT (0)
801 #define CFG_INTERFACE_IRQPIN (7)
802 #define CFG_INTERFACE_SHORTERRORS (0)
803 #define CFG_INTERFACE_CONFIRMREADY (0)
804 #endif
805
806 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
807 // #define CFG_INTERFACE
808 #define CFG_INTERFACE_MAXMSGSIZE (256)
809 #define CFG_INTERFACE_PROMPT "LPC1343 >> "
810 #define CFG_INTERFACE_SILENTMODE (0)
811 #define CFG_INTERFACE_DROPCR (0)
812 #define CFG_INTERFACE_ENABLEIRQ (0)
813 #define CFG_INTERFACE_IRQPORT (0)
814 #define CFG_INTERFACE_IRQPIN (7)
815 #define CFG_INTERFACE_SHORTERRORS (0)
816 #define CFG_INTERFACE_CONFIRMREADY (0)
817 #endif
818
819 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
820 #define CFG_INTERFACE
821 #define CFG_INTERFACE_MAXMSGSIZE (256)
822 #define CFG_INTERFACE_PROMPT "CMD >> "
823 #define CFG_INTERFACE_SILENTMODE (0)
824 #define CFG_INTERFACE_DROPCR (0)
825 #define CFG_INTERFACE_ENABLEIRQ (0)
826 #define CFG_INTERFACE_IRQPORT (0)
827 #define CFG_INTERFACE_IRQPIN (7)
828 #define CFG_INTERFACE_SHORTERRORS (0)
829 #define CFG_INTERFACE_CONFIRMREADY (0)
830 #define CFG_INTERFACE_SHORTERRORS_UNKNOWNCOMMAND "?"
831 #define CFG_INTERFACE_SHORTERRORS_TOOMANYARGS ">"
832 #define CFG_INTERFACE_SHORTERRORS_TOOFEWARGS "<"
833 #define CFG_INTERFACE_CONFIRMREADY_TEXT "."
834 #endif
835
836 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
837 #define CFG_INTERFACE
838 #define CFG_INTERFACE_MAXMSGSIZE (256)
839 #define CFG_INTERFACE_PROMPT ">>"
840 #define CFG_INTERFACE_SILENTMODE (1)
841 #define CFG_INTERFACE_DROPCR (1)
842 #define CFG_INTERFACE_ENABLEIRQ (1)
843 #define CFG_INTERFACE_IRQPORT (0)
844 #define CFG_INTERFACE_IRQPIN (7)
845 #define CFG_INTERFACE_SHORTERRORS (1)
846 #define CFG_INTERFACE_CONFIRMREADY (0)
847 #define CFG_INTERFACE_SHORTERRORS_UNKNOWNCOMMAND "?"
848 #define CFG_INTERFACE_SHORTERRORS_TOOMANYARGS ">"
849 #define CFG_INTERFACE_SHORTERRORS_TOOFEWARGS "<"
850 #define CFG_INTERFACE_CONFIRMREADY_TEXT "."
851 #endif
852
853 #ifdef CFG_BRD_LPC1343_802154USBSTICK
854 // #define CFG_INTERFACE
855 #define CFG_INTERFACE_MAXMSGSIZE (256)
856 #define CFG_INTERFACE_PROMPT "CMD >> "
857 #define CFG_INTERFACE_SILENTMODE (0)
858 #define CFG_INTERFACE_DROPCR (0)
859 #define CFG_INTERFACE_ENABLEIRQ (0)
860 #define CFG_INTERFACE_IRQPORT (0)
861 #define CFG_INTERFACE_IRQPIN (7)
862 #define CFG_INTERFACE_SHORTERRORS (0)
863 #define CFG_INTERFACE_CONFIRMREADY (0)
864 #endif
865
866 #ifdef CFG_BRD_LPC1343_OLIMEX_P
867 #define CFG_INTERFACE
868 #define CFG_INTERFACE_MAXMSGSIZE (256)
869 #define CFG_INTERFACE_PROMPT "LPC-P1343 >> "
870 #define CFG_INTERFACE_SILENTMODE (0)
871 #define CFG_INTERFACE_DROPCR (0)
872 #define CFG_INTERFACE_ENABLEIRQ (0)
873 #define CFG_INTERFACE_IRQPORT (0)
874 #define CFG_INTERFACE_IRQPIN (7)
875 #define CFG_INTERFACE_SHORTERRORS (0)
876 #define CFG_INTERFACE_CONFIRMREADY (0)
877 #endif
878
879 #ifdef CFG_BRD_LPC1343_LPCXPRESSO
880 #define CFG_INTERFACE
881 #define CFG_INTERFACE_MAXMSGSIZE (256)
882 #define CFG_INTERFACE_PROMPT "LPC-P1343 >> "
883 #define CFG_INTERFACE_SILENTMODE (0)
884 #define CFG_INTERFACE_DROPCR (0)
885 #define CFG_INTERFACE_ENABLEIRQ (0)
886 #define CFG_INTERFACE_IRQPORT (0)
887 #define CFG_INTERFACE_IRQPIN (7)
888 #define CFG_INTERFACE_SHORTERRORS (0)
889 #define CFG_INTERFACE_CONFIRMREADY (0)
890 #endif
891 /*=========================================================================*/
892
893
894 /*=========================================================================
895 PWM SETTINGS
896 -----------------------------------------------------------------------
897
898 CFG_PWM If this is defined, a basic PWM driver
899 will be included using 16-bit Timer 1 and
900 Pin 1.9 (MAT0) for the PWM output. In
901 order to allow for a fixed number of
902 pulses to be generated, some PWM-specific
903 code is required in the 16-Bit Timer 1
904 ISR. See "core/timer16/timer16.c" for
905 more information.
906 CFG_PWM_DEFAULT_PULSEWIDTH The default pulse width in ticks
907 CFG_PWM_DEFAULT_DUTYCYCLE The default duty cycle in percent
908
909 DEPENDENCIES: PWM output requires the use of 16-bit
910 timer 1 and pin 1.9 (CT16B1_MAT0).
911 -----------------------------------------------------------------------*/
912 // #define CFG_PWM
913 #define CFG_PWM_DEFAULT_PULSEWIDTH (CFG_CPU_CCLK / 1000)
914 #define CFG_PWM_DEFAULT_DUTYCYCLE (50)
915 /*=========================================================================*/
916
917
918 /*=========================================================================
919 STEPPER MOTOR SETTINGS
920 -----------------------------------------------------------------------
921
922 CFG_STEPPER If this is defined, a simple bi-polar
923 stepper motor will be included for common
924 H-bridge chips like the L293D or SN754410N
925
926 DEPENDENCIES: STEPPER requires the use of pins 3.0-3 and
927 32-bit Timer 0.
928 -----------------------------------------------------------------------*/
929 // #define CFG_STEPPER
930 /*=========================================================================*/
931
932
933 /*=========================================================================
934 EEPROM
935 -----------------------------------------------------------------------
936
937 CFG_I2CEEPROM If defined, drivers for the onboard EEPROM
938 will be included during build
939 CFG_I2CEEPROM_SIZE The number of bytes available on the EEPROM
940
941 -----------------------------------------------------------------------*/
942 #ifdef CFG_BRD_LPC1343_REFDESIGN
943 #define CFG_I2CEEPROM
944 #define CFG_I2CEEPROM_SIZE (3072)
945 #endif
946
947 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
948 // #define CFG_I2CEEPROM
949 #define CFG_I2CEEPROM_SIZE (3072)
950 #endif
951
952 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
953 #define CFG_I2CEEPROM
954 #define CFG_I2CEEPROM_SIZE (3072)
955 #endif
956
957 #ifdef CFG_BRD_LPC1343_802154USBSTICK
958 #define CFG_I2CEEPROM
959 #define CFG_I2CEEPROM_SIZE (3072)
960 #endif
961
962 #ifdef CFG_BRD_LPC1343_OLIMEX_P
963 // #define CFG_I2CEEPROM
964 #define CFG_I2CEEPROM_SIZE (3072)
965 #endif
966
967 #ifdef CFG_BRD_LPC1343_LPCXPRESSO
968 // #define CFG_I2CEEPROM
969 #define CFG_I2CEEPROM_SIZE (3072)
970 #endif
971 /*=========================================================================*/
972
973
974 /*=========================================================================
975 EEPROM MEMORY MAP
976 -----------------------------------------------------------------------
977 EEPROM is used to persist certain user modifiable values to make
978 sure that these changes remain in effect after a reset or hard
979 power-down. The addresses in EEPROM for these various system
980 settings/values are defined below. The first 256 bytes of EEPROM
981 are reserved for this (0x0000..0x00FF).
982
983 CFG_EEPROM_RESERVED The last byte of reserved EEPROM memory
984
985 EEPROM Address (0x0000..0x00FF)
986 ===============================
987 0 1 2 3 4 5 6 7 8 9 A B C D E F
988 000x x x x x x x x x . x x . . . . . Chibi
989 001x . . . . . . . . . . . . . . . .
990 002x x x x x . . . . . . . . . . . . UART
991 003x x x x x x x x x x x x x x x x x Touch Screen Calibration
992 004x x x x x x x x x x x x x x x . . Touch Screen Calibration
993 005x . . . . . . . . . . . . . . . .
994 006x . . . . . . . . . . . . . . . .
995 007x . . . . . . . . . . . . . . . .
996 008x . . . . . . . . . . . . . . . .
997 009x . . . . . . . . . . . . . . . .
998 00Ax . . . . . . . . . . . . . . . .
999 00Bx . . . . . . . . . . . . . . . .
1000 00Cx . . . . . . . . . . . . . . . .
1001 00Dx . . . . . . . . . . . . . . . .
1002 00Ex . . . . . . . . . . . . . . . .
1003 00Fx . . . . . . . . . . . . . . . .
1004
1005 -----------------------------------------------------------------------*/
1006 #define CFG_EEPROM_RESERVED (0x00FF) // Protect first 256 bytes of memory
1007 #define CFG_EEPROM_CHIBI_IEEEADDR (uint16_t)(0x0000) // 8
1008 #define CFG_EEPROM_CHIBI_SHORTADDR (uint16_t)(0x0009) // 2
1009 #define CFG_EEPROM_UART_SPEED (uint16_t)(0x0020) // 4
1010 #define CFG_EEPROM_TOUCHSCREEN_CALIBRATED (uint16_t)(0x0030) // 1
1011 #define CFG_EEPROM_TOUCHSCREEN_CAL_AN (uint16_t)(0x0031) // 4
1012 #define CFG_EEPROM_TOUCHSCREEN_CAL_BN (uint16_t)(0x0035) // 4
1013 #define CFG_EEPROM_TOUCHSCREEN_CAL_CN (uint16_t)(0x0039) // 4
1014 #define CFG_EEPROM_TOUCHSCREEN_CAL_DN (uint16_t)(0x003D) // 4
1015 #define CFG_EEPROM_TOUCHSCREEN_CAL_EN (uint16_t)(0x0041) // 4
1016 #define CFG_EEPROM_TOUCHSCREEN_CAL_FN (uint16_t)(0x0045) // 4
1017 #define CFG_EEPROM_TOUCHSCREEN_CAL_DIVIDER (uint16_t)(0x0049) // 4
1018 #define CFG_EEPROM_TOUCHSCREEN_THRESHHOLD (uint16_t)(0x004D) // 1
1019 /*=========================================================================*/
1020
1021
1022 /*=========================================================================
1023 LM75B TEMPERATURE SENSOR
1024 -----------------------------------------------------------------------
1025
1026 CFG_LM75B If defined, drivers for an optional LM75B
1027 temperature sensor will be included during
1028 build (requires external HW)
1029
1030 -----------------------------------------------------------------------*/
1031 // #define CFG_LM75B
1032 /*=========================================================================*/
1033
1034
1035 /*=========================================================================
1036 CHIBI WIRELESS STACK
1037 -----------------------------------------------------------------------
1038
1039 CFG_CHIBI If defined, the CHIBI wireless stack will be
1040 included during build. Requires external HW.
1041 CFG_CHIBI_MODE The mode to use when receiving and transmitting
1042 wireless data. See chb_drvr.h for possible values
1043 CFG_CHIBI_POWER The power level to use when transmitting. See
1044 chb_drvr.h for possible values
1045 CFG_CHIBI_CHANNEL 802.15.4 Channel (0 = 868MHz, 1-10 = 915MHz)
1046 CFG_CHIBI_PANID 16-bit PAN Identifier (ex.0x1234)
1047 CFG_CHIBI_PROMISCUOUS Set to 1 to enabled promiscuous mode or
1048 0 to disable it. If promiscuous mode is
1049 enabled be sure to set CFG_CHIBI_BUFFERSIZE
1050 to an appropriately large value (ex. 1024)
1051 CFG_CHIBI_BUFFERSIZE The size of the message buffer in bytes
1052
1053 DEPENDENCIES: Chibi requires the use of SSP0, 16-bit timer
1054 0 and pins 3.1, 3.2, 3.3. It also requires
1055 the presence of CFG_I2CEEPROM.
1056
1057 NOTE: These settings are not relevant to all boards!
1058 'tools/schematics/AT86RF212LPC1114_v1.6.pdf'
1059 show how 'CHIBI' is meant to be connected
1060 -----------------------------------------------------------------------*/
1061 #ifdef CFG_BRD_LPC1343_REFDESIGN
1062 // #define CFG_CHIBI
1063 #define CFG_CHIBI_MODE (0) // OQPSK_868MHZ
1064 #define CFG_CHIBI_POWER (0xE9) // CHB_PWR_EU2_3DBM
1065 #define CFG_CHIBI_CHANNEL (0) // 868-868.6 MHz
1066 #define CFG_CHIBI_PANID (0x1234)
1067 #define CFG_CHIBI_PROMISCUOUS (0)
1068 #define CFG_CHIBI_BUFFERSIZE (128)
1069 #endif
1070
1071 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
1072 // #define CFG_CHIBI
1073 #define CFG_CHIBI_MODE (0) // OQPSK_868MHZ
1074 #define CFG_CHIBI_POWER (0xE9) // CHB_PWR_EU2_3DBM
1075 #define CFG_CHIBI_CHANNEL (0) // 868-868.6 MHz
1076 #define CFG_CHIBI_PANID (0x1234)
1077 #define CFG_CHIBI_PROMISCUOUS (0)
1078 #define CFG_CHIBI_BUFFERSIZE (128)
1079 #endif
1080
1081 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
1082 // #define CFG_CHIBI
1083 #define CFG_CHIBI_MODE (0) // OQPSK_868MHZ
1084 #define CFG_CHIBI_POWER (0xE9) // CHB_PWR_EU2_3DBM
1085 #define CFG_CHIBI_CHANNEL (0) // 868-868.6 MHz
1086 #define CFG_CHIBI_PANID (0x1234)
1087 #define CFG_CHIBI_PROMISCUOUS (0)
1088 #define CFG_CHIBI_BUFFERSIZE (128)
1089 #endif
1090
1091 #ifdef CFG_BRD_LPC1343_802154USBSTICK
1092 #define CFG_CHIBI
1093 #define CFG_CHIBI_MODE (0) // OQPSK_868MHZ
1094 #define CFG_CHIBI_POWER (0xE9) // CHB_PWR_EU2_3DBM
1095 #define CFG_CHIBI_CHANNEL (0) // 868-868.6 MHz
1096 #define CFG_CHIBI_PANID (0x1234)
1097 #define CFG_CHIBI_PROMISCUOUS (0)
1098 #define CFG_CHIBI_BUFFERSIZE (1024)
1099 #endif
1100
1101 #ifdef CFG_BRD_LPC1343_OLIMEX_P
1102 // #define CFG_CHIBI
1103 #define CFG_CHIBI_MODE (0) // OQPSK_868MHZ
1104 #define CFG_CHIBI_POWER (0xE9) // CHB_PWR_EU2_3DBM
1105 #define CFG_CHIBI_CHANNEL (0) // 868-868.6 MHz
1106 #define CFG_CHIBI_PANID (0x1234)
1107 #define CFG_CHIBI_PROMISCUOUS (0)
1108 #define CFG_CHIBI_BUFFERSIZE (128)
1109 #endif
1110
1111 #ifdef CFG_BRD_LPC1343_LPCXPRESSO
1112 // #define CFG_CHIBI
1113 #define CFG_CHIBI_MODE (0) // OQPSK_868MHZ
1114 #define CFG_CHIBI_POWER (0xE9) // CHB_PWR_EU2_3DBM
1115 #define CFG_CHIBI_CHANNEL (0) // 868-868.6 MHz
1116 #define CFG_CHIBI_PANID (0x1234)
1117 #define CFG_CHIBI_PROMISCUOUS (0)
1118 #define CFG_CHIBI_BUFFERSIZE (128)
1119 #endif
1120 /*=========================================================================*/
1121
1122
1123 /*=========================================================================
1124 TFT LCD
1125 -----------------------------------------------------------------------
1126
1127 CFG_TFTLCD If defined, this will cause drivers for
1128 a pre-determined LCD screen to be included
1129 during build. Only one LCD driver can be
1130 included during the build process (for ex.
1131 'drivers/displays/hw/ILI9325.c')
1132 CFG_TFTLCD_INCLUDESMALLFONTS If set to 1, smallfont support will be
1133 included for 3x6, 5x8, 7x8 and 8x8 fonts.
1134 This should only be enabled if these small
1135 fonts are required since there is already
1136 support for larger fonts generated with
1137 Dot Factory
1138 http://www.pavius.net/downloads/tools/53-the-dot-factory
1139 CFG_TFTLCD_TS_DEFAULTTHRESHOLD Default minimum threshold to trigger a
1140 touch event with the touch screen (and exit
1141 from 'tsWaitForEvent' in touchscreen.c).
1142 Should be an 8-bit value somewhere between
1143 8 and 75 in normal circumstances. This is
1144 the default value and may be overriden by
1145 a value stored in EEPROM.
1146 CFG_TFTLCD_TS_KEYPADDELAY The delay in milliseconds between key
1147 presses in dialogue boxes
1148
1149 PIN LAYOUT: The pin layout that is used by this driver
1150 can be seen in the following schematic:
1151 /tools/schematics/Breakout_TFTLCD_ILI9325_v1.3
1152
1153 DEPENDENCIES: TFTLCD requires the use of pins 1.8, 1.9,
1154 1.10, 1.11, 3.3 and 2.1-9.
1155 -----------------------------------------------------------------------*/
1156 #ifdef CFG_BRD_LPC1343_REFDESIGN
1157 // #define CFG_TFTLCD
1158 #define CFG_TFTLCD_INCLUDESMALLFONTS (0)
1159 #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
1160 #define CFG_TFTLCD_TS_KEYPADDELAY (100)
1161 #endif
1162
1163 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
1164 // #define CFG_TFTLCD
1165 #define CFG_TFTLCD_INCLUDESMALLFONTS (0)
1166 #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
1167 #define CFG_TFTLCD_TS_KEYPADDELAY (100)
1168 #endif
1169
1170 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
1171 #define CFG_TFTLCD
1172 #define CFG_TFTLCD_INCLUDESMALLFONTS (0)
1173 #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
1174 #define CFG_TFTLCD_TS_KEYPADDELAY (100)
1175 #endif
1176
1177 #ifdef CFG_BRD_LPC1343_802154USBSTICK
1178 // #define CFG_TFTLCD
1179 #define CFG_TFTLCD_INCLUDESMALLFONTS (0)
1180 #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
1181 #define CFG_TFTLCD_TS_KEYPADDELAY (100)
1182 #endif
1183
1184 #ifdef CFG_BRD_LPC1343_OLIMEX_P
1185 // #define CFG_TFTLCD
1186 #define CFG_TFTLCD_INCLUDESMALLFONTS (0)
1187 #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
1188 #define CFG_TFTLCD_TS_KEYPADDELAY (100)
1189 #endif
1190
1191 #ifdef CFG_BRD_LPC1343_LPCXPRESSO
1192 // #define CFG_TFTLCD
1193 #define CFG_TFTLCD_INCLUDESMALLFONTS (0)
1194 #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
1195 #define CFG_TFTLCD_TS_KEYPADDELAY (100)
1196 #endif
1197 /*=========================================================================*/
1198
1199
1200 /*=========================================================================
1201 Monochrome/Bitmap Graphic LCDs
1202 -----------------------------------------------------------------------
1203
1204 CFG_ST7565 If defined, this will cause drivers for
1205 the 128x64 pixel ST7565 LCD to be included
1206 CFG_SSD1306 If defined, this will cause drivers for
1207 the 128x64 pixel SSD1306 OLED display to be
1208 included (using bit-banged SPI)
1209 CFG_SHARPMEM If defined, this will cause drivers for
1210 Sharp Memory Displays to be included
1211
1212 DEPENDENCIES: ST7565 requires the use of pins 2.1-6.
1213 DEPENDENCIES: SSD1306 requires the use of pins 2.1-6.
1214 DEPENDENCIES: SSD1306_I2C requires the use of pins 2.2.
1215 DEPENDENCIES: SHARPMEM requires the use of pins 2.1-4.
1216 -----------------------------------------------------------------------*/
1217 // #define CFG_ST7565
1218 // #define CFG_SSD1306
1219 // #define CFG_SHARPMEM
1220 /*=========================================================================*/
1221
1222
1223 /*=========================================================================
1224 RSA Encryption
1225 -----------------------------------------------------------------------
1226
1227 CFG_RSA If defined, support for basic RSA
1228 encryption will be included.
1229 CFG_RSA_BITS Indicates the number of bits used for
1230 RSA encryption keys. To keep code size
1231 reasonable, RSA encryption is currently
1232 limited to using 64-bit or 32-bit numbers,
1233 with 64-bit providing higher security, and
1234 32-bit providing smaller encrypted text
1235 size.
1236
1237 NOTE: Please note that Printf can not be
1238 used to display 64-bit values (%lld)!
1239 -----------------------------------------------------------------------*/
1240 // #define CFG_RSA
1241 #define CFG_RSA_BITS (32)
1242 /*=========================================================================*/
1243
1244
1245
1246
1247 /*=========================================================================
1248 CONFIG FILE VALIDATION
1249 -------------------------------------------------------------------------
1250 Basic error checking to make sure that incompatible defines are not
1251 enabled at the same time, etc.
1252
1253 =========================================================================*/
1254
1255 #if !defined CFG_BRD_LPC1343_REFDESIGN && \
1256 !defined CFG_BRD_LPC1343_REFDESIGN_MINIMAL && \
1257 !defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB && \
1258 !defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART && \
1259 !defined CFG_BRD_LPC1343_802154USBSTICK && \
1260 !defined CFG_BRD_LPC1343_OLIMEX_P && \
1261 !defined CFG_BRD_LPC1343_LPCXPRESSO
1262 #error "You must defined a target board (CFG_BRD_LPC1343_REFDESIGN or CFG_BRD_LPC1343_REFDESIGN_MINIMAL or CFG_BRD_LPC1343_TFTLCDSTANDALONE or CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART or CFG_BRD_LPC1343_802154USBSTICK or CFG_BRD_LPC1343_LPCXPRESSO)"
1263 #endif
1264
1265 #if defined CFG_PRINTF_USBCDC && defined CFG_PRINTF_UART
1266 #error "CFG_PRINTF_UART or CFG_PRINTF_USBCDC cannot both be defined at once"
1267 #endif
1268
1269 #if defined CFG_PRINTF_USBCDC && !defined CFG_USBCDC
1270 #error "CFG_PRINTF_CDC requires CFG_USBCDC to be defined as well"
1271 #endif
1272
1273 #if defined CFG_USBCDC && defined CFG_USBHID
1274 #error "Only one USB class can be defined at a time (CFG_USBCDC or CFG_USBHID)"
1275 #endif
1276
1277 #if defined CFG_SSP0_SCKPIN_2_11 && defined CFG_SSP0_SCKPIN_0_6
1278 #error "Only one SCK pin can be defined at a time for SSP0"
1279 #endif
1280
1281 #if !defined CFG_SSP0_SCKPIN_2_11 && !defined CFG_SSP0_SCKPIN_0_6
1282 #error "An SCK pin must be selected for SSP0 (CFG_SSP0_SCKPIN_2_11 or CFG_SSP0_SCKPIN_0_6)"
1283 #endif
1284
1285 #ifdef CFG_INTERFACE
1286 #if !defined CFG_PRINTF_UART && !defined CFG_PRINTF_USBCDC
1287 #error "CFG_PRINTF_UART or CFG_PRINTF_USBCDC must be defined for for CFG_INTERFACE Input/Output"
1288 #endif
1289 #if defined CFG_PRINTF_USBCDC && CFG_INTERFACE_SILENTMODE == 1
1290 #error "CFG_INTERFACE_SILENTMODE typically isn't enabled with CFG_PRINTF_USBCDC"
1291 #endif
1292 #endif
1293
1294 #ifdef CFG_CHIBI
1295 #if !defined CFG_I2CEEPROM
1296 #error "CFG_CHIBI requires CFG_I2CEEPROM to store and retrieve addresses"
1297 #endif
1298 #ifdef CFG_SDCARD
1299 #error "CFG_CHIBI and CFG_SDCARD can not be defined at the same time. Only one SPI block is available on the LPC1343."
1300 #endif
1301 #ifdef CFG_TFTLCD
1302 #error "CFG_CHIBI and CFG_TFTLCD can not be defined at the same time since they both use pins 1.8, 1.9 and 1.10."
1303 #endif
1304 #ifdef CFG_PWM
1305 #error "CFG_CHIBI and CFG_PWM can not be defined at the same time since they both use pin 1.9."
1306 #endif
1307 #if CFG_CHIBI_PROMISCUOUS != 0 && CFG_CHIBI_PROMISCUOUS != 1
1308 #error "CFG_CHIBI_PROMISCUOUS must be equal to either 1 or 0"
1309 #endif
1310 #if !defined GPIO_ENABLE_IRQ1
1311 #error "GPIO_ENABLE_IRQ1 must be enabled when using Chibi (Chibi IRQ is on GPIO1.8)"
1312 #endif
1313 #endif
1314
1315 #ifdef CFG_TFTLCD
1316 #ifdef CFG_ST7565
1317 #error "CFG_TFTLCD and CFG_ST7565 can not be defined at the same time."
1318 #endif
1319 #ifdef CFG_SSD1306
1320 #error "CFG_TFTLCD and CFG_SSD1306 can not be defined at the same time."
1321 #endif
1322 #ifdef CFG_SHARPMEM
1323 #error "CFG_TFTLCD and CFG_SHARPMEM can not be defined at the same time."
1324 #endif
1325 #ifdef CFG_PWM
1326 #error "CFG_TFTLCD and CFG_PWM can not be defined at the same time since they both use pin 1.9."
1327 #endif
1328 #if !defined CFG_I2CEEPROM
1329 #error "CFG_TFTLCD requires CFG_I2CEEPROM to store and retrieve configuration settings"
1330 #endif
1331 #endif
1332
1333 #ifdef CFG_SDCARD
1334 #ifdef CFG_STEPPER
1335 #error "CFG_SDCARD and CFG_STEPPER can not be defined at the same time since they both use pin 3.0."
1336 #endif
1337 #endif
1338
1339 #ifdef CFG_ST7565
1340 #ifdef CFG_SSD1306
1341 #error "CFG_ST7565 and CFG_SSD1306 can not be defined at the same time"
1342 #endif
1343 #endif
1344
1345 #ifdef CFG_RSA
1346 #if CFG_RSA_BITS != 64 && CFG_RSA_BITS != 32
1347 #error "CFG_RSA_BITS must be equal to either 32 or 64."
1348 #endif
1349 #endif
1350
1351 #if ADC_AVERAGING_ENABLE && ADC_AVERAGING_SAMPLES < 1
1352 #error "ADC_AVERAGING_SAMPLES must be 1 or higher when ADC averaging is enabled"
1353 #endif
1354
1355 #endif
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