PN532 updates
[hackover2013-badge-firmware.git] / projectconfig.h
1 /**************************************************************************/
2 /*!
3 @file projectconfig.h
4 @author K. Townsend (microBuilder.eu)
5
6 @section LICENSE
7
8 Software License Agreement (BSD License)
9
10 Copyright (c) 2010, microBuilder SARL
11 All rights reserved.
12
13 Redistribution and use in source and binary forms, with or without
14 modification, are permitted provided that the following conditions are met:
15 1. Redistributions of source code must retain the above copyright
16 notice, this list of conditions and the following disclaimer.
17 2. Redistributions in binary form must reproduce the above copyright
18 notice, this list of conditions and the following disclaimer in the
19 documentation and/or other materials provided with the distribution.
20 3. Neither the name of the copyright holders nor the
21 names of its contributors may be used to endorse or promote products
22 derived from this software without specific prior written permission.
23
24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY
25 EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
26 WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY
28 DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
29 (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
30 LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
31 ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32 (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
33 SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 */
35 /**************************************************************************/
36
37 #ifndef _PROJECTCONFIG_H_
38 #define _PROJECTCONFIG_H_
39
40 #include "lpc134x.h"
41 #include "sysdefs.h"
42
43 /*=========================================================================
44 BOARD SELECTION
45
46 Because several boards use this code library with sometimes slightly
47 different pin configuration, you will need to specify which board you
48 are using by enabling one of the following definitions. The code base
49 will then try to configure itself accordingly for that board.
50
51 CFG_BRD_LPC1343_REFDESIGN
52 =========================
53
54 microBuilder.eu LPC1343 Reference Design base board with
55 on-board peripherals initialised (EEPROM, USB or UART CLI, etc.)
56
57 This is the recommended starting point for new development
58 since it makes it easy to send printf output to USB CDC, access
59 the on-board EEPROM, etc.
60
61 CFG_BRD_LPC1343_REFDESIGN_MINIMAL
62 =================================
63
64 microBuilder.eu LPC1343 Reference Design base board with
65 only the most common peripherals initialised by default.
66
67 Results in smallest code since EEPROM, USB, etc., are not
68 initialised on startup. By default, only the following
69 peripherals are initialised by systemInit():
70
71 - CPU (Configures the PLL, etc.)
72 - GPIO
73 - SysTick Timer
74 - UART (with printf support) *
75
76 * Can be removed to save 0.8kb in debug and 0.3 kb in
77 release. Comment out 'CFG_PRINTF_UART' to disable it.
78
79 The code size can be further reduced by several KB by removing
80 any IRQ Handlers that are not used. The I2C IRQHandler, for
81 example, uses ~1KB of flash in debug and ~400KB in release mode,
82 but because it is referenced in the startup code it is always
83 included even if I2C is never used in the project.
84
85 Other IRQ Handlers that you might be able to comment out
86 to save some space are:
87
88 IRQ Handler Debug Release
89 ------------------------- ------ -------
90 I2C_IRQHandler 1160 b 400 b
91 SSP_IRQHandler 160 b 76 b
92 UART_IRQHandler 246 b 116 b
93 WAKEUP_IRQHandler 160 b 100 b
94 WDT_IRQHandler 50 b 28 b
95
96 CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
97 ====================================
98
99 microBuilder.eu/Adafruit Stand-Alone "Smart LCD" with USB enabled
100 for the CLI interface.
101
102 CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
103 =====================================
104
105 microBuilder.eu/Adafruit Stand-Alone "Smart LCD" with UART enabled
106 for the CLI interface.
107
108 CFG_BRD_LPC1343_802154USBSTICK
109 ==============================
110
111 microBuilder.eu USB stick 802.15.4 868/915MHz RF transceiver
112
113 -----------------------------------------------------------------------*/
114 #define CFG_BRD_LPC1343_REFDESIGN
115 // #define CFG_BRD_LPC1343_REFDESIGN_MINIMAL
116 // #define CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
117 // #define CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
118 // #define CFG_BRD_LPC1343_802154USBSTICK
119 // #define CFG_BRD_LPC1343_OLIMEX_P
120 /*=========================================================================*/
121
122
123 /**************************************************************************
124 PIN USAGE
125 -----------------------------------------------------------------------
126 This table tries to give an indication of which GPIO pins and
127 peripherals are used by the available drivers and SW examples. Only
128 dedicated GPIO pins available on the LPC1343 Reference Board are shown
129 below. Any unused peripheral blocks like I2C, SSP, ADC, etc., can
130 also be used as GPIO if they are available.
131
132 PORT 1 PORT 2 PORT 3
133 ========= ================= =======
134 8 9 10 11 1 2 3 4 5 6 7 8 9 0 1 2 3
135
136 SDCARD . . . . . . . . . . . . . X . . .
137 PWM . X . . . . . . . . . . . . . . .
138 STEPPER . . . . . . . . . . . . . X X X X
139 CHIBI X X X . . . . . . . . . . . . . .
140 ILI9325/8 X X X X X X X X X X X X X . . . X
141 ST7565 X X X X X X X X X X X X X . . . X
142 ST7735 . . . . X X X X X X . . . . . . .
143 SHARPMEM . . . . X X X X . . . . . . . . .
144 SSD1306 . . . . X X X . X X . . . . . . .
145 SSD1351 . . . . X X X X X . . . . . . . .
146 MCP121 . . . . . . . . . . . . . . X . .
147 PN532 [3] . . . . . . . . . . . . . . X X .
148
149 TIMERS SSP ADC UART
150 ====================== === ======= ====
151 16B0 16B1 32B0 32B1 0 0 1 2 3 0
152
153 SDCARD . . . . X . . . . .
154 PWM . X . . . . . . . .
155 PMU [1] . . X . . . . . . .
156 USB . . . X . . . . . .
157 STEPPER . . X . . . . . . .
158 CHIBI x . . . X . . . . .
159 ILI9325/8 . . . . . X X X X .
160 ST7565 . . . . . X X X X .
161 ST7535 . . . . . . . . . .
162 SHARPMEM . . . . . . . . . .
163 SSD1306 . . . . . . . . . .
164 INTERFACE . . . . . . . . . X[2]
165
166 [1] PMU uses 32-bit Timer 0 for SW wakeup from deep-sleep. This timer
167 can safely be used by other peripherals, but may need to be
168 reconfigured when you wakeup from deep-sleep.
169 [2] INTERFACE can be configured to use either USBCDC or UART
170 [3] 3.2 only used when with the I2C bus (for IRQ)
171
172 **************************************************************************/
173
174
175 /**************************************************************************
176 I2C Addresses
177 -----------------------------------------------------------------------
178 The following addresses are used by the different I2C sensors included
179 in the code base [1]
180
181 HEX BINARY
182 ==== ========
183 ISL12022M (RTC) 0xDE 1101111x
184 ISL12022M (SRAM) 0xAE 1010111x
185 LM75B 0x90 1001000x
186 MCP24AA 0xA0 1010000x
187 MCP4725 0xC0 1100000x
188 TSL2561 0x72 0111001x
189 TCS3414 0x72 0111001x
190
191 [1] Alternative addresses may exists, but the addresses listed in this
192 table are the values used in the code base
193
194 **************************************************************************/
195
196
197 /*=========================================================================
198 FIRMWARE VERSION SETTINGS
199 -----------------------------------------------------------------------*/
200 #define CFG_FIRMWARE_VERSION_MAJOR (0)
201 #define CFG_FIRMWARE_VERSION_MINOR (9)
202 #define CFG_FIRMWARE_VERSION_REVISION (8)
203 /*=========================================================================*/
204
205
206 /*=========================================================================
207 CORE CPU SETTINGS
208 -----------------------------------------------------------------------
209
210 CFG_CPU_CCLK Value is for reference only. 'core/cpu/cpu.c' must
211 be modified to change the clock speed, but the value
212 should be indicated here since CFG_CPU_CCLK is used by
213 other peripherals to determine timing.
214
215 -----------------------------------------------------------------------*/
216 #define CFG_CPU_CCLK (72000000) // 1 tick = 13.88nS
217 /*=========================================================================*/
218
219
220 /*=========================================================================
221 SYSTICK TIMER
222 -----------------------------------------------------------------------
223
224 CFG_SYSTICK_DELAY_IN_MS The number of milliseconds between each tick
225 of the systick timer.
226
227 -----------------------------------------------------------------------*/
228 #define CFG_SYSTICK_DELAY_IN_MS (1)
229 /*=========================================================================*/
230
231
232 /*=========================================================================
233 ALTERNATE RESET PIN
234 -----------------------------------------------------------------------
235
236 CFG_ALTRESET If defined, indicates that a GPIO pin should be
237 configured as an alternate reset pin in addition
238 to the dedicated reset pin.
239 CFG_ALTRESET_PORT The GPIO port where the alt reset pin is located
240 CFG_ALTRESET_PIN The GPIO pin where the alt reset pin is located
241
242 -----------------------------------------------------------------------*/
243 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
244 #define CFG_ALTRESET
245 #define CFG_ALTRESET_PORT (1)
246 #define CFG_ALTRESET_PIN (5) // P1.5 = RTS
247 #endif
248 /*=========================================================================*/
249
250
251 /*=========================================================================
252 UART
253 -----------------------------------------------------------------------
254
255 CFG_UART_BAUDRATE The default UART speed. This value is used
256 when initialising UART, and should be a
257 standard value like 57600, 9600, etc.
258 NOTE: This value may be overridden if
259 another value is stored in EEPROM!
260 CFG_UART_BUFSIZE The length in bytes of the UART RX FIFO. This
261 will determine the maximum number of received
262 characters to store in memory.
263
264 -----------------------------------------------------------------------*/
265 #ifdef CFG_BRD_LPC1343_REFDESIGN
266 #define CFG_UART_BAUDRATE (115200)
267 #define CFG_UART_BUFSIZE (512)
268 #endif
269
270 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
271 #define CFG_UART_BAUDRATE (115200)
272 #define CFG_UART_BUFSIZE (512)
273 #endif
274
275 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
276 #define CFG_UART_BAUDRATE (115200)
277 #define CFG_UART_BUFSIZE (512)
278 #endif
279
280 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
281 #define CFG_UART_BAUDRATE (57600)
282 #define CFG_UART_BUFSIZE (512)
283 #endif
284
285 #ifdef CFG_BRD_LPC1343_802154USBSTICK
286 #define CFG_UART_BAUDRATE (115200)
287 #define CFG_UART_BUFSIZE (512)
288 #endif
289
290 #ifdef CFG_BRD_LPC1343_OLIMEX_P
291 #define CFG_UART_BAUDRATE (115200)
292 #define CFG_UART_BUFSIZE (512)
293 #endif
294 /*=========================================================================*/
295
296
297 /*=========================================================================
298 SSP
299 -----------------------------------------------------------------------
300
301 CFG_SSP0_SCKPIN_2_11 Indicates which pin should be used for SCK0
302 CFG_SSP0_SCKPIN_0_6
303
304 -----------------------------------------------------------------------*/
305 #ifdef CFG_BRD_LPC1343_REFDESIGN
306 #define CFG_SSP0_SCKPIN_2_11
307 // #define CFG_SSP0_SCKPIN_0_6
308 #endif
309
310 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
311 #define CFG_SSP0_SCKPIN_2_11
312 // #define CFG_SSP0_SCKPIN_0_6
313 #endif
314
315 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
316 #define CFG_SSP0_SCKPIN_2_11
317 // #define CFG_SSP0_SCKPIN_0_6
318 #endif
319
320 #ifdef CFG_BRD_LPC1343_802154USBSTICK
321 // #define CFG_SSP0_SCKPIN_2_11
322 #define CFG_SSP0_SCKPIN_0_6
323 #endif
324
325 #ifdef CFG_BRD_LPC1343_OLIMEX_P
326 #define CFG_SSP0_SCKPIN_2_11
327 // #define CFG_SSP0_SCKPIN_0_6
328 #endif
329 /*=========================================================================*/
330
331
332 /*=========================================================================
333 ON-BOARD LED
334 -----------------------------------------------------------------------
335
336 CFG_LED_PORT The port for the on board LED
337 CFG_LED_PIN The pin for the on board LED
338 CFG_LED_ON The pin state to turn the LED on (0 = low, 1 = high)
339 CFG_LED_OFF The pin state to turn the LED off (0 = low, 1 = high)
340
341 -----------------------------------------------------------------------*/
342 #ifdef CFG_BRD_LPC1343_REFDESIGN
343 #define CFG_LED_PORT (2)
344 #define CFG_LED_PIN (10)
345 #define CFG_LED_ON (0)
346 #define CFG_LED_OFF (1)
347 #endif
348
349 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
350 #define CFG_LED_PORT (2)
351 #define CFG_LED_PIN (10)
352 #define CFG_LED_ON (0)
353 #define CFG_LED_OFF (1)
354 #endif
355
356 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
357 #define CFG_LED_PORT (2)
358 #define CFG_LED_PIN (10)
359 #define CFG_LED_ON (0)
360 #define CFG_LED_OFF (1)
361 #endif
362
363 #ifdef CFG_BRD_LPC1343_802154USBSTICK
364 #define CFG_LED_PORT (3)
365 #define CFG_LED_PIN (2)
366 #define CFG_LED_ON (0)
367 #define CFG_LED_OFF (1)
368 #endif
369
370 #ifdef CFG_BRD_LPC1343_OLIMEX_P
371 #define CFG_LED_PORT (3)
372 #define CFG_LED_PIN (2)
373 #define CFG_LED_ON (0)
374 #define CFG_LED_OFF (1)
375 #endif
376 /*=========================================================================*/
377
378
379 /*=========================================================================
380 MICRO-SD CARD
381 -----------------------------------------------------------------------
382
383 CFG_SDCARD If this field is defined SD Card and FAT32
384 file system support will be included
385 CFG_SDCARD_READONLY If this is set to 1, all commands to
386 write to the SD card will be removed
387 saving some flash space.
388 CFG_SDCARD_CDPORT The card detect port number
389 CFG_SDCARD_CDPIN The card detect pin number
390
391 NOTE: All config settings for FAT32 are defined
392 in ffconf.h
393
394 BENCHMARK: With SPI set to 6.0MHz, FATFS can read
395 ~300KB/s (w/512 byte read buffer)
396
397 PIN LAYOUT: The pin layout that is used by this driver
398 can be seen in the following schematic:
399 /tools/schematics/Breakout_TFTLCD_ILI9325_v1.3
400
401 DEPENDENCIES: SDCARD requires the use of SSP0.
402 -----------------------------------------------------------------------*/
403 #ifdef CFG_BRD_LPC1343_REFDESIGN
404 // #define CFG_SDCARD
405 #define CFG_SDCARD_READONLY (1) // Must be 0 or 1
406 #define CFG_SDCARD_CDPORT (3)
407 #define CFG_SDCARD_CDPIN (0)
408 #endif
409
410 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
411 // #define CFG_SDCARD
412 #define CFG_SDCARD_READONLY (1) // Must be 0 or 1
413 #define CFG_SDCARD_CDPORT (3)
414 #define CFG_SDCARD_CDPIN (0)
415 #endif
416
417 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
418 #define CFG_SDCARD
419 #define CFG_SDCARD_READONLY (1) // Must be 0 or 1
420 #define CFG_SDCARD_CDPORT (3)
421 #define CFG_SDCARD_CDPIN (0)
422 #endif
423
424 #ifdef CFG_BRD_LPC1343_802154USBSTICK
425 // #define CFG_SDCARD
426 #define CFG_SDCARD_READONLY (1) // Must be 0 or 1
427 #define CFG_SDCARD_CDPORT (3)
428 #define CFG_SDCARD_CDPIN (0)
429 #endif
430
431 #ifdef CFG_BRD_LPC1343_OLIMEX_P
432 // #define CFG_SDCARD
433 #define CFG_SDCARD_READONLY (1) // Must be 0 or 1
434 #define CFG_SDCARD_CDPORT (3)
435 #define CFG_SDCARD_CDPIN (0)
436 #endif
437 /*=========================================================================*/
438
439
440 /*=========================================================================
441 USB
442 -----------------------------------------------------------------------
443
444 CFG_USBHID If this field is defined USB HID support will
445 be included. Currently uses ROM-based USB HID
446 CFG_USBCDC If this field is defined USB CDC support will
447 be included, with the USB Serial Port speed
448 set to 115200 BPS by default
449 CFG_USBCDC_BAUDRATE The default TX/RX speed. This value is used
450 when initialising USBCDC, and should be a
451 standard value like 57600, 9600, etc.
452 CFG_USBCDC_INITTIMEOUT The maximum delay in milliseconds to wait for
453 USB to connect. Must be a multiple of 10!
454 CFG_USBCDC_BUFFERSIZE Size of the buffer (in bytes) that stores
455 printf data until it can be sent out in
456 64 byte frames. The buffer is required since
457 only one frame per ms can be sent using USB
458 CDC (see 'puts' in systeminit.c).
459
460 -----------------------------------------------------------------------*/
461 #define CFG_USB_VID (0x239A)
462 #define CFG_USB_PID (0x1002)
463
464 #ifdef CFG_BRD_LPC1343_REFDESIGN
465 // #define CFG_USBHID
466 #define CFG_USBCDC
467 #define CFG_USBCDC_BAUDRATE (115200)
468 #define CFG_USBCDC_INITTIMEOUT (5000)
469 #define CFG_USBCDC_BUFFERSIZE (256)
470 #endif
471
472 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
473 // #define CFG_USBHID
474 // #define CFG_USBCDC
475 #define CFG_USBCDC_BAUDRATE (115200)
476 #define CFG_USBCDC_INITTIMEOUT (5000)
477 #define CFG_USBCDC_BUFFERSIZE (256)
478 #endif
479
480 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
481 // #define CFG_USBHID
482 #define CFG_USBCDC
483 #define CFG_USBCDC_BAUDRATE (115200)
484 #define CFG_USBCDC_INITTIMEOUT (5000)
485 #define CFG_USBCDC_BUFFERSIZE (256)
486 #endif
487
488 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
489 // #define CFG_USBHID
490 // #define CFG_USBCDC
491 #define CFG_USBCDC_BAUDRATE (57600)
492 #define CFG_USBCDC_INITTIMEOUT (5000)
493 #define CFG_USBCDC_BUFFERSIZE (256)
494 #endif
495
496 #ifdef CFG_BRD_LPC1343_802154USBSTICK
497 // #define CFG_USBHID
498 #define CFG_USBCDC
499 #define CFG_USBCDC_BAUDRATE (115200)
500 #define CFG_USBCDC_INITTIMEOUT (5000)
501 #define CFG_USBCDC_BUFFERSIZE (256)
502 #endif
503
504 #ifdef CFG_BRD_LPC1343_OLIMEX_P
505 // #define CFG_USBHID
506 #define CFG_USBCDC
507 #define CFG_USBCDC_BAUDRATE (115200)
508 #define CFG_USBCDC_INITTIMEOUT (5000)
509 #define CFG_USBCDC_BUFFERSIZE (256)
510 #endif
511 /*=========================================================================*/
512
513
514 /*=========================================================================
515 PRINTF REDIRECTION
516 -----------------------------------------------------------------------
517
518 CFG_PRINTF_UART Will cause all printf statements to be
519 redirected to UART
520 CFG_PRINTF_USBCDC Will cause all printf statements to be
521 redirect to USB Serial
522 CFG_PRINTF_NEWLINE This is typically "\r\n" for Windows or
523 "\n" for *nix
524
525 Note: If no printf redirection definitions are present, all printf
526 output will be ignored.
527 -----------------------------------------------------------------------*/
528 #ifdef CFG_BRD_LPC1343_REFDESIGN
529 // #define CFG_PRINTF_UART
530 #define CFG_PRINTF_USBCDC
531 #define CFG_PRINTF_NEWLINE "\r\n"
532 #endif
533
534 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
535 #define CFG_PRINTF_UART
536 // #define CFG_PRINTF_USBCDC
537 #define CFG_PRINTF_NEWLINE "\r\n"
538 #endif
539
540 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
541 // #define CFG_PRINTF_UART
542 #define CFG_PRINTF_USBCDC
543 #define CFG_PRINTF_NEWLINE "\r\n"
544 #endif
545
546 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
547 #define CFG_PRINTF_UART
548 // #define CFG_PRINTF_USBCDC
549 #define CFG_PRINTF_NEWLINE "\n"
550 #endif
551
552 #ifdef CFG_BRD_LPC1343_802154USBSTICK
553 // #define CFG_PRINTF_UART
554 #define CFG_PRINTF_USBCDC
555 #define CFG_PRINTF_NEWLINE "\r\n"
556 #endif
557
558 #ifdef CFG_BRD_LPC1343_OLIMEX_P
559 // #define CFG_PRINTF_UART
560 #define CFG_PRINTF_USBCDC
561 #define CFG_PRINTF_NEWLINE "\r\n"
562 #endif
563 /*=========================================================================*/
564
565
566 /*=========================================================================
567 COMMAND LINE INTERFACE
568 -----------------------------------------------------------------------
569
570 CFG_INTERFACE If this field is defined the UART or USBCDC
571 based command-line interface will be included
572 CFG_INTERFACE_MAXMSGSIZE The maximum number of bytes to accept for an
573 incoming command
574 CFG_INTERFACE_PROMPT The command prompt to display at the start
575 of every new data entry line
576 CFG_INTERFACE_SILENTMODE If this is set to 1 only text generated in
577 response to commands will be send to the
578 output buffer. The command prompt will not
579 be displayed and incoming text will not be
580 echoed back to the output buffer (allowing
581 you to see the text you have input). This
582 is normally only desirable in a situation
583 where another MCU is communicating with
584 the LPC1343.
585 CFG_INTERFACE_DROPCR If this is set to 1 all incoming \r
586 characters will be dropped
587 CFG_INTERFACE_ENABLEIRQ If this is set to 1 the IRQ pin will be
588 set high when a command starts executing
589 and will go low when the command has
590 finished executing or the LCD is not busy.
591 This allows another device to know when a
592 new command can safely be sent.
593 CFG_INTERFACE_IRQPORT The gpio port for the IRQ/busy pin
594 CFG_INTERFACE_IRQPIN The gpio pin number for the IRQ/busy pin
595 CFG_INTERFACE_SHORTERRORS If this is enabled only short 1 character
596 error messages will be returned (followed
597 by CFG_PRINTF_NEWLINE), rather than more
598 verbose error messages. The specific
599 characters used are defined below.
600 CFG_INTERFACE_CONFIRMREADY If this is set to 1 a text confirmation
601 will be sent when the command prompt is
602 ready for a new command. This is in
603 addition to CFG_INTERFACE_ENABLEIRQ if
604 this is also enabled. The character used
605 is defined below.
606
607 NOTE: The command-line interface will use either
608 USB-CDC or UART depending on whether
609 CFG_PRINTF_UART or CFG_PRINTF_USBCDC are
610 selected.
611 -----------------------------------------------------------------------*/
612 #ifdef CFG_BRD_LPC1343_REFDESIGN
613 #define CFG_INTERFACE
614 #define CFG_INTERFACE_MAXMSGSIZE (256)
615 #define CFG_INTERFACE_PROMPT "LPC1343 >> "
616 #define CFG_INTERFACE_SILENTMODE (0)
617 #define CFG_INTERFACE_DROPCR (0)
618 #define CFG_INTERFACE_ENABLEIRQ (0)
619 #define CFG_INTERFACE_IRQPORT (0)
620 #define CFG_INTERFACE_IRQPIN (7)
621 #define CFG_INTERFACE_SHORTERRORS (0)
622 #define CFG_INTERFACE_CONFIRMREADY (0)
623 #endif
624
625 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
626 // #define CFG_INTERFACE
627 #define CFG_INTERFACE_MAXMSGSIZE (256)
628 #define CFG_INTERFACE_PROMPT "LPC1343 >> "
629 #define CFG_INTERFACE_SILENTMODE (0)
630 #define CFG_INTERFACE_DROPCR (0)
631 #define CFG_INTERFACE_ENABLEIRQ (0)
632 #define CFG_INTERFACE_IRQPORT (0)
633 #define CFG_INTERFACE_IRQPIN (7)
634 #define CFG_INTERFACE_SHORTERRORS (0)
635 #define CFG_INTERFACE_CONFIRMREADY (0)
636 #endif
637
638 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
639 #define CFG_INTERFACE
640 #define CFG_INTERFACE_MAXMSGSIZE (256)
641 #define CFG_INTERFACE_PROMPT "CMD >> "
642 #define CFG_INTERFACE_SILENTMODE (0)
643 #define CFG_INTERFACE_DROPCR (0)
644 #define CFG_INTERFACE_ENABLEIRQ (0)
645 #define CFG_INTERFACE_IRQPORT (0)
646 #define CFG_INTERFACE_IRQPIN (7)
647 #define CFG_INTERFACE_SHORTERRORS (0)
648 #define CFG_INTERFACE_CONFIRMREADY (0)
649 #define CFG_INTERFACE_SHORTERRORS_UNKNOWNCOMMAND "?"
650 #define CFG_INTERFACE_SHORTERRORS_TOOMANYARGS ">"
651 #define CFG_INTERFACE_SHORTERRORS_TOOFEWARGS "<"
652 #define CFG_INTERFACE_CONFIRMREADY_TEXT "."
653 #endif
654
655 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
656 #define CFG_INTERFACE
657 #define CFG_INTERFACE_MAXMSGSIZE (256)
658 #define CFG_INTERFACE_PROMPT ">>"
659 #define CFG_INTERFACE_SILENTMODE (1)
660 #define CFG_INTERFACE_DROPCR (1)
661 #define CFG_INTERFACE_ENABLEIRQ (1)
662 #define CFG_INTERFACE_IRQPORT (0)
663 #define CFG_INTERFACE_IRQPIN (7)
664 #define CFG_INTERFACE_SHORTERRORS (1)
665 #define CFG_INTERFACE_CONFIRMREADY (0)
666 #define CFG_INTERFACE_SHORTERRORS_UNKNOWNCOMMAND "?"
667 #define CFG_INTERFACE_SHORTERRORS_TOOMANYARGS ">"
668 #define CFG_INTERFACE_SHORTERRORS_TOOFEWARGS "<"
669 #define CFG_INTERFACE_CONFIRMREADY_TEXT "."
670 #endif
671
672 #ifdef CFG_BRD_LPC1343_802154USBSTICK
673 // #define CFG_INTERFACE
674 #define CFG_INTERFACE_MAXMSGSIZE (256)
675 #define CFG_INTERFACE_PROMPT "CMD >> "
676 #define CFG_INTERFACE_SILENTMODE (0)
677 #define CFG_INTERFACE_DROPCR (0)
678 #define CFG_INTERFACE_ENABLEIRQ (0)
679 #define CFG_INTERFACE_IRQPORT (0)
680 #define CFG_INTERFACE_IRQPIN (7)
681 #define CFG_INTERFACE_SHORTERRORS (0)
682 #define CFG_INTERFACE_CONFIRMREADY (0)
683 #endif
684
685 #ifdef CFG_BRD_LPC1343_OLIMEX_P
686 #define CFG_INTERFACE
687 #define CFG_INTERFACE_MAXMSGSIZE (256)
688 #define CFG_INTERFACE_PROMPT "LPC-P1343 >> "
689 #define CFG_INTERFACE_SILENTMODE (0)
690 #define CFG_INTERFACE_DROPCR (0)
691 #define CFG_INTERFACE_ENABLEIRQ (0)
692 #define CFG_INTERFACE_IRQPORT (0)
693 #define CFG_INTERFACE_IRQPIN (7)
694 #define CFG_INTERFACE_SHORTERRORS (0)
695 #define CFG_INTERFACE_CONFIRMREADY (0)
696 #endif
697 /*=========================================================================*/
698
699
700 /*=========================================================================
701 PWM SETTINGS
702 -----------------------------------------------------------------------
703
704 CFG_PWM If this is defined, a basic PWM driver
705 will be included using 16-bit Timer 1 and
706 Pin 1.9 (MAT0) for the PWM output. In
707 order to allow for a fixed number of
708 pulses to be generated, some PWM-specific
709 code is required in the 16-Bit Timer 1
710 ISR. See "core/timer16/timer16.c" for
711 more information.
712 CFG_PWM_DEFAULT_PULSEWIDTH The default pulse width in ticks
713 CFG_PWM_DEFAULT_DUTYCYCLE The default duty cycle in percent
714
715 DEPENDENCIES: PWM output requires the use of 16-bit
716 timer 1 and pin 1.9 (CT16B1_MAT0).
717 -----------------------------------------------------------------------*/
718 // #define CFG_PWM
719 #define CFG_PWM_DEFAULT_PULSEWIDTH (CFG_CPU_CCLK / 1000)
720 #define CFG_PWM_DEFAULT_DUTYCYCLE (50)
721 /*=========================================================================*/
722
723
724 /*=========================================================================
725 STEPPER MOTOR SETTINGS
726 -----------------------------------------------------------------------
727
728 CFG_STEPPER If this is defined, a simple bi-polar
729 stepper motor will be included for common
730 H-bridge chips like the L293D or SN754410N
731
732 DEPENDENCIES: STEPPER requires the use of pins 3.0-3 and
733 32-bit Timer 0.
734 -----------------------------------------------------------------------*/
735 // #define CFG_STEPPER
736 /*=========================================================================*/
737
738
739 /*=========================================================================
740 EEPROM
741 -----------------------------------------------------------------------
742
743 CFG_I2CEEPROM If defined, drivers for the onboard EEPROM
744 will be included during build
745 CFG_I2CEEPROM_SIZE The number of bytes available on the EEPROM
746
747 -----------------------------------------------------------------------*/
748 #ifdef CFG_BRD_LPC1343_REFDESIGN
749 #define CFG_I2CEEPROM
750 #define CFG_I2CEEPROM_SIZE (3072)
751 #endif
752
753 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
754 // #define CFG_I2CEEPROM
755 #define CFG_I2CEEPROM_SIZE (3072)
756 #endif
757
758 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
759 #define CFG_I2CEEPROM
760 #define CFG_I2CEEPROM_SIZE (3072)
761 #endif
762
763 #ifdef CFG_BRD_LPC1343_802154USBSTICK
764 #define CFG_I2CEEPROM
765 #define CFG_I2CEEPROM_SIZE (3072)
766 #endif
767
768 #ifdef CFG_BRD_LPC1343_OLIMEX_P
769 // #define CFG_I2CEEPROM
770 #define CFG_I2CEEPROM_SIZE (3072)
771 #endif
772 /*=========================================================================*/
773
774
775 /*=========================================================================
776 EEPROM MEMORY MAP
777 -----------------------------------------------------------------------
778 EEPROM is used to persist certain user modifiable values to make
779 sure that these changes remain in effect after a reset or hard
780 power-down. The addresses in EEPROM for these various system
781 settings/values are defined below. The first 256 bytes of EEPROM
782 are reserved for this (0x0000..0x00FF).
783
784 CFG_EEPROM_RESERVED The last byte of reserved EEPROM memory
785
786 EEPROM Address (0x0000..0x00FF)
787 ===============================
788 0 1 2 3 4 5 6 7 8 9 A B C D E F
789 000x x x x x x x x x . x x . . . . . Chibi
790 001x . . . . . . . . . . . . . . . .
791 002x x x x x . . . . . . . . . . . . UART
792 003x x x x x x x x x x x x x x x x x Touch Screen Calibration
793 004x x x x x x x x x x x x x x x . . Touch Screen Calibration
794 005x . . . . . . . . . . . . . . . .
795 006x . . . . . . . . . . . . . . . .
796 007x . . . . . . . . . . . . . . . .
797 008x . . . . . . . . . . . . . . . .
798 009x . . . . . . . . . . . . . . . .
799 00Ax . . . . . . . . . . . . . . . .
800 00Bx . . . . . . . . . . . . . . . .
801 00Cx . . . . . . . . . . . . . . . .
802 00Dx . . . . . . . . . . . . . . . .
803 00Ex . . . . . . . . . . . . . . . .
804 00Fx . . . . . . . . . . . . . . . .
805
806 -----------------------------------------------------------------------*/
807 #define CFG_EEPROM_RESERVED (0x00FF) // Protect first 256 bytes of memory
808 #define CFG_EEPROM_CHIBI_IEEEADDR (uint16_t)(0x0000) // 8
809 #define CFG_EEPROM_CHIBI_SHORTADDR (uint16_t)(0x0009) // 2
810 #define CFG_EEPROM_UART_SPEED (uint16_t)(0x0020) // 4
811 #define CFG_EEPROM_TOUCHSCREEN_CALIBRATED (uint16_t)(0x0030) // 1
812 #define CFG_EEPROM_TOUCHSCREEN_CAL_AN (uint16_t)(0x0031) // 4
813 #define CFG_EEPROM_TOUCHSCREEN_CAL_BN (uint16_t)(0x0035) // 4
814 #define CFG_EEPROM_TOUCHSCREEN_CAL_CN (uint16_t)(0x0039) // 4
815 #define CFG_EEPROM_TOUCHSCREEN_CAL_DN (uint16_t)(0x003D) // 4
816 #define CFG_EEPROM_TOUCHSCREEN_CAL_EN (uint16_t)(0x0041) // 4
817 #define CFG_EEPROM_TOUCHSCREEN_CAL_FN (uint16_t)(0x0045) // 4
818 #define CFG_EEPROM_TOUCHSCREEN_CAL_DIVIDER (uint16_t)(0x0049) // 4
819 #define CFG_EEPROM_TOUCHSCREEN_THRESHHOLD (uint16_t)(0x004D) // 1
820 /*=========================================================================*/
821
822
823 /*=========================================================================
824 LM75B TEMPERATURE SENSOR
825 -----------------------------------------------------------------------
826
827 CFG_LM75B If defined, drivers for an optional LM75B
828 temperature sensor will be included during
829 build (requires external HW)
830
831 -----------------------------------------------------------------------*/
832 // #define CFG_LM75B
833 /*=========================================================================*/
834
835
836 /*=========================================================================
837 CHIBI WIRELESS STACK
838 -----------------------------------------------------------------------
839
840 CFG_CHIBI If defined, the CHIBI wireless stack will be
841 included during build. Requires external HW.
842 CFG_CHIBI_MODE The mode to use when receiving and transmitting
843 wireless data. See chb_drvr.h for possible values
844 CFG_CHIBI_POWER The power level to use when transmitting. See
845 chb_drvr.h for possible values
846 CFG_CHIBI_CHANNEL 802.15.4 Channel (0 = 868MHz, 1-10 = 915MHz)
847 CFG_CHIBI_PANID 16-bit PAN Identifier (ex.0x1234)
848 CFG_CHIBI_PROMISCUOUS Set to 1 to enabled promiscuous mode or
849 0 to disable it. If promiscuous mode is
850 enabled be sure to set CFG_CHIBI_BUFFERSIZE
851 to an appropriately large value (ex. 1024)
852 CFG_CHIBI_BUFFERSIZE The size of the message buffer in bytes
853
854 DEPENDENCIES: Chibi requires the use of SSP0, 16-bit timer
855 0 and pins 3.1, 3.2, 3.3. It also requires
856 the presence of CFG_I2CEEPROM.
857
858 NOTE: These settings are not relevant to all boards!
859 'tools/schematics/AT86RF212LPC1114_v1.6.pdf'
860 show how 'CHIBI' is meant to be connected
861 -----------------------------------------------------------------------*/
862 #ifdef CFG_BRD_LPC1343_REFDESIGN
863 // #define CFG_CHIBI
864 #define CFG_CHIBI_MODE (0) // OQPSK_868MHZ
865 #define CFG_CHIBI_POWER (0xE9) // CHB_PWR_EU2_3DBM
866 #define CFG_CHIBI_CHANNEL (0) // 868-868.6 MHz
867 #define CFG_CHIBI_PANID (0x1234)
868 #define CFG_CHIBI_PROMISCUOUS (0)
869 #define CFG_CHIBI_BUFFERSIZE (128)
870 #endif
871
872 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
873 // #define CFG_CHIBI
874 #define CFG_CHIBI_MODE (0) // OQPSK_868MHZ
875 #define CFG_CHIBI_POWER (0xE9) // CHB_PWR_EU2_3DBM
876 #define CFG_CHIBI_CHANNEL (0) // 868-868.6 MHz
877 #define CFG_CHIBI_PANID (0x1234)
878 #define CFG_CHIBI_PROMISCUOUS (0)
879 #define CFG_CHIBI_BUFFERSIZE (128)
880 #endif
881
882 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
883 // #define CFG_CHIBI
884 #define CFG_CHIBI_MODE (0) // OQPSK_868MHZ
885 #define CFG_CHIBI_POWER (0xE9) // CHB_PWR_EU2_3DBM
886 #define CFG_CHIBI_CHANNEL (0) // 868-868.6 MHz
887 #define CFG_CHIBI_PANID (0x1234)
888 #define CFG_CHIBI_PROMISCUOUS (0)
889 #define CFG_CHIBI_BUFFERSIZE (128)
890 #endif
891
892 #ifdef CFG_BRD_LPC1343_802154USBSTICK
893 #define CFG_CHIBI
894 #define CFG_CHIBI_MODE (0) // OQPSK_868MHZ
895 #define CFG_CHIBI_POWER (0xE9) // CHB_PWR_EU2_3DBM
896 #define CFG_CHIBI_CHANNEL (0) // 868-868.6 MHz
897 #define CFG_CHIBI_PANID (0x1234)
898 #define CFG_CHIBI_PROMISCUOUS (0)
899 #define CFG_CHIBI_BUFFERSIZE (1024)
900 #endif
901
902 #ifdef CFG_BRD_LPC1343_OLIMEX_P
903 // #define CFG_CHIBI
904 #define CFG_CHIBI_MODE (0) // OQPSK_868MHZ
905 #define CFG_CHIBI_POWER (0xE9) // CHB_PWR_EU2_3DBM
906 #define CFG_CHIBI_CHANNEL (0) // 868-868.6 MHz
907 #define CFG_CHIBI_PANID (0x1234)
908 #define CFG_CHIBI_PROMISCUOUS (0)
909 #define CFG_CHIBI_BUFFERSIZE (128)
910 #endif
911 /*=========================================================================*/
912
913
914 /*=========================================================================
915 TFT LCD
916 -----------------------------------------------------------------------
917
918 CFG_TFTLCD If defined, this will cause drivers for
919 a pre-determined LCD screen to be included
920 during build. Only one LCD driver can be
921 included during the build process (for ex.
922 'drivers/lcd/hw/ILI9325.c')
923 CFG_TFTLCD_INCLUDESMALLFONTS If set to 1, smallfont support will be
924 included for 3x6, 5x8, 7x8 and 8x8 fonts.
925 This should only be enabled if these small
926 fonts are required since there is already
927 support for larger fonts generated with
928 Dot Factory
929 http://www.pavius.net/downloads/tools/53-the-dot-factory
930 CFG_TFTLCD_TS_DEFAULTTHRESHOLD Default minimum threshold to trigger a
931 touch event with the touch screen (and exit
932 from 'tsWaitForEvent' in touchscreen.c).
933 Should be an 8-bit value somewhere between
934 8 and 75 in normal circumstances. This is
935 the default value and may be overriden by
936 a value stored in EEPROM.
937 CFG_TFTLCD_TS_KEYPADDELAY The delay in milliseconds between key
938 presses in dialogue boxes
939
940 PIN LAYOUT: The pin layout that is used by this driver
941 can be seen in the following schematic:
942 /tools/schematics/Breakout_TFTLCD_ILI9325_v1.3
943
944 DEPENDENCIES: TFTLCD requires the use of pins 1.8, 1.9,
945 1.10, 1.11, 3.3 and 2.1-9.
946 -----------------------------------------------------------------------*/
947 #ifdef CFG_BRD_LPC1343_REFDESIGN
948 // #define CFG_TFTLCD
949 #define CFG_TFTLCD_INCLUDESMALLFONTS (0)
950 #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
951 #define CFG_TFTLCD_TS_KEYPADDELAY (100)
952 #endif
953
954 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
955 // #define CFG_TFTLCD
956 #define CFG_TFTLCD_INCLUDESMALLFONTS (0)
957 #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
958 #define CFG_TFTLCD_TS_KEYPADDELAY (100)
959 #endif
960
961 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
962 #define CFG_TFTLCD
963 #define CFG_TFTLCD_INCLUDESMALLFONTS (0)
964 #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
965 #define CFG_TFTLCD_TS_KEYPADDELAY (100)
966 #endif
967
968 #ifdef CFG_BRD_LPC1343_802154USBSTICK
969 // #define CFG_TFTLCD
970 #define CFG_TFTLCD_INCLUDESMALLFONTS (0)
971 #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
972 #define CFG_TFTLCD_TS_KEYPADDELAY (100)
973 #endif
974
975 #ifdef CFG_BRD_LPC1343_OLIMEX_P
976 // #define CFG_TFTLCD
977 #define CFG_TFTLCD_INCLUDESMALLFONTS (0)
978 #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
979 #define CFG_TFTLCD_TS_KEYPADDELAY (100)
980 #endif
981 /*=========================================================================*/
982
983
984 /*=========================================================================
985 Monochrome/Bitmap Graphic LCDs
986 -----------------------------------------------------------------------
987
988 CFG_ST7565 If defined, this will cause drivers for
989 the 128x64 pixel ST7565 LCD to be included
990 CFG_SSD1306 If defined, this will cause drivers for
991 the 128x64 pixel SSD1306 OLED display to be
992 included
993 CFG_SHARPMEM If defined, this will cause drivers for
994 Sharp Memory Displays to be included
995
996 DEPENDENCIES: ST7565 requires the use of pins 2.1-6.
997 DEPENDENCIES: SSD1306 requires the use of pins 2.1-6.
998 DEPENDENCIES: SHARPMEM requires the use of pins 2.1-4.
999 -----------------------------------------------------------------------*/
1000 // #define CFG_ST7565
1001 // #define CFG_SSD1306
1002 // #define CFG_SHARPMEM
1003 /*=========================================================================*/
1004
1005
1006 /*=========================================================================
1007 RSA Encryption
1008 -----------------------------------------------------------------------
1009
1010 CFG_RSA If defined, support for basic RSA
1011 encryption will be included.
1012 CFG_RSA_BITS Indicates the number of bits used for
1013 RSA encryption keys. To keep code size
1014 reasonable, RSA encryption is currently
1015 limited to using 64-bit or 32-bit numbers,
1016 with 64-bit providing higher security, and
1017 32-bit providing smaller encrypted text
1018 size.
1019
1020 NOTE: Please note that Printf can not be
1021 used to display 64-bit values (%lld)!
1022 -----------------------------------------------------------------------*/
1023 // #define CFG_RSA
1024 #define CFG_RSA_BITS (32)
1025 /*=========================================================================*/
1026
1027
1028
1029
1030 /*=========================================================================
1031 CONFIG FILE VALIDATION
1032 -------------------------------------------------------------------------
1033 Basic error checking to make sure that incompatible defines are not
1034 enabled at the same time, etc.
1035
1036 =========================================================================*/
1037
1038 #if !defined CFG_BRD_LPC1343_REFDESIGN && \
1039 !defined CFG_BRD_LPC1343_REFDESIGN_MINIMAL && \
1040 !defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB && \
1041 !defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART && \
1042 !defined CFG_BRD_LPC1343_802154USBSTICK && \
1043 !defined CFG_BRD_LPC1343_OLIMEX_P
1044 #error "You must defined a target board (CFG_BRD_LPC1343_REFDESIGN or CFG_BRD_LPC1343_REFDESIGN_MINIMAL or CFG_BRD_LPC1343_TFTLCDSTANDALONE or CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART or CFG_BRD_LPC1343_802154USBSTICK)"
1045 #endif
1046
1047 #if defined CFG_PRINTF_USBCDC && defined CFG_PRINTF_UART
1048 #error "CFG_PRINTF_UART or CFG_PRINTF_USBCDC cannot both be defined at once"
1049 #endif
1050
1051 #if defined CFG_PRINTF_USBCDC && !defined CFG_USBCDC
1052 #error "CFG_PRINTF_CDC requires CFG_USBCDC to be defined as well"
1053 #endif
1054
1055 #if defined CFG_USBCDC && defined CFG_USBHID
1056 #error "Only one USB class can be defined at a time (CFG_USBCDC or CFG_USBHID)"
1057 #endif
1058
1059 #if defined CFG_SSP0_SCKPIN_2_11 && defined CFG_SSP0_SCKPIN_0_6
1060 #error "Only one SCK pin can be defined at a time for SSP0"
1061 #endif
1062
1063 #if !defined CFG_SSP0_SCKPIN_2_11 && !defined CFG_SSP0_SCKPIN_0_6
1064 #error "An SCK pin must be selected for SSP0 (CFG_SSP0_SCKPIN_2_11 or CFG_SSP0_SCKPIN_0_6)"
1065 #endif
1066
1067 #ifdef CFG_INTERFACE
1068 #if !defined CFG_PRINTF_UART && !defined CFG_PRINTF_USBCDC
1069 #error "CFG_PRINTF_UART or CFG_PRINTF_USBCDC must be defined for for CFG_INTERFACE Input/Output"
1070 #endif
1071 #if defined CFG_PRINTF_USBCDC && CFG_INTERFACE_SILENTMODE == 1
1072 #error "CFG_INTERFACE_SILENTMODE typically isn't enabled with CFG_PRINTF_USBCDC"
1073 #endif
1074 #endif
1075
1076 #ifdef CFG_CHIBI
1077 #if !defined CFG_I2CEEPROM
1078 #error "CFG_CHIBI requires CFG_I2CEEPROM to store and retrieve addresses"
1079 #endif
1080 #ifdef CFG_SDCARD
1081 #error "CFG_CHIBI and CFG_SDCARD can not be defined at the same time. Only one SPI block is available on the LPC1343."
1082 #endif
1083 #ifdef CFG_TFTLCD
1084 #error "CFG_CHIBI and CFG_TFTLCD can not be defined at the same time since they both use pins 1.8, 1.9 and 1.10."
1085 #endif
1086 #ifdef CFG_PWM
1087 #error "CFG_CHIBI and CFG_PWM can not be defined at the same time since they both use pin 1.9."
1088 #endif
1089 #if CFG_CHIBI_PROMISCUOUS != 0 && CFG_CHIBI_PROMISCUOUS != 1
1090 #error "CFG_CHIBI_PROMISCUOUS must be equal to either 1 or 0"
1091 #endif
1092 #endif
1093
1094 #ifdef CFG_TFTLCD
1095 #ifdef CFG_ST7565
1096 #error "CFG_TFTLCD and CFG_ST7565 can not be defined at the same time."
1097 #endif
1098 #ifdef CFG_SSD1306
1099 #error "CFG_TFTLCD and CFG_SSD1306 can not be defined at the same time."
1100 #endif
1101 #ifdef CFG_SHARPMEM
1102 #error "CFG_TFTLCD and CFG_SHARPMEM can not be defined at the same time."
1103 #endif
1104 #ifdef CFG_PWM
1105 #error "CFG_TFTLCD and CFG_PWM can not be defined at the same time since they both use pin 1.9."
1106 #endif
1107 #if !defined CFG_I2CEEPROM
1108 #error "CFG_TFTLCD requires CFG_I2CEEPROM to store and retrieve configuration settings"
1109 #endif
1110 #endif
1111
1112 #ifdef CFG_SDCARD
1113 #ifdef CFG_STEPPER
1114 #error "CFG_SDCARD and CFG_STEPPER can not be defined at the same time since they both use pin 3.0."
1115 #endif
1116 #endif
1117
1118 #ifdef CFG_ST7565
1119 #ifdef CFG_SSD1306
1120 #error "CFG_ST7565 and CFG_SSD1306 can not be defined at the same time"
1121 #endif
1122 #endif
1123
1124 #ifdef CFG_RSA
1125 #if CFG_RSA_BITS != 64 && CFG_RSA_BITS != 32
1126 #error "CFG_RSA_BITS must be equal to either 32 or 64."
1127 #endif
1128 #endif
1129
1130 #endif
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