add PWM CLI command
[hackover2013-badge-firmware.git] / core / timer32 / timer32.c
1 /**************************************************************************/
2 /*!
3 @file timer32.c
4 @author K. Townsend (microBuilder.eu)
5 @date 22 March 2010
6 @version 0.10
7
8 @section DESCRIPTION
9
10 Generic code for 32-bit timers. By default, the timers are configured
11 to generate an interrupt once every 100 microseconds, incrementing a
12 global variable once per tick.
13
14 @warning Please note that the ROM-based USB drivers on the LPC1343
15 require the use of 32-bit Timer 1. If you plan on using the
16 ROM-based USB functionality, you should restrict your timer
17 usage to 32-bit timer 0.
18
19 @section Example
20
21 @code
22 #include "/core/cpu/cpu.h"
23 #include "/core/timer32/timer32.h"
24 ...
25 cpuInit();
26
27 // Initialise 32-bit timer 0 with 100uS ticks
28 timer32Init(0, TIMER32_DEFAULTINTERVAL);
29
30 // Enable timer 0
31 timer32Enable(0);
32
33 // Cause a blocking delay for 1 second (1000mS)
34 timer32Delay(0, TIMER32_DELAY_1MS * 1000);
35 @endcode
36
37 @section LICENSE
38
39 Software License Agreement (BSD License)
40
41 Copyright (c) 2010, microBuilder SARL
42 All rights reserved.
43
44 Redistribution and use in source and binary forms, with or without
45 modification, are permitted provided that the following conditions are met:
46 1. Redistributions of source code must retain the above copyright
47 notice, this list of conditions and the following disclaimer.
48 2. Redistributions in binary form must reproduce the above copyright
49 notice, this list of conditions and the following disclaimer in the
50 documentation and/or other materials provided with the distribution.
51 3. Neither the name of the copyright holders nor the
52 names of its contributors may be used to endorse or promote products
53 derived from this software without specific prior written permission.
54
55 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY
56 EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
57 WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
58 DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY
59 DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
60 (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
61 LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
62 ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
63 (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
64 SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
65 */
66 /**************************************************************************/
67
68 #include "timer32.h"
69
70 volatile uint32_t timer32_0_counter = 0;
71 volatile uint32_t timer32_1_counter = 0;
72 void (*interruptHandler)(void) = NULL;
73
74 /**************************************************************************/
75 /*!
76 @brief Causes a blocking delay for the specified number of
77 timer ticks. The duration of each 'tick' is determined by
78 the 'timerInterval' property supplied to timer32Init.
79
80 @param[in] timerNum
81 The 32-bit timer to user (0..1)
82 @param[in] delay
83 The number of counter increments to wait
84 */
85 /**************************************************************************/
86 void timer32Delay(uint8_t timerNum, uint32_t delay)
87 {
88 uint32_t curTicks;
89
90 if (timerNum == 0)
91 {
92 curTicks = timer32_0_counter;
93 if (curTicks > 0xFFFFFFFF - delay)
94 {
95 // Rollover will occur during delay
96 while (timer32_0_counter >= curTicks)
97 {
98 while (timer32_0_counter < (delay - (0xFFFFFFFF - curTicks)));
99 }
100 }
101 else
102 {
103 while ((timer32_0_counter - curTicks) < delay);
104 }
105 }
106
107 else if (timerNum == 1)
108 {
109 curTicks = timer32_1_counter;
110 if (curTicks > 0xFFFFFFFF - delay)
111 {
112 // Rollover will occur during delay
113 while (timer32_1_counter >= curTicks)
114 {
115 while (timer32_1_counter < (delay - (0xFFFFFFFF - curTicks)));
116 }
117 }
118 else
119 {
120 while ((timer32_1_counter - curTicks) < delay);
121 }
122 }
123
124 return;
125 }
126
127 uint32_t timer32GetCount(uint8_t timerNum) {
128 if(0 == timerNum) {
129 return timer32_0_counter;
130 } else {
131 return timer32_1_counter;
132 }
133
134 }
135
136 void timer32SetIntHandler(void (*handler)(void)) {
137 interruptHandler = handler;
138 }
139
140 /**************************************************************************/
141 /*!
142 @brief Interrupt handler for 32-bit timer 0
143 */
144 /**************************************************************************/
145 void TIMER32_0_IRQHandler(void)
146 {
147 if(NULL != interruptHandler) {
148 (*interruptHandler)();
149 }
150 /* Clear the interrupt flag */
151 TMR_TMR32B0IR = TMR_TMR32B0IR_MR0;
152
153 /* If you wish to perform some action after each timer 'tick' (such as
154 incrementing a counter variable) you can do so here */
155 timer32_0_counter++;
156
157 return;
158 }
159
160 /**************************************************************************/
161 /*!
162 @brief Interrupt handler for 32-bit timer 1
163 */
164 /**************************************************************************/
165 void TIMER32_1_IRQHandler(void)
166 {
167 /* Clear the interrupt flag */
168 TMR_TMR32B1IR = TMR_TMR32B1IR_MR0;
169
170 /* If you wish to perform some action after each timer 'tick' (such as
171 incrementing a counter variable) you can do so here */
172 timer32_1_counter++;
173
174 return;
175 }
176
177 /**************************************************************************/
178 /*!
179 @brief Enables the specified timer
180
181 @param[in] timerNum
182 The 32-bit timer to enable (0..1)
183 */
184 /**************************************************************************/
185 void timer32Enable(uint8_t timerNum)
186 {
187 if ( timerNum == 0 )
188 {
189 TMR_TMR32B0TCR = TMR_TMR32B0TCR_COUNTERENABLE_ENABLED;
190 }
191
192 else if (timerNum == 1)
193 {
194 TMR_TMR32B1TCR = TMR_TMR32B1TCR_COUNTERENABLE_ENABLED;
195 }
196
197 return;
198 }
199
200 /**************************************************************************/
201 /*!
202 @brief Disables the specified timer
203
204 @param[in] timerNum
205 The 32-bit timer to disable (0..1)
206 */
207 /**************************************************************************/
208 void timer32Disable(uint8_t timerNum)
209 {
210 if ( timerNum == 0 )
211 {
212 TMR_TMR32B0TCR = TMR_TMR32B0TCR_COUNTERENABLE_DISABLED;
213 }
214
215 else if (timerNum == 1)
216 {
217 TMR_TMR32B1TCR = TMR_TMR32B1TCR_COUNTERENABLE_DISABLED;
218 }
219
220 return;
221 }
222
223 /**************************************************************************/
224 /*!
225 @brief Resets the specified timer
226
227 @param[in] timerNum
228 The 32-bit timer to reset (0..1)
229 */
230 /**************************************************************************/
231 void timer32Reset(uint8_t timerNum)
232 {
233 uint32_t regVal;
234
235 if ( timerNum == 0 )
236 {
237 regVal = TMR_TMR32B0TCR;
238 regVal |= TMR_TMR32B0TCR_COUNTERRESET_ENABLED;
239 TMR_TMR32B0TCR = regVal;
240 }
241
242 else if (timerNum == 1)
243 {
244 regVal = TMR_TMR32B1TCR;
245 regVal |= TMR_TMR32B1TCR_COUNTERRESET_ENABLED;
246 TMR_TMR32B1TCR = regVal;
247 }
248
249 return;
250 }
251
252 /**************************************************************************/
253 /*!
254 @brief Initialises the specified 32-bit timer, and configures the
255 timer to raise an interrupt and reset on match on MR0.
256
257 @param[in] timerNum
258 The 32-bit timer to initiliase (0..1)
259 @param[in] timerInterval
260 The number of clock 'ticks' between resets (0..0xFFFFFFFF)
261
262 @note Care needs to be taken when configuring the timers since the
263 pins are all multiplexed with other peripherals. This code is
264 provided as a starting point, but it will need to be adjusted
265 according to your own situation and pin/peripheral requirements
266 */
267 /**************************************************************************/
268 void timer32Init(uint8_t timerNum, uint32_t timerInterval)
269 {
270 // If timerInterval is invalid, use the default value
271 if (timerInterval < 1)
272 {
273 timerInterval = TIMER32_DEFAULTINTERVAL;
274 }
275
276 if ( timerNum == 0 )
277 {
278 /* Enable the clock for CT32B0 */
279 SCB_SYSAHBCLKCTRL |= (SCB_SYSAHBCLKCTRL_CT32B0);
280
281 /* The physical pins associated with CT32B0 are not enabled by
282 default in order to avoid conflicts with other peripherals. If
283 you wish to use any of the pin-dependant functionality, simply
284 uncomment the appropriate lines below. */
285
286 /* Configure PIO1.5 as Timer0_32 CAP0 */
287 // IOCON_PIO1_5 &= ~IOCON_PIO1_5_FUNC_MASK;
288 // IOCON_PIO1_5 |= IOCON_PIO1_5_FUNC_CT32B0_CAP0;
289
290 /* Configure PIO1.6 as Timer0_32 MAT0 */
291 // IOCON_PIO1_6 &= ~IOCON_PIO1_6_FUNC_MASK;
292 // IOCON_PIO1_6 |= IOCON_PIO1_6_FUNC_CT32B0_MAT0;
293
294 /* Configure PIO1.7 as Timer0_32 MAT1 */
295 // IOCON_PIO1_7 &= ~IOCON_PIO1_7_FUNC_MASK;
296 // IOCON_PIO1_7 |= IOCON_PIO1_7_FUNC_CT32B0_MAT1;
297
298 /* Configure PIO0.1 as Timer0_32 MAT2 */
299 // IOCON_PIO0_1 &= ~IOCON_PIO0_1_FUNC_MASK;
300 // IOCON_PIO0_1 |= IOCON_PIO0_1_FUNC_CT32B0_MAT2;
301
302 /* Configure PIO0.11 as Timer0_32 MAT3 */
303 /* Note: This pint can not be used with JTAG/SWD */
304 // IOCON_JTAG_TDI_PIO0_11 &= ~IOCON_JTAG_TDI_PIO0_11_FUNC_MASK;
305 // IOCON_JTAG_TDI_PIO0_11 |= IOCON_JTAG_TDI_PIO0_11_FUNC_CT32B0_MAT3;
306
307 timer32_0_counter = 0;
308 TMR_TMR32B0MR0 = timerInterval;
309
310 /* Configure match control register to raise an interrupt and reset on MR0 */
311 TMR_TMR32B0MCR = (TMR_TMR32B0MCR_MR0_INT_ENABLED | TMR_TMR32B0MCR_MR0_RESET_ENABLED);
312
313 /* Enable the TIMER0 interrupt */
314 NVIC_EnableIRQ(TIMER_32_0_IRQn);
315 }
316
317 else if ( timerNum == 1 )
318 {
319 /* Enable the clock for CT32B1 */
320 SCB_SYSAHBCLKCTRL |= (SCB_SYSAHBCLKCTRL_CT32B1);
321
322 /* The physical pins associated with CT32B0 are not enabled by
323 default in order to avoid conflicts with other peripherals. */
324
325 /* Configure PIO1.0 as Timer1_32 CAP0 */
326 /* Note: This pint can not be used with JTAG/SWD */
327 // IOCON_JTAG_TMS_PIO1_0 &= ~IOCON_JTAG_TMS_PIO1_0_FUNC_MASK;
328 // IOCON_JTAG_TMS_PIO1_0 |= IOCON_JTAG_TMS_PIO1_0_FUNC_CT32B1_CAP0;
329
330 /* Configure PIO1.1 as Timer1_32 MAT0 */
331 /* Note: This pint can not be used with JTAG/SWD */
332 // IOCON_JTAG_TDO_PIO1_1 &= ~IOCON_JTAG_TDO_PIO1_1_FUNC_MASK;
333 // IOCON_JTAG_TDO_PIO1_1 |= IOCON_JTAG_TDO_PIO1_1_FUNC_CT32B1_MAT0;
334
335 /* Configure PIO1.2 as Timer1_32 MAT1 */
336 /* Note: This pint can not be used with JTAG/SWD */
337 // IOCON_JTAG_nTRST_PIO1_2 &= ~IOCON_JTAG_nTRST_PIO1_2_FUNC_MASK;
338 // IOCON_JTAG_nTRST_PIO1_2 |= IOCON_JTAG_nTRST_PIO1_2_FUNC_CT32B1_MAT1;
339
340 /* Configure PIO1.3 as Timer1_32 MAT2 */
341 /* Note: This pint can not be used with JTAG/SWD */
342 // IOCON_SWDIO_PIO1_3 &= ~IOCON_SWDIO_PIO1_3_FUNC_MASK;
343 // IOCON_SWDIO_PIO1_3 |= IOCON_SWDIO_PIO1_3_FUNC_CT32B1_MAT2;
344
345 /* Configure PIO1.4 as Timer1_32 MAT3 */
346 // IOCON_PIO1_4 &= ~IOCON_PIO1_4_FUNC_MASK;
347 // IOCON_PIO1_4 |= IOCON_PIO1_4_FUNC_CT32B1_MAT3;
348
349 timer32_1_counter = 0;
350 TMR_TMR32B1MR0 = timerInterval;
351
352 /* Configure match control register to raise an interrupt and reset on MR0 */
353 TMR_TMR32B1MCR = (TMR_TMR32B1MCR_MR0_INT_ENABLED | TMR_TMR32B1MCR_MR0_RESET_ENABLED);
354
355 /* Enable the TIMER1 Interrupt */
356 NVIC_EnableIRQ(TIMER_32_1_IRQn);
357 }
358 return;
359 }
360
361 void timer32ResetCounter(uint8_t timerNum){
362 if(0 == timerNum){
363 timer32_0_counter = 0;
364 } else if(1 == timerNum) {
365 timer32_1_counter = 0;
366 }
367 }
368
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