projectconfig.h

   1 /**************************************************************************/
   2 /*!
   3     @file     projectconfig.h
   4     @author   K. Townsend (microBuilder.eu)
   5
   6     @section LICENSE
   7
   8     Software License Agreement (BSD License)
   9
  10     Copyright (c) 2012, microBuilder SARL
  11     All rights reserved.
  12
  13     Redistribution and use in source and binary forms, with or without
  14     modification, are permitted provided that the following conditions are met:
  15     1. Redistributions of source code must retain the above copyright
  16     notice, this list of conditions and the following disclaimer.
  17     2. Redistributions in binary form must reproduce the above copyright
  18     notice, this list of conditions and the following disclaimer in the
  19     documentation and/or other materials provided with the distribution.
  20     3. Neither the name of the copyright holders nor the
  21     names of its contributors may be used to endorse or promote products
  22     derived from this software without specific prior written permission.
  23
  24     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY
  25     EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  26     WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY
  28     DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  29     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  30     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  31     ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  32     (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  33     SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34 */
  35 /**************************************************************************/
  36
  37 #ifndef _PROJECTCONFIG_H_
  38 #define _PROJECTCONFIG_H_
  39
  40 #include "lpc134x.h"
  41 #include "sysdefs.h"
  42
  43 /*=========================================================================
  44     BOARD SELECTION
  45
  46     Because several boards use this code library with sometimes slightly
  47     different pin configuration, you will need to specify which board you
  48     are using by enabling one of the following definitions. The code base
  49     will then try to configure itself accordingly for that board.
  50
  51     CFG_BRD_LPC1343_REFDESIGN
  52     =========================
  53
  54         microBuilder.eu LPC1343 Reference Design base board with
  55         on-board peripherals initialised (EEPROM, USB or UART CLI, etc.)
  56
  57                 This is the recommended starting point for new development
  58                 since it makes it easy to send printf output to USB CDC, access
  59                 the on-board EEPROM, etc.
  60
  61     CFG_BRD_LPC1343_REFDESIGN_MINIMAL
  62     =================================
  63
  64         microBuilder.eu LPC1343 Reference Design base board with
  65         only the most common peripherals initialised by default.
  66
  67         Results in smallest code since EEPROM, USB, etc., are not
  68         initialised on startup.  By default, only the following
  69         peripherals are initialised by systemInit():
  70
  71               - CPU (Configures the PLL, etc.)
  72               - GPIO
  73               - SysTick Timer
  74               - UART (with printf support) *
  75
  76         * Can be removed to save 0.8kb in debug and 0.3 kb in
  77         release. Comment out 'CFG_PRINTF_UART' to disable it.
  78
  79         The code size can be further reduced by several KB by removing
  80         any IRQ Handlers that are not used.  The I2C IRQHandler, for
  81         example, uses ~1KB of flash in debug and ~400KB in release mode,
  82         but because it is referenced in the startup code it is always
  83         included even if I2C is never used in the project.
  84
  85         Other IRQ Handlers that you might be able to comment out
  86         to save some space are:
  87
  88         IRQ Handler               Debug   Release
  89         ------------------------- ------  -------
  90         I2C_IRQHandler            1160 b    400 b
  91         SSP_IRQHandler             160 b     76 b
  92         UART_IRQHandler            246 b    116 b
  93         WAKEUP_IRQHandler          160 b    100 b
  94         WDT_IRQHandler              50 b     28 b
  95
  96     CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
  97     ====================================
  98
  99         microBuilder.eu/Adafruit Stand-Alone "Smart LCD" with USB enabled
 100         for the CLI interface.
 101
 102     CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 103     =====================================
 104
 105         microBuilder.eu/Adafruit Stand-Alone "Smart LCD" with UART enabled
 106         for the CLI interface.
 107
 108     CFG_BRD_LPC1343_802154USBSTICK
 109     ==============================
 110
 111         microBuilder.eu USB stick 802.15.4 868/915MHz RF transceiver
 112
 113     -----------------------------------------------------------------------*/
 114     #define CFG_BRD_LPC1343_REFDESIGN
 115     // #define CFG_BRD_LPC1343_REFDESIGN_MINIMAL
 116     // #define CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
 117     // #define CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 118     // #define CFG_BRD_LPC1343_802154USBSTICK
 119     // #define CFG_BRD_LPC1343_OLIMEX_P
 120 /*=========================================================================*/
 121
 122
 123 /**************************************************************************
 124     PIN USAGE
 125     -----------------------------------------------------------------------
 126     This table tries to give an indication of which GPIO pins and
 127     peripherals are used by the available drivers and SW examples.  Only
 128     dedicated GPIO pins available on the LPC1343 Reference Board are shown
 129     below.  Any unused peripheral blocks like I2C, SSP, ADC, etc., can
 130     also be used as GPIO if they are available.
 131
 132                 PORT 1        PORT 2                PORT 3
 133                 =========     =================     =======
 134                 8 9 10 11     1 2 3 4 5 6 7 8 9     0 1 2 3
 135
 136     SDCARD      . .  .  .     . . . . . . . . .     X . . .
 137     PWM         . X  .  .     . . . . . . . . .     . . . .
 138     STEPPER     . .  .  .     . . . . . . . . .     X X X X
 139     CHIBI       X X  X  .     . . . . . . . . .     . . . .
 140     ILI9325/8   X X  X  X     X X X X X X X X X     . . . X
 141     ST7565      X X  X  X     X X X X X X X X X     . . . X
 142     ST7735      . .  .  .     X X X X X X . . .     . . . .
 143     SHARPMEM    . .  .  .     X X X X . . . . .     . . . .
 144     SSD1306     . .  .  .     X X X . X X . . .     . . . .
 145     SSD1351     . .  .  .     X X X X X . . . .     . . . .
 146     MCP121      . .  .  .     . . . . . . . . .     . X . .
 147     PN532 [3]   . .  .  .     . . . . . . . . .     . X X .
 148
 149                 TIMERS                    SSP     ADC         UART
 150                 ======================    ===     =======     ====
 151                 16B0  16B1  32B0  32B1    0       0 1 2 3     0
 152
 153     SDCARD      .     .     .     .       X       . . . .     .
 154     PWM         .     X     .     .       .       . . . .     .
 155     PMU [1]     .     .     X     .       .       . . . .     .
 156     USB         .     .     .     X       .       . . . .     .
 157     STEPPER     .     .     X     .       .       . . . .     .
 158     CHIBI       x     .     .     .       X       . . . .     .
 159     ILI9325/8   .     .     .     .       .       X X X X     .
 160     ST7565      .     .     .     .       .       X X X X     .
 161     ST7535      .     .     .     .       .       . . . .     .
 162     SHARPMEM    .     .     .     .       .       . . . .     .
 163     SSD1306     .     .     .     .       .       . . . .     .
 164     INTERFACE   .     .     .     .       .       . . . .     X[2]
 165
 166     [1]  PMU uses 32-bit Timer 0 for SW wakeup from deep-sleep.  This timer
 167          can safely be used by other peripherals, but may need to be
 168          reconfigured when you wakeup from deep-sleep.
 169     [2]  INTERFACE can be configured to use either USBCDC or UART
 170     [3]  3.2 only used when with the I2C bus (for IRQ)
 171
 172  **************************************************************************/
 173
 174
 175 /**************************************************************************
 176     I2C Addresses
 177     -----------------------------------------------------------------------
 178     The following addresses are used by the different I2C sensors included
 179     in the code base [1]
 180
 181                                 HEX       BINARY
 182                                 ====      ========
 183     ISL12022M (RTC)             0xDE      1101111x
 184     ISL12022M (SRAM)            0xAE      1010111x
 185     LM75B                       0x90      1001000x
 186     MCP24AA                     0xA0      1010000x
 187     MCP4725                     0xC0      1100000x
 188     TSL2561                     0x72      0111001x
 189     TCS3414                     0x72      0111001x
 190     PN532                       0x48      0100100x
 191
 192     [1]  Alternative addresses may exists, but the addresses listed in this
 193          table are the values used in the code base
 194
 195  **************************************************************************/
 196
 197
 198 /*=========================================================================
 199     FIRMWARE VERSION SETTINGS
 200     -----------------------------------------------------------------------*/
 201     #define CFG_FIRMWARE_VERSION_MAJOR            (1)
 202     #define CFG_FIRMWARE_VERSION_MINOR            (0)
 203     #define CFG_FIRMWARE_VERSION_REVISION         (0)
 204 /*=========================================================================*/
 205
 206
 207 /*=========================================================================
 208     CORE CPU SETTINGS
 209     -----------------------------------------------------------------------
 210
 211     CFG_CPU_CCLK    Value is for reference only.  'core/cpu/cpu.c' must
 212                     be modified to change the clock speed, but the value
 213                     should be indicated here since CFG_CPU_CCLK is used by
 214                     other peripherals to determine timing.
 215
 216     -----------------------------------------------------------------------*/
 217     #define CFG_CPU_CCLK                (72000000)  // 1 tick = 13.88nS
 218 /*=========================================================================*/
 219
 220
 221 /*=========================================================================
 222     SYSTICK TIMER
 223     -----------------------------------------------------------------------
 224
 225     CFG_SYSTICK_DELAY_IN_MS   The number of milliseconds between each tick
 226                               of the systick timer.
 227
 228     -----------------------------------------------------------------------*/
 229     #define CFG_SYSTICK_DELAY_IN_MS     (1)
 230 /*=========================================================================*/
 231
 232
 233 /*=========================================================================
 234     GPIO INTERRUPTS
 235     -----------------------------------------------------------------------
 236
 237     IF you wish to use the GPIO interrupt handlers elsewhere in your code,
 238     you should probably define a seperate IRQHandler for the appropriate
 239     GPIO bank rather than using the definitions in core/gpio/gpio.c (to
 240     avoid causing problems in other projects, and to make updates easier,
 241     etc.)  To disable the default IRQHandler, simply comment out the
 242     define below for the appropriate GPIO bank and implement the handler
 243     somewhere else.
 244
 245     GPIO_ENABLE_IRQ0    If defined, PIOINT0_IRQHandler will be declared and
 246                         handled in core/gpio/gpio.c
 247     GPIO_ENABLE_IRQ1    If defined, PIOINT1_IRQHandler will be declared and
 248                         handled in core/gpio/gpio.c
 249     GPIO_ENABLE_IRQ2    If defined, PIOINT2_IRQHandler will be declared and
 250                         handled in core/gpio/gpio.c
 251     GPIO_ENABLE_IRQ3    If defined, PIOINT3_IRQHandler will be declared and
 252                         handled in core/gpio/gpio.c
 253
 254     -----------------------------------------------------------------------*/
 255     #ifdef CFG_BRD_LPC1343_REFDESIGN
 256       // #define GPIO_ENABLE_IRQ0
 257       #define GPIO_ENABLE_IRQ1
 258       // #define GPIO_ENABLE_IRQ2
 259       // #define GPIO_ENABLE_IRQ3
 260     #endif
 261
 262     #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
 263       // #define GPIO_ENABLE_IRQ0
 264       #define GPIO_ENABLE_IRQ1
 265       // #define GPIO_ENABLE_IRQ2
 266       // #define GPIO_ENABLE_IRQ3
 267     #endif
 268
 269     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
 270       // #define GPIO_ENABLE_IRQ0
 271       #define GPIO_ENABLE_IRQ1
 272       // #define GPIO_ENABLE_IRQ2
 273       // #define GPIO_ENABLE_IRQ3
 274     #endif
 275
 276     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 277       // #define GPIO_ENABLE_IRQ0
 278       #define GPIO_ENABLE_IRQ1
 279       // #define GPIO_ENABLE_IRQ2
 280       // #define GPIO_ENABLE_IRQ3
 281     #endif
 282
 283     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 284       // #define GPIO_ENABLE_IRQ0
 285       #define GPIO_ENABLE_IRQ1
 286       // #define GPIO_ENABLE_IRQ2
 287       // #define GPIO_ENABLE_IRQ3
 288     #endif
 289
 290     #ifdef CFG_BRD_LPC1343_OLIMEX_P
 291       // #define GPIO_ENABLE_IRQ0
 292       #define GPIO_ENABLE_IRQ1
 293       // #define GPIO_ENABLE_IRQ2
 294       // #define GPIO_ENABLE_IRQ3
 295     #endif
 296 /*=========================================================================*/
 297
 298
 299 /*=========================================================================
 300     ALTERNATE RESET PIN
 301     -----------------------------------------------------------------------
 302
 303     CFG_ALTRESET        If defined, indicates that a GPIO pin should be
 304                         configured as an alternate reset pin in addition
 305                         to the dedicated reset pin.
 306     CFG_ALTRESET_PORT   The GPIO port where the alt reset pin is located
 307     CFG_ALTRESET_PIN    The GPIO pin where the alt reset pin is located
 308
 309     -----------------------------------------------------------------------*/
 310     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 311       #define CFG_ALTRESET
 312       #define CFG_ALTRESET_PORT         (1)
 313       #define CFG_ALTRESET_PIN          (5)   // P1.5 = RTS
 314     #endif
 315 /*=========================================================================*/
 316
 317
 318 /*=========================================================================
 319     UART
 320     -----------------------------------------------------------------------
 321
 322     CFG_UART_BAUDRATE         The default UART speed.  This value is used
 323                               when initialising UART, and should be a
 324                               standard value like 57600, 9600, etc.
 325                               NOTE: This value may be overridden if
 326                               another value is stored in EEPROM!
 327     CFG_UART_BUFSIZE          The length in bytes of the UART RX FIFO. This
 328                               will determine the maximum number of received
 329                               characters to store in memory.
 330
 331     -----------------------------------------------------------------------*/
 332     #ifdef CFG_BRD_LPC1343_REFDESIGN
 333       #define CFG_UART_BAUDRATE           (115200)
 334       #define CFG_UART_BUFSIZE            (512)
 335     #endif
 336
 337     #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
 338       #define CFG_UART_BAUDRATE           (115200)
 339       #define CFG_UART_BUFSIZE            (512)
 340     #endif
 341
 342     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
 343       #define CFG_UART_BAUDRATE           (115200)
 344       #define CFG_UART_BUFSIZE            (512)
 345     #endif
 346
 347     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 348       #define CFG_UART_BAUDRATE           (57600)
 349       #define CFG_UART_BUFSIZE            (512)
 350     #endif
 351
 352     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 353       #define CFG_UART_BAUDRATE           (115200)
 354       #define CFG_UART_BUFSIZE            (512)
 355     #endif
 356
 357     #ifdef CFG_BRD_LPC1343_OLIMEX_P
 358       #define CFG_UART_BAUDRATE           (115200)
 359       #define CFG_UART_BUFSIZE            (512)
 360     #endif
 361 /*=========================================================================*/
 362
 363
 364 /*=========================================================================
 365     SSP
 366     -----------------------------------------------------------------------
 367
 368     CFG_SSP0_SCKPIN_2_11      Indicates which pin should be used for SCK0
 369     CFG_SSP0_SCKPIN_0_6
 370
 371     -----------------------------------------------------------------------*/
 372     #ifdef CFG_BRD_LPC1343_REFDESIGN
 373       #define CFG_SSP0_SCKPIN_2_11
 374       // #define CFG_SSP0_SCKPIN_0_6
 375     #endif
 376
 377     #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
 378       #define CFG_SSP0_SCKPIN_2_11
 379       // #define CFG_SSP0_SCKPIN_0_6
 380     #endif
 381
 382     #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 383       #define CFG_SSP0_SCKPIN_2_11
 384       // #define CFG_SSP0_SCKPIN_0_6
 385     #endif
 386
 387     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 388       // #define CFG_SSP0_SCKPIN_2_11
 389       #define CFG_SSP0_SCKPIN_0_6
 390     #endif
 391
 392     #ifdef CFG_BRD_LPC1343_OLIMEX_P
 393       #define CFG_SSP0_SCKPIN_2_11
 394       // #define CFG_SSP0_SCKPIN_0_6
 395     #endif
 396 /*=========================================================================*/
 397
 398
 399 /*=========================================================================
 400     ADC
 401     -----------------------------------------------------------------------
 402
 403     ADC_AVERAGING_ENABLE      To get better results, the ADC code can take
 404                               a number of samples and return the average
 405                               value.  This is slower, but can give more
 406                               accurate results compared to single-reading.
 407
 408                               To enable averaging, set ADC_AVERAGING_ENABLE
 409                               to a non-zero value.
 410     ADC_AVERAGING_SAMPLES     The number of ADC samples to read and
 411                               average if ADC averaging is enabled.
 412
 413     -----------------------------------------------------------------------*/
 414     #ifdef CFG_BRD_LPC1343_REFDESIGN
 415       #define ADC_AVERAGING_ENABLE    (1)
 416       #define ADC_AVERAGING_SAMPLES   (5)
 417     #endif
 418
 419     #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
 420       #define ADC_AVERAGING_ENABLE    (1)
 421       #define ADC_AVERAGING_SAMPLES   (5)
 422     #endif
 423
 424     #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 425       #define ADC_AVERAGING_ENABLE    (0)
 426       #define ADC_AVERAGING_SAMPLES   (5)
 427     #endif
 428
 429     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 430       #define ADC_AVERAGING_ENABLE    (0)
 431       #define ADC_AVERAGING_SAMPLES   (5)
 432     #endif
 433
 434     #ifdef CFG_BRD_LPC1343_OLIMEX_P
 435       #define ADC_AVERAGING_ENABLE    (0)
 436       #define ADC_AVERAGING_SAMPLES   (5)
 437     #endif
 438 /*=========================================================================*/
 439
 440
 441 /*=========================================================================
 442     ON-BOARD LED
 443     -----------------------------------------------------------------------
 444
 445     CFG_LED_PORT              The port for the on board LED
 446     CFG_LED_PIN               The pin for the on board LED
 447     CFG_LED_ON                The pin state to turn the LED on (0 = low, 1 = high)
 448     CFG_LED_OFF               The pin state to turn the LED off (0 = low, 1 = high)
 449
 450     -----------------------------------------------------------------------*/
 451     #ifdef CFG_BRD_LPC1343_REFDESIGN
 452       #define CFG_LED_PORT                (2)
 453       #define CFG_LED_PIN                 (10)
 454       #define CFG_LED_ON                  (0)
 455       #define CFG_LED_OFF                 (1)
 456     #endif
 457
 458     #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
 459       #define CFG_LED_PORT                (2)
 460       #define CFG_LED_PIN                 (10)
 461       #define CFG_LED_ON                  (0)
 462       #define CFG_LED_OFF                 (1)
 463     #endif
 464
 465     #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 466       #define CFG_LED_PORT                (2)
 467       #define CFG_LED_PIN                 (10)
 468       #define CFG_LED_ON                  (0)
 469       #define CFG_LED_OFF                 (1)
 470     #endif
 471
 472     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 473       #define CFG_LED_PORT                (3)
 474       #define CFG_LED_PIN                 (2)
 475       #define CFG_LED_ON                  (0)
 476       #define CFG_LED_OFF                 (1)
 477     #endif
 478
 479     #ifdef CFG_BRD_LPC1343_OLIMEX_P
 480       #define CFG_LED_PORT                (3)
 481       #define CFG_LED_PIN                 (2)
 482       #define CFG_LED_ON                  (0)
 483       #define CFG_LED_OFF                 (1)
 484     #endif
 485 /*=========================================================================*/
 486
 487
 488 /*=========================================================================
 489     MICRO-SD CARD
 490     -----------------------------------------------------------------------
 491
 492     CFG_SDCARD                If this field is defined SD Card and FAT32
 493                               file system support will be included
 494     CFG_SDCARD_READONLY       If this is set to 1, all commands to
 495                               write to the SD card will be removed
 496                               saving some flash space.
 497     CFG_SDCARD_CDPORT         The card detect port number
 498     CFG_SDCARD_CDPIN          The card detect pin number
 499
 500     NOTE:                     All config settings for FAT32 are defined
 501                               in ffconf.h
 502
 503     BENCHMARK:                With SPI set to 6.0MHz, FATFS can read
 504                               ~300KB/s (w/512 byte read buffer)
 505
 506     PIN LAYOUT:               The pin layout that is used by this driver
 507                               can be seen in the following schematic:
 508                               /tools/schematics/Breakout_TFTLCD_ILI9325_v1.3
 509
 510     DEPENDENCIES:             SDCARD requires the use of SSP0.
 511     -----------------------------------------------------------------------*/
 512     #ifdef CFG_BRD_LPC1343_REFDESIGN
 513       // #define CFG_SDCARD
 514       #define CFG_SDCARD_READONLY         (1)   // Must be 0 or 1
 515       #define CFG_SDCARD_CDPORT           (3)
 516       #define CFG_SDCARD_CDPIN            (0)
 517     #endif
 518
 519     #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
 520       // #define CFG_SDCARD
 521       #define CFG_SDCARD_READONLY         (1)   // Must be 0 or 1
 522       #define CFG_SDCARD_CDPORT           (3)
 523       #define CFG_SDCARD_CDPIN            (0)
 524     #endif
 525
 526     #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 527       #define CFG_SDCARD
 528       #define CFG_SDCARD_READONLY         (1)   // Must be 0 or 1
 529       #define CFG_SDCARD_CDPORT           (3)
 530       #define CFG_SDCARD_CDPIN            (0)
 531     #endif
 532
 533     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 534       // #define CFG_SDCARD
 535       #define CFG_SDCARD_READONLY         (1)   // Must be 0 or 1
 536       #define CFG_SDCARD_CDPORT           (3)
 537       #define CFG_SDCARD_CDPIN            (0)
 538     #endif
 539
 540     #ifdef CFG_BRD_LPC1343_OLIMEX_P
 541       // #define CFG_SDCARD
 542       #define CFG_SDCARD_READONLY         (1) // Must be 0 or 1
 543       #define CFG_SDCARD_CDPORT           (3)
 544       #define CFG_SDCARD_CDPIN            (0)
 545     #endif
 546 /*=========================================================================*/
 547
 548
 549 /*=========================================================================
 550     USB
 551     -----------------------------------------------------------------------
 552
 553     CFG_USBHID                If this field is defined USB HID support will
 554                               be included.  Currently uses ROM-based USB HID
 555     CFG_USBCDC                If this field is defined USB CDC support will
 556                               be included, with the USB Serial Port speed
 557                               set to 115200 BPS by default
 558     CFG_USBCDC_BAUDRATE       The default TX/RX speed.  This value is used
 559                               when initialising USBCDC, and should be a
 560                               standard value like 57600, 9600, etc.
 561     CFG_USBCDC_INITTIMEOUT    The maximum delay in milliseconds to wait for
 562                               USB to connect.  Must be a multiple of 10!
 563     CFG_USBCDC_BUFFERSIZE     Size of the buffer (in bytes) that stores
 564                               printf data until it can be sent out in
 565                               64 byte frames.  The buffer is required since
 566                               only one frame per ms can be sent using USB
 567                               CDC (see 'puts' in systeminit.c).
 568
 569     -----------------------------------------------------------------------*/
 570     #define CFG_USB_VID                   (0x239A)
 571     #define CFG_USB_PID                   (0x1002)
 572
 573     #ifdef CFG_BRD_LPC1343_REFDESIGN
 574       // #define CFG_USBHID
 575       #define CFG_USBCDC
 576       #define CFG_USBCDC_BAUDRATE         (115200)
 577       #define CFG_USBCDC_INITTIMEOUT      (5000)
 578       #define CFG_USBCDC_BUFFERSIZE       (256)
 579     #endif
 580
 581     #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
 582       // #define CFG_USBHID
 583       // #define CFG_USBCDC
 584       #define CFG_USBCDC_BAUDRATE         (115200)
 585       #define CFG_USBCDC_INITTIMEOUT      (5000)
 586       #define CFG_USBCDC_BUFFERSIZE       (256)
 587     #endif
 588
 589     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
 590       // #define CFG_USBHID
 591       #define CFG_USBCDC
 592       #define CFG_USBCDC_BAUDRATE         (115200)
 593       #define CFG_USBCDC_INITTIMEOUT      (5000)
 594       #define CFG_USBCDC_BUFFERSIZE       (256)
 595     #endif
 596
 597     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 598       // #define CFG_USBHID
 599       // #define CFG_USBCDC
 600       #define CFG_USBCDC_BAUDRATE         (57600)
 601       #define CFG_USBCDC_INITTIMEOUT      (5000)
 602       #define CFG_USBCDC_BUFFERSIZE       (256)
 603     #endif
 604
 605     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 606       // #define CFG_USBHID
 607       #define CFG_USBCDC
 608       #define CFG_USBCDC_BAUDRATE         (115200)
 609       #define CFG_USBCDC_INITTIMEOUT      (5000)
 610       #define CFG_USBCDC_BUFFERSIZE       (256)
 611     #endif
 612
 613     #ifdef CFG_BRD_LPC1343_OLIMEX_P
 614       // #define CFG_USBHID
 615       #define CFG_USBCDC
 616       #define CFG_USBCDC_BAUDRATE         (115200)
 617       #define CFG_USBCDC_INITTIMEOUT      (5000)
 618       #define CFG_USBCDC_BUFFERSIZE       (256)
 619     #endif
 620 /*=========================================================================*/
 621
 622
 623 /*=========================================================================
 624     PRINTF REDIRECTION
 625     -----------------------------------------------------------------------
 626
 627     CFG_PRINTF_UART           Will cause all printf statements to be
 628                               redirected to UART
 629     CFG_PRINTF_USBCDC         Will cause all printf statements to be
 630                               redirect to USB Serial
 631     CFG_PRINTF_NEWLINE        This is typically "\r\n" for Windows or
 632                               "\n" for *nix
 633
 634     Note: If no printf redirection definitions are present, all printf
 635     output will be ignored.
 636     -----------------------------------------------------------------------*/
 637     #ifdef CFG_BRD_LPC1343_REFDESIGN
 638       // #define CFG_PRINTF_UART
 639       #define CFG_PRINTF_USBCDC
 640       #define CFG_PRINTF_NEWLINE          "\r\n"
 641     #endif
 642
 643     #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
 644       #define CFG_PRINTF_UART
 645       // #define CFG_PRINTF_USBCDC
 646       #define CFG_PRINTF_NEWLINE          "\r\n"
 647     #endif
 648
 649     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
 650       // #define CFG_PRINTF_UART
 651       #define CFG_PRINTF_USBCDC
 652       #define CFG_PRINTF_NEWLINE          "\r\n"
 653     #endif
 654
 655     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 656       #define CFG_PRINTF_UART
 657       // #define CFG_PRINTF_USBCDC
 658       #define CFG_PRINTF_NEWLINE          "\n"
 659     #endif
 660
 661     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 662       // #define CFG_PRINTF_UART
 663       #define CFG_PRINTF_USBCDC
 664       #define CFG_PRINTF_NEWLINE          "\r\n"
 665     #endif
 666
 667     #ifdef CFG_BRD_LPC1343_OLIMEX_P
 668       // #define CFG_PRINTF_UART
 669       #define CFG_PRINTF_USBCDC
 670       #define CFG_PRINTF_NEWLINE          "\r\n"
 671     #endif
 672 /*=========================================================================*/
 673
 674
 675 /*=========================================================================
 676     COMMAND LINE INTERFACE
 677     -----------------------------------------------------------------------
 678
 679     CFG_INTERFACE             If this field is defined the UART or USBCDC
 680                               based command-line interface will be included
 681     CFG_INTERFACE_MAXMSGSIZE  The maximum number of bytes to accept for an
 682                               incoming command
 683     CFG_INTERFACE_PROMPT      The command prompt to display at the start
 684                               of every new data entry line
 685     CFG_INTERFACE_SILENTMODE  If this is set to 1 only text generated in
 686                               response to commands will be send to the
 687                               output buffer.  The command prompt will not
 688                               be displayed and incoming text will not be
 689                               echoed back to the output buffer (allowing
 690                               you to see the text you have input).  This
 691                               is normally only desirable in a situation
 692                               where another MCU is communicating with
 693                               the LPC1343.
 694     CFG_INTERFACE_DROPCR      If this is set to 1 all incoming \r
 695                               characters will be dropped
 696     CFG_INTERFACE_ENABLEIRQ   If this is set to 1 the IRQ pin will be
 697                               set high when a command starts executing
 698                               and will go low when the command has
 699                               finished executing or the LCD is not busy.
 700                               This allows another device to know when a
 701                               new command can safely be sent.
 702     CFG_INTERFACE_IRQPORT     The gpio port for the IRQ/busy pin
 703     CFG_INTERFACE_IRQPIN      The gpio pin number for the IRQ/busy pin
 704     CFG_INTERFACE_SHORTERRORS If this is enabled only short 1 character
 705                               error messages will be returned (followed
 706                               by CFG_PRINTF_NEWLINE), rather than more
 707                               verbose error messages.  The specific
 708                               characters used are defined below.
 709     CFG_INTERFACE_CONFIRMREADY  If this is set to 1 a text confirmation
 710                               will be sent when the command prompt is
 711                               ready for a new command.  This is in
 712                               addition to CFG_INTERFACE_ENABLEIRQ if
 713                               this is also enabled.  The character used
 714                               is defined below.
 715
 716     NOTE:                     The command-line interface will use either
 717                               USB-CDC or UART depending on whether
 718                               CFG_PRINTF_UART or CFG_PRINTF_USBCDC are
 719                               selected.
 720     -----------------------------------------------------------------------*/
 721     #ifdef CFG_BRD_LPC1343_REFDESIGN
 722       #define CFG_INTERFACE
 723       #define CFG_INTERFACE_MAXMSGSIZE    (256)
 724       #define CFG_INTERFACE_PROMPT        "LPC1343 >> "
 725       #define CFG_INTERFACE_SILENTMODE    (0)
 726       #define CFG_INTERFACE_DROPCR        (0)
 727       #define CFG_INTERFACE_ENABLEIRQ     (0)
 728       #define CFG_INTERFACE_IRQPORT       (0)
 729       #define CFG_INTERFACE_IRQPIN        (7)
 730       #define CFG_INTERFACE_SHORTERRORS   (0)
 731       #define CFG_INTERFACE_CONFIRMREADY  (0)
 732     #endif
 733
 734     #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
 735       // #define CFG_INTERFACE
 736       #define CFG_INTERFACE_MAXMSGSIZE    (256)
 737       #define CFG_INTERFACE_PROMPT        "LPC1343 >> "
 738       #define CFG_INTERFACE_SILENTMODE    (0)
 739       #define CFG_INTERFACE_DROPCR        (0)
 740       #define CFG_INTERFACE_ENABLEIRQ     (0)
 741       #define CFG_INTERFACE_IRQPORT       (0)
 742       #define CFG_INTERFACE_IRQPIN        (7)
 743       #define CFG_INTERFACE_SHORTERRORS   (0)
 744       #define CFG_INTERFACE_CONFIRMREADY  (0)
 745     #endif
 746
 747     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
 748       #define CFG_INTERFACE
 749       #define CFG_INTERFACE_MAXMSGSIZE    (256)
 750       #define CFG_INTERFACE_PROMPT        "CMD >> "
 751       #define CFG_INTERFACE_SILENTMODE    (0)
 752       #define CFG_INTERFACE_DROPCR        (0)
 753       #define CFG_INTERFACE_ENABLEIRQ     (0)
 754       #define CFG_INTERFACE_IRQPORT       (0)
 755       #define CFG_INTERFACE_IRQPIN        (7)
 756       #define CFG_INTERFACE_SHORTERRORS   (0)
 757       #define CFG_INTERFACE_CONFIRMREADY  (0)
 758       #define CFG_INTERFACE_SHORTERRORS_UNKNOWNCOMMAND    "?"
 759       #define CFG_INTERFACE_SHORTERRORS_TOOMANYARGS       ">"
 760       #define CFG_INTERFACE_SHORTERRORS_TOOFEWARGS        "<"
 761       #define CFG_INTERFACE_CONFIRMREADY_TEXT             "."
 762     #endif
 763
 764     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 765       #define CFG_INTERFACE
 766       #define CFG_INTERFACE_MAXMSGSIZE    (256)
 767       #define CFG_INTERFACE_PROMPT        ">>"
 768       #define CFG_INTERFACE_SILENTMODE    (1)
 769       #define CFG_INTERFACE_DROPCR        (1)
 770       #define CFG_INTERFACE_ENABLEIRQ     (1)
 771       #define CFG_INTERFACE_IRQPORT       (0)
 772       #define CFG_INTERFACE_IRQPIN        (7)
 773       #define CFG_INTERFACE_SHORTERRORS   (1)
 774       #define CFG_INTERFACE_CONFIRMREADY  (0)
 775       #define CFG_INTERFACE_SHORTERRORS_UNKNOWNCOMMAND    "?"
 776       #define CFG_INTERFACE_SHORTERRORS_TOOMANYARGS       ">"
 777       #define CFG_INTERFACE_SHORTERRORS_TOOFEWARGS        "<"
 778       #define CFG_INTERFACE_CONFIRMREADY_TEXT             "."
 779     #endif
 780
 781     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 782       // #define CFG_INTERFACE
 783       #define CFG_INTERFACE_MAXMSGSIZE    (256)
 784       #define CFG_INTERFACE_PROMPT        "CMD >> "
 785       #define CFG_INTERFACE_SILENTMODE    (0)
 786       #define CFG_INTERFACE_DROPCR        (0)
 787       #define CFG_INTERFACE_ENABLEIRQ     (0)
 788       #define CFG_INTERFACE_IRQPORT       (0)
 789       #define CFG_INTERFACE_IRQPIN        (7)
 790       #define CFG_INTERFACE_SHORTERRORS   (0)
 791       #define CFG_INTERFACE_CONFIRMREADY  (0)
 792     #endif
 793
 794     #ifdef CFG_BRD_LPC1343_OLIMEX_P
 795       #define CFG_INTERFACE
 796       #define CFG_INTERFACE_MAXMSGSIZE    (256)
 797       #define CFG_INTERFACE_PROMPT        "LPC-P1343 >> "
 798       #define CFG_INTERFACE_SILENTMODE    (0)
 799       #define CFG_INTERFACE_DROPCR        (0)
 800       #define CFG_INTERFACE_ENABLEIRQ     (0)
 801       #define CFG_INTERFACE_IRQPORT       (0)
 802       #define CFG_INTERFACE_IRQPIN        (7)
 803       #define CFG_INTERFACE_SHORTERRORS   (0)
 804       #define CFG_INTERFACE_CONFIRMREADY  (0)
 805     #endif
 806 /*=========================================================================*/
 807
 808
 809 /*=========================================================================
 810     PWM SETTINGS
 811     -----------------------------------------------------------------------
 812
 813     CFG_PWM                     If this is defined, a basic PWM driver
 814                                 will be included using 16-bit Timer 1 and
 815                                 Pin 1.9 (MAT0) for the PWM output.  In
 816                                 order to allow for a fixed number of
 817                                 pulses to be generated, some PWM-specific
 818                                 code is required in the 16-Bit Timer 1
 819                                 ISR.  See "core/timer16/timer16.c" for
 820                                 more information.
 821     CFG_PWM_DEFAULT_PULSEWIDTH  The default pulse width in ticks
 822     CFG_PWM_DEFAULT_DUTYCYCLE   The default duty cycle in percent
 823
 824     DEPENDENCIES:               PWM output requires the use of 16-bit
 825                                 timer 1 and pin 1.9 (CT16B1_MAT0).
 826     -----------------------------------------------------------------------*/
 827     // #define CFG_PWM
 828     #define CFG_PWM_DEFAULT_PULSEWIDTH  (CFG_CPU_CCLK / 1000)
 829     #define CFG_PWM_DEFAULT_DUTYCYCLE   (50)
 830 /*=========================================================================*/
 831
 832
 833 /*=========================================================================
 834     STEPPER MOTOR SETTINGS
 835     -----------------------------------------------------------------------
 836
 837     CFG_STEPPER                 If this is defined, a simple bi-polar
 838                                 stepper motor will be included for common
 839                                 H-bridge chips like the L293D or SN754410N
 840
 841     DEPENDENCIES:               STEPPER requires the use of pins 3.0-3 and
 842                                 32-bit Timer 0.
 843     -----------------------------------------------------------------------*/
 844     // #define CFG_STEPPER
 845 /*=========================================================================*/
 846
 847
 848 /*=========================================================================
 849     EEPROM
 850     -----------------------------------------------------------------------
 851
 852     CFG_I2CEEPROM             If defined, drivers for the onboard EEPROM
 853                               will be included during build
 854     CFG_I2CEEPROM_SIZE        The number of bytes available on the EEPROM
 855
 856     -----------------------------------------------------------------------*/
 857     #ifdef CFG_BRD_LPC1343_REFDESIGN
 858       #define CFG_I2CEEPROM
 859       #define CFG_I2CEEPROM_SIZE          (3072)
 860     #endif
 861
 862     #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
 863       // #define CFG_I2CEEPROM
 864       #define CFG_I2CEEPROM_SIZE          (3072)
 865     #endif
 866
 867     #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 868       #define CFG_I2CEEPROM
 869       #define CFG_I2CEEPROM_SIZE          (3072)
 870     #endif
 871
 872     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 873       #define CFG_I2CEEPROM
 874       #define CFG_I2CEEPROM_SIZE          (3072)
 875     #endif
 876
 877     #ifdef CFG_BRD_LPC1343_OLIMEX_P
 878       // #define CFG_I2CEEPROM
 879       #define CFG_I2CEEPROM_SIZE          (3072)
 880     #endif
 881 /*=========================================================================*/
 882
 883
 884 /*=========================================================================
 885     EEPROM MEMORY MAP
 886     -----------------------------------------------------------------------
 887     EEPROM is used to persist certain user modifiable values to make
 888     sure that these changes remain in effect after a reset or hard
 889     power-down.  The addresses in EEPROM for these various system
 890     settings/values are defined below.  The first 256 bytes of EEPROM
 891     are reserved for this (0x0000..0x00FF).
 892
 893     CFG_EEPROM_RESERVED       The last byte of reserved EEPROM memory
 894
 895           EEPROM Address (0x0000..0x00FF)
 896           ===============================
 897           0 1 2 3 4 5 6 7 8 9 A B C D E F
 898     000x  x x x x x x x x . x x . . . . .   Chibi
 899     001x  . . . . . . . . . . . . . . . .
 900     002x  x x x x . . . . . . . . . . . .   UART
 901     003x  x x x x x x x x x x x x x x x x   Touch Screen Calibration
 902     004x  x x x x x x x x x x x x x x . .   Touch Screen Calibration
 903     005x  . . . . . . . . . . . . . . . .
 904     006x  . . . . . . . . . . . . . . . .
 905     007x  . . . . . . . . . . . . . . . .
 906     008x  . . . . . . . . . . . . . . . .
 907     009x  . . . . . . . . . . . . . . . .
 908     00Ax  . . . . . . . . . . . . . . . .
 909     00Bx  . . . . . . . . . . . . . . . .
 910     00Cx  . . . . . . . . . . . . . . . .
 911     00Dx  . . . . . . . . . . . . . . . .
 912     00Ex  . . . . . . . . . . . . . . . .
 913     00Fx  . . . . . . . . . . . . . . . .
 914
 915     -----------------------------------------------------------------------*/
 916     #define CFG_EEPROM_RESERVED                 (0x00FF)              // Protect first 256 bytes of memory
 917     #define CFG_EEPROM_CHIBI_IEEEADDR           (uint16_t)(0x0000)    // 8
 918     #define CFG_EEPROM_CHIBI_SHORTADDR          (uint16_t)(0x0009)    // 2
 919     #define CFG_EEPROM_UART_SPEED               (uint16_t)(0x0020)    // 4
 920     #define CFG_EEPROM_TOUCHSCREEN_CALIBRATED   (uint16_t)(0x0030)    // 1
 921     #define CFG_EEPROM_TOUCHSCREEN_CAL_AN       (uint16_t)(0x0031)    // 4
 922     #define CFG_EEPROM_TOUCHSCREEN_CAL_BN       (uint16_t)(0x0035)    // 4
 923     #define CFG_EEPROM_TOUCHSCREEN_CAL_CN       (uint16_t)(0x0039)    // 4
 924     #define CFG_EEPROM_TOUCHSCREEN_CAL_DN       (uint16_t)(0x003D)    // 4
 925     #define CFG_EEPROM_TOUCHSCREEN_CAL_EN       (uint16_t)(0x0041)    // 4
 926     #define CFG_EEPROM_TOUCHSCREEN_CAL_FN       (uint16_t)(0x0045)    // 4
 927     #define CFG_EEPROM_TOUCHSCREEN_CAL_DIVIDER  (uint16_t)(0x0049)    // 4
 928     #define CFG_EEPROM_TOUCHSCREEN_THRESHHOLD   (uint16_t)(0x004D)    // 1
 929 /*=========================================================================*/
 930
 931
 932 /*=========================================================================
 933     LM75B TEMPERATURE SENSOR
 934     -----------------------------------------------------------------------
 935
 936     CFG_LM75B                 If defined, drivers for an optional LM75B
 937                               temperature sensor will be included during
 938                               build (requires external HW)
 939
 940     -----------------------------------------------------------------------*/
 941     // #define CFG_LM75B
 942 /*=========================================================================*/
 943
 944
 945 /*=========================================================================
 946     CHIBI WIRELESS STACK
 947     -----------------------------------------------------------------------
 948
 949     CFG_CHIBI                   If defined, the CHIBI wireless stack will be
 950                                 included during build.  Requires external HW.
 951     CFG_CHIBI_MODE              The mode to use when receiving and transmitting
 952                                 wireless data.  See chb_drvr.h for possible values
 953     CFG_CHIBI_POWER             The power level to use when transmitting.  See
 954                                 chb_drvr.h for possible values
 955     CFG_CHIBI_CHANNEL           802.15.4 Channel (0 = 868MHz, 1-10 = 915MHz)
 956     CFG_CHIBI_PANID             16-bit PAN Identifier (ex.0x1234)
 957     CFG_CHIBI_PROMISCUOUS       Set to 1 to enabled promiscuous mode or
 958                                 0 to disable it.  If promiscuous mode is
 959                                 enabled be sure to set CFG_CHIBI_BUFFERSIZE
 960                                 to an appropriately large value (ex. 1024)
 961     CFG_CHIBI_BUFFERSIZE        The size of the message buffer in bytes
 962
 963     DEPENDENCIES:               Chibi requires the use of SSP0, 16-bit timer
 964                                 0 and pins 3.1, 3.2, 3.3.  It also requires
 965                                 the presence of CFG_I2CEEPROM.
 966
 967     NOTE:                       These settings are not relevant to all boards!
 968                                 'tools/schematics/AT86RF212LPC1114_v1.6.pdf'
 969                                 show how 'CHIBI' is meant to be connected
 970     -----------------------------------------------------------------------*/
 971     #ifdef CFG_BRD_LPC1343_REFDESIGN
 972       // #define CFG_CHIBI
 973       #define CFG_CHIBI_MODE              (0)                 // OQPSK_868MHZ
 974       #define CFG_CHIBI_POWER             (0xE9)              // CHB_PWR_EU2_3DBM
 975       #define CFG_CHIBI_CHANNEL           (0)                 // 868-868.6 MHz
 976       #define CFG_CHIBI_PANID             (0x1234)
 977       #define CFG_CHIBI_PROMISCUOUS       (0)
 978       #define CFG_CHIBI_BUFFERSIZE        (128)
 979     #endif
 980
 981     #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
 982       // #define CFG_CHIBI
 983       #define CFG_CHIBI_MODE              (0)                 // OQPSK_868MHZ
 984       #define CFG_CHIBI_POWER             (0xE9)              // CHB_PWR_EU2_3DBM
 985       #define CFG_CHIBI_CHANNEL           (0)                 // 868-868.6 MHz
 986       #define CFG_CHIBI_PANID             (0x1234)
 987       #define CFG_CHIBI_PROMISCUOUS       (0)
 988       #define CFG_CHIBI_BUFFERSIZE        (128)
 989     #endif
 990
 991     #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 992       // #define CFG_CHIBI
 993       #define CFG_CHIBI_MODE              (0)                 // OQPSK_868MHZ
 994       #define CFG_CHIBI_POWER             (0xE9)              // CHB_PWR_EU2_3DBM
 995       #define CFG_CHIBI_CHANNEL           (0)                 // 868-868.6 MHz
 996       #define CFG_CHIBI_PANID             (0x1234)
 997       #define CFG_CHIBI_PROMISCUOUS       (0)
 998       #define CFG_CHIBI_BUFFERSIZE        (128)
 999     #endif
1000
1001     #ifdef CFG_BRD_LPC1343_802154USBSTICK
1002       #define CFG_CHIBI
1003       #define CFG_CHIBI_MODE              (0)                 // OQPSK_868MHZ
1004       #define CFG_CHIBI_POWER             (0xE9)              // CHB_PWR_EU2_3DBM
1005       #define CFG_CHIBI_CHANNEL           (0)                 // 868-868.6 MHz
1006       #define CFG_CHIBI_PANID             (0x1234)
1007       #define CFG_CHIBI_PROMISCUOUS       (0)
1008       #define CFG_CHIBI_BUFFERSIZE        (1024)
1009     #endif
1010
1011     #ifdef CFG_BRD_LPC1343_OLIMEX_P
1012       // #define CFG_CHIBI
1013       #define CFG_CHIBI_MODE              (0)                 // OQPSK_868MHZ
1014       #define CFG_CHIBI_POWER             (0xE9)              // CHB_PWR_EU2_3DBM
1015       #define CFG_CHIBI_CHANNEL           (0)                 // 868-868.6 MHz
1016       #define CFG_CHIBI_PANID             (0x1234)
1017       #define CFG_CHIBI_PROMISCUOUS       (0)
1018       #define CFG_CHIBI_BUFFERSIZE        (128)
1019     #endif
1020 /*=========================================================================*/
1021
1022
1023 /*=========================================================================
1024     TFT LCD
1025     -----------------------------------------------------------------------
1026
1027     CFG_TFTLCD                  If defined, this will cause drivers for
1028                                 a pre-determined LCD screen to be included
1029                                 during build.  Only one LCD driver can be
1030                                 included during the build process (for ex.
1031                                 'drivers/displays/hw/ILI9325.c')
1032     CFG_TFTLCD_INCLUDESMALLFONTS If set to 1, smallfont support will be
1033                                 included for 3x6, 5x8, 7x8 and 8x8 fonts.
1034                                 This should only be enabled if these small
1035                                 fonts are required since there is already
1036                                 support for larger fonts generated with
1037                                 Dot Factory
1038                                 http://www.pavius.net/downloads/tools/53-the-dot-factory
1039     CFG_TFTLCD_TS_DEFAULTTHRESHOLD  Default minimum threshold to trigger a
1040                                 touch event with the touch screen (and exit
1041                                 from 'tsWaitForEvent' in touchscreen.c).
1042                                 Should be an 8-bit value somewhere between
1043                                 8 and 75 in normal circumstances.  This is
1044                                 the default value and may be overriden by
1045                                 a value stored in EEPROM.
1046     CFG_TFTLCD_TS_KEYPADDELAY   The delay in milliseconds between key
1047                                 presses in dialogue boxes
1048
1049     PIN LAYOUT:                 The pin layout that is used by this driver
1050                                 can be seen in the following schematic:
1051                                 /tools/schematics/Breakout_TFTLCD_ILI9325_v1.3
1052
1053     DEPENDENCIES:               TFTLCD requires the use of pins 1.8, 1.9,
1054                                 1.10, 1.11, 3.3 and 2.1-9.
1055     -----------------------------------------------------------------------*/
1056     #ifdef CFG_BRD_LPC1343_REFDESIGN
1057       // #define CFG_TFTLCD
1058       #define CFG_TFTLCD_INCLUDESMALLFONTS   (0)
1059       #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
1060       #define CFG_TFTLCD_TS_KEYPADDELAY      (100)
1061     #endif
1062
1063     #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
1064       // #define CFG_TFTLCD
1065       #define CFG_TFTLCD_INCLUDESMALLFONTS   (0)
1066       #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
1067       #define CFG_TFTLCD_TS_KEYPADDELAY      (100)
1068     #endif
1069
1070     #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
1071       #define CFG_TFTLCD
1072       #define CFG_TFTLCD_INCLUDESMALLFONTS   (0)
1073       #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
1074       #define CFG_TFTLCD_TS_KEYPADDELAY      (100)
1075     #endif
1076
1077     #ifdef CFG_BRD_LPC1343_802154USBSTICK
1078       // #define CFG_TFTLCD
1079       #define CFG_TFTLCD_INCLUDESMALLFONTS   (0)
1080       #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
1081       #define CFG_TFTLCD_TS_KEYPADDELAY      (100)
1082     #endif
1083
1084     #ifdef CFG_BRD_LPC1343_OLIMEX_P
1085       // #define CFG_TFTLCD
1086       #define CFG_TFTLCD_INCLUDESMALLFONTS   (0)
1087       #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
1088       #define CFG_TFTLCD_TS_KEYPADDELAY      (100)
1089     #endif
1090 /*=========================================================================*/
1091
1092
1093 /*=========================================================================
1094     Monochrome/Bitmap Graphic LCDs
1095     -----------------------------------------------------------------------
1096
1097     CFG_ST7565                If defined, this will cause drivers for
1098                               the 128x64 pixel ST7565 LCD to be included
1099     CFG_SSD1306               If defined, this will cause drivers for
1100                               the 128x64 pixel SSD1306 OLED display to be
1101                               included
1102     CFG_SHARPMEM              If defined, this will cause drivers for
1103                               Sharp Memory Displays to be included
1104
1105     DEPENDENCIES:             ST7565 requires the use of pins 2.1-6.
1106     DEPENDENCIES:             SSD1306 requires the use of pins 2.1-6.
1107     DEPENDENCIES:             SHARPMEM requires the use of pins 2.1-4.
1108     -----------------------------------------------------------------------*/
1109     // #define CFG_ST7565
1110     // #define CFG_SSD1306
1111     // #define CFG_SHARPMEM
1112 /*=========================================================================*/
1113
1114
1115 /*=========================================================================
1116     RSA Encryption
1117     -----------------------------------------------------------------------
1118
1119     CFG_RSA                     If defined, support for basic RSA
1120                                 encryption will be included.
1121     CFG_RSA_BITS                Indicates the number of bits used for
1122                                 RSA encryption keys.  To keep code size
1123                                 reasonable, RSA encryption is currently
1124                                 limited to using 64-bit or 32-bit numbers,
1125                                 with 64-bit providing higher security, and
1126                                 32-bit providing smaller encrypted text
1127                                 size.
1128
1129     NOTE:                       Please note that Printf can not be
1130                                 used to display 64-bit values (%lld)!
1131     -----------------------------------------------------------------------*/
1132     // #define CFG_RSA
1133     #define CFG_RSA_BITS                  (32)
1134 /*=========================================================================*/
1135
1136
1137
1138
1139 /*=========================================================================
1140   CONFIG FILE VALIDATION
1141   -------------------------------------------------------------------------
1142   Basic error checking to make sure that incompatible defines are not
1143   enabled at the same time, etc.
1144
1145   =========================================================================*/
1146
1147 #if !defined CFG_BRD_LPC1343_REFDESIGN && \
1148   !defined CFG_BRD_LPC1343_REFDESIGN_MINIMAL && \
1149   !defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB && \
1150   !defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART && \
1151   !defined CFG_BRD_LPC1343_802154USBSTICK && \
1152   !defined CFG_BRD_LPC1343_OLIMEX_P
1153   #error "You must defined a target board (CFG_BRD_LPC1343_REFDESIGN or CFG_BRD_LPC1343_REFDESIGN_MINIMAL or CFG_BRD_LPC1343_TFTLCDSTANDALONE or CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART or CFG_BRD_LPC1343_802154USBSTICK)"
1154 #endif
1155
1156 #if defined CFG_PRINTF_USBCDC && defined CFG_PRINTF_UART
1157   #error "CFG_PRINTF_UART or CFG_PRINTF_USBCDC cannot both be defined at once"
1158 #endif
1159
1160 #if defined CFG_PRINTF_USBCDC && !defined CFG_USBCDC
1161   #error "CFG_PRINTF_CDC requires CFG_USBCDC to be defined as well"
1162 #endif
1163
1164 #if defined CFG_USBCDC && defined CFG_USBHID
1165   #error "Only one USB class can be defined at a time (CFG_USBCDC or CFG_USBHID)"
1166 #endif
1167
1168 #if defined CFG_SSP0_SCKPIN_2_11 && defined CFG_SSP0_SCKPIN_0_6
1169   #error "Only one SCK pin can be defined at a time for SSP0"
1170 #endif
1171
1172 #if !defined CFG_SSP0_SCKPIN_2_11 && !defined CFG_SSP0_SCKPIN_0_6
1173   #error "An SCK pin must be selected for SSP0 (CFG_SSP0_SCKPIN_2_11 or CFG_SSP0_SCKPIN_0_6)"
1174 #endif
1175
1176 #ifdef CFG_INTERFACE
1177   #if !defined CFG_PRINTF_UART && !defined CFG_PRINTF_USBCDC
1178     #error "CFG_PRINTF_UART or CFG_PRINTF_USBCDC must be defined for for CFG_INTERFACE Input/Output"
1179   #endif
1180   #if defined CFG_PRINTF_USBCDC && CFG_INTERFACE_SILENTMODE == 1
1181     #error "CFG_INTERFACE_SILENTMODE typically isn't enabled with CFG_PRINTF_USBCDC"
1182   #endif
1183 #endif
1184
1185 #ifdef CFG_CHIBI
1186   #if !defined CFG_I2CEEPROM
1187     #error "CFG_CHIBI requires CFG_I2CEEPROM to store and retrieve addresses"
1188   #endif
1189   #ifdef CFG_SDCARD
1190     #error "CFG_CHIBI and CFG_SDCARD can not be defined at the same time. Only one SPI block is available on the LPC1343."
1191   #endif
1192   #ifdef CFG_TFTLCD
1193     #error "CFG_CHIBI and CFG_TFTLCD can not be defined at the same time since they both use pins 1.8, 1.9 and 1.10."
1194   #endif
1195   #ifdef CFG_PWM
1196     #error "CFG_CHIBI and CFG_PWM can not be defined at the same time since they both use pin 1.9."
1197   #endif
1198   #if CFG_CHIBI_PROMISCUOUS != 0 && CFG_CHIBI_PROMISCUOUS != 1
1199     #error "CFG_CHIBI_PROMISCUOUS must be equal to either 1 or 0"
1200   #endif
1201   #if !defined GPIO_ENABLE_IRQ1
1202     #error "GPIO_ENABLE_IRQ1 must be enabled when using Chibi (Chibi IRQ is on GPIO1.8)"
1203   #endif
1204 #endif
1205
1206 #ifdef CFG_TFTLCD
1207   #ifdef CFG_ST7565
1208     #error "CFG_TFTLCD and CFG_ST7565 can not be defined at the same time."
1209   #endif
1210   #ifdef CFG_SSD1306
1211     #error "CFG_TFTLCD and CFG_SSD1306 can not be defined at the same time."
1212   #endif
1213   #ifdef CFG_SHARPMEM
1214     #error "CFG_TFTLCD and CFG_SHARPMEM can not be defined at the same time."
1215   #endif
1216   #ifdef CFG_PWM
1217     #error "CFG_TFTLCD and CFG_PWM can not be defined at the same time since they both use pin 1.9."
1218   #endif
1219   #if !defined CFG_I2CEEPROM
1220     #error "CFG_TFTLCD requires CFG_I2CEEPROM to store and retrieve configuration settings"
1221   #endif
1222 #endif
1223
1224 #ifdef CFG_SDCARD
1225   #ifdef CFG_STEPPER
1226     #error  "CFG_SDCARD and CFG_STEPPER can not be defined at the same time since they both use pin 3.0."
1227   #endif
1228 #endif
1229
1230 #ifdef CFG_ST7565
1231   #ifdef CFG_SSD1306
1232     #error "CFG_ST7565 and CFG_SSD1306 can not be defined at the same time"
1233   #endif
1234 #endif
1235
1236 #ifdef CFG_RSA
1237   #if CFG_RSA_BITS != 64 && CFG_RSA_BITS != 32
1238     #error "CFG_RSA_BITS must be equal to either 32 or 64."
1239   #endif
1240 #endif
1241
1242 #if ADC_AVERAGING_ENABLE && ADC_AVERAGING_SAMPLES < 1
1243   #error "ADC_AVERAGING_SAMPLES must be 1 or higher when ADC averaging is enabled"
1244 #endif
1245
1246 #endif