lpc1xxx/LPC13xx_handlers.c

   1 /*
   2  * Software License Agreement (BSD License)
   3  *
   4  * Copyright (c) 2010, Roel Verdult
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions are met:
   9  * 1. Redistributions of source code must retain the above copyright
  10  * notice, this list of conditions and the following disclaimer.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  * notice, this list of conditions and the following disclaimer in the
  13  * documentation and/or other materials provided with the distribution.
  14  * 3. Neither the name of the copyright holders nor the
  15  * names of its contributors may be used to endorse or promote products
  16  * derived from this software without specific prior written permission.
  17  *
  18  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY
  19  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  20  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  21  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY
  22  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  23  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  24  *  LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  25  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  26  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  27  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  28  *
  29  */
  30
  31 // The GCC compiler defines the current architecture derived from the -mcpu argument.
  32 // When target cpu is the cortex-m3, it automatically defines __ARM_ARCH_7M__
  33 #ifndef __ARM_ARCH_7M__
  34   #error "The target ARM cpu must be Cortex-M3 compatible (-mcpu=cortex-m3)"
  35 #endif
  36
  37 // Declare a weak alias macro as described in the GCC manual[1][2]
  38 #define WEAK_ALIAS(f) __attribute__ ((weak, alias (#f)));
  39 #define SECTION(s) __attribute__ ((section(s)))
  40
  41 /******************************************************************************
  42  * Forward undefined IRQ handlers to an infinite loop function. The Handlers
  43  * are weakly aliased which means that (re)definitions will overide these.
  44  *****************************************************************************/
  45
  46 void irq_undefined() {
  47   // Do nothing when occured interrupt is not defined, just keep looping
  48   while(1);
  49 }
  50
  51 void I2C_IRQHandler(void)       WEAK_ALIAS(irq_undefined);
  52 void TIMER16_0_IRQHandler(void) WEAK_ALIAS(irq_undefined);
  53 void TIMER16_1_IRQHandler(void) WEAK_ALIAS(irq_undefined);
  54 void TIMER32_0_IRQHandler(void) WEAK_ALIAS(irq_undefined);
  55 void TIMER32_1_IRQHandler(void) WEAK_ALIAS(irq_undefined);
  56 void SSP_IRQHandler(void)       WEAK_ALIAS(irq_undefined);
  57 void UART_IRQHandler(void)      WEAK_ALIAS(irq_undefined);
  58 void USB_IRQHandler(void)       WEAK_ALIAS(irq_undefined);
  59 void USB_FIQHandler(void)       WEAK_ALIAS(irq_undefined);
  60 void ADC_IRQHandler(void)       WEAK_ALIAS(irq_undefined);
  61 void WDT_IRQHandler(void)       WEAK_ALIAS(irq_undefined);
  62 void BOD_IRQHandler(void)       WEAK_ALIAS(irq_undefined);
  63 void FMC_IRQHandler(void)       WEAK_ALIAS(irq_undefined);
  64 void PIOINT3_IRQHandler(void)   WEAK_ALIAS(irq_undefined);
  65 void PIOINT2_IRQHandler(void)   WEAK_ALIAS(irq_undefined);
  66 void PIOINT1_IRQHandler(void)   WEAK_ALIAS(irq_undefined);
  67 void PIOINT0_IRQHandler(void)   WEAK_ALIAS(irq_undefined);
  68 void WAKEUP_IRQHandler(void)    WEAK_ALIAS(irq_undefined);
  69
  70 /*****************************************************************************
  71  * Forward undefined fault handlers to an infinite loop function. The Handlers
  72  * are weakly aliased which means that (re)definitions will overide these.
  73  ****************************************************************************/
  74
  75 void fault_undefined() {
  76   // Do nothing when occured interrupt is not defined, just keep looping
  77   while(1);
  78 }
  79
  80 void NMI_Handler(void)          WEAK_ALIAS(fault_undefined);
  81 void HardFault_Handler(void)    WEAK_ALIAS(fault_undefined);
  82 void MemManage_Handler(void)    WEAK_ALIAS(fault_undefined);
  83 void BusFault_Handler(void)     WEAK_ALIAS(fault_undefined);
  84 void UsageFault_Handler(void)   WEAK_ALIAS(fault_undefined);
  85 void SVCall_Handler(void)       WEAK_ALIAS(fault_undefined);
  86 void DebugMon_Handler(void)     WEAK_ALIAS(fault_undefined);
  87 void PendSV_Handler(void)       WEAK_ALIAS(fault_undefined);
  88 void SysTick_Handler(void)      WEAK_ALIAS(fault_undefined);
  89
  90 /******************************************************************************
  91  * Forward undefined IRQ handlers to an infinite loop function. The Handlers
  92  * are weakly aliased which means that (re)definitions will overide these.
  93  *****************************************************************************/
  94
  95 // Prototype the entry values, which are handled by the linker script
  96 extern void* stack_entry;
  97 extern void boot_entry(void);
  98
  99 // Defined irq vectors using simple c code following the description in a white
 100 // paper from ARM[3] and code example from Simonsson Fun Technologies[4].
 101 // These vectors are placed at the memory location defined in the linker script
 102 const void *vectors[] SECTION(".irq_vectors") =
 103 {
 104   // Stack and program reset entry point
 105   &stack_entry,          // The initial stack pointer
 106   boot_entry,            // The reset handler
 107
 108   // Various fault handlers
 109   NMI_Handler,           // The NMI handler
 110   HardFault_Handler,     // The hard fault handler
 111   MemManage_Handler,     // The MPU fault handler
 112   BusFault_Handler,      // The bus fault handler
 113   UsageFault_Handler,    // The usage fault handler
 114   0,                     // Reserved
 115   0,                     // Reserved
 116   0,                     // Reserved
 117   0,                     // Reserved
 118   SVCall_Handler,        // SVCall handler
 119   DebugMon_Handler,      // Debug monitor handler
 120   0,                     // Reserved
 121   PendSV_Handler,        // The PendSV handler
 122   SysTick_Handler,       // The SysTick handler
 123
 124   // Wakeup I/O pins handlers
 125   WAKEUP_IRQHandler,     // PIO0_0  Wakeup
 126   WAKEUP_IRQHandler,     // PIO0_1  Wakeup
 127   WAKEUP_IRQHandler,     // PIO0_2  Wakeup
 128   WAKEUP_IRQHandler,     // PIO0_3  Wakeup
 129   WAKEUP_IRQHandler,     // PIO0_4  Wakeup
 130   WAKEUP_IRQHandler,     // PIO0_5  Wakeup
 131   WAKEUP_IRQHandler,     // PIO0_6  Wakeup
 132   WAKEUP_IRQHandler,     // PIO0_7  Wakeup
 133   WAKEUP_IRQHandler,     // PIO0_8  Wakeup
 134   WAKEUP_IRQHandler,     // PIO0_9  Wakeup
 135   WAKEUP_IRQHandler,     // PIO0_10 Wakeup
 136   WAKEUP_IRQHandler,     // PIO0_11 Wakeup
 137   WAKEUP_IRQHandler,     // PIO1_0  Wakeup
 138   WAKEUP_IRQHandler,     // PIO1_1  Wakeup
 139   WAKEUP_IRQHandler,     // PIO1_2  Wakeup
 140   WAKEUP_IRQHandler,     // PIO1_3  Wakeup
 141   WAKEUP_IRQHandler,     // PIO1_4  Wakeup
 142   WAKEUP_IRQHandler,     // PIO1_5  Wakeup
 143   WAKEUP_IRQHandler,     // PIO1_6  Wakeup
 144   WAKEUP_IRQHandler,     // PIO1_7  Wakeup
 145   WAKEUP_IRQHandler,     // PIO1_8  Wakeup
 146   WAKEUP_IRQHandler,     // PIO1_9  Wakeup
 147   WAKEUP_IRQHandler,     // PIO1_10 Wakeup
 148   WAKEUP_IRQHandler,     // PIO1_11 Wakeup
 149   WAKEUP_IRQHandler,     // PIO2_0  Wakeup
 150   WAKEUP_IRQHandler,     // PIO2_1  Wakeup
 151   WAKEUP_IRQHandler,     // PIO2_2  Wakeup
 152   WAKEUP_IRQHandler,     // PIO2_3  Wakeup
 153   WAKEUP_IRQHandler,     // PIO2_4  Wakeup
 154   WAKEUP_IRQHandler,     // PIO2_5  Wakeup
 155   WAKEUP_IRQHandler,     // PIO2_6  Wakeup
 156   WAKEUP_IRQHandler,     // PIO2_7  Wakeup
 157   WAKEUP_IRQHandler,     // PIO2_8  Wakeup
 158   WAKEUP_IRQHandler,     // PIO2_9  Wakeup
 159   WAKEUP_IRQHandler,     // PIO2_10 Wakeup
 160   WAKEUP_IRQHandler,     // PIO2_11 Wakeup
 161   WAKEUP_IRQHandler,     // PIO3_0  Wakeup
 162   WAKEUP_IRQHandler,     // PIO3_1  Wakeup
 163   WAKEUP_IRQHandler,     // PIO3_2  Wakeup
 164   WAKEUP_IRQHandler,     // PIO3_3  Wakeup
 165
 166   // Specific peripheral irq handlers
 167   I2C_IRQHandler,        // I2C0
 168   TIMER16_0_IRQHandler,  // CT16B0 (16-bit Timer 0)
 169   TIMER16_1_IRQHandler,  // CT16B1 (16-bit Timer 1)
 170   TIMER32_0_IRQHandler,  // CT32B0 (32-bit Timer 0)
 171   TIMER32_1_IRQHandler,  // CT32B1 (32-bit Timer 1)
 172   SSP_IRQHandler,        // SSP0
 173   UART_IRQHandler,       // UART0
 174   USB_IRQHandler,        // USB IRQ
 175   USB_FIQHandler,        // USB FIQ
 176   ADC_IRQHandler,        // ADC (A/D Converter)
 177   WDT_IRQHandler,        // WDT (Watchdog Timer)
 178   BOD_IRQHandler,        // BOD (Brownout Detect)
 179   FMC_IRQHandler,        // Flash (IP2111 Flash Memory Controller)
 180   PIOINT3_IRQHandler,    // PIO INT3
 181   PIOINT2_IRQHandler,    // PIO INT2
 182   PIOINT1_IRQHandler,    // PIO INT1
 183   PIOINT0_IRQHandler,    // PIO INT0
 184 };
 185
 186 /******************************************************************************
 187  * References
 188  *  [1] http://gcc.gnu.org/onlinedocs/gcc/Function-Attributes.html
 189  *  [2] http://gcc.gnu.org/onlinedocs/gcc/Variable-Attributes.html
 190  *  [3] http://www.arm.com/files/pdf/Cortex-M3_programming_for_ARM7_developers.pdf
 191  *  [4] http://fun-tech.se/stm32/OlimexBlinky/mini.php
 192  *****************************************************************************/
 193