target/linux/cavium-octeon/patches/001-handle_removal_h_constraint.patch

   1 This is an incomplete proof of concept that I applied to be able to
   2 build a 64 bit kernel with GCC-4.4.  It doesn't handle the 32 bit case
   3 or the R4000_WAR case.
   4
   5 Comments welcome.
   6
   7 Signed-off-by: David Daney <ddaney@caviumnetworks.com>
   8 ---
   9  arch/mips/include/asm/compiler.h |    7 +++++++
  10  arch/mips/include/asm/delay.h    |    4 ++++
  11  2 files changed, 11 insertions(+), 0 deletions(-)
  12
  13 --- a/arch/mips/include/asm/compiler.h
  14 +++ b/arch/mips/include/asm/compiler.h
  15 @@ -16,4 +16,11 @@
  16  #define GCC_REG_ACCUM "accum"
  17  #endif
  18
  19 +#if __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 4)
  20 +#define GCC_NO_H_CONSTRAINT
  21 +#ifdef CONFIG_64BIT
  22 +typedef unsigned int uint128_t __attribute__((mode(TI)));
  23 +#endif
  24 +#endif
  25 +
  26  #endif /* _ASM_COMPILER_H */
  27 --- a/arch/mips/include/asm/delay.h
  28 +++ b/arch/mips/include/asm/delay.h
  29 @@ -83,10 +83,14 @@ static inline void __udelay(unsigned lon
  30                 : "r" (usecs), "r" (lpj)
  31                 : GCC_REG_ACCUM);
  32         else if (sizeof(long) == 8 && !R4000_WAR)
  33 +#ifdef GCC_NO_H_CONSTRAINT
  34 +               usecs = ((uint128_t)usecs * lpj) >> 64;
  35 +#else
  36                 __asm__("dmultu\t%2, %3"
  37                 : "=h" (usecs), "=l" (lo)
  38                 : "r" (usecs), "r" (lpj)
  39                 : GCC_REG_ACCUM);
  40 +#endif
  41         else if (sizeof(long) == 8 && R4000_WAR)
  42                 __asm__("dmultu\t%3, %4\n\tmfhi\t%0"
  43                 : "=r" (usecs), "=h" (hi), "=l" (lo)