[ar71xx] add default network configuration for the TL-WR941ND board
[openwrt.git] / target / linux / s3c24xx / patches-2.6.24 / 1286-fix-glamo-crank-memory-to-90MHz.patch.patch
1 From 8846830e0f7b5ea2721e3d8b2bd517fa1a11c628 Mon Sep 17 00:00:00 2001
2 From: Andy Green <andy@openmoko.com>
3 Date: Thu, 11 Sep 2008 20:38:46 +0800
4 Subject: [PATCH] fix-glamo-crank-memory-to-90MHz.patch
5
6 This changes Glamo memory and now host bus PLL to 90MHz from
7 80MHz, as recommended by S-Media. Bandwidth should go up
8 by 12.5% by this in raw terms anyway.
9
10 Signed-off-by: Andy Green <andy@openmoko.com>
11 ---
12 drivers/mfd/glamo/glamo-core.c | 9 ++++++---
13 1 files changed, 6 insertions(+), 3 deletions(-)
14
15 diff --git a/drivers/mfd/glamo/glamo-core.c b/drivers/mfd/glamo/glamo-core.c
16 index b30ec9f..2619c5f 100644
17 --- a/drivers/mfd/glamo/glamo-core.c
18 +++ b/drivers/mfd/glamo/glamo-core.c
19 @@ -729,8 +729,8 @@ static struct glamo_script glamo_init_script[] = {
20 { GLAMO_REG_CLOCK_MPEG, 0x0000 },
21 #endif
22 { GLAMO_REG_PLL_GEN1, 0x05db }, /* 48MHz */
23 - { GLAMO_REG_PLL_GEN3, 0x09c3 }, /* 80MHz */
24 - { 0xfffd, 0 },
25 + { GLAMO_REG_PLL_GEN3, 0x0aba }, /* 90MHz */
26 + { 0xfffd, 0 },
27 /*
28 * b9 of this register MUST be zero to get any interrupts on INT#
29 * the other set bits enable all the engine interrupt sources
30 @@ -745,7 +745,10 @@ static struct glamo_script glamo_init_script[] = {
31 { 0x212, 0x0000 },
32 { 0x214, 0x4000 },
33 { 0x216, 0xf00e },
34 - { GLAMO_REG_MEM_TYPE, 0x0874 }, /* 8MB, 16 word pg wr+rd */
35 +
36 + /* S-Media recommended "set tiling mode to 512 mode for memory access
37 + * more efficiency when 640x480" */
38 + { GLAMO_REG_MEM_TYPE, 0x0c74 }, /* 8MB, 16 word pg wr+rd */
39 { GLAMO_REG_MEM_GEN, 0xafaf }, /* 63 grants min + max */
40 /*
41 * the register below originally 0x0108 makes unreliable Glamo MMC
42 --
43 1.5.6.5
44
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