fix issues with multiple ppp links (noticed by Stefano Rivera)
[openwrt.git] / package / rt2x00 / src / rt2x00pci.h
1 /*
2 Copyright (C) 2004 - 2007 rt2x00 SourceForge Project
3 <http://rt2x00.serialmonkey.com>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21 /*
22 Module: rt2x00pci
23 Abstract: Data structures for the rt2x00pci module.
24 Supported chipsets: rt2460, rt2560, rt2561, rt2561s & rt2661.
25 */
26
27 #ifndef RT2X00PCI_H
28 #define RT2X00PCI_H
29
30 /*
31 * This variable should be used with the
32 * pci_driver structure initialization.
33 */
34 #define PCI_DEVICE_DATA(__ops) .driver_data = (kernel_ulong_t)(__ops)
35
36 /*
37 * Register defines.
38 * When register access attempts should be repeated
39 * only REGISTER_BUSY_COUNT attempts with a delay
40 * of REGISTER_BUSY_DELAY us should be taken.
41 */
42 #define REGISTER_BUSY_COUNT 5
43 #define REGISTER_BUSY_DELAY 100
44
45 /*
46 * Descriptor availability flags.
47 * All PCI device descriptors have these 2 flags
48 * with the exact same definition.
49 */
50 #define TXD_ENTRY_OWNER_NIC FIELD32(0x00000001)
51 #define TXD_ENTRY_VALID FIELD32(0x00000002)
52 #define RXD_ENTRY_OWNER_NIC FIELD32(0x00000001)
53
54 /*
55 * Register access.
56 */
57 static inline void rt2x00pci_register_read(const struct rt2x00_dev *rt2x00dev,
58 const unsigned long offset, u32 *value)
59 {
60 *value = readl(rt2x00dev->csr_addr + offset);
61 }
62
63 static inline void rt2x00pci_register_multiread(
64 const struct rt2x00_dev *rt2x00dev,
65 const unsigned long offset, void *value, const u16 length)
66 {
67 memcpy_fromio(value, rt2x00dev->csr_addr + offset, length);
68 }
69
70 static inline void rt2x00pci_register_write(const struct rt2x00_dev *rt2x00dev,
71 const unsigned long offset, u32 value)
72 {
73 writel(value, rt2x00dev->csr_addr + offset);
74 }
75
76 static inline void rt2x00pci_register_multiwrite(
77 const struct rt2x00_dev *rt2x00dev,
78 const unsigned long offset, void *value, const u16 length)
79 {
80 memcpy_toio(rt2x00dev->csr_addr + offset, value, length);
81 }
82
83 /*
84 * Beacon handlers.
85 */
86 int rt2x00pci_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
87 struct ieee80211_tx_control *control);
88 void rt2x00pci_beacondone(struct rt2x00_dev *rt2x00dev, const int queue);
89
90 /*
91 * TX data handlers.
92 */
93 int rt2x00pci_write_tx_data(struct rt2x00_dev *rt2x00dev,
94 struct data_ring *ring, struct sk_buff *skb,
95 struct ieee80211_tx_control *control);
96
97 /*
98 * RX data handlers.
99 */
100 void rt2x00pci_rxdone(struct rt2x00_dev *rt2x00dev);
101
102 /*
103 * Device initialization handlers.
104 */
105 int rt2x00pci_initialize(struct rt2x00_dev *rt2x00dev);
106 void rt2x00pci_uninitialize(struct rt2x00_dev *rt2x00dev);
107
108 /*
109 * PCI driver handlers.
110 */
111 int rt2x00pci_probe(struct pci_dev *pci_dev, const struct pci_device_id *id);
112 void rt2x00pci_remove(struct pci_dev *pci_dev);
113 #ifdef CONFIG_PM
114 int rt2x00pci_suspend(struct pci_dev *pci_dev, pm_message_t state);
115 int rt2x00pci_resume(struct pci_dev *pci_dev);
116 #endif /* CONFIG_PM */
117
118 #endif /* RT2X00PCI_H */
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