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move brcm-2.4 specific kmod to new module layout
[openwrt.git] / target / linux / brcm63xx-2.6 / patches / 001-bcm963xx.patch
1 diff -urN linux.old/arch/mips/bcm963xx/bcm63xx_led.c linux.dev/arch/mips/bcm963xx/bcm63xx_led.c
2 --- linux.old/arch/mips/bcm963xx/bcm63xx_led.c 1970-01-01 01:00:00.000000000 +0100
3 +++ linux.dev/arch/mips/bcm963xx/bcm63xx_led.c 2006-08-25 00:39:38.000000000 +0200
4 @@ -0,0 +1,582 @@
5 +/*
6 +<:copyright-gpl
7 + Copyright 2002 Broadcom Corp. All Rights Reserved.
8 +
9 + This program is free software; you can distribute it and/or modify it
10 + under the terms of the GNU General Public License (Version 2) as
11 + published by the Free Software Foundation.
12 +
13 + This program is distributed in the hope it will be useful, but WITHOUT
14 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 + for more details.
17 +
18 + You should have received a copy of the GNU General Public License along
19 + with this program; if not, write to the Free Software Foundation, Inc.,
20 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
21 +:>
22 +*/
23 +/***************************************************************************
24 + * File Name : bcm63xx_led.c
25 + *
26 + * Description:
27 + *
28 + * This file contains bcm963xx board led control API functions.
29 + *
30 + * To use it, do the following
31 + *
32 + * 1). define in the board.c the following led mappping (this is for 6345GW board):
33 + * const LED_MAP_PAIR cLedMapping45GW[] =
34 + * { // led name Initial state physical pin (ledMask)
35 + * {kLedUsb, kLedStateOff, GPIO_LED_PIN_7},
36 + * {kLedAdsl, kLedStateOff, GPIO_LED_PIN_8},
37 + * {kLedPPP, kLedStateOff, GPIO_LED_PIN_9}, // PPP and WanData share PIN_9
38 + * {kLedWanData, kLedStateOff, GPIO_LED_PIN_9},
39 + * {kLedWireless, kLedStateOff, GPIO_LED_PIN_10},
40 + * {kLedEnd, kLedStateOff, 0 } // NOTE: kLedEnd has to be at the end.
41 + *
42 + * 2). };To initialize led API and initial state of the leds, call the following function with the mapping
43 + * pointer from the above struct
44 + *
45 + * boardLedInit((PLED_MAP_PAIR) &cLedMapping45R);
46 + *
47 + * 3). Sample call for kernel mode:
48 + *
49 + * kerSysLedCtrl(kLedAdsl, kLedStateBlinkOnce); // kLedxxx defines in board.h
50 + *
51 + * 4). Sample call for user mode
52 + *
53 + * sysLedCtrl(kLedAdsl, kLedStateBlinkOnce); // kLedxxx defines in board_api.h
54 + *
55 + *
56 + * Created on : 10/28/2002 seanl
57 + *
58 + ***************************************************************************/
59 +
60 +/* Includes. */
61 +#include <linux/init.h>
62 +#include <linux/fs.h>
63 +#include <linux/capability.h>
64 +#include <linux/slab.h>
65 +#include <linux/errno.h>
66 +#include <linux/module.h>
67 +#include <linux/netdevice.h>
68 +#include <asm/uaccess.h>
69 +
70 +#include <bcm_map_part.h>
71 +#include <board.h>
72 +
73 +#define k100ms (HZ / 10) // ~100 ms
74 +#define kFastBlinkCount 0 // ~100ms
75 +#define kSlowBlinkCount 5 // ~600ms
76 +
77 +#define MAX_VIRT_LEDS 12
78 +
79 +// uncomment // for debug led
80 +//#define DEBUG_LED
81 +
82 +// global variables:
83 +struct timer_list gLedTimer;
84 +int gTimerOn = FALSE;
85 +int gLedCount = 0;
86 +
87 +typedef struct ledinfo
88 +{
89 + unsigned short ledMask; // mask for led: ie. giop 10 = 0x0400
90 + unsigned short ledActiveLow; // GPIO bit reset to turn on LED
91 + unsigned short ledMaskFail; // mask for led: ie. giop 10 = 0x0400
92 + unsigned short ledActiveLowFail;// GPIO bit reset to turn on LED
93 + BOARD_LED_STATE ledState; // current led state
94 + BOARD_LED_STATE savedLedState; // used in blink once for restore to the orignal ledState
95 + int blinkCountDown; // if == 0, do blink (toggle). Is assgined value and dec by 1 at each timer.
96 +} LED_INFO, *PLED_INFO;
97 +
98 +static PLED_INFO gLed = NULL;
99 +static PLED_INFO gpVirtLeds[MAX_VIRT_LEDS];
100 +static HANDLE_LED_FUNC gLedHwFunc[MAX_VIRT_LEDS];
101 +static HANDLE_LED_FUNC gLedHwFailFunc[MAX_VIRT_LEDS];
102 +
103 +#if 0 /* BROKEN */
104 +#if defined(CONFIG_BCM96348) || defined(CONFIG_BCM96338)
105 +static int gLedOffInBridgeMode = 1;
106 +#elif defined(CONFIG_BCM96345)
107 +static int gLedOffInBridgeMode = 0;
108 +#endif
109 +#endif
110 +
111 +void ledTimerExpire(void);
112 +int initLedInfo( PLED_MAP_PAIR pCurMap, PLED_INFO pCurLed );
113 +
114 +//**************************************************************************************
115 +// LED operations
116 +//**************************************************************************************
117 +
118 +// turn led on and set the ledState
119 +void ledOn(PLED_INFO pLed)
120 +{
121 + if( pLed->ledMask )
122 + {
123 + GPIO->GPIODir |= pLed->ledMask; // turn on the direction bit in case was turned off by some one
124 + if( pLed->ledActiveLow )
125 + GPIO->GPIOio &= ~pLed->ledMask; // turn on the led
126 + else
127 + GPIO->GPIOio |= pLed->ledMask; // turn on the led
128 + pLed->ledState = pLed->savedLedState = kLedStateOn;
129 + }
130 +}
131 +
132 +
133 +// turn led off and set the ledState
134 +void ledOff(PLED_INFO pLed)
135 +{
136 + if( pLed->ledMask )
137 + {
138 + GPIO->GPIODir |= pLed->ledMask; // turn on the direction bit in case was turned off by some one
139 + if( pLed->ledActiveLow )
140 + GPIO->GPIOio |= pLed->ledMask; // turn off the led
141 + else
142 + GPIO->GPIOio &= ~pLed->ledMask; // turn off the led
143 + pLed->ledState = pLed->savedLedState = kLedStateOff;
144 + }
145 +}
146 +
147 +// turn led on and set the ledState
148 +void ledOnFail(PLED_INFO pLed)
149 +{
150 + if( pLed->ledMaskFail )
151 + {
152 + GPIO->GPIODir |= pLed->ledMaskFail; // turn on the direction bit in case was turned off by some one
153 + if( pLed->ledActiveLowFail )
154 + GPIO->GPIOio &= ~pLed->ledMaskFail;// turn on the led
155 + else
156 + GPIO->GPIOio |= pLed->ledMaskFail; // turn on the led
157 + pLed->ledState = pLed->savedLedState = kLedStateFail;
158 + }
159 +}
160 +
161 +
162 +// turn led off and set the ledState
163 +void ledOffFail(PLED_INFO pLed)
164 +{
165 + if( pLed->ledMaskFail )
166 + {
167 + GPIO->GPIODir |= pLed->ledMaskFail; // turn on the direction bit in case was turned off by some one
168 + if( pLed->ledActiveLowFail )
169 + GPIO->GPIOio |= pLed->ledMaskFail; // turn off the led
170 + else
171 + GPIO->GPIOio &= ~pLed->ledMaskFail;// turn off the led
172 + pLed->ledState = pLed->savedLedState = kLedStateOff;
173 + }
174 +}
175 +
176 +
177 +// toggle the led and return the current ledState
178 +BOARD_LED_STATE ledToggle(PLED_INFO pLed)
179 +{
180 + GPIO->GPIODir |= pLed->ledMask; // turn on the direction bit in case was turned off by some one
181 + if (GPIO->GPIOio & pLed->ledMask)
182 + {
183 + GPIO->GPIOio &= ~(pLed->ledMask);
184 + return( (pLed->ledActiveLow) ? kLedStateOn : kLedStateOff );
185 + }
186 + else
187 + {
188 + GPIO->GPIOio |= pLed->ledMask;
189 + return( (pLed->ledActiveLow) ? kLedStateOff : kLedStateOn );
190 + }
191 +}
192 +
193 +
194 +// led timer. Will return if timer is already on
195 +void ledTimerStart(void)
196 +{
197 + if (gTimerOn)
198 + return;
199 +
200 +#if defined(DEBUG_LED)
201 + printk("led: add_timer\n");
202 +#endif
203 +
204 + init_timer(&gLedTimer);
205 + gLedTimer.function = (void*)ledTimerExpire;
206 + gLedTimer.expires = jiffies + k100ms; // timer expires in ~100ms
207 + add_timer (&gLedTimer);
208 + gTimerOn = TRUE;
209 +}
210 +
211 +
212 +// led timer expire kicks in about ~100ms and perform the led operation according to the ledState and
213 +// restart the timer according to ledState
214 +void ledTimerExpire(void)
215 +{
216 + int i;
217 + PLED_INFO pCurLed;
218 +
219 + gTimerOn = FALSE;
220 +
221 + for (i = 0, pCurLed = gLed; i < gLedCount; i++, pCurLed++)
222 + {
223 +#if defined(DEBUG_LED)
224 + printk("led[%d]: Mask=0x%04x, State = %d, blcd=%d\n", i, pCurLed->ledMask, pCurLed->ledState, pCurLed->blinkCountDown);
225 +#endif
226 + switch (pCurLed->ledState)
227 + {
228 + case kLedStateOn:
229 + case kLedStateOff:
230 + case kLedStateFail:
231 + pCurLed->blinkCountDown = 0; // reset the blink count down
232 + break;
233 +
234 + case kLedStateBlinkOnce:
235 + ledToggle(pCurLed);
236 + pCurLed->blinkCountDown = 0; // reset to 0
237 + pCurLed->ledState = pCurLed->savedLedState;
238 + if (pCurLed->ledState == kLedStateSlowBlinkContinues ||
239 + pCurLed->ledState == kLedStateFastBlinkContinues)
240 + ledTimerStart(); // start timer if in blinkContinues stats
241 + break;
242 +
243 + case kLedStateSlowBlinkContinues:
244 + if (pCurLed->blinkCountDown-- == 0)
245 + {
246 + pCurLed->blinkCountDown = kSlowBlinkCount;
247 + ledToggle(pCurLed);
248 + }
249 + ledTimerStart();
250 + break;
251 +
252 + case kLedStateFastBlinkContinues:
253 + if (pCurLed->blinkCountDown-- == 0)
254 + {
255 + pCurLed->blinkCountDown = kFastBlinkCount;
256 + ledToggle(pCurLed);
257 + }
258 + ledTimerStart();
259 + break;
260 +
261 + default:
262 + printk("Invalid state = %d\n", pCurLed->ledState);
263 + }
264 + }
265 +}
266 +
267 +// initialize the gLedCount and allocate and fill gLed struct
268 +void __init boardLedInit(PLED_MAP_PAIR cLedMapping)
269 +{
270 + PLED_MAP_PAIR p1, p2;
271 + PLED_INFO pCurLed;
272 + int needTimer = FALSE;
273 + int alreadyUsed = 0;
274 +
275 +#if defined(CONFIG_BCM96348) || defined(CONFIG_BCM96338)
276 + /* Set blink rate for BCM6348/BCM6338 hardware LEDs. */
277 + GPIO->LEDCtrl &= ~LED_INTERVAL_SET_MASK;
278 + GPIO->LEDCtrl |= LED_INTERVAL_SET_80MS;
279 +#endif
280 +
281 + memset( gpVirtLeds, 0x00, sizeof(gpVirtLeds) );
282 + memset( gLedHwFunc, 0x00, sizeof(gLedHwFunc) );
283 + memset( gLedHwFailFunc, 0x00, sizeof(gLedHwFailFunc) );
284 +
285 + gLedCount = 0;
286 +
287 + // Check for multiple LED names and multiple LED GPIO pins that share the
288 + // same physical board LED.
289 + for( p1 = cLedMapping; p1->ledName != kLedEnd; p1++ )
290 + {
291 + alreadyUsed = 0;
292 + for( p2 = cLedMapping; p2 != p1; p2++ )
293 + {
294 + if( (p1->ledMask && p1->ledMask == p2->ledMask) ||
295 + (p1->ledMaskFail && p1->ledMaskFail == p2->ledMaskFail) )
296 + {
297 + alreadyUsed = 1;
298 + break;
299 + }
300 + }
301 +
302 + if( alreadyUsed == 0 )
303 + gLedCount++;
304 + }
305 +
306 + gLed = (PLED_INFO) kmalloc((gLedCount * sizeof(LED_INFO)), GFP_KERNEL);
307 + if( gLed == NULL )
308 + {
309 + printk( "LED memory allocation error.\n" );
310 + return;
311 + }
312 +
313 + memset( gLed, 0x00, gLedCount * sizeof(LED_INFO) );
314 +
315 + // initial the gLed with unique ledMask and initial state. If more than 1 ledNames share the physical led
316 + // (ledMask) the first defined led's ledInitState will be used.
317 + pCurLed = gLed;
318 + for( p1 = cLedMapping; p1->ledName != kLedEnd; p1++ )
319 + {
320 + if( (int) p1->ledName > MAX_VIRT_LEDS )
321 + continue;
322 +
323 + alreadyUsed = 0;
324 + for( p2 = cLedMapping; p2 != p1; p2++ )
325 + {
326 + if( (p1->ledMask && p1->ledMask == p2->ledMask) ||
327 + (p1->ledMaskFail && p1->ledMaskFail == p2->ledMaskFail) )
328 + {
329 + alreadyUsed = 1;
330 + break;
331 + }
332 + }
333 +
334 + if( alreadyUsed == 0 )
335 + {
336 + // Initialize the board LED for the first time.
337 + needTimer = initLedInfo( p1, pCurLed );
338 + gpVirtLeds[(int) p1->ledName] = pCurLed;
339 + pCurLed++;
340 + }
341 + else
342 + {
343 + PLED_INFO pLed;
344 + for( pLed = gLed; pLed != pCurLed; pLed++ )
345 + {
346 + // Find the LED_INFO structure that has already been initialized.
347 + if((pLed->ledMask && pLed->ledMask == p1->ledMask) ||
348 + (pLed->ledMaskFail && pLed->ledMaskFail==p1->ledMaskFail))
349 + {
350 + // The board LED has already been initialized but possibly
351 + // not completely initialized.
352 + if( p1->ledMask )
353 + {
354 + pLed->ledMask = p1->ledMask;
355 + pLed->ledActiveLow = p1->ledActiveLow;
356 + }
357 + if( p1->ledMaskFail )
358 + {
359 + pLed->ledMaskFail = p1->ledMaskFail;
360 + pLed->ledActiveLowFail = p1->ledActiveLowFail;
361 + }
362 + gpVirtLeds[(int) p1->ledName] = pLed;
363 + break;
364 + }
365 + }
366 + }
367 + }
368 +
369 + if (needTimer)
370 + ledTimerStart();
371 +
372 +#if defined(DEBUG_LED)
373 + int i;
374 + for (i=0; i < gLedCount; i++)
375 + printk("initLed: led[%d]: mask=0x%04x, state=%d\n", i,(gLed+i)->ledMask, (gLed+i)->ledState);
376 +#endif
377 +
378 +}
379 +
380 +// Initialize a structure that contains information about a physical board LED
381 +// control. The board LED may contain more than one GPIO pin to control a
382 +// normal condition (green) or a failure condition (red).
383 +int initLedInfo( PLED_MAP_PAIR pCurMap, PLED_INFO pCurLed )
384 +{
385 + int needTimer = FALSE;
386 + pCurLed->ledState = pCurLed->savedLedState = pCurMap->ledInitState;
387 + pCurLed->ledMask = pCurMap->ledMask;
388 + pCurLed->ledActiveLow = pCurMap->ledActiveLow;
389 + pCurLed->ledMaskFail = pCurMap->ledMaskFail;
390 + pCurLed->ledActiveLowFail = pCurMap->ledActiveLowFail;
391 +
392 + switch (pCurLed->ledState)
393 + {
394 + case kLedStateOn:
395 + pCurLed->blinkCountDown = 0; // reset the blink count down
396 + ledOn(pCurLed);
397 + break;
398 + case kLedStateOff:
399 + pCurLed->blinkCountDown = 0; // reset the blink count down
400 + ledOff(pCurLed);
401 + break;
402 + case kLedStateFail:
403 + pCurLed->blinkCountDown = 0; // reset the blink count down
404 + ledOnFail(pCurLed);
405 + break;
406 + case kLedStateBlinkOnce:
407 + pCurLed->blinkCountDown = 1;
408 + needTimer = TRUE;
409 + break;
410 + case kLedStateSlowBlinkContinues:
411 + pCurLed->blinkCountDown = kSlowBlinkCount;
412 + needTimer = TRUE;
413 + break;
414 + case kLedStateFastBlinkContinues:
415 + pCurLed->blinkCountDown = kFastBlinkCount;
416 + needTimer = TRUE;
417 + break;
418 + default:
419 + printk("Invalid state = %d\n", pCurLed->ledState);
420 + }
421 +
422 + return( needTimer );
423 +}
424 +
425 +#if 0 /* BROKEN */
426 +// Determines if there is at least one interface in bridge mode. Bridge mode
427 +// is determined by the cfm convention of naming bridge interfaces nas17
428 +// through nas24.
429 +static int isBridgedProtocol(void)
430 +{
431 + extern int dev_get(const char *name);
432 + const int firstBridgeId = 17;
433 + const int lastBridgeId = 24;
434 + int i;
435 + int ret = FALSE;
436 + char name[16];
437 +
438 + for( i = firstBridgeId; i <= lastBridgeId; i++ )
439 + {
440 + sprintf( name, "nas%d", i );
441 +
442 + if( dev_get(name) )
443 + {
444 + ret = TRUE;
445 + break;
446 + }
447 + }
448 +
449 + return(ret);
450 +}
451 +#endif
452 +
453 +// led ctrl. Maps the ledName to the corresponding ledInfoPtr and perform the led operation
454 +void boardLedCtrl(BOARD_LED_NAME ledName, BOARD_LED_STATE ledState)
455 +{
456 + PLED_INFO ledInfoPtr;
457 +
458 + // do the mapping from virtual to physical led
459 + if( (int) ledName < MAX_VIRT_LEDS )
460 + ledInfoPtr = gpVirtLeds[(int) ledName];
461 + else
462 + ledInfoPtr = NULL;
463 +
464 + if (ledInfoPtr == NULL)
465 + return;
466 +
467 + if( ledState != kLedStateFail && gLedHwFunc[(int) ledName] )
468 + {
469 + (*gLedHwFunc[(int) ledName]) (ledName, ledState);
470 + ledOffFail(ledInfoPtr);
471 + return;
472 + }
473 + else
474 + if( ledState == kLedStateFail && gLedHwFailFunc[(int) ledName] )
475 + {
476 + (*gLedHwFailFunc[(int) ledName]) (ledName, ledState);
477 + ledOff(ledInfoPtr);
478 + return;
479 + }
480 +
481 +#if 0 /* BROKEN */
482 + // Do not blink the WAN Data LED if at least one interface is in bridge mode.
483 + if(gLedOffInBridgeMode == 1 && (ledName == kLedWanData || ledName == kLedPPP))
484 + {
485 + static int BridgedProtocol = -1;
486 +
487 + if( BridgedProtocol == -1 )
488 + BridgedProtocol = isBridgedProtocol();
489 +
490 + if( BridgedProtocol == TRUE )
491 + return;
492 + }
493 +#endif
494 +
495 + // If the state is kLedStateFail and there is not a failure LED defined
496 + // in the board parameters, change the state to kLedStateFastBlinkContinues.
497 + if( ledState == kLedStateFail && ledInfoPtr->ledMaskFail == 0 )
498 + ledState = kLedStateFastBlinkContinues;
499 +
500 + switch (ledState)
501 + {
502 + case kLedStateOn:
503 + // First, turn off the complimentary (failure) LED GPIO.
504 + if( ledInfoPtr->ledMaskFail )
505 + ledOffFail(ledInfoPtr);
506 + else
507 + if( gLedHwFailFunc[(int) ledName] )
508 + (*gLedHwFailFunc[(int) ledName]) (ledName, kLedStateOff);
509 +
510 + // Next, turn on the specified LED GPIO.
511 + ledOn(ledInfoPtr);
512 + break;
513 +
514 + case kLedStateOff:
515 + // First, turn off the complimentary (failure) LED GPIO.
516 + if( ledInfoPtr->ledMaskFail )
517 + ledOffFail(ledInfoPtr);
518 + else
519 + if( gLedHwFailFunc[(int) ledName] )
520 + (*gLedHwFailFunc[(int) ledName]) (ledName, kLedStateOff);
521 +
522 + // Next, turn off the specified LED GPIO.
523 + ledOff(ledInfoPtr);
524 + break;
525 +
526 + case kLedStateFail:
527 + // First, turn off the complimentary (normal) LED GPIO.
528 + if( ledInfoPtr->ledMask )
529 + ledOff(ledInfoPtr);
530 + else
531 + if( gLedHwFunc[(int) ledName] )
532 + (*gLedHwFunc[(int) ledName]) (ledName, kLedStateOff);
533 +
534 + // Next, turn on (red) the specified LED GPIO.
535 + ledOnFail(ledInfoPtr);
536 + break;
537 +
538 + case kLedStateBlinkOnce:
539 + // skip blinkOnce if it is already in Slow/Fast blink continues state
540 + if (ledInfoPtr->savedLedState == kLedStateSlowBlinkContinues ||
541 + ledInfoPtr->savedLedState == kLedStateFastBlinkContinues)
542 + ;
543 + else
544 + {
545 + if (ledInfoPtr->blinkCountDown == 0) // skip the call if it is 1
546 + {
547 + ledToggle(ledInfoPtr);
548 + ledInfoPtr->blinkCountDown = 1; // it will be reset to 0 when timer expires
549 + ledInfoPtr->ledState = kLedStateBlinkOnce;
550 + ledTimerStart();
551 + }
552 + }
553 + break;
554 +
555 + case kLedStateSlowBlinkContinues:
556 + ledInfoPtr->blinkCountDown = kSlowBlinkCount;
557 + ledInfoPtr->ledState = kLedStateSlowBlinkContinues;
558 + ledInfoPtr->savedLedState = kLedStateSlowBlinkContinues;
559 + ledTimerStart();
560 + break;
561 +
562 + case kLedStateFastBlinkContinues:
563 + ledInfoPtr->blinkCountDown = kFastBlinkCount;
564 + ledInfoPtr->ledState = kLedStateFastBlinkContinues;
565 + ledInfoPtr->savedLedState = kLedStateFastBlinkContinues;
566 + ledTimerStart();
567 + break;
568 +
569 + default:
570 + printk("Invalid led state\n");
571 + }
572 +}
573 +
574 +// This function is called for an LED that is controlled by hardware.
575 +void kerSysLedRegisterHwHandler( BOARD_LED_NAME ledName,
576 + HANDLE_LED_FUNC ledHwFunc, int ledFailType )
577 +{
578 + if( (int) ledName < MAX_VIRT_LEDS )
579 + {
580 + if( ledFailType == 1 )
581 + gLedHwFailFunc[(int) ledName] = ledHwFunc;
582 + else
583 + gLedHwFunc[(int) ledName] = ledHwFunc;
584 + }
585 +}
586 +
587 diff -urN linux.old/arch/mips/bcm963xx/board.c linux.dev/arch/mips/bcm963xx/board.c
588 --- linux.old/arch/mips/bcm963xx/board.c 1970-01-01 01:00:00.000000000 +0100
589 +++ linux.dev/arch/mips/bcm963xx/board.c 2006-08-27 21:02:04.000000000 +0200
590 @@ -0,0 +1,559 @@
591 +/*
592 +<:copyright-gpl
593 + Copyright 2002 Broadcom Corp. All Rights Reserved.
594 +
595 + This program is free software; you can distribute it and/or modify it
596 + under the terms of the GNU General Public License (Version 2) as
597 + published by the Free Software Foundation.
598 +
599 + This program is distributed in the hope it will be useful, but WITHOUT
600 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
601 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
602 + for more details.
603 +
604 + You should have received a copy of the GNU General Public License along
605 + with this program; if not, write to the Free Software Foundation, Inc.,
606 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
607 +:>
608 +*/
609 +
610 +/* Includes. */
611 +#include <linux/version.h>
612 +#include <linux/init.h>
613 +#include <linux/fs.h>
614 +#include <linux/interrupt.h>
615 +#include <linux/capability.h>
616 +#include <linux/slab.h>
617 +#include <linux/errno.h>
618 +#include <linux/module.h>
619 +#include <linux/pagemap.h>
620 +#include <asm/uaccess.h>
621 +#include <linux/wait.h>
622 +#include <linux/poll.h>
623 +#include <linux/sched.h>
624 +#include <linux/list.h>
625 +#include <linux/if.h>
626 +#include <linux/spinlock.h>
627 +
628 +#include <bcm_map_part.h>
629 +#include <board.h>
630 +#include <bcmTag.h>
631 +#include "boardparms.h"
632 +#include "bcm_intr.h"
633 +#include "board.h"
634 +#include "bcm_map_part.h"
635 +
636 +static DEFINE_SPINLOCK(board_lock);
637 +
638 +/* Typedefs. */
639 +#if defined (NON_CONSECUTIVE_MAC)
640 +// used to be the last octet. Now changed to the first 5 bits of the the forth octet
641 +// to reduced the duplicated MAC addresses.
642 +#define CHANGED_OCTET 3
643 +#define SHIFT_BITS 3
644 +#else
645 +#define CHANGED_OCTET 1
646 +#define SHIFT_BITS 0
647 +#endif
648 +
649 +typedef struct
650 +{
651 + unsigned long ulId;
652 + char chInUse;
653 + char chReserved[3];
654 +} MAC_ADDR_INFO, *PMAC_ADDR_INFO;
655 +
656 +typedef struct
657 +{
658 + unsigned long ulSdramSize;
659 + unsigned long ulPsiSize;
660 + unsigned long ulNumMacAddrs;
661 + unsigned long ucaBaseMacAddr[NVRAM_MAC_ADDRESS_LEN];
662 + MAC_ADDR_INFO MacAddrs[1];
663 +} NVRAM_INFO, *PNVRAM_INFO;
664 +
665 +typedef struct
666 +{
667 + unsigned long eventmask;
668 +} BOARD_IOC, *PBOARD_IOC;
669 +
670 +
671 +/*Dyinggasp callback*/
672 +typedef void (*cb_dgasp_t)(void *arg);
673 +typedef struct _CB_DGASP__LIST
674 +{
675 + struct list_head list;
676 + char name[IFNAMSIZ];
677 + cb_dgasp_t cb_dgasp_fn;
678 + void *context;
679 +}CB_DGASP_LIST , *PCB_DGASP_LIST;
680 +
681 +
682 +static LED_MAP_PAIR LedMapping[] =
683 +{ // led name Initial state physical pin (ledMask)
684 + {kLedEnd, kLedStateOff, 0, 0, 0, 0},
685 + {kLedEnd, kLedStateOff, 0, 0, 0, 0},
686 + {kLedEnd, kLedStateOff, 0, 0, 0, 0},
687 + {kLedEnd, kLedStateOff, 0, 0, 0, 0},
688 + {kLedEnd, kLedStateOff, 0, 0, 0, 0},
689 + {kLedEnd, kLedStateOff, 0, 0, 0, 0},
690 + {kLedEnd, kLedStateOff, 0, 0, 0, 0},
691 + {kLedEnd, kLedStateOff, 0, 0, 0, 0},
692 + {kLedEnd, kLedStateOff, 0, 0, 0, 0} // NOTE: kLedEnd has to be at the end.
693 +};
694 +
695 +/* Externs. */
696 +extern struct file fastcall *fget_light(unsigned int fd, int *fput_needed);
697 +extern unsigned int nr_free_pages (void);
698 +extern const char *get_system_type(void);
699 +extern void kerSysFlashInit(void);
700 +extern unsigned long get_nvram_start_addr(void);
701 +extern unsigned long get_scratch_pad_start_addr(void);
702 +extern unsigned long getMemorySize(void);
703 +extern void __init boardLedInit(PLED_MAP_PAIR);
704 +extern void boardLedCtrl(BOARD_LED_NAME, BOARD_LED_STATE);
705 +extern void kerSysLedRegisterHandler( BOARD_LED_NAME ledName,
706 + HANDLE_LED_FUNC ledHwFunc, int ledFailType );
707 +
708 +/* Prototypes. */
709 +void __init InitNvramInfo( void );
710 +
711 +/* DyingGasp function prototype */
712 +static void __init kerSysDyingGaspMapIntr(void);
713 +static irqreturn_t kerSysDyingGaspIsr(int irq, void * dev_id, struct pt_regs * regs);
714 +static void __init kerSysInitDyingGaspHandler( void );
715 +static void __exit kerSysDeinitDyingGaspHandler( void );
716 +/* -DyingGasp function prototype - */
717 +
718 +static PNVRAM_INFO g_pNvramInfo = NULL;
719 +static int g_ledInitialized = 0;
720 +static CB_DGASP_LIST *g_cb_dgasp_list_head = NULL;
721 +
722 +static int g_wakeup_monitor = 0;
723 +static struct file *g_monitor_file = NULL;
724 +static struct task_struct *g_monitor_task = NULL;
725 +static unsigned int (*g_orig_fop_poll)
726 + (struct file *, struct poll_table_struct *) = NULL;
727 +
728 +void kerSysMipsSoftReset(void)
729 +{
730 + if (PERF->RevID == 0x634800A1) {
731 + typedef void (*FNPTR) (void);
732 + FNPTR bootaddr = (FNPTR) FLASH_BASE;
733 + int i;
734 +
735 + /* Disable interrupts. */
736 + //cli();
737 + spin_lock_irq(&board_lock);
738 +
739 + /* Reset all blocks. */
740 + PERF->BlockSoftReset &= ~BSR_ALL_BLOCKS;
741 + for( i = 0; i < 1000000; i++ )
742 + ;
743 + PERF->BlockSoftReset |= BSR_ALL_BLOCKS;
744 + /* Jump to the power on address. */
745 + (*bootaddr) ();
746 + }
747 + else
748 + PERF->pll_control |= SOFT_RESET; // soft reset mips
749 +}
750 +
751 +
752 +int kerSysGetMacAddress( unsigned char *pucaMacAddr, unsigned long ulId )
753 +{
754 + int nRet = 0;
755 + PMAC_ADDR_INFO pMai = NULL;
756 + PMAC_ADDR_INFO pMaiFreeNoId = NULL;
757 + PMAC_ADDR_INFO pMaiFreeId = NULL;
758 + unsigned long i = 0, ulIdxNoId = 0, ulIdxId = 0, shiftedIdx = 0;
759 +
760 + /* CMO -- Fix le problème avec les adresses mac que l'on n'arrive pas
761 + * * à relire plusieurs fois */
762 + /* inv_xde */
763 +#if 0
764 + if (boot_loader_type == BOOT_CFE)
765 + memcpy( pucaMacAddr, g_pNvramInfo->ucaBaseMacAddr,
766 + NVRAM_MAC_ADDRESS_LEN );
767 + else {
768 +#endif
769 + pucaMacAddr[0] = 0x00;
770 + pucaMacAddr[1] = 0x07;
771 + pucaMacAddr[2] = 0x3A;
772 + pucaMacAddr[3] = 0xFF;
773 + pucaMacAddr[4] = 0xFF;
774 + pucaMacAddr[5] = 0xFF;
775 +#if 0
776 + }
777 +#endif
778 +
779 + return nRet;
780 +} /* kerSysGetMacAddr */
781 +
782 +int kerSysReleaseMacAddress( unsigned char *pucaMacAddr )
783 +{
784 + int nRet = -EINVAL;
785 + unsigned long ulIdx = 0;
786 + int idx = (pucaMacAddr[NVRAM_MAC_ADDRESS_LEN - CHANGED_OCTET] -
787 + g_pNvramInfo->ucaBaseMacAddr[NVRAM_MAC_ADDRESS_LEN - CHANGED_OCTET]);
788 +
789 + // if overflow 255 (negitive), add 256 to have the correct index
790 + if (idx < 0)
791 + idx += 256;
792 + ulIdx = (unsigned long) (idx >> SHIFT_BITS);
793 +
794 + if( ulIdx < g_pNvramInfo->ulNumMacAddrs )
795 + {
796 + PMAC_ADDR_INFO pMai = &g_pNvramInfo->MacAddrs[ulIdx];
797 + if( pMai->chInUse == 1 )
798 + {
799 + pMai->chInUse = 0;
800 + nRet = 0;
801 + }
802 + }
803 +
804 + return( nRet );
805 +} /* kerSysReleaseMacAddr */
806 +
807 +int kerSysGetSdramSize( void )
808 +{
809 + if (boot_loader_type == BOOT_CFE) {
810 + return( (int) g_pNvramInfo->ulSdramSize );
811 + }
812 + else {
813 + printk("kerSysGetSdramSize : 0x%08X\n", (int)getMemorySize() + 0x00040000);
814 + return((int)getMemorySize() + 0x00040000);
815 + }
816 +} /* kerSysGetSdramSize */
817 +
818 +
819 +void kerSysLedCtrl(BOARD_LED_NAME ledName, BOARD_LED_STATE ledState)
820 +{
821 + if (g_ledInitialized)
822 + boardLedCtrl(ledName, ledState);
823 +}
824 +
825 +unsigned int kerSysMonitorPollHook( struct file *f, struct poll_table_struct *t)
826 +{
827 + int mask = (*g_orig_fop_poll) (f, t);
828 +
829 + if( g_wakeup_monitor == 1 && g_monitor_file == f )
830 + {
831 + /* If g_wakeup_monitor is non-0, the user mode application needs to
832 + * return from a blocking select function. Return POLLPRI which will
833 + * cause the select to return with the exception descriptor set.
834 + */
835 + mask |= POLLPRI;
836 + g_wakeup_monitor = 0;
837 + }
838 +
839 + return( mask );
840 +}
841 +
842 +/* Put the user mode application that monitors link state on a run queue. */
843 +void kerSysWakeupMonitorTask( void )
844 +{
845 + g_wakeup_monitor = 1;
846 + if( g_monitor_task )
847 + wake_up_process( g_monitor_task );
848 +}
849 +
850 +//<<JUNHON, 2004/09/15, get reset button status , tim hou , 05/04/12
851 +int kerSysGetResetHold(void)
852 +{
853 + unsigned short gpio;
854 +
855 + if( BpGetPressAndHoldResetGpio( &gpio ) == BP_SUCCESS )
856 + {
857 + unsigned long gpio_mask = GPIO_NUM_TO_MASK(gpio);
858 + volatile unsigned long *gpio_reg = &GPIO->GPIOio;
859 +
860 + if( (gpio & ~BP_ACTIVE_MASK) >= 32 )
861 + {
862 + gpio_mask = GPIO_NUM_TO_MASK_HIGH(gpio);
863 + gpio_reg = &GPIO->GPIOio_high;
864 + }
865 + //printk("gpio=%04x,gpio_mask=%04x,gpio_reg=%04x\n",gpio,gpio_mask,*gpio_reg);
866 + if(*gpio_reg & gpio_mask) //press down
867 + return RESET_BUTTON_UP;
868 + }
869 + return RESET_BUTTON_PRESSDOWN;
870 +}
871 +//<<JUNHON, 2004/09/15
872 +
873 +/***************************************************************************
874 + * Dying gasp ISR and functions.
875 + ***************************************************************************/
876 +#define KERSYS_DBG printk
877 +
878 +#if defined(CONFIG_BCM96345)
879 +#define CYCLE_PER_US 70
880 +#elif defined(CONFIG_BCM96348) || defined(CONFIG_BCM96338)
881 +/* The BCM6348 cycles per microsecond is really variable since the BCM6348
882 + * MIPS speed can vary depending on the PLL settings. However, an appoximate
883 + * value of 120 will still work OK for the test being done.
884 + */
885 +#define CYCLE_PER_US 120
886 +#endif
887 +#define DG_GLITCH_TO (100*CYCLE_PER_US)
888 +
889 +static void __init kerSysDyingGaspMapIntr()
890 +{
891 + unsigned long ulIntr;
892 +
893 +#if defined(CONFIG_BCM96348) || defined(_BCM96348_) || defined(CONFIG_BCM96338) || defined(_BCM96338_)
894 + if( BpGetAdslDyingGaspExtIntr( &ulIntr ) == BP_SUCCESS ) {
895 + BcmHalMapInterrupt((FN_HANDLER)kerSysDyingGaspIsr, 0, INTERRUPT_ID_DG);
896 + BcmHalInterruptEnable( INTERRUPT_ID_DG );
897 + }
898 +#elif defined(CONFIG_BCM96345) || defined(_BCM96345_)
899 + if( BpGetAdslDyingGaspExtIntr( &ulIntr ) == BP_SUCCESS ) {
900 + ulIntr += INTERRUPT_ID_EXTERNAL_0;
901 + BcmHalMapInterrupt((FN_HANDLER)kerSysDyingGaspIsr, 0, ulIntr);
902 + BcmHalInterruptEnable( ulIntr );
903 + }
904 +#endif
905 +
906 +}
907 +
908 +void kerSysSetWdTimer(ulong timeUs)
909 +{
910 + TIMER->WatchDogDefCount = timeUs * (FPERIPH/1000000);
911 + TIMER->WatchDogCtl = 0xFF00;
912 + TIMER->WatchDogCtl = 0x00FF;
913 +}
914 +
915 +ulong kerSysGetCycleCount(void)
916 +{
917 + ulong cnt;
918 +#ifdef _WIN32_WCE
919 + cnt = 0;
920 +#else
921 + __asm volatile("mfc0 %0, $9":"=d"(cnt));
922 +#endif
923 + return(cnt);
924 +}
925 +
926 +static Bool kerSysDyingGaspCheckPowerLoss(void)
927 +{
928 + ulong clk0;
929 + ulong ulIntr;
930 +
931 + ulIntr = 0;
932 + clk0 = kerSysGetCycleCount();
933 +
934 + UART->Data = 'D';
935 + UART->Data = '%';
936 + UART->Data = 'G';
937 +
938 +#if defined(CONFIG_BCM96345)
939 + BpGetAdslDyingGaspExtIntr( &ulIntr );
940 +
941 + do {
942 + ulong clk1;
943 +
944 + clk1 = kerSysGetCycleCount(); /* time cleared */
945 + /* wait a little to get new reading */
946 + while ((kerSysGetCycleCount()-clk1) < CYCLE_PER_US*2)
947 + ;
948 + } while ((0 == (PERF->ExtIrqCfg & (1 << (ulIntr + EI_STATUS_SHFT)))) && ((kerSysGetCycleCount() - clk0) < DG_GLITCH_TO));
949 +
950 + if (PERF->ExtIrqCfg & (1 << (ulIntr + EI_STATUS_SHFT))) { /* power glitch */
951 + BcmHalInterruptEnable( ulIntr + INTERRUPT_ID_EXTERNAL_0);
952 + KERSYS_DBG(" - Power glitch detected. Duration: %ld us\n", (kerSysGetCycleCount() - clk0)/CYCLE_PER_US);
953 + return 0;
954 + }
955 +#elif (defined(CONFIG_BCM96348) || defined(CONFIG_BCM96338)) && !defined(VXWORKS)
956 + do {
957 + ulong clk1;
958 +
959 + clk1 = kerSysGetCycleCount(); /* time cleared */
960 + /* wait a little to get new reading */
961 + while ((kerSysGetCycleCount()-clk1) < CYCLE_PER_US*2)
962 + ;
963 + } while ((PERF->IrqStatus & (1 << (INTERRUPT_ID_DG - INTERNAL_ISR_TABLE_OFFSET))) && ((kerSysGetCycleCount() - clk0) < DG_GLITCH_TO));
964 +
965 + if (!(PERF->IrqStatus & (1 << (INTERRUPT_ID_DG - INTERNAL_ISR_TABLE_OFFSET)))) {
966 + BcmHalInterruptEnable( INTERRUPT_ID_DG );
967 + KERSYS_DBG(" - Power glitch detected. Duration: %ld us\n", (kerSysGetCycleCount() - clk0)/CYCLE_PER_US);
968 + return 0;
969 + }
970 +#endif
971 + return 1;
972 +}
973 +
974 +static void kerSysDyingGaspShutdown( void )
975 +{
976 + kerSysSetWdTimer(1000000);
977 +#if defined(CONFIG_BCM96345)
978 + PERF->blkEnables &= ~(EMAC_CLK_EN | USB_CLK_EN | CPU_CLK_EN);
979 +#elif defined(CONFIG_BCM96348)
980 + PERF->blkEnables &= ~(EMAC_CLK_EN | USBS_CLK_EN | USBH_CLK_EN | SAR_CLK_EN);
981 +#endif
982 +}
983 +
984 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0))
985 +static irqreturn_t kerSysDyingGaspIsr(int irq, void * dev_id, struct pt_regs * regs)
986 +#else
987 +static unsigned int kerSysDyingGaspIsr(void)
988 +#endif
989 +{
990 + struct list_head *pos;
991 + CB_DGASP_LIST *tmp, *dsl = NULL;
992 +
993 + if (kerSysDyingGaspCheckPowerLoss()) {
994 +
995 + /* first to turn off everything other than dsl */
996 + list_for_each(pos, &g_cb_dgasp_list_head->list) {
997 + tmp = list_entry(pos, CB_DGASP_LIST, list);
998 + if(strncmp(tmp->name, "dsl", 3)) {
999 + (tmp->cb_dgasp_fn)(tmp->context);
1000 + }else {
1001 + dsl = tmp;
1002 + }
1003 + }
1004 +
1005 + /* now send dgasp */
1006 + if(dsl)
1007 + (dsl->cb_dgasp_fn)(dsl->context);
1008 +
1009 + /* reset and shutdown system */
1010 + kerSysDyingGaspShutdown();
1011 + }
1012 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0))
1013 +return( IRQ_HANDLED );
1014 +#else
1015 + return( 1 );
1016 +#endif
1017 +}
1018 +
1019 +static void __init kerSysInitDyingGaspHandler( void )
1020 +{
1021 + CB_DGASP_LIST *new_node;
1022 +
1023 + if( g_cb_dgasp_list_head != NULL) {
1024 + printk("Error: kerSysInitDyingGaspHandler: list head is not null\n");
1025 + return;
1026 + }
1027 + new_node= (CB_DGASP_LIST *)kmalloc(sizeof(CB_DGASP_LIST), GFP_KERNEL);
1028 + memset(new_node, 0x00, sizeof(CB_DGASP_LIST));
1029 + INIT_LIST_HEAD(&new_node->list);
1030 + g_cb_dgasp_list_head = new_node;
1031 +
1032 +} /* kerSysInitDyingGaspHandler */
1033 +
1034 +static void __exit kerSysDeinitDyingGaspHandler( void )
1035 +{
1036 + struct list_head *pos;
1037 + CB_DGASP_LIST *tmp;
1038 +
1039 + if(g_cb_dgasp_list_head == NULL)
1040 + return;
1041 +
1042 + list_for_each(pos, &g_cb_dgasp_list_head->list) {
1043 + tmp = list_entry(pos, CB_DGASP_LIST, list);
1044 + list_del(pos);
1045 + kfree(tmp);
1046 + }
1047 +
1048 + kfree(g_cb_dgasp_list_head);
1049 + g_cb_dgasp_list_head = NULL;
1050 +
1051 +} /* kerSysDeinitDyingGaspHandler */
1052 +
1053 +void kerSysRegisterDyingGaspHandler(char *devname, void *cbfn, void *context)
1054 +{
1055 + CB_DGASP_LIST *new_node;
1056 +
1057 + if( g_cb_dgasp_list_head == NULL) {
1058 + printk("Error: kerSysRegisterDyingGaspHandler: list head is null\n");
1059 + return;
1060 + }
1061 +
1062 + if( devname == NULL || cbfn == NULL ) {
1063 + printk("Error: kerSysRegisterDyingGaspHandler: register info not enough (%s,%x,%x)\n", devname, (unsigned int)cbfn, (unsigned int)context);
1064 + return;
1065 + }
1066 +
1067 + new_node= (CB_DGASP_LIST *)kmalloc(sizeof(CB_DGASP_LIST), GFP_KERNEL);
1068 + memset(new_node, 0x00, sizeof(CB_DGASP_LIST));
1069 + INIT_LIST_HEAD(&new_node->list);
1070 + strncpy(new_node->name, devname, IFNAMSIZ);
1071 + new_node->cb_dgasp_fn = (cb_dgasp_t)cbfn;
1072 + new_node->context = context;
1073 + list_add(&new_node->list, &g_cb_dgasp_list_head->list);
1074 +
1075 + printk("dgasp: kerSysRegisterDyingGaspHandler: %s registered \n", devname);
1076 +
1077 +} /* kerSysRegisterDyingGaspHandler */
1078 +
1079 +void kerSysDeregisterDyingGaspHandler(char *devname)
1080 +{
1081 + struct list_head *pos;
1082 + CB_DGASP_LIST *tmp;
1083 +
1084 + if(g_cb_dgasp_list_head == NULL) {
1085 + printk("Error: kerSysDeregisterDyingGaspHandler: list head is null\n");
1086 + return;
1087 + }
1088 +
1089 + if(devname == NULL) {
1090 + printk("Error: kerSysDeregisterDyingGaspHandler: devname is null\n");
1091 + return;
1092 + }
1093 +
1094 + printk("kerSysDeregisterDyingGaspHandler: %s is deregistering\n", devname);
1095 +
1096 + list_for_each(pos, &g_cb_dgasp_list_head->list) {
1097 + tmp = list_entry(pos, CB_DGASP_LIST, list);
1098 + if(!strcmp(tmp->name, devname)) {
1099 + list_del(pos);
1100 + kfree(tmp);
1101 + printk("kerSysDeregisterDyingGaspHandler: %s is deregistered\n", devname);
1102 + return;
1103 + }
1104 + }
1105 + printk("kerSysDeregisterDyingGaspHandler: %s not (de)registered\n", devname);
1106 +
1107 +} /* kerSysDeregisterDyingGaspHandler */
1108 +
1109 +//EXPORT_SYMBOL(kerSysNvRamGet);
1110 +EXPORT_SYMBOL(kerSysGetMacAddress);
1111 +EXPORT_SYMBOL(kerSysReleaseMacAddress);
1112 +EXPORT_SYMBOL(kerSysGetSdramSize);
1113 +EXPORT_SYMBOL(kerSysLedCtrl);
1114 +EXPORT_SYMBOL(kerSysGetResetHold);
1115 +EXPORT_SYMBOL(kerSysLedRegisterHwHandler);
1116 +EXPORT_SYMBOL(BpGetBoardIds);
1117 +EXPORT_SYMBOL(BpGetSdramSize);
1118 +EXPORT_SYMBOL(BpGetPsiSize);
1119 +EXPORT_SYMBOL(BpGetEthernetMacInfo);
1120 +EXPORT_SYMBOL(BpGetRj11InnerOuterPairGpios);
1121 +EXPORT_SYMBOL(BpGetPressAndHoldResetGpio);
1122 +EXPORT_SYMBOL(BpGetVoipResetGpio);
1123 +EXPORT_SYMBOL(BpGetVoipIntrGpio);
1124 +EXPORT_SYMBOL(BpGetPcmciaResetGpio);
1125 +EXPORT_SYMBOL(BpGetRtsCtsUartGpios);
1126 +EXPORT_SYMBOL(BpGetAdslLedGpio);
1127 +EXPORT_SYMBOL(BpGetAdslFailLedGpio);
1128 +EXPORT_SYMBOL(BpGetWirelessLedGpio);
1129 +EXPORT_SYMBOL(BpGetUsbLedGpio);
1130 +EXPORT_SYMBOL(BpGetHpnaLedGpio);
1131 +EXPORT_SYMBOL(BpGetWanDataLedGpio);
1132 +EXPORT_SYMBOL(BpGetPppLedGpio);
1133 +EXPORT_SYMBOL(BpGetPppFailLedGpio);
1134 +EXPORT_SYMBOL(BpGetVoipLedGpio);
1135 +EXPORT_SYMBOL(BpGetWirelessExtIntr);
1136 +EXPORT_SYMBOL(BpGetAdslDyingGaspExtIntr);
1137 +EXPORT_SYMBOL(BpGetVoipExtIntr);
1138 +EXPORT_SYMBOL(BpGetHpnaExtIntr);
1139 +EXPORT_SYMBOL(BpGetHpnaChipSelect);
1140 +EXPORT_SYMBOL(BpGetVoipChipSelect);
1141 +EXPORT_SYMBOL(BpGetWirelessSesBtnGpio);
1142 +EXPORT_SYMBOL(BpGetWirelessSesExtIntr);
1143 +EXPORT_SYMBOL(BpGetWirelessSesLedGpio);
1144 +EXPORT_SYMBOL(kerSysRegisterDyingGaspHandler);
1145 +EXPORT_SYMBOL(kerSysDeregisterDyingGaspHandler);
1146 +EXPORT_SYMBOL(kerSysGetCycleCount);
1147 +EXPORT_SYMBOL(kerSysSetWdTimer);
1148 +EXPORT_SYMBOL(kerSysWakeupMonitorTask);
1149 +
1150 diff -urN linux.old/arch/mips/bcm963xx/boardparms.c linux.dev/arch/mips/bcm963xx/boardparms.c
1151 --- linux.old/arch/mips/bcm963xx/boardparms.c 1970-01-01 01:00:00.000000000 +0100
1152 +++ linux.dev/arch/mips/bcm963xx/boardparms.c 2006-08-25 00:39:38.000000000 +0200
1153 @@ -0,0 +1,2391 @@
1154 +/*
1155 +<:copyright-gpl
1156 +
1157 + Copyright 2003 Broadcom Corp. All Rights Reserved.
1158 +
1159 + This program is free software; you can distribute it and/or modify it
1160 + under the terms of the GNU General Public License (Version 2) as
1161 + published by the Free Software Foundation.
1162 +
1163 + This program is distributed in the hope it will be useful, but WITHOUT
1164 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
1165 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
1166 + for more details.
1167 +
1168 + You should have received a copy of the GNU General Public License along
1169 + with this program; if not, write to the Free Software Foundation, Inc.,
1170 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
1171 +
1172 +:>
1173 +*/
1174 +/**************************************************************************
1175 + * File Name : boardparms.c
1176 + *
1177 + * Description: This file contains the implementation for the BCM63xx board
1178 + * parameter access functions.
1179 + *
1180 + * Updates : 07/14/2003 Created.
1181 + ***************************************************************************/
1182 +
1183 +/* Includes. */
1184 +#include "boardparms.h"
1185 +
1186 +/* Defines. */
1187 +
1188 +/* Default psi size in K bytes */
1189 +#define BP_PSI_DEFAULT_SIZE 24
1190 +
1191 +/* Typedefs */
1192 +typedef struct boardparameters
1193 +{
1194 + char szBoardId[BP_BOARD_ID_LEN]; /* board id string */
1195 + ETHERNET_MAC_INFO EnetMacInfos[BP_MAX_ENET_MACS];
1196 + VOIP_DSP_INFO VoIPDspInfo[BP_MAX_VOIP_DSP];
1197 + unsigned short usSdramSize; /* SDRAM size and type */
1198 + unsigned short usPsiSize; /* persistent storage in K bytes */
1199 + unsigned short usGpioRj11InnerPair; /* GPIO pin or not defined */
1200 + unsigned short usGpioRj11OuterPair; /* GPIO pin or not defined */
1201 + unsigned short usGpioPressAndHoldReset; /* GPIO pin or not defined */
1202 + unsigned short usGpioPcmciaReset; /* GPIO pin or not defined */
1203 + unsigned short usGpioUartRts; /* GPIO pin or not defined */
1204 + unsigned short usGpioUartCts; /* GPIO pin or not defined */
1205 + unsigned short usGpioLedAdsl; /* GPIO pin or not defined */
1206 + unsigned short usGpioLedAdslFail; /* GPIO pin or not defined */
1207 + unsigned short usGpioLedWireless; /* GPIO pin or not defined */
1208 + unsigned short usGpioLedUsb; /* GPIO pin or not defined */
1209 + unsigned short usGpioLedHpna; /* GPIO pin or not defined */
1210 + unsigned short usGpioLedWanData; /* GPIO pin or not defined */
1211 + unsigned short usGpioLedPpp; /* GPIO pin or not defined */
1212 + unsigned short usGpioLedPppFail; /* GPIO pin or not defined */
1213 + unsigned short usGpioLedBlPowerOn; /* GPIO pin or not defined */
1214 + unsigned short usGpioLedBlAlarm; /* GPIO pin or not defined */
1215 + unsigned short usGpioLedBlResetCfg; /* GPIO pin or not defined */
1216 + unsigned short usGpioLedBlStop; /* GPIO pin or not defined */
1217 + unsigned short usExtIntrWireless; /* ext intr or not defined */
1218 + unsigned short usExtIntrAdslDyingGasp; /* ext intr or not defined */
1219 + unsigned short usExtIntrHpna; /* ext intr or not defined */
1220 + unsigned short usCsHpna; /* chip select not defined */
1221 + unsigned short usAntInUseWireless; /* antenna in use or not defined */
1222 + unsigned short usGpioSesBtnWireless; /* GPIO pin or not defined */
1223 + unsigned short usExtIntrSesBtnWireless; /* ext intr or not defined */
1224 + unsigned short usGpioLedSesWireless; /* GPIO pin or not defined */
1225 +} BOARD_PARAMETERS, *PBOARD_PARAMETERS;
1226 +
1227 +/* Variables */
1228 +#if defined(_BCM96338_) || defined(CONFIG_BCM96338)
1229 +static BOARD_PARAMETERS g_bcm96338sv =
1230 +{
1231 + "96338SV", /* szBoardId */
1232 + {{BP_ENET_INTERNAL_PHY, /* ucPhyType */
1233 + 0x01, /* ucPhyAddress */
1234 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
1235 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
1236 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
1237 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
1238 + BP_NOT_DEFINED, /* usGpioPhyReset */
1239 + 0x01, /* numSwitchPorts */
1240 + BP_ENET_CONFIG_MDIO, /* usConfigType */
1241 + BP_NOT_DEFINED}, /* usReverseMii */
1242 + {BP_ENET_NO_PHY}}, /* ucPhyType */
1243 + {{BP_VOIP_NO_DSP}, /* ucDspType */
1244 + {BP_VOIP_NO_DSP}}, /* ucDspType */
1245 + BP_MEMORY_16MB_1_CHIP, /* usSdramSize */
1246 + BP_PSI_DEFAULT_SIZE, /* usPsiSize */
1247 + BP_NOT_DEFINED, /* usGpioRj11InnerPair */
1248 + BP_NOT_DEFINED, /* usGpioRj11OuterPair */
1249 + BP_NOT_DEFINED, /* usGpioPressAndHoldReset */
1250 + BP_NOT_DEFINED, /* usGpioPcmciaReset */
1251 + BP_NOT_DEFINED, /* usGpioUartRts */
1252 + BP_NOT_DEFINED, /* usGpioUartCts */
1253 + BP_NOT_DEFINED, /* usGpioLedAdsl */
1254 + BP_NOT_DEFINED, /* usGpioLedAdslFail */
1255 + BP_NOT_DEFINED, /* usGpioLedWireless */
1256 + BP_NOT_DEFINED, /* usGpioLedUsb */
1257 + BP_NOT_DEFINED, /* usGpioLedHpna */
1258 + BP_NOT_DEFINED, /* usGpioLedWanData */
1259 + BP_NOT_DEFINED, /* usGpioLedPpp */
1260 + BP_NOT_DEFINED, /* usGpioLedPppFail */
1261 + BP_NOT_DEFINED, /* usGpioLedBlPowerOn */
1262 + BP_NOT_DEFINED, /* usGpioLedBlAlarm */
1263 + BP_NOT_DEFINED, /* usGpioLedBlResetCfg */
1264 + BP_NOT_DEFINED, /* usGpioLedBlStop */
1265 + BP_NOT_DEFINED, /* usExtIntrWireless */
1266 + BP_HW_DEFINED, /* usExtIntrAdslDyingGasp */
1267 + BP_NOT_DEFINED, /* usExtIntrHpna */
1268 + BP_NOT_DEFINED, /* usCsHpna */
1269 + BP_NOT_DEFINED, /* usAntInUseWireless */
1270 + BP_NOT_DEFINED, /* usGpioSesBtnWireless */
1271 + BP_NOT_DEFINED, /* usExtIntrSesBtnWireless */
1272 + BP_NOT_DEFINED /* usGpioLedSesWireless */
1273 +};
1274 +static BOARD_PARAMETERS g_bcm96338l2m8m =
1275 +{
1276 + "96338L-2M-8M", /* szBoardId */
1277 + {{BP_ENET_INTERNAL_PHY, /* ucPhyType */
1278 + 0x01, /* ucPhyAddress */
1279 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
1280 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
1281 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
1282 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
1283 + BP_NOT_DEFINED, /* usGpioPhyReset */
1284 + 0x01, /* numSwitchPorts */
1285 + BP_ENET_CONFIG_MDIO, /* usConfigType */
1286 + BP_NOT_DEFINED}, /* usReverseMii */
1287 + {BP_ENET_NO_PHY}}, /* ucPhyType */
1288 + {{BP_VOIP_NO_DSP}, /* ucDspType */
1289 + {BP_VOIP_NO_DSP}}, /* ucDspType */
1290 + BP_MEMORY_8MB_1_CHIP, /* usSdramSize */
1291 + BP_PSI_DEFAULT_SIZE, /* usPsiSize */
1292 + BP_NOT_DEFINED, /* usGpioRj11InnerPair */
1293 + BP_NOT_DEFINED, /* usGpioRj11OuterPair */
1294 + BP_NOT_DEFINED, /* usGpioPressAndHoldReset */
1295 + BP_NOT_DEFINED, /* usGpioPcmciaReset */
1296 + BP_NOT_DEFINED, /* usGpioUartRts */
1297 + BP_NOT_DEFINED, /* usGpioUartCts */
1298 + BP_NOT_DEFINED, /* usGpioLedAdsl */
1299 + BP_GPIO_2_AL, /* usGpioLedAdslFail */
1300 + BP_NOT_DEFINED, /* usGpioLedWireless */
1301 + BP_NOT_DEFINED, /* usGpioLedUsb */
1302 + BP_NOT_DEFINED, /* usGpioLedHpna */
1303 + BP_GPIO_3_AL, /* usGpioLedWanData */
1304 + BP_GPIO_3_AL, /* usGpioLedPpp */
1305 + BP_GPIO_4_AL, /* usGpioLedPppFail */
1306 + BP_GPIO_0_AL, /* usGpioLedBlPowerOn */
1307 + BP_NOT_DEFINED, /* usGpioLedBlAlarm */
1308 + BP_GPIO_3_AL, /* usGpioLedBlResetCfg */
1309 + BP_GPIO_1_AL, /* usGpioLedBlStop */
1310 + BP_NOT_DEFINED, /* usExtIntrWireless */
1311 + BP_HW_DEFINED, /* usExtIntrAdslDyingGasp */
1312 + BP_NOT_DEFINED, /* usExtIntrHpna */
1313 + BP_NOT_DEFINED, /* usCsHpna */
1314 + BP_NOT_DEFINED, /* usAntInUseWireless */
1315 + BP_NOT_DEFINED, /* usGpioSesBtnWireless */
1316 + BP_NOT_DEFINED, /* usExtIntrSesBtnWireless */
1317 + BP_NOT_DEFINED /* usGpioLedSesWireless */
1318 +};
1319 +static PBOARD_PARAMETERS g_BoardParms[] =
1320 + {&g_bcm96338sv, &g_bcm96338l2m8m, 0};
1321 +#endif
1322 +
1323 +#if defined(_BCM96345_) || defined(CONFIG_BCM96345)
1324 +static BOARD_PARAMETERS g_bcm96345r =
1325 +{
1326 + "96345R", /* szBoardId */
1327 + {{BP_ENET_INTERNAL_PHY, /* ucPhyType */
1328 + 0x01, /* ucPhyAddress */
1329 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
1330 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
1331 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
1332 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
1333 + BP_NOT_DEFINED, /* usGpioPhyReset */
1334 + 0x01, /* numSwitchPorts */
1335 + BP_ENET_CONFIG_MDIO, /* usConfigType */
1336 + BP_NOT_DEFINED}, /* usReverseMii */
1337 + {BP_ENET_NO_PHY}}, /* ucPhyType */
1338 + {{BP_VOIP_NO_DSP}, /* ucDspType */
1339 + {BP_VOIP_NO_DSP}}, /* ucDspType */
1340 + BP_MEMORY_8MB_1_CHIP, /* usSdramSize */
1341 + BP_PSI_DEFAULT_SIZE, /* usPsiSize */
1342 + BP_GPIO_11_AH, /* usGpioRj11InnerPair */
1343 + BP_GPIO_12_AH, /* usGpioRj11OuterPair */
1344 + BP_GPIO_13_AH, /* usGpioPressAndHoldReset */
1345 + BP_NOT_DEFINED, /* usGpioPcmciaReset */
1346 + BP_NOT_DEFINED, /* usGpioUartRts */
1347 + BP_NOT_DEFINED, /* usGpioUartCts */
1348 + BP_GPIO_8_AH, /* usGpioLedAdsl */
1349 + BP_NOT_DEFINED, /* usGpioLedAdslFail */
1350 + BP_NOT_DEFINED, /* usGpioLedWireless */
1351 + BP_NOT_DEFINED, /* usGpioLedUsb */
1352 + BP_NOT_DEFINED, /* usGpioLedHpna */
1353 + BP_GPIO_8_AH, /* usGpioLedWanData */
1354 + BP_GPIO_9_AH, /* usGpioLedPpp */
1355 + BP_NOT_DEFINED, /* usGpioLedPppFail */
1356 + BP_NOT_DEFINED, /* usGpioLedBlPowerOn */
1357 + BP_GPIO_10_AH, /* usGpioLedBlAlarm */
1358 + BP_GPIO_9_AH, /* usGpioLedBlResetCfg */
1359 + BP_GPIO_8_AH, /* usGpioLedBlStop */
1360 + BP_NOT_DEFINED, /* usExtIntrWireless */
1361 + BP_EXT_INTR_0, /* usExtIntrAdslDyingGasp */
1362 + BP_NOT_DEFINED, /* usExtIntrHpna */
1363 + BP_NOT_DEFINED, /* usCsHpna */
1364 + BP_NOT_DEFINED, /* usAntInUseWireless */
1365 + BP_NOT_DEFINED, /* usGpioSesBtnWireless */
1366 + BP_NOT_DEFINED, /* usExtIntrSesBtnWireless */
1367 + BP_NOT_DEFINED /* usGpioLedSesWireless */
1368 +};
1369 +
1370 +static BOARD_PARAMETERS g_bcm96345gw2 =
1371 +{
1372 + /* A hardware jumper determines whether GPIO 13 is used for Press and Hold
1373 + * Reset or RTS.
1374 + */
1375 + "96345GW2", /* szBoardId */
1376 + {{BP_ENET_EXTERNAL_SWITCH, /* ucPhyType */
1377 + 0x00, /* ucPhyAddress */
1378 + BP_GPIO_0_AH, /* usGpioPhySpiSck */
1379 + BP_GPIO_4_AH, /* usGpioPhySpiSs */
1380 + BP_GPIO_12_AH, /* usGpioPhySpiMosi */
1381 + BP_GPIO_11_AH, /* usGpioPhySpiMiso */
1382 + BP_NOT_DEFINED, /* usGpioPhyReset */
1383 + 0x04, /* numSwitchPorts */
1384 + BP_ENET_CONFIG_GPIO, /* usConfigType */
1385 + BP_ENET_REVERSE_MII}, /* usReverseMii */
1386 + {BP_ENET_NO_PHY}}, /* ucPhyType */
1387 + {{BP_VOIP_DSP, /* ucDspType */
1388 + 0x00, /* ucDspAddress */
1389 + BP_EXT_INTR_1, /* usExtIntrVoip */
1390 + BP_GPIO_6_AH, /* usGpioVoipReset */
1391 + BP_GPIO_15_AH, /* usGpioVoipIntr */
1392 + BP_NOT_DEFINED, /* usGpioLedVoip */
1393 + BP_CS_2}, /* usCsVoip */
1394 + {BP_VOIP_NO_DSP}}, /* ucDspType */
1395 + BP_MEMORY_16MB_1_CHIP, /* usSdramSize */
1396 + BP_PSI_DEFAULT_SIZE, /* usPsiSize */
1397 + BP_NOT_DEFINED, /* usGpioRj11InnerPair */
1398 + BP_NOT_DEFINED, /* usGpioRj11OuterPair */
1399 + BP_GPIO_13_AH, /* usGpioPressAndHoldReset */
1400 + BP_GPIO_2_AH, /* usGpioPcmciaReset */
1401 + BP_GPIO_13_AH, /* usGpioUartRts */
1402 + BP_GPIO_9_AH, /* usGpioUartCts */
1403 + BP_GPIO_8_AH, /* usGpioLedAdsl */
1404 + BP_NOT_DEFINED, /* usGpioLedAdslFail */
1405 + BP_NOT_DEFINED, /* usGpioLedWireless */
1406 + BP_GPIO_7_AH, /* usGpioLedUsb */
1407 + BP_NOT_DEFINED, /* usGpioLedHpna */
1408 + BP_GPIO_8_AH, /* usGpioLedWanData */
1409 + BP_NOT_DEFINED, /* usGpioLedPpp */
1410 + BP_NOT_DEFINED, /* usGpioLedPppFail */
1411 + BP_NOT_DEFINED, /* usGpioLedBlPowerOn */
1412 + BP_GPIO_10_AH, /* usGpioLedBlAlarm */
1413 + BP_GPIO_7_AH, /* usGpioLedBlResetCfg */
1414 + BP_GPIO_8_AH, /* usGpioLedBlStop */
1415 + BP_EXT_INTR_2, /* usExtIntrWireless */
1416 + BP_EXT_INTR_0, /* usExtIntrAdslDyingGasp */
1417 + BP_NOT_DEFINED, /* usExtIntrHpna */
1418 + BP_NOT_DEFINED, /* usCsHpna */
1419 + BP_WLAN_ANT_MAIN, /* usAntInUseWireless */
1420 + BP_NOT_DEFINED, /* usGpioSesBtnWireless */
1421 + BP_NOT_DEFINED, /* usExtIntrSesBtnWireless */
1422 + BP_NOT_DEFINED /* usGpioLedSesWireless */
1423 +};
1424 +
1425 +static BOARD_PARAMETERS g_bcm96345gw =
1426 +{
1427 + "96345GW", /* szBoardId */
1428 + {{BP_ENET_EXTERNAL_SWITCH, /* ucPhyType */
1429 + 0x00, /* ucPhyAddress */
1430 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
1431 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
1432 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
1433 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
1434 + BP_NOT_DEFINED, /* usGpioPhyReset */
1435 + 0x04, /* numSwitchPorts */
1436 + BP_ENET_CONFIG_MDIO, /* usConfigType */
1437 + BP_ENET_NO_REVERSE_MII}, /* usReverseMii */
1438 + {BP_ENET_NO_PHY}}, /* ucPhyType */
1439 + {{BP_VOIP_DSP, /* ucDspType */
1440 + 0x00, /* ucDspAddress */
1441 + BP_EXT_INTR_1, /* usExtIntrVoip */
1442 + BP_GPIO_6_AH, /* usGpioVoipReset */
1443 + BP_GPIO_15_AH, /* usGpioVoipIntr */
1444 + BP_NOT_DEFINED, /* usGpioLedVoip */
1445 + BP_CS_2}, /* usCsVoip */
1446 + {BP_VOIP_NO_DSP}}, /* ucDspType */
1447 + BP_MEMORY_16MB_1_CHIP, /* usSdramSize */
1448 + BP_PSI_DEFAULT_SIZE, /* usPsiSize */
1449 + BP_GPIO_11_AH, /* usGpioRj11InnerPair */
1450 + BP_GPIO_1_AH, /* usGpioRj11OuterPair */
1451 + BP_GPIO_13_AH, /* usGpioPressAndHoldReset */
1452 + BP_GPIO_2_AH, /* usGpioPcmciaReset */
1453 + BP_NOT_DEFINED, /* usGpioUartRts */
1454 + BP_NOT_DEFINED, /* usGpioUartCts */
1455 + BP_GPIO_8_AH, /* usGpioLedAdsl */
1456 + BP_NOT_DEFINED, /* usGpioLedAdslFail */
1457 + BP_GPIO_10_AH, /* usGpioLedWireless */
1458 + BP_GPIO_7_AH, /* usGpioLedUsb */
1459 + BP_NOT_DEFINED, /* usGpioLedHpna */
1460 + BP_GPIO_8_AH, /* usGpioLedWanData */
1461 + BP_NOT_DEFINED, /* usGpioLedPpp */
1462 + BP_NOT_DEFINED, /* usGpioLedPppFail */
1463 + BP_NOT_DEFINED, /* usGpioLedBlPowerOn */
1464 + BP_GPIO_9_AH, /* usGpioLedBlAlarm */
1465 + BP_GPIO_10_AH, /* usGpioLedBlResetCfg */
1466 + BP_GPIO_8_AH, /* usGpioLedBlStop */
1467 + BP_EXT_INTR_2, /* usExtIntrWireless */
1468 + BP_EXT_INTR_0, /* usExtIntrAdslDyingGasp */
1469 + BP_EXT_INTR_3, /* usExtIntrHpna */
1470 + BP_CS_1, /* usCsHpna */
1471 + BP_WLAN_ANT_MAIN, /* usAntInUseWireless */
1472 + BP_NOT_DEFINED, /* usGpioSesBtnWireless */
1473 + BP_NOT_DEFINED, /* usExtIntrSesBtnWireless */
1474 + BP_NOT_DEFINED /* usGpioLedSesWireless */
1475 +};
1476 +
1477 +static BOARD_PARAMETERS g_bcm96335r =
1478 +{
1479 + "96335R", /* szBoardId */
1480 + {{BP_ENET_INTERNAL_PHY, /* ucPhyType */
1481 + 0x01, /* ucPhyAddress */
1482 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
1483 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
1484 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
1485 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
1486 + BP_NOT_DEFINED, /* usGpioPhyReset */
1487 + 0x01, /* numSwitchPorts */
1488 + BP_ENET_CONFIG_MDIO, /* usConfigType */
1489 + BP_NOT_DEFINED}, /* usReverseMii */
1490 + {BP_ENET_NO_PHY}}, /* ucPhyType */
1491 + {{BP_VOIP_NO_DSP}, /* ucDspType */
1492 + {BP_VOIP_NO_DSP}}, /* ucDspType */
1493 + BP_MEMORY_8MB_1_CHIP, /* usSdramSize */
1494 + BP_PSI_DEFAULT_SIZE, /* usPsiSize */
1495 + BP_NOT_DEFINED, /* usGpioRj11InnerPair */
1496 + BP_NOT_DEFINED, /* usGpioRj11OuterPair */
1497 + BP_GPIO_14_AH, /* usGpioPressAndHoldReset */
1498 + BP_NOT_DEFINED, /* usGpioPcmciaReset */
1499 + BP_NOT_DEFINED, /* usGpioUartRts */
1500 + BP_NOT_DEFINED, /* usGpioUartCts */
1501 + BP_GPIO_9_AH, /* usGpioLedAdsl */
1502 + BP_NOT_DEFINED, /* usGpioLedAdslFail */
1503 + BP_NOT_DEFINED, /* usGpioLedWireless */
1504 + BP_NOT_DEFINED, /* usGpioLedUsb */
1505 + BP_NOT_DEFINED, /* usGpioLedHpna */
1506 + BP_GPIO_9_AH, /* usGpioLedWanData */
1507 + BP_GPIO_8_AH, /* usGpioLedPpp */
1508 + BP_NOT_DEFINED, /* usGpioLedPppFail */
1509 + BP_NOT_DEFINED, /* usGpioLedBlPowerOn */
1510 + BP_GPIO_10_AH, /* usGpioLedBlAlarm */
1511 + BP_GPIO_8_AH, /* usGpioLedBlResetCfg */
1512 + BP_GPIO_9_AH, /* usGpioLedBlStop */
1513 + BP_NOT_DEFINED, /* usExtIntrWireless */
1514 + BP_NOT_DEFINED, /* usExtIntrAdslDyingGasp */
1515 + BP_NOT_DEFINED, /* usExtIntrHpna */
1516 + BP_NOT_DEFINED, /* usCsHpna */
1517 + BP_NOT_DEFINED, /* usAntInUseWireless */
1518 + BP_NOT_DEFINED, /* usGpioSesBtnWireless */
1519 + BP_NOT_DEFINED, /* usExtIntrSesBtnWireless */
1520 + BP_NOT_DEFINED /* usGpioLedSesWireless */
1521 +};
1522 +
1523 +static BOARD_PARAMETERS g_bcm96345r0 =
1524 +{
1525 + "96345R0", /* szBoardId */
1526 + {{BP_ENET_INTERNAL_PHY, /* ucPhyType */
1527 + 0x01, /* ucPhyAddress */
1528 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
1529 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
1530 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
1531 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
1532 + BP_NOT_DEFINED, /* usGpioPhyReset */
1533 + 0x01, /* numSwitchPorts */
1534 + BP_ENET_CONFIG_MDIO, /* usConfigType */
1535 + BP_NOT_DEFINED}, /* usReverseMii */
1536 + {BP_ENET_NO_PHY}}, /* ucPhyType */
1537 + {{BP_VOIP_NO_DSP}, /* ucDspType */
1538 + {BP_VOIP_NO_DSP}}, /* ucDspType */
1539 + BP_MEMORY_8MB_1_CHIP, /* usSdramSize */
1540 + BP_PSI_DEFAULT_SIZE, /* usPsiSize */
1541 + BP_NOT_DEFINED, /* usGpioRj11InnerPair */
1542 + BP_NOT_DEFINED, /* usGpioRj11OuterPair */
1543 + BP_NOT_DEFINED, /* usGpioPressAndHoldReset */
1544 + BP_NOT_DEFINED, /* usGpioPcmciaReset */
1545 + BP_NOT_DEFINED, /* usGpioUartRts */
1546 + BP_NOT_DEFINED, /* usGpioUartCts */
1547 + BP_GPIO_8_AH, /* usGpioLedAdsl */
1548 + BP_NOT_DEFINED, /* usGpioLedAdslFail */
1549 + BP_NOT_DEFINED, /* usGpioLedWireless */
1550 + BP_NOT_DEFINED, /* usGpioLedUsb */
1551 + BP_NOT_DEFINED, /* usGpioLedHpna */
1552 + BP_GPIO_9_AH, /* usGpioLedWanData */
1553 + BP_GPIO_9_AH, /* usGpioLedPpp */
1554 + BP_NOT_DEFINED, /* usGpioLedPppFail */
1555 + BP_NOT_DEFINED, /* usGpioLedBlPowerOn */
1556 + BP_GPIO_9_AH, /* usGpioLedBlAlarm */
1557 + BP_GPIO_8_AH, /* usGpioLedBlResetCfg */
1558 + BP_GPIO_8_AH, /* usGpioLedBlStop */
1559 + BP_NOT_DEFINED, /* usExtIntrWireless */
1560 + BP_NOT_DEFINED, /* usExtIntrAdslDyingGasp */
1561 + BP_NOT_DEFINED, /* usExtIntrHpna */
1562 + BP_NOT_DEFINED, /* usCsHpna */
1563 + BP_NOT_DEFINED, /* usAntInUseWireless */
1564 + BP_NOT_DEFINED, /* usGpioSesBtnWireless */
1565 + BP_NOT_DEFINED, /* usExtIntrSesBtnWireless */
1566 + BP_NOT_DEFINED /* usGpioLedSesWireless */
1567 +};
1568 +
1569 +static BOARD_PARAMETERS g_bcm96345rs =
1570 +{
1571 + "96345RS", /* szBoardId */
1572 + {{BP_ENET_EXTERNAL_SWITCH, /* ucPhyType */
1573 + 0x00, /* ucPhyAddress */
1574 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
1575 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
1576 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
1577 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
1578 + BP_NOT_DEFINED, /* usGpioPhyReset */
1579 + 0x01, /* numSwitchPorts */
1580 + BP_ENET_CONFIG_MDIO, /* usConfigType */
1581 + BP_ENET_NO_REVERSE_MII}, /* usReverseMii */
1582 + {BP_ENET_NO_PHY}}, /* ucPhyType */
1583 + {{BP_VOIP_NO_DSP}, /* ucDspType */
1584 + {BP_VOIP_NO_DSP}}, /* ucDspType */
1585 + BP_MEMORY_8MB_1_CHIP, /* usSdramSize */
1586 + BP_PSI_DEFAULT_SIZE, /* usPsiSize */
1587 + BP_GPIO_11_AH, /* usGpioRj11InnerPair */
1588 + BP_GPIO_12_AH, /* usGpioRj11OuterPair */
1589 + BP_GPIO_13_AH, /* usGpioPressAndHoldReset */
1590 + BP_NOT_DEFINED, /* usGpioPcmciaReset */
1591 + BP_NOT_DEFINED, /* usGpioUartRts */
1592 + BP_NOT_DEFINED, /* usGpioUartCts */
1593 + BP_GPIO_8_AH, /* usGpioLedAdsl */
1594 + BP_NOT_DEFINED, /* usGpioLedAdslFail */
1595 + BP_NOT_DEFINED, /* usGpioLedWireless */
1596 + BP_NOT_DEFINED, /* usGpioLedUsb */
1597 + BP_NOT_DEFINED, /* usGpioLedHpna */
1598 + BP_GPIO_8_AH, /* usGpioLedWanData */
1599 + BP_GPIO_9_AH, /* usGpioLedPpp */
1600 + BP_NOT_DEFINED, /* usGpioLedPppFail */
1601 + BP_NOT_DEFINED, /* usGpioLedBlPowerOn */
1602 + BP_GPIO_10_AH, /* usGpioLedBlAlarm */
1603 + BP_GPIO_9_AH, /* usGpioLedBlResetCfg */
1604 + BP_GPIO_8_AH, /* usGpioLedBlStop */
1605 + BP_NOT_DEFINED, /* usExtIntrWireless */
1606 + BP_EXT_INTR_0, /* usExtIntrAdslDyingGasp */
1607 + BP_NOT_DEFINED, /* usExtIntrHpna */
1608 + BP_NOT_DEFINED, /* usCsHpna */
1609 + BP_NOT_DEFINED, /* usAntInUseWireless */
1610 + BP_NOT_DEFINED, /* usGpioSesBtnWireless */
1611 + BP_NOT_DEFINED, /* usExtIntrSesBtnWireless */
1612 + BP_NOT_DEFINED /* usGpioLedSesWireless */
1613 +};
1614 +
1615 +static PBOARD_PARAMETERS g_BoardParms[] =
1616 + {&g_bcm96345r, &g_bcm96345gw2, &g_bcm96345gw, &g_bcm96335r, &g_bcm96345r0,
1617 + &g_bcm96345rs, 0};
1618 +#endif
1619 +
1620 +#if defined(_BCM96348_) || defined(CONFIG_BCM96348)
1621 +
1622 +static BOARD_PARAMETERS g_bcm96348r =
1623 +{
1624 + "96348R", /* szBoardId */
1625 + {{BP_ENET_INTERNAL_PHY, /* ucPhyType */
1626 + 0x01, /* ucPhyAddress */
1627 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
1628 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
1629 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
1630 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
1631 + BP_NOT_DEFINED, /* usGpioPhyReset */
1632 + 0x01, /* numSwitchPorts */
1633 + BP_ENET_CONFIG_MDIO, /* usConfigType */
1634 + BP_NOT_DEFINED}, /* usReverseMii */
1635 + {BP_ENET_NO_PHY}}, /* ucPhyType */
1636 + {{BP_VOIP_NO_DSP}, /* ucDspType */
1637 + {BP_VOIP_NO_DSP}}, /* ucDspType */
1638 + BP_MEMORY_8MB_1_CHIP, /* usSdramSize */
1639 + BP_PSI_DEFAULT_SIZE, /* usPsiSize */
1640 + BP_NOT_DEFINED, /* usGpioRj11InnerPair */
1641 + BP_NOT_DEFINED, /* usGpioRj11OuterPair */
1642 + BP_GPIO_7_AH, /* usGpioPressAndHoldReset */
1643 + BP_NOT_DEFINED, /* usGpioPcmciaReset */
1644 + BP_NOT_DEFINED, /* usGpioUartRts */
1645 + BP_NOT_DEFINED, /* usGpioUartCts */
1646 + BP_NOT_DEFINED, /* usGpioLedAdsl */
1647 + BP_GPIO_2_AL, /* usGpioLedAdslFail */
1648 + BP_NOT_DEFINED, /* usGpioLedWireless */
1649 + BP_NOT_DEFINED, /* usGpioLedUsb */
1650 + BP_NOT_DEFINED, /* usGpioLedHpna */
1651 + BP_GPIO_3_AL, /* usGpioLedWanData */
1652 + BP_GPIO_3_AL, /* usGpioLedPpp */
1653 + BP_GPIO_4_AL, /* usGpioLedPppFail */
1654 + BP_GPIO_0_AL, /* usGpioLedBlPowerOn */
1655 + BP_NOT_DEFINED, /* usGpioLedBlAlarm */
1656 + BP_GPIO_3_AL, /* usGpioLedBlResetCfg */
1657 + BP_GPIO_1_AL, /* usGpioLedBlStop */
1658 + BP_NOT_DEFINED, /* usExtIntrWireless */
1659 + BP_HW_DEFINED, /* usExtIntrAdslDyingGasp */
1660 + BP_NOT_DEFINED, /* usExtIntrHpna */
1661 + BP_NOT_DEFINED, /* usCsHpna */
1662 + BP_NOT_DEFINED, /* usAntInUseWireless */
1663 + BP_NOT_DEFINED, /* usGpioSesBtnWireless */
1664 + BP_NOT_DEFINED, /* usExtIntrSesBtnWireless */
1665 + BP_NOT_DEFINED /* usGpioLedSesWireless */
1666 +};
1667 +
1668 +static BOARD_PARAMETERS g_bcm96348lv =
1669 +{
1670 + "96348LV", /* szBoardId */
1671 + {{BP_ENET_INTERNAL_PHY, /* ucPhyType */
1672 + 0x01, /* ucPhyAddress */
1673 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
1674 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
1675 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
1676 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
1677 + BP_NOT_DEFINED, /* usGpioPhyReset */
1678 + 0x01, /* numSwitchPorts */
1679 + BP_ENET_CONFIG_MDIO, /* usConfigType */
1680 + BP_NOT_DEFINED}, /* usReverseMii */
1681 + {BP_ENET_EXTERNAL_PHY, /* ucPhyType */
1682 + 0x02, /* ucPhyAddress */
1683 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
1684 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
1685 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
1686 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
1687 + BP_GPIO_5_AL, /* usGpioPhyReset */
1688 + 0x01, /* numSwitchPorts */
1689 + BP_ENET_CONFIG_MDIO, /* usConfigType */
1690 + BP_NOT_DEFINED}}, /* usReverseMii */
1691 + {{BP_VOIP_NO_DSP}, /* ucDspType */
1692 + {BP_VOIP_NO_DSP}}, /* ucDspType */
1693 + BP_MEMORY_16MB_2_CHIP, /* usSdramSize */
1694 + BP_PSI_DEFAULT_SIZE, /* usPsiSize */
1695 + BP_NOT_DEFINED, /* usGpioRj11InnerPair */
1696 + BP_NOT_DEFINED, /* usGpioRj11OuterPair */
1697 + BP_GPIO_7_AH, /* usGpioPressAndHoldReset */
1698 + BP_NOT_DEFINED, /* usGpioPcmciaReset */
1699 + BP_NOT_DEFINED, /* usGpioUartRts */
1700 + BP_NOT_DEFINED, /* usGpioUartCts */
1701 + BP_NOT_DEFINED, /* usGpioLedAdsl */
1702 + BP_GPIO_2_AL, /* usGpioLedAdslFail */
1703 + BP_NOT_DEFINED, /* usGpioLedWireless */
1704 + BP_NOT_DEFINED, /* usGpioLedUsb */
1705 + BP_NOT_DEFINED, /* usGpioLedHpna */
1706 + BP_GPIO_3_AL, /* usGpioLedWanData */
1707 + BP_GPIO_3_AL, /* usGpioLedPpp */
1708 + BP_GPIO_4_AL, /* usGpioLedPppFail */
1709 + BP_GPIO_0_AL, /* usGpioLedBlPowerOn */
1710 + BP_NOT_DEFINED, /* usGpioLedBlAlarm */
1711 + BP_GPIO_3_AL, /* usGpioLedBlResetCfg */
1712 + BP_GPIO_1_AL, /* usGpioLedBlStop */
1713 + BP_NOT_DEFINED, /* usExtIntrWireless */
1714 + BP_NOT_DEFINED, /* usExtIntrAdslDyingGasp */
1715 + BP_NOT_DEFINED, /* usExtIntrHpna */
1716 + BP_NOT_DEFINED, /* usCsHpna */
1717 + BP_NOT_DEFINED, /* usAntInUseWireless */
1718 + BP_NOT_DEFINED, /* usGpioSesBtnWireless */
1719 + BP_NOT_DEFINED, /* usExtIntrSesBtnWireless */
1720 + BP_NOT_DEFINED /* usGpioLedSesWireless */
1721 +};
1722 +
1723 +static BOARD_PARAMETERS g_bcm96348gw =
1724 +{
1725 + "96348GW", /* szBoardId */
1726 + {{BP_ENET_INTERNAL_PHY, /* ucPhyType */
1727 + 0x01, /* ucPhyAddress */
1728 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
1729 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
1730 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
1731 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
1732 + BP_NOT_DEFINED, /* usGpioPhyReset */
1733 + 0x01, /* numSwitchPorts */
1734 + BP_ENET_CONFIG_MDIO, /* usConfigType */
1735 + BP_NOT_DEFINED}, /* usReverseMii */
1736 + {BP_ENET_EXTERNAL_SWITCH, /* ucPhyType */
1737 + 0x00, /* ucPhyAddress */
1738 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
1739 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
1740 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
1741 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
1742 + BP_NOT_DEFINED, /* usGpioPhyReset */
1743 + 0x03, /* numSwitchPorts */
1744 + BP_ENET_CONFIG_SPI_SSB_0, /* usConfigType */
1745 + BP_ENET_REVERSE_MII}}, /* usReverseMii */
1746 + {{BP_VOIP_DSP, /* ucDspType */
1747 + 0x00, /* ucDspAddress */
1748 + BP_EXT_INTR_2, /* usExtIntrVoip */
1749 + BP_GPIO_6_AH, /* usGpioVoipReset */
1750 + BP_GPIO_34_AH, /* usGpioVoipIntr */
1751 + BP_NOT_DEFINED, /* usGpioLedVoip */
1752 + BP_CS_2}, /* usCsVoip */
1753 + {BP_VOIP_NO_DSP}}, /* ucDspType */
1754 + BP_MEMORY_16MB_2_CHIP, /* usSdramSize */
1755 + BP_PSI_DEFAULT_SIZE, /* usPsiSize */
1756 + BP_NOT_DEFINED, /* usGpioRj11InnerPair */
1757 + BP_NOT_DEFINED, /* usGpioRj11OuterPair */
1758 + BP_GPIO_33_AL, /* usGpioPressAndHoldReset */
1759 + BP_NOT_DEFINED, /* usGpioPcmciaReset */
1760 + BP_NOT_DEFINED, /* usGpioUartRts */
1761 + BP_NOT_DEFINED, /* usGpioUartCts */
1762 + BP_NOT_DEFINED, /* usGpioLedAdsl */
1763 + BP_GPIO_2_AL, /* usGpioLedAdslFail */
1764 + BP_NOT_DEFINED, /* usGpioLedWireless */
1765 + BP_NOT_DEFINED, /* usGpioLedUsb */
1766 + BP_NOT_DEFINED, /* usGpioLedHpna */
1767 + BP_GPIO_3_AL, /* usGpioLedWanData */
1768 + BP_GPIO_3_AL, /* usGpioLedPpp */
1769 + BP_GPIO_4_AL, /* usGpioLedPppFail */
1770 + BP_GPIO_0_AL, /* usGpioLedBlPowerOn */
1771 + BP_NOT_DEFINED, /* usGpioLedBlAlarm */
1772 + BP_GPIO_3_AL, /* usGpioLedBlResetCfg */
1773 + BP_GPIO_1_AL, /* usGpioLedBlStop */
1774 + BP_NOT_DEFINED, /* usExtIntrWireless */
1775 + BP_HW_DEFINED, /* usExtIntrAdslDyingGasp */
1776 + BP_NOT_DEFINED, /* usExtIntrHpna */
1777 + BP_NOT_DEFINED, /* usCsHpna */
1778 + BP_WLAN_ANT_MAIN, /* usAntInUseWireless */
1779 + BP_NOT_DEFINED, /* BP_GPIO_35_AH, */ /* usGpioSesBtnWireless */
1780 + BP_NOT_DEFINED, /* BP_EXT_INTR_3, */ /* usExtIntrSesBtnWireless */
1781 + BP_NOT_DEFINED /* BP_GPIO_0_AL */ /* usGpioLedSesWireless */
1782 +};
1783 +
1784 +
1785 +static BOARD_PARAMETERS g_bcm96348gw_10 =
1786 +{
1787 + "96348GW-10", /* szBoardId */
1788 + {{BP_ENET_INTERNAL_PHY, /* ucPhyType */
1789 + 0x01, /* ucPhyAddress */
1790 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
1791 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
1792 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
1793 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
1794 + BP_NOT_DEFINED, /* usGpioPhyReset */
1795 + 0x01, /* numSwitchPorts */
1796 + BP_ENET_CONFIG_MDIO, /* usConfigType */
1797 + BP_NOT_DEFINED}, /* usReverseMii */
1798 + {BP_ENET_EXTERNAL_SWITCH, /* ucPhyType */
1799 + 0x00, /* ucPhyAddress */
1800 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
1801 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
1802 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
1803 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
1804 + BP_NOT_DEFINED, /* usGpioPhyReset */
1805 + 0x03, /* numSwitchPorts */
1806 + BP_ENET_CONFIG_SPI_SSB_1, /* usConfigType */
1807 + BP_ENET_REVERSE_MII}}, /* usReverseMii */
1808 + {{BP_VOIP_DSP, /* ucDspType */
1809 + 0x00, /* ucDspAddress */
1810 + BP_EXT_INTR_2, /* usExtIntrVoip */
1811 + BP_GPIO_6_AH, /* usGpioVoipReset */
1812 + BP_GPIO_34_AH, /* usGpioVoipIntr */
1813 + BP_NOT_DEFINED, /* usGpioLedVoip */
1814 + BP_CS_2}, /* usCsVoip */
1815 + {BP_VOIP_NO_DSP}}, /* ucDspType */
1816 + BP_MEMORY_16MB_2_CHIP, /* usSdramSize */
1817 + BP_PSI_DEFAULT_SIZE, /* usPsiSize */
1818 + BP_NOT_DEFINED, /* usGpioRj11InnerPair */
1819 + BP_NOT_DEFINED, /* usGpioRj11OuterPair */
1820 + BP_GPIO_33_AL, /* usGpioPressAndHoldReset */
1821 + BP_NOT_DEFINED, /* usGpioPcmciaReset */
1822 + BP_NOT_DEFINED, /* usGpioUartRts */
1823 + BP_NOT_DEFINED, /* usGpioUartCts */
1824 + BP_NOT_DEFINED, /* usGpioLedAdsl */
1825 + BP_GPIO_2_AL, /* usGpioLedAdslFail */
1826 + BP_NOT_DEFINED, /* usGpioLedWireless */
1827 + BP_NOT_DEFINED, /* usGpioLedUsb */
1828 + BP_NOT_DEFINED, /* usGpioLedHpna */
1829 + BP_GPIO_3_AL, /* usGpioLedWanData */
1830 + BP_GPIO_3_AL, /* usGpioLedPpp */
1831 + BP_GPIO_4_AL, /* usGpioLedPppFail */
1832 + BP_GPIO_0_AL, /* usGpioLedBlPowerOn */
1833 + BP_NOT_DEFINED, /* usGpioLedBlAlarm */
1834 + BP_GPIO_3_AL, /* usGpioLedBlResetCfg */
1835 + BP_GPIO_1_AL, /* usGpioLedBlStop */
1836 + BP_NOT_DEFINED, /* usExtIntrWireless */
1837 + BP_HW_DEFINED, /* usExtIntrAdslDyingGasp */
1838 + BP_NOT_DEFINED, /* usExtIntrHpna */
1839 + BP_NOT_DEFINED, /* usCsHpna */
1840 + BP_WLAN_ANT_MAIN, /* usAntInUseWireless */
1841 + BP_NOT_DEFINED, /* usGpioSesBtnWireless */
1842 + BP_NOT_DEFINED, /* usExtIntrSesBtnWireless */
1843 + BP_NOT_DEFINED /* usGpioLedSesWireless */
1844 +};
1845 +
1846 +static BOARD_PARAMETERS g_bcm96348gw_11 =
1847 +{
1848 + "96348GW-11", /* szBoardId */
1849 + {{BP_ENET_NO_PHY}, /* ucPhyType */
1850 + {BP_ENET_EXTERNAL_SWITCH, /* ucPhyType */
1851 + 0x00, /* ucPhyAddress */
1852 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
1853 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
1854 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
1855 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
1856 + BP_NOT_DEFINED, /* usGpioPhyReset */
1857 + 0x04, /* numSwitchPorts */
1858 + BP_ENET_CONFIG_SPI_SSB_1, /* usConfigType */
1859 + BP_ENET_REVERSE_MII}}, /* usReverseMii */
1860 + {{BP_VOIP_NO_DSP}, /* ucDspType */
1861 + {BP_VOIP_NO_DSP}}, /* ucDspType */
1862 + BP_MEMORY_16MB_2_CHIP, /* usSdramSize */
1863 + BP_PSI_DEFAULT_SIZE, /* usPsiSize */
1864 + BP_NOT_DEFINED, /* usGpioRj11InnerPair */
1865 + BP_NOT_DEFINED, /* usGpioRj11OuterPair */
1866 + BP_GPIO_33_AL, /* usGpioPressAndHoldReset */
1867 + BP_NOT_DEFINED, /* usGpioPcmciaReset */
1868 + BP_NOT_DEFINED, /* usGpioUartRts */
1869 + BP_NOT_DEFINED, /* usGpioUartCts */
1870 + BP_NOT_DEFINED, /* usGpioLedAdsl */
1871 + BP_GPIO_2_AL, /* usGpioLedAdslFail */
1872 + BP_NOT_DEFINED, /* usGpioLedWireless */
1873 + BP_NOT_DEFINED, /* usGpioLedUsb */
1874 + BP_NOT_DEFINED, /* usGpioLedHpna */
1875 + BP_GPIO_3_AL, /* usGpioLedWanData */
1876 + BP_GPIO_3_AL, /* usGpioLedPpp */
1877 + BP_GPIO_4_AL, /* usGpioLedPppFail */
1878 + BP_GPIO_0_AL, /* usGpioLedBlPowerOn */
1879 + BP_NOT_DEFINED, /* usGpioLedBlAlarm */
1880 + BP_GPIO_3_AL, /* usGpioLedBlResetCfg */
1881 + BP_GPIO_1_AL, /* usGpioLedBlStop */
1882 + BP_NOT_DEFINED, /* usExtIntrWireless */
1883 + BP_HW_DEFINED, /* usExtIntrAdslDyingGasp */
1884 + BP_NOT_DEFINED, /* usExtIntrHpna */
1885 + BP_NOT_DEFINED, /* usCsHpna */
1886 + BP_NOT_DEFINED, /* usAntInUseWireless */
1887 + BP_NOT_DEFINED, /* usGpioSesBtnWireless */
1888 + BP_NOT_DEFINED, /* usExtIntrSesBtnWireless */
1889 + BP_NOT_DEFINED /* usGpioLedSesWireless */
1890 +};
1891 +
1892 +static BOARD_PARAMETERS g_bcm96348sv =
1893 +{
1894 + "96348SV", /* szBoardId */
1895 + {{BP_ENET_INTERNAL_PHY, /* ucPhyType */
1896 + 0x01, /* ucPhyAddress */
1897 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
1898 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
1899 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
1900 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
1901 + BP_NOT_DEFINED, /* usGpioPhyReset */
1902 + 0x01, /* numSwitchPorts */
1903 + BP_ENET_CONFIG_MDIO, /* usConfigType */
1904 + BP_NOT_DEFINED}, /* usReverseMii */
1905 + {BP_ENET_EXTERNAL_PHY, /* ucPhyType */
1906 + 0x1f, /* ucPhyAddress */
1907 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
1908 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
1909 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
1910 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
1911 + BP_NOT_DEFINED, /* usGpioPhyReset */
1912 + 0x01, /* numSwitchPorts */
1913 + BP_ENET_CONFIG_MDIO, /* usConfigType */
1914 + BP_NOT_DEFINED}}, /* usReverseMii */
1915 + {{BP_VOIP_NO_DSP}, /* ucDspType */
1916 + {BP_VOIP_NO_DSP}}, /* ucDspType */
1917 + BP_MEMORY_32MB_2_CHIP, /* usSdramSize */
1918 + BP_PSI_DEFAULT_SIZE, /* usPsiSize */
1919 + BP_NOT_DEFINED, /* usGpioRj11InnerPair */
1920 + BP_NOT_DEFINED, /* usGpioRj11OuterPair */
1921 + BP_NOT_DEFINED, /* usGpioPressAndHoldReset */
1922 + BP_NOT_DEFINED, /* usGpioPcmciaReset */
1923 + BP_NOT_DEFINED, /* usGpioUartRts */
1924 + BP_NOT_DEFINED, /* usGpioUartCts */
1925 + BP_NOT_DEFINED, /* usGpioLedAdsl */
1926 + BP_NOT_DEFINED, /* usGpioLedAdslFail */
1927 + BP_NOT_DEFINED, /* usGpioLedWireless */
1928 + BP_NOT_DEFINED, /* usGpioLedUsb */
1929 + BP_NOT_DEFINED, /* usGpioLedHpna */
1930 + BP_NOT_DEFINED, /* usGpioLedWanData */
1931 + BP_NOT_DEFINED, /* usGpioLedPpp */
1932 + BP_NOT_DEFINED, /* usGpioLedPppFail */
1933 + BP_NOT_DEFINED, /* usGpioLedBlPowerOn */
1934 + BP_NOT_DEFINED, /* usGpioLedBlAlarm */
1935 + BP_NOT_DEFINED, /* usGpioLedBlResetCfg */
1936 + BP_NOT_DEFINED, /* usGpioLedBlStop */
1937 + BP_NOT_DEFINED, /* usExtIntrWireless */
1938 + BP_HW_DEFINED, /* usExtIntrAdslDyingGasp */
1939 + BP_NOT_DEFINED, /* usExtIntrHpna */
1940 + BP_NOT_DEFINED, /* usCsHpna */
1941 + BP_NOT_DEFINED, /* usAntInUseWireless */
1942 + BP_NOT_DEFINED, /* usGpioSesBtnWireless */
1943 + BP_NOT_DEFINED, /* usExtIntrSesBtnWireless */
1944 + BP_NOT_DEFINED /* usGpioLedSesWireless */
1945 +};
1946 +
1947 +
1948 +static BOARD_PARAMETERS g_bcm96348gw_dualDsp =
1949 +{
1950 + "96348GW-DualDSP", /* szBoardId */
1951 + {{BP_ENET_INTERNAL_PHY, /* ucPhyType */
1952 + 0x01, /* ucPhyAddress */
1953 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
1954 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
1955 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
1956 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
1957 + BP_NOT_DEFINED, /* usGpioPhyReset */
1958 + 0x01, /* numSwitchPorts */
1959 + BP_ENET_CONFIG_MDIO, /* usConfigType */
1960 + BP_NOT_DEFINED}, /* usReverseMii */
1961 + {BP_ENET_EXTERNAL_SWITCH, /* ucPhyType */
1962 + 0x00, /* ucPhyAddress */
1963 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
1964 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
1965 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
1966 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
1967 + BP_NOT_DEFINED, /* usGpioPhyReset */
1968 + 0x03, /* numSwitchPorts */
1969 + BP_ENET_CONFIG_SPI_SSB_1, /* usConfigType */
1970 + BP_ENET_REVERSE_MII}}, /* usReverseMii */
1971 + {{BP_VOIP_DSP, /* ucDspType */
1972 + 0x00, /* ucDspAddress */
1973 + BP_EXT_INTR_2, /* usExtIntrVoip */
1974 + BP_UNEQUIPPED, /* usGpioVoipReset */
1975 + BP_GPIO_34_AH, /* usGpioVoipIntr */
1976 + BP_NOT_DEFINED, /* usGpioLedVoip */
1977 + BP_CS_2}, /* usCsVoip */
1978 + {BP_VOIP_DSP, /* ucDspType */
1979 + 0x01, /* ucDspAddress */
1980 + BP_EXT_INTR_3, /* usExtIntrVoip */
1981 + BP_UNEQUIPPED , /* usGpioVoipReset */
1982 + BP_GPIO_35_AH, /* usGpioVoipIntr */
1983 + BP_NOT_DEFINED, /* usGpioLedVoip */
1984 + BP_CS_3}}, /* usCsVoip */
1985 + BP_MEMORY_16MB_2_CHIP, /* usSdramSize */
1986 + BP_PSI_DEFAULT_SIZE, /* usPsiSize */
1987 + BP_NOT_DEFINED, /* usGpioRj11InnerPair */
1988 + BP_NOT_DEFINED, /* usGpioRj11OuterPair */
1989 + BP_GPIO_33_AL, /* usGpioPressAndHoldReset */
1990 + BP_NOT_DEFINED, /* usGpioPcmciaReset */
1991 + BP_NOT_DEFINED, /* usGpioUartRts */
1992 + BP_NOT_DEFINED, /* usGpioUartCts */
1993 + BP_NOT_DEFINED, /* usGpioLedAdsl */
1994 + BP_GPIO_2_AL, /* usGpioLedAdslFail */
1995 + BP_NOT_DEFINED, /* usGpioLedWireless */
1996 + BP_NOT_DEFINED, /* usGpioLedUsb */
1997 + BP_NOT_DEFINED, /* usGpioLedHpna */
1998 + BP_GPIO_3_AL, /* usGpioLedWanData */
1999 + BP_GPIO_3_AL, /* usGpioLedPpp */
2000 + BP_GPIO_4_AL, /* usGpioLedPppFail */
2001 + BP_GPIO_0_AL, /* usGpioLedBlPowerOn */
2002 + BP_NOT_DEFINED, /* usGpioLedBlAlarm */
2003 + BP_GPIO_3_AL, /* usGpioLedBlResetCfg */
2004 + BP_GPIO_1_AL, /* usGpioLedBlStop */
2005 + BP_NOT_DEFINED, /* usExtIntrWireless */
2006 + BP_HW_DEFINED, /* usExtIntrAdslDyingGasp */
2007 + BP_NOT_DEFINED, /* usExtIntrHpna */
2008 + BP_NOT_DEFINED, /* usCsHpna */
2009 + BP_WLAN_ANT_MAIN, /* usAntInUseWireless */
2010 + BP_NOT_DEFINED, /* usGpioSesBtnWireless */
2011 + BP_NOT_DEFINED, /* usExtIntrSesBtnWireless */
2012 + BP_NOT_DEFINED /* usGpioLedSesWireless */
2013 +};
2014 +
2015 +
2016 +static BOARD_PARAMETERS g_bcmCustom_01 =
2017 +{
2018 + "BCMCUST_01", /* szBoardId */
2019 + {{BP_ENET_INTERNAL_PHY, /* ucPhyType */
2020 + 0x01, /* ucPhyAddress */
2021 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
2022 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
2023 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
2024 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
2025 + BP_NOT_DEFINED, /* usGpioPhyReset */
2026 + 0x01, /* numSwitchPorts */
2027 + BP_ENET_CONFIG_MDIO, /* usConfigType */
2028 + BP_NOT_DEFINED}, /* usReverseMii */
2029 + {BP_ENET_NO_PHY, /* ucPhyType */
2030 + 0x00, /* ucPhyAddress */
2031 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
2032 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
2033 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
2034 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
2035 + BP_NOT_DEFINED, /* usGpioPhyReset */
2036 + 0x01, /* numSwitchPorts */
2037 + BP_ENET_CONFIG_SPI_SSB_1, /* usConfigType */
2038 + BP_ENET_REVERSE_MII}}, /* usReverseMii */
2039 + {{BP_VOIP_DSP, /* ucDspType */
2040 + 0x00, /* ucDspAddress */
2041 + BP_EXT_INTR_2, /* usExtIntrVoip */
2042 + BP_GPIO_36_AH, /* usGpioVoipReset */
2043 + BP_GPIO_34_AL, /* usGpioVoipIntr */
2044 + BP_NOT_DEFINED, /* usGpioLedVoip */
2045 + BP_CS_2}, /* usCsVoip */
2046 + {BP_VOIP_NO_DSP}}, /* ucDspType */
2047 + BP_MEMORY_16MB_2_CHIP, /* usSdramSize */
2048 + BP_PSI_DEFAULT_SIZE, /* usPsiSize */
2049 + BP_NOT_DEFINED, /* usGpioRj11InnerPair */
2050 + BP_NOT_DEFINED, /* usGpioRj11OuterPair */
2051 + BP_GPIO_33_AL, /* usGpioPressAndHoldReset */
2052 + BP_NOT_DEFINED, /* usGpioPcmciaReset */
2053 + BP_NOT_DEFINED, /* usGpioUartRts */
2054 + BP_NOT_DEFINED, /* usGpioUartCts */
2055 + BP_NOT_DEFINED, /* usGpioLedAdsl */
2056 + BP_GPIO_2_AL, /* usGpioLedAdslFail */
2057 + BP_NOT_DEFINED, /* usGpioLedWireless */
2058 + BP_NOT_DEFINED, /* usGpioLedUsb */
2059 + BP_NOT_DEFINED, /* usGpioLedHpna */
2060 + BP_GPIO_3_AL, /* usGpioLedWanData */
2061 + BP_GPIO_3_AL, /* usGpioLedPpp */
2062 + BP_GPIO_4_AL, /* usGpioLedPppFail */
2063 + BP_GPIO_0_AL, /* usGpioLedBlPowerOn */
2064 + BP_NOT_DEFINED, /* usGpioLedBlAlarm */
2065 + BP_GPIO_3_AL, /* usGpioLedBlResetCfg */
2066 + BP_GPIO_1_AL, /* usGpioLedBlStop */
2067 + BP_NOT_DEFINED, /* usExtIntrWireless */
2068 + BP_NOT_DEFINED, /* usExtIntrAdslDyingGasp */
2069 + BP_NOT_DEFINED, /* usExtIntrHpna */
2070 + BP_NOT_DEFINED, /* usCsHpna */
2071 + BP_NOT_DEFINED, /* usAntInUseWireless */
2072 + BP_NOT_DEFINED, /* usGpioSesBtnWireless */
2073 + BP_NOT_DEFINED, /* usExtIntrSesBtnWireless */
2074 + BP_NOT_DEFINED /* usGpioLedSesWireless */
2075 +};
2076 +
2077 +static PBOARD_PARAMETERS g_BoardParms[] =
2078 + {&g_bcm96348r, &g_bcm96348lv, &g_bcm96348gw, &g_bcm96348gw_10,
2079 + &g_bcm96348gw_11, &g_bcm96348sv, &g_bcm96348gw_dualDsp,
2080 + &g_bcmCustom_01, 0};
2081 +#endif
2082 +
2083 +static PBOARD_PARAMETERS g_pCurrentBp = 0;
2084 +
2085 +/**************************************************************************
2086 + * Name : bpstrcmp
2087 + *
2088 + * Description: String compare for this file so it does not depend on an OS.
2089 + * (Linux kernel and CFE share this source file.)
2090 + *
2091 + * Parameters : [IN] dest - destination string
2092 + * [IN] src - source string
2093 + *
2094 + * Returns : -1 - dest < src, 1 - dest > src, 0 dest == src
2095 + ***************************************************************************/
2096 +static int bpstrcmp(const char *dest,const char *src);
2097 +static int bpstrcmp(const char *dest,const char *src)
2098 +{
2099 + while (*src && *dest)
2100 + {
2101 + if (*dest < *src) return -1;
2102 + if (*dest > *src) return 1;
2103 + dest++;
2104 + src++;
2105 + }
2106 +
2107 + if (*dest && !*src) return 1;
2108 + if (!*dest && *src) return -1;
2109 + return 0;
2110 +} /* bpstrcmp */
2111 +
2112 +/**************************************************************************
2113 + * Name : BpGetVoipDspConfig
2114 + *
2115 + * Description: Gets the DSP configuration from the board parameter
2116 + * structure for a given DSP index.
2117 + *
2118 + * Parameters : [IN] dspNum - DSP index (number)
2119 + *
2120 + * Returns : Pointer to DSP configuration block if found/valid, NULL
2121 + * otherwise.
2122 + ***************************************************************************/
2123 +VOIP_DSP_INFO *BpGetVoipDspConfig( unsigned char dspNum );
2124 +VOIP_DSP_INFO *BpGetVoipDspConfig( unsigned char dspNum )
2125 +{
2126 + VOIP_DSP_INFO *pDspConfig = 0;
2127 + int i;
2128 +
2129 + if( g_pCurrentBp )
2130 + {
2131 + for( i = 0 ; i < BP_MAX_VOIP_DSP ; i++ )
2132 + {
2133 + if( g_pCurrentBp->VoIPDspInfo[i].ucDspType != BP_VOIP_NO_DSP &&
2134 + g_pCurrentBp->VoIPDspInfo[i].ucDspAddress == dspNum )
2135 + {
2136 + pDspConfig = &g_pCurrentBp->VoIPDspInfo[i];
2137 + break;
2138 + }
2139 + }
2140 + }
2141 +
2142 + return pDspConfig;
2143 +}
2144 +
2145 +
2146 +/**************************************************************************
2147 + * Name : BpSetBoardId
2148 + *
2149 + * Description: This function find the BOARD_PARAMETERS structure for the
2150 + * specified board id string and assigns it to a global, static
2151 + * variable.
2152 + *
2153 + * Parameters : [IN] pszBoardId - Board id string that is saved into NVRAM.
2154 + *
2155 + * Returns : BP_SUCCESS - Success, value is returned.
2156 + * BP_BOARD_ID_NOT_FOUND - Error, board id input string does not
2157 + * have a board parameters configuration record.
2158 + ***************************************************************************/
2159 +int BpSetBoardId( char *pszBoardId )
2160 +{
2161 + int nRet = BP_BOARD_ID_NOT_FOUND;
2162 + PBOARD_PARAMETERS *ppBp;
2163 +
2164 + for( ppBp = g_BoardParms; *ppBp; ppBp++ )
2165 + {
2166 + if( !bpstrcmp((*ppBp)->szBoardId, pszBoardId) )
2167 + {
2168 + g_pCurrentBp = *ppBp;
2169 + nRet = BP_SUCCESS;
2170 + break;
2171 + }
2172 + }
2173 +
2174 + return( nRet );
2175 +} /* BpSetBoardId */
2176 +
2177 +/**************************************************************************
2178 + * Name : BpGetBoardIds
2179 + *
2180 + * Description: This function returns all of the supported board id strings.
2181 + *
2182 + * Parameters : [OUT] pszBoardIds - Address of a buffer that the board id
2183 + * strings are returned in. Each id starts at BP_BOARD_ID_LEN
2184 + * boundary.
2185 + * [IN] nBoardIdsSize - Number of BP_BOARD_ID_LEN elements that
2186 + * were allocated in pszBoardIds.
2187 + *
2188 + * Returns : Number of board id strings returned.
2189 + ***************************************************************************/
2190 +int BpGetBoardIds( char *pszBoardIds, int nBoardIdsSize )
2191 +{
2192 + PBOARD_PARAMETERS *ppBp;
2193 + int i;
2194 + char *src;
2195 + char *dest;
2196 +
2197 + for( i = 0, ppBp = g_BoardParms; *ppBp && nBoardIdsSize;
2198 + i++, ppBp++, nBoardIdsSize--, pszBoardIds += BP_BOARD_ID_LEN )
2199 + {
2200 + dest = pszBoardIds;
2201 + src = (*ppBp)->szBoardId;
2202 + while( *src )
2203 + *dest++ = *src++;
2204 + *dest = '\0';
2205 + }
2206 +
2207 + return( i );
2208 +} /* BpGetBoardIds */
2209 +
2210 +/**************************************************************************
2211 + * Name : BpGetEthernetMacInfo
2212 + *
2213 + * Description: This function returns all of the supported board id strings.
2214 + *
2215 + * Parameters : [OUT] pEnetInfos - Address of an array of ETHERNET_MAC_INFO
2216 + * buffers.
2217 + * [IN] nNumEnetInfos - Number of ETHERNET_MAC_INFO elements that
2218 + * are pointed to by pEnetInfos.
2219 + *
2220 + * Returns : BP_SUCCESS - Success, value is returned.
2221 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2222 + ***************************************************************************/
2223 +int BpGetEthernetMacInfo( PETHERNET_MAC_INFO pEnetInfos, int nNumEnetInfos )
2224 +{
2225 + int i, nRet;
2226 +
2227 + if( g_pCurrentBp )
2228 + {
2229 + for( i = 0; i < nNumEnetInfos; i++, pEnetInfos++ )
2230 + {
2231 + if( i < BP_MAX_ENET_MACS )
2232 + {
2233 + unsigned char *src = (unsigned char *)
2234 + &g_pCurrentBp->EnetMacInfos[i];
2235 + unsigned char *dest = (unsigned char *) pEnetInfos;
2236 + int len = sizeof(ETHERNET_MAC_INFO);
2237 + while( len-- )
2238 + *dest++ = *src++;
2239 + }
2240 + else
2241 + pEnetInfos->ucPhyType = BP_ENET_NO_PHY;
2242 + }
2243 +
2244 + nRet = BP_SUCCESS;
2245 + }
2246 + else
2247 + {
2248 + for( i = 0; i < nNumEnetInfos; i++, pEnetInfos++ )
2249 + pEnetInfos->ucPhyType = BP_ENET_NO_PHY;
2250 +
2251 + nRet = BP_BOARD_ID_NOT_SET;
2252 + }
2253 +
2254 + return( nRet );
2255 +} /* BpGetEthernetMacInfo */
2256 +
2257 +/**************************************************************************
2258 + * Name : BpGetSdramSize
2259 + *
2260 + * Description: This function returns a constant that describees the board's
2261 + * SDRAM type and size.
2262 + *
2263 + * Parameters : [OUT] pulSdramSize - Address of short word that the SDRAM size
2264 + * is returned in.
2265 + *
2266 + * Returns : BP_SUCCESS - Success, value is returned.
2267 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2268 + ***************************************************************************/
2269 +int BpGetSdramSize( unsigned long *pulSdramSize )
2270 +{
2271 + int nRet;
2272 +
2273 + if( g_pCurrentBp )
2274 + {
2275 + *pulSdramSize = g_pCurrentBp->usSdramSize;
2276 + nRet = BP_SUCCESS;
2277 + }
2278 + else
2279 + {
2280 + *pulSdramSize = BP_NOT_DEFINED;
2281 + nRet = BP_BOARD_ID_NOT_SET;
2282 + }
2283 +
2284 + return( nRet );
2285 +} /* BpGetSdramSize */
2286 +
2287 +/**************************************************************************
2288 + * Name : BpGetPsiSize
2289 + *
2290 + * Description: This function returns the persistent storage size in K bytes.
2291 + *
2292 + * Parameters : [OUT] pulPsiSize - Address of short word that the persistent
2293 + * storage size is returned in.
2294 + *
2295 + * Returns : BP_SUCCESS - Success, value is returned.
2296 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2297 + ***************************************************************************/
2298 +int BpGetPsiSize( unsigned long *pulPsiSize )
2299 +{
2300 + int nRet;
2301 +
2302 + if( g_pCurrentBp )
2303 + {
2304 + *pulPsiSize = g_pCurrentBp->usPsiSize;
2305 + nRet = BP_SUCCESS;
2306 + }
2307 + else
2308 + {
2309 + *pulPsiSize = BP_NOT_DEFINED;
2310 + nRet = BP_BOARD_ID_NOT_SET;
2311 + }
2312 +
2313 + return( nRet );
2314 +} /* BpGetPsiSize */
2315 +
2316 +/**************************************************************************
2317 + * Name : BpGetRj11InnerOuterPairGpios
2318 + *
2319 + * Description: This function returns the GPIO pin assignments for changing
2320 + * between the RJ11 inner pair and RJ11 outer pair.
2321 + *
2322 + * Parameters : [OUT] pusInner - Address of short word that the RJ11 inner pair
2323 + * GPIO pin is returned in.
2324 + * [OUT] pusOuter - Address of short word that the RJ11 outer pair
2325 + * GPIO pin is returned in.
2326 + *
2327 + * Returns : BP_SUCCESS - Success, values are returned.
2328 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2329 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
2330 + * for the board.
2331 + ***************************************************************************/
2332 +int BpGetRj11InnerOuterPairGpios( unsigned short *pusInner,
2333 + unsigned short *pusOuter )
2334 +{
2335 + int nRet;
2336 +
2337 + if( g_pCurrentBp )
2338 + {
2339 + *pusInner = g_pCurrentBp->usGpioRj11InnerPair;
2340 + *pusOuter = g_pCurrentBp->usGpioRj11OuterPair;
2341 +
2342 + if( g_pCurrentBp->usGpioRj11InnerPair != BP_NOT_DEFINED &&
2343 + g_pCurrentBp->usGpioRj11OuterPair != BP_NOT_DEFINED )
2344 + {
2345 + nRet = BP_SUCCESS;
2346 + }
2347 + else
2348 + {
2349 + nRet = BP_VALUE_NOT_DEFINED;
2350 + }
2351 + }
2352 + else
2353 + {
2354 + *pusInner = *pusOuter = BP_NOT_DEFINED;
2355 + nRet = BP_BOARD_ID_NOT_SET;
2356 + }
2357 +
2358 + return( nRet );
2359 +} /* BpGetRj11InnerOuterPairGpios */
2360 +
2361 +/**************************************************************************
2362 + * Name : BpGetPressAndHoldResetGpio
2363 + *
2364 + * Description: This function returns the GPIO pin assignment for the press
2365 + * and hold reset button.
2366 + *
2367 + * Parameters : [OUT] pusValue - Address of short word that the press and hold
2368 + * reset button GPIO pin is returned in.
2369 + *
2370 + * Returns : BP_SUCCESS - Success, value is returned.
2371 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2372 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
2373 + * for the board.
2374 + ***************************************************************************/
2375 +int BpGetPressAndHoldResetGpio( unsigned short *pusValue )
2376 +{
2377 + int nRet;
2378 +
2379 + if( g_pCurrentBp )
2380 + {
2381 + *pusValue = g_pCurrentBp->usGpioPressAndHoldReset;
2382 +
2383 + if( g_pCurrentBp->usGpioPressAndHoldReset != BP_NOT_DEFINED )
2384 + {
2385 + nRet = BP_SUCCESS;
2386 + }
2387 + else
2388 + {
2389 + nRet = BP_VALUE_NOT_DEFINED;
2390 + }
2391 + }
2392 + else
2393 + {
2394 + *pusValue = BP_NOT_DEFINED;
2395 + nRet = BP_BOARD_ID_NOT_SET;
2396 + }
2397 +
2398 + return( nRet );
2399 +} /* BpGetPressAndHoldResetGpio */
2400 +
2401 +/**************************************************************************
2402 + * Name : BpGetVoipResetGpio
2403 + *
2404 + * Description: This function returns the GPIO pin assignment for the VOIP
2405 + * Reset operation.
2406 + *
2407 + * Parameters : [OUT] pusValue - Address of short word that the VOIP reset
2408 + * GPIO pin is returned in.
2409 + * [IN] dspNum - Address of the DSP to query.
2410 + *
2411 + * Returns : BP_SUCCESS - Success, value is returned.
2412 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2413 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
2414 + * for the board.
2415 + ***************************************************************************/
2416 +int BpGetVoipResetGpio( unsigned char dspNum, unsigned short *pusValue )
2417 +{
2418 + int nRet;
2419 +
2420 + if( g_pCurrentBp )
2421 + {
2422 + VOIP_DSP_INFO *pDspInfo = BpGetVoipDspConfig( dspNum );
2423 +
2424 + if( pDspInfo )
2425 + {
2426 + *pusValue = pDspInfo->usGpioVoipReset;
2427 +
2428 + if( *pusValue != BP_NOT_DEFINED ||
2429 + *pusValue == BP_UNEQUIPPED )
2430 + {
2431 + nRet = BP_SUCCESS;
2432 + }
2433 + else
2434 + {
2435 + nRet = BP_VALUE_NOT_DEFINED;
2436 + }
2437 + }
2438 + else
2439 + {
2440 + *pusValue = BP_NOT_DEFINED;
2441 + nRet = BP_BOARD_ID_NOT_FOUND;
2442 + }
2443 + }
2444 + else
2445 + {
2446 + *pusValue = BP_NOT_DEFINED;
2447 + nRet = BP_BOARD_ID_NOT_SET;
2448 + }
2449 +
2450 + return( nRet );
2451 +} /* BpGetVoipResetGpio */
2452 +
2453 +/**************************************************************************
2454 + * Name : BpGetVoipIntrGpio
2455 + *
2456 + * Description: This function returns the GPIO pin assignment for VoIP interrupt.
2457 + *
2458 + * Parameters : [OUT] pusValue - Address of short word that the VOIP interrupt
2459 + * GPIO pin is returned in.
2460 + * [IN] dspNum - Address of the DSP to query.
2461 + *
2462 + * Returns : BP_SUCCESS - Success, value is returned.
2463 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2464 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
2465 + * for the board.
2466 + ***************************************************************************/
2467 +int BpGetVoipIntrGpio( unsigned char dspNum, unsigned short *pusValue )
2468 +{
2469 + int nRet;
2470 +
2471 + if( g_pCurrentBp )
2472 + {
2473 + VOIP_DSP_INFO *pDspInfo = BpGetVoipDspConfig( dspNum );
2474 +
2475 + if( pDspInfo )
2476 + {
2477 + *pusValue = pDspInfo->usGpioVoipIntr;
2478 +
2479 + if( *pusValue != BP_NOT_DEFINED )
2480 + {
2481 + nRet = BP_SUCCESS;
2482 + }
2483 + else
2484 + {
2485 + nRet = BP_VALUE_NOT_DEFINED;
2486 + }
2487 + }
2488 + else
2489 + {
2490 + *pusValue = BP_NOT_DEFINED;
2491 + nRet = BP_BOARD_ID_NOT_FOUND;
2492 + }
2493 + }
2494 + else
2495 + {
2496 + *pusValue = BP_NOT_DEFINED;
2497 + nRet = BP_BOARD_ID_NOT_SET;
2498 + }
2499 +
2500 + return( nRet );
2501 +} /* BpGetVoipIntrGpio */
2502 +
2503 +/**************************************************************************
2504 + * Name : BpGetPcmciaResetGpio
2505 + *
2506 + * Description: This function returns the GPIO pin assignment for the PCMCIA
2507 + * Reset operation.
2508 + *
2509 + * Parameters : [OUT] pusValue - Address of short word that the PCMCIA reset
2510 + * GPIO pin is returned in.
2511 + *
2512 + * Returns : BP_SUCCESS - Success, value is returned.
2513 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2514 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
2515 + * for the board.
2516 + ***************************************************************************/
2517 +int BpGetPcmciaResetGpio( unsigned short *pusValue )
2518 +{
2519 + int nRet;
2520 +
2521 + if( g_pCurrentBp )
2522 + {
2523 + *pusValue = g_pCurrentBp->usGpioPcmciaReset;
2524 +
2525 + if( g_pCurrentBp->usGpioPcmciaReset != BP_NOT_DEFINED )
2526 + {
2527 + nRet = BP_SUCCESS;
2528 + }
2529 + else
2530 + {
2531 + nRet = BP_VALUE_NOT_DEFINED;
2532 + }
2533 + }
2534 + else
2535 + {
2536 + *pusValue = BP_NOT_DEFINED;
2537 + nRet = BP_BOARD_ID_NOT_SET;
2538 + }
2539 +
2540 + return( nRet );
2541 +} /* BpGetPcmciaResetGpio */
2542 +
2543 +/**************************************************************************
2544 + * Name : BpGetUartRtsCtsGpios
2545 + *
2546 + * Description: This function returns the GPIO pin assignments for RTS and CTS
2547 + * UART signals.
2548 + *
2549 + * Parameters : [OUT] pusRts - Address of short word that the UART RTS GPIO
2550 + * pin is returned in.
2551 + * [OUT] pusCts - Address of short word that the UART CTS GPIO
2552 + * pin is returned in.
2553 + *
2554 + * Returns : BP_SUCCESS - Success, values are returned.
2555 + * BP_BOARD_ID_NOT_SET - Error, board id input string does not
2556 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
2557 + * for the board.
2558 + ***************************************************************************/
2559 +int BpGetRtsCtsUartGpios( unsigned short *pusRts, unsigned short *pusCts )
2560 +{
2561 + int nRet;
2562 +
2563 + if( g_pCurrentBp )
2564 + {
2565 + *pusRts = g_pCurrentBp->usGpioUartRts;
2566 + *pusCts = g_pCurrentBp->usGpioUartCts;
2567 +
2568 + if( g_pCurrentBp->usGpioUartRts != BP_NOT_DEFINED &&
2569 + g_pCurrentBp->usGpioUartCts != BP_NOT_DEFINED )
2570 + {
2571 + nRet = BP_SUCCESS;
2572 + }
2573 + else
2574 + {
2575 + nRet = BP_VALUE_NOT_DEFINED;
2576 + }
2577 + }
2578 + else
2579 + {
2580 + *pusRts = *pusCts = BP_NOT_DEFINED;
2581 + nRet = BP_BOARD_ID_NOT_SET;
2582 + }
2583 +
2584 + return( nRet );
2585 +} /* BpGetUartRtsCtsGpios */
2586 +
2587 +/**************************************************************************
2588 + * Name : BpGetAdslLedGpio
2589 + *
2590 + * Description: This function returns the GPIO pin assignment for the ADSL
2591 + * LED.
2592 + *
2593 + * Parameters : [OUT] pusValue - Address of short word that the ADSL LED
2594 + * GPIO pin is returned in.
2595 + *
2596 + * Returns : BP_SUCCESS - Success, value is returned.
2597 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2598 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
2599 + * for the board.
2600 + ***************************************************************************/
2601 +int BpGetAdslLedGpio( unsigned short *pusValue )
2602 +{
2603 + int nRet;
2604 +
2605 + if( g_pCurrentBp )
2606 + {
2607 + *pusValue = g_pCurrentBp->usGpioLedAdsl;
2608 +
2609 + if( g_pCurrentBp->usGpioLedAdsl != BP_NOT_DEFINED )
2610 + {
2611 + nRet = BP_SUCCESS;
2612 + }
2613 + else
2614 + {
2615 + nRet = BP_VALUE_NOT_DEFINED;
2616 + }
2617 + }
2618 + else
2619 + {
2620 + *pusValue = BP_NOT_DEFINED;
2621 + nRet = BP_BOARD_ID_NOT_SET;
2622 + }
2623 +
2624 + return( nRet );
2625 +} /* BpGetAdslLedGpio */
2626 +
2627 +/**************************************************************************
2628 + * Name : BpGetAdslFailLedGpio
2629 + *
2630 + * Description: This function returns the GPIO pin assignment for the ADSL
2631 + * LED that is used when there is a DSL connection failure.
2632 + *
2633 + * Parameters : [OUT] pusValue - Address of short word that the ADSL LED
2634 + * GPIO pin is returned in.
2635 + *
2636 + * Returns : BP_SUCCESS - Success, value is returned.
2637 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2638 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
2639 + * for the board.
2640 + ***************************************************************************/
2641 +int BpGetAdslFailLedGpio( unsigned short *pusValue )
2642 +{
2643 + int nRet;
2644 +
2645 + if( g_pCurrentBp )
2646 + {
2647 + *pusValue = g_pCurrentBp->usGpioLedAdslFail;
2648 +
2649 + if( g_pCurrentBp->usGpioLedAdslFail != BP_NOT_DEFINED )
2650 + {
2651 + nRet = BP_SUCCESS;
2652 + }
2653 + else
2654 + {
2655 + nRet = BP_VALUE_NOT_DEFINED;
2656 + }
2657 + }
2658 + else
2659 + {
2660 + *pusValue = BP_NOT_DEFINED;
2661 + nRet = BP_BOARD_ID_NOT_SET;
2662 + }
2663 +
2664 + return( nRet );
2665 +} /* BpGetAdslFailLedGpio */
2666 +
2667 +/**************************************************************************
2668 + * Name : BpGetWirelessLedGpio
2669 + *
2670 + * Description: This function returns the GPIO pin assignment for the Wireless
2671 + * LED.
2672 + *
2673 + * Parameters : [OUT] pusValue - Address of short word that the Wireless LED
2674 + * GPIO pin is returned in.
2675 + *
2676 + * Returns : BP_SUCCESS - Success, value is returned.
2677 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2678 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
2679 + * for the board.
2680 + ***************************************************************************/
2681 +int BpGetWirelessLedGpio( unsigned short *pusValue )
2682 +{
2683 + int nRet;
2684 +
2685 + if( g_pCurrentBp )
2686 + {
2687 + *pusValue = g_pCurrentBp->usGpioLedWireless;
2688 +
2689 + if( g_pCurrentBp->usGpioLedWireless != BP_NOT_DEFINED )
2690 + {
2691 + nRet = BP_SUCCESS;
2692 + }
2693 + else
2694 + {
2695 + nRet = BP_VALUE_NOT_DEFINED;
2696 + }
2697 + }
2698 + else
2699 + {
2700 + *pusValue = BP_NOT_DEFINED;
2701 + nRet = BP_BOARD_ID_NOT_SET;
2702 + }
2703 +
2704 + return( nRet );
2705 +} /* BpGetWirelessLedGpio */
2706 +
2707 +/**************************************************************************
2708 + * Name : BpGetWirelessAntInUse
2709 + *
2710 + * Description: This function returns the antennas in use for wireless
2711 + *
2712 + * Parameters : [OUT] pusValue - Address of short word that the Wireless Antenna
2713 + * is in use.
2714 + *
2715 + * Returns : BP_SUCCESS - Success, value is returned.
2716 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2717 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
2718 + * for the board.
2719 + ***************************************************************************/
2720 +int BpGetWirelessAntInUse( unsigned short *pusValue )
2721 +{
2722 + int nRet;
2723 +
2724 + if( g_pCurrentBp )
2725 + {
2726 + *pusValue = g_pCurrentBp->usAntInUseWireless;
2727 +
2728 + if( g_pCurrentBp->usAntInUseWireless != BP_NOT_DEFINED )
2729 + {
2730 + nRet = BP_SUCCESS;
2731 + }
2732 + else
2733 + {
2734 + nRet = BP_VALUE_NOT_DEFINED;
2735 + }
2736 + }
2737 + else
2738 + {
2739 + *pusValue = BP_NOT_DEFINED;
2740 + nRet = BP_BOARD_ID_NOT_SET;
2741 + }
2742 +
2743 + return( nRet );
2744 +} /* BpGetWirelessAntInUse */
2745 +
2746 +/**************************************************************************
2747 + * Name : BpGetWirelessSesBtnGpio
2748 + *
2749 + * Description: This function returns the GPIO pin assignment for the Wireless
2750 + * Ses Button.
2751 + *
2752 + * Parameters : [OUT] pusValue - Address of short word that the Wireless LED
2753 + * GPIO pin is returned in.
2754 + *
2755 + * Returns : BP_SUCCESS - Success, value is returned.
2756 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2757 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
2758 + * for the board.
2759 + ***************************************************************************/
2760 +int BpGetWirelessSesBtnGpio( unsigned short *pusValue )
2761 +{
2762 + int nRet;
2763 +
2764 + if( g_pCurrentBp )
2765 + {
2766 + *pusValue = g_pCurrentBp->usGpioSesBtnWireless;
2767 +
2768 + if( g_pCurrentBp->usGpioSesBtnWireless != BP_NOT_DEFINED )
2769 + {
2770 + nRet = BP_SUCCESS;
2771 + }
2772 + else
2773 + {
2774 + nRet = BP_VALUE_NOT_DEFINED;
2775 + }
2776 + }
2777 + else
2778 + {
2779 + *pusValue = BP_NOT_DEFINED;
2780 + nRet = BP_BOARD_ID_NOT_SET;
2781 + }
2782 +
2783 + return( nRet );
2784 +} /* BpGetWirelessSesBtnGpio */
2785 +
2786 +/**************************************************************************
2787 + * Name : BpGetWirelessSesExtIntr
2788 + *
2789 + * Description: This function returns the external interrupt number for the
2790 + * Wireless Ses Button.
2791 + *
2792 + * Parameters : [OUT] pusValue - Address of short word that the Wireless Ses
2793 + * external interrup is returned in.
2794 + *
2795 + * Returns : BP_SUCCESS - Success, value is returned.
2796 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2797 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
2798 + * for the board.
2799 + ***************************************************************************/
2800 +int BpGetWirelessSesExtIntr( unsigned short *pusValue )
2801 +{
2802 + int nRet;
2803 +
2804 + if( g_pCurrentBp )
2805 + {
2806 + *pusValue = g_pCurrentBp->usExtIntrSesBtnWireless;
2807 +
2808 + if( g_pCurrentBp->usExtIntrSesBtnWireless != BP_NOT_DEFINED )
2809 + {
2810 + nRet = BP_SUCCESS;
2811 + }
2812 + else
2813 + {
2814 + nRet = BP_VALUE_NOT_DEFINED;
2815 + }
2816 + }
2817 + else
2818 + {
2819 + *pusValue = BP_NOT_DEFINED;
2820 + nRet = BP_BOARD_ID_NOT_SET;
2821 + }
2822 +
2823 + return( nRet );
2824 +
2825 +} /* BpGetWirelessSesExtIntr */
2826 +
2827 +/**************************************************************************
2828 + * Name : BpGetWirelessSesLedGpio
2829 + *
2830 + * Description: This function returns the GPIO pin assignment for the Wireless
2831 + * Ses Led.
2832 + *
2833 + * Parameters : [OUT] pusValue - Address of short word that the Wireless Ses
2834 + * Led GPIO pin is returned in.
2835 + *
2836 + * Returns : BP_SUCCESS - Success, value is returned.
2837 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2838 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
2839 + * for the board.
2840 + ***************************************************************************/
2841 +int BpGetWirelessSesLedGpio( unsigned short *pusValue )
2842 +{
2843 + int nRet;
2844 +
2845 + if( g_pCurrentBp )
2846 + {
2847 + *pusValue = g_pCurrentBp->usGpioLedSesWireless;
2848 +
2849 + if( g_pCurrentBp->usGpioLedSesWireless != BP_NOT_DEFINED )
2850 + {
2851 + nRet = BP_SUCCESS;
2852 + }
2853 + else
2854 + {
2855 + nRet = BP_VALUE_NOT_DEFINED;
2856 + }
2857 + }
2858 + else
2859 + {
2860 + *pusValue = BP_NOT_DEFINED;
2861 + nRet = BP_BOARD_ID_NOT_SET;
2862 + }
2863 +
2864 + return( nRet );
2865 +
2866 +} /* BpGetWirelessSesLedGpio */
2867 +
2868 +/**************************************************************************
2869 + * Name : BpGetUsbLedGpio
2870 + *
2871 + * Description: This function returns the GPIO pin assignment for the USB
2872 + * LED.
2873 + *
2874 + * Parameters : [OUT] pusValue - Address of short word that the USB LED
2875 + * GPIO pin is returned in.
2876 + *
2877 + * Returns : BP_SUCCESS - Success, value is returned.
2878 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2879 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
2880 + * for the board.
2881 + ***************************************************************************/
2882 +int BpGetUsbLedGpio( unsigned short *pusValue )
2883 +{
2884 + int nRet;
2885 +
2886 + if( g_pCurrentBp )
2887 + {
2888 + *pusValue = g_pCurrentBp->usGpioLedUsb;
2889 +
2890 + if( g_pCurrentBp->usGpioLedUsb != BP_NOT_DEFINED )
2891 + {
2892 + nRet = BP_SUCCESS;
2893 + }
2894 + else
2895 + {
2896 + nRet = BP_VALUE_NOT_DEFINED;
2897 + }
2898 + }
2899 + else
2900 + {
2901 + *pusValue = BP_NOT_DEFINED;
2902 + nRet = BP_BOARD_ID_NOT_SET;
2903 + }
2904 +
2905 + return( nRet );
2906 +} /* BpGetUsbLedGpio */
2907 +
2908 +/**************************************************************************
2909 + * Name : BpGetHpnaLedGpio
2910 + *
2911 + * Description: This function returns the GPIO pin assignment for the HPNA
2912 + * LED.
2913 + *
2914 + * Parameters : [OUT] pusValue - Address of short word that the HPNA LED
2915 + * GPIO pin is returned in.
2916 + *
2917 + * Returns : BP_SUCCESS - Success, value is returned.
2918 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2919 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
2920 + * for the board.
2921 + ***************************************************************************/
2922 +int BpGetHpnaLedGpio( unsigned short *pusValue )
2923 +{
2924 + int nRet;
2925 +
2926 + if( g_pCurrentBp )
2927 + {
2928 + *pusValue = g_pCurrentBp->usGpioLedHpna;
2929 +
2930 + if( g_pCurrentBp->usGpioLedHpna != BP_NOT_DEFINED )
2931 + {
2932 + nRet = BP_SUCCESS;
2933 + }
2934 + else
2935 + {
2936 + nRet = BP_VALUE_NOT_DEFINED;
2937 + }
2938 + }
2939 + else
2940 + {
2941 + *pusValue = BP_NOT_DEFINED;
2942 + nRet = BP_BOARD_ID_NOT_SET;
2943 + }
2944 +
2945 + return( nRet );
2946 +} /* BpGetHpnaLedGpio */
2947 +
2948 +/**************************************************************************
2949 + * Name : BpGetWanDataLedGpio
2950 + *
2951 + * Description: This function returns the GPIO pin assignment for the WAN Data
2952 + * LED.
2953 + *
2954 + * Parameters : [OUT] pusValue - Address of short word that the WAN Data LED
2955 + * GPIO pin is returned in.
2956 + *
2957 + * Returns : BP_SUCCESS - Success, value is returned.
2958 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2959 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
2960 + * for the board.
2961 + ***************************************************************************/
2962 +int BpGetWanDataLedGpio( unsigned short *pusValue )
2963 +{
2964 + int nRet;
2965 +
2966 + if( g_pCurrentBp )
2967 + {
2968 + *pusValue = g_pCurrentBp->usGpioLedWanData;
2969 +
2970 + if( g_pCurrentBp->usGpioLedWanData != BP_NOT_DEFINED )
2971 + {
2972 + nRet = BP_SUCCESS;
2973 + }
2974 + else
2975 + {
2976 + nRet = BP_VALUE_NOT_DEFINED;
2977 + }
2978 + }
2979 + else
2980 + {
2981 + *pusValue = BP_NOT_DEFINED;
2982 + nRet = BP_BOARD_ID_NOT_SET;
2983 + }
2984 +
2985 + return( nRet );
2986 +} /* BpGetWanDataLedGpio */
2987 +
2988 +/**************************************************************************
2989 + * Name : BpGetPppLedGpio
2990 + *
2991 + * Description: This function returns the GPIO pin assignment for the PPP
2992 + * LED.
2993 + *
2994 + * Parameters : [OUT] pusValue - Address of short word that the PPP LED
2995 + * GPIO pin is returned in.
2996 + *
2997 + * Returns : BP_SUCCESS - Success, value is returned.
2998 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2999 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
3000 + * for the board.
3001 + ***************************************************************************/
3002 +int BpGetPppLedGpio( unsigned short *pusValue )
3003 +{
3004 + int nRet;
3005 +
3006 + if( g_pCurrentBp )
3007 + {
3008 + *pusValue = g_pCurrentBp->usGpioLedPpp;
3009 +
3010 + if( g_pCurrentBp->usGpioLedPpp != BP_NOT_DEFINED )
3011 + {
3012 + nRet = BP_SUCCESS;
3013 + }
3014 + else
3015 + {
3016 + nRet = BP_VALUE_NOT_DEFINED;
3017 + }
3018 + }
3019 + else
3020 + {
3021 + *pusValue = BP_NOT_DEFINED;
3022 + nRet = BP_BOARD_ID_NOT_SET;
3023 + }
3024 +
3025 + return( nRet );
3026 +} /* BpGetPppLedGpio */
3027 +
3028 +/**************************************************************************
3029 + * Name : BpGetPppFailLedGpio
3030 + *
3031 + * Description: This function returns the GPIO pin assignment for the PPP
3032 + * LED that is used when there is a PPP connection failure.
3033 + *
3034 + * Parameters : [OUT] pusValue - Address of short word that the PPP LED
3035 + * GPIO pin is returned in.
3036 + *
3037 + * Returns : BP_SUCCESS - Success, value is returned.
3038 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3039 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
3040 + * for the board.
3041 + ***************************************************************************/
3042 +int BpGetPppFailLedGpio( unsigned short *pusValue )
3043 +{
3044 + int nRet;
3045 +
3046 + if( g_pCurrentBp )
3047 + {
3048 + *pusValue = g_pCurrentBp->usGpioLedPppFail;
3049 +
3050 + if( g_pCurrentBp->usGpioLedPppFail != BP_NOT_DEFINED )
3051 + {
3052 + nRet = BP_SUCCESS;
3053 + }
3054 + else
3055 + {
3056 + nRet = BP_VALUE_NOT_DEFINED;
3057 + }
3058 + }
3059 + else
3060 + {
3061 + *pusValue = BP_NOT_DEFINED;
3062 + nRet = BP_BOARD_ID_NOT_SET;
3063 + }
3064 +
3065 + return( nRet );
3066 +} /* BpGetPppFailLedGpio */
3067 +
3068 +/**************************************************************************
3069 + * Name : BpGetBootloaderPowerOnLedGpio
3070 + *
3071 + * Description: This function returns the GPIO pin assignment for the power
3072 + * on LED that is set by the bootloader.
3073 + *
3074 + * Parameters : [OUT] pusValue - Address of short word that the alarm LED
3075 + * GPIO pin is returned in.
3076 + *
3077 + * Returns : BP_SUCCESS - Success, value is returned.
3078 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3079 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
3080 + * for the board.
3081 + ***************************************************************************/
3082 +int BpGetBootloaderPowerOnLedGpio( unsigned short *pusValue )
3083 +{
3084 + int nRet;
3085 +
3086 + if( g_pCurrentBp )
3087 + {
3088 + *pusValue = g_pCurrentBp->usGpioLedBlPowerOn;
3089 +
3090 + if( g_pCurrentBp->usGpioLedBlPowerOn != BP_NOT_DEFINED )
3091 + {
3092 + nRet = BP_SUCCESS;
3093 + }
3094 + else
3095 + {
3096 + nRet = BP_VALUE_NOT_DEFINED;
3097 + }
3098 + }
3099 + else
3100 + {
3101 + *pusValue = BP_NOT_DEFINED;
3102 + nRet = BP_BOARD_ID_NOT_SET;
3103 + }
3104 +
3105 + return( nRet );
3106 +} /* BpGetBootloaderPowerOn */
3107 +
3108 +/**************************************************************************
3109 + * Name : BpGetBootloaderAlarmLedGpio
3110 + *
3111 + * Description: This function returns the GPIO pin assignment for the alarm
3112 + * LED that is set by the bootloader.
3113 + *
3114 + * Parameters : [OUT] pusValue - Address of short word that the alarm LED
3115 + * GPIO pin is returned in.
3116 + *
3117 + * Returns : BP_SUCCESS - Success, value is returned.
3118 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3119 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
3120 + * for the board.
3121 + ***************************************************************************/
3122 +int BpGetBootloaderAlarmLedGpio( unsigned short *pusValue )
3123 +{
3124 + int nRet;
3125 +
3126 + if( g_pCurrentBp )
3127 + {
3128 + *pusValue = g_pCurrentBp->usGpioLedBlAlarm;
3129 +
3130 + if( g_pCurrentBp->usGpioLedBlAlarm != BP_NOT_DEFINED )
3131 + {
3132 + nRet = BP_SUCCESS;
3133 + }
3134 + else
3135 + {
3136 + nRet = BP_VALUE_NOT_DEFINED;
3137 + }
3138 + }
3139 + else
3140 + {
3141 + *pusValue = BP_NOT_DEFINED;
3142 + nRet = BP_BOARD_ID_NOT_SET;
3143 + }
3144 +
3145 + return( nRet );
3146 +} /* BpGetBootloaderAlarmLedGpio */
3147 +
3148 +/**************************************************************************
3149 + * Name : BpGetBootloaderResetCfgLedGpio
3150 + *
3151 + * Description: This function returns the GPIO pin assignment for the reset
3152 + * configuration LED that is set by the bootloader.
3153 + *
3154 + * Parameters : [OUT] pusValue - Address of short word that the reset
3155 + * configuration LED GPIO pin is returned in.
3156 + *
3157 + * Returns : BP_SUCCESS - Success, value is returned.
3158 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3159 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
3160 + * for the board.
3161 + ***************************************************************************/
3162 +int BpGetBootloaderResetCfgLedGpio( unsigned short *pusValue )
3163 +{
3164 + int nRet;
3165 +
3166 + if( g_pCurrentBp )
3167 + {
3168 + *pusValue = g_pCurrentBp->usGpioLedBlResetCfg;
3169 +
3170 + if( g_pCurrentBp->usGpioLedBlResetCfg != BP_NOT_DEFINED )
3171 + {
3172 + nRet = BP_SUCCESS;
3173 + }
3174 + else
3175 + {
3176 + nRet = BP_VALUE_NOT_DEFINED;
3177 + }
3178 + }
3179 + else
3180 + {
3181 + *pusValue = BP_NOT_DEFINED;
3182 + nRet = BP_BOARD_ID_NOT_SET;
3183 + }
3184 +
3185 + return( nRet );
3186 +} /* BpGetBootloaderResetCfgLedGpio */
3187 +
3188 +/**************************************************************************
3189 + * Name : BpGetBootloaderStopLedGpio
3190 + *
3191 + * Description: This function returns the GPIO pin assignment for the break
3192 + * into bootloader LED that is set by the bootloader.
3193 + *
3194 + * Parameters : [OUT] pusValue - Address of short word that the break into
3195 + * bootloader LED GPIO pin is returned in.
3196 + *
3197 + * Returns : BP_SUCCESS - Success, value is returned.
3198 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3199 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
3200 + * for the board.
3201 + ***************************************************************************/
3202 +int BpGetBootloaderStopLedGpio( unsigned short *pusValue )
3203 +{
3204 + int nRet;
3205 +
3206 + if( g_pCurrentBp )
3207 + {
3208 + *pusValue = g_pCurrentBp->usGpioLedBlStop;
3209 +
3210 + if( g_pCurrentBp->usGpioLedBlStop != BP_NOT_DEFINED )
3211 + {
3212 + nRet = BP_SUCCESS;
3213 + }
3214 + else
3215 + {
3216 + nRet = BP_VALUE_NOT_DEFINED;
3217 + }
3218 + }
3219 + else
3220 + {
3221 + *pusValue = BP_NOT_DEFINED;
3222 + nRet = BP_BOARD_ID_NOT_SET;
3223 + }
3224 +
3225 + return( nRet );
3226 +} /* BpGetBootloaderStopLedGpio */
3227 +
3228 +/**************************************************************************
3229 + * Name : BpGetVoipLedGpio
3230 + *
3231 + * Description: This function returns the GPIO pin assignment for the VOIP
3232 + * LED.
3233 + *
3234 + * Parameters : [OUT] pusValue - Address of short word that the VOIP LED
3235 + * GPIO pin is returned in.
3236 + *
3237 + * Returns : BP_SUCCESS - Success, value is returned.
3238 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3239 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
3240 + * for the board.
3241 + *
3242 + * Note : The VoIP structure would allow for having one LED per DSP
3243 + * however, the board initialization function assumes only one
3244 + * LED per functionality (ie one LED for VoIP). Therefore in
3245 + * order to keep this tidy and simple we do not make usage of the
3246 + * one-LED-per-DSP function. Instead, we assume that the LED for
3247 + * VoIP is unique and associated with DSP 0 (always present on
3248 + * any VoIP platform). If changing this to a LED-per-DSP function
3249 + * then one need to update the board initialization driver in
3250 + * bcmdrivers\opensource\char\board\bcm963xx\impl1
3251 + ***************************************************************************/
3252 +int BpGetVoipLedGpio( unsigned short *pusValue )
3253 +{
3254 + int nRet;
3255 +
3256 + if( g_pCurrentBp )
3257 + {
3258 + VOIP_DSP_INFO *pDspInfo = BpGetVoipDspConfig( 0 );
3259 +
3260 + if( pDspInfo )
3261 + {
3262 + *pusValue = pDspInfo->usGpioLedVoip;
3263 +
3264 + if( *pusValue != BP_NOT_DEFINED )
3265 + {
3266 + nRet = BP_SUCCESS;
3267 + }
3268 + else
3269 + {
3270 + nRet = BP_VALUE_NOT_DEFINED;
3271 + }
3272 + }
3273 + else
3274 + {
3275 + *pusValue = BP_NOT_DEFINED;
3276 + nRet = BP_BOARD_ID_NOT_FOUND;
3277 + }
3278 + }
3279 + else
3280 + {
3281 + *pusValue = BP_NOT_DEFINED;
3282 + nRet = BP_BOARD_ID_NOT_SET;
3283 + }
3284 +
3285 + return( nRet );
3286 +} /* BpGetVoipLedGpio */
3287 +
3288 +/**************************************************************************
3289 + * Name : BpGetWirelessExtIntr
3290 + *
3291 + * Description: This function returns the Wireless external interrupt number.
3292 + *
3293 + * Parameters : [OUT] pulValue - Address of short word that the wireless
3294 + * external interrupt number is returned in.
3295 + *
3296 + * Returns : BP_SUCCESS - Success, value is returned.
3297 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3298 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
3299 + * for the board.
3300 + ***************************************************************************/
3301 +int BpGetWirelessExtIntr( unsigned long *pulValue )
3302 +{
3303 + int nRet;
3304 +
3305 + if( g_pCurrentBp )
3306 + {
3307 + *pulValue = g_pCurrentBp->usExtIntrWireless;
3308 +
3309 + if( g_pCurrentBp->usExtIntrWireless != BP_NOT_DEFINED )
3310 + {
3311 + nRet = BP_SUCCESS;
3312 + }
3313 + else
3314 + {
3315 + nRet = BP_VALUE_NOT_DEFINED;
3316 + }
3317 + }
3318 + else
3319 + {
3320 + *pulValue = BP_NOT_DEFINED;
3321 + nRet = BP_BOARD_ID_NOT_SET;
3322 + }
3323 +
3324 + return( nRet );
3325 +} /* BpGetWirelessExtIntr */
3326 +
3327 +/**************************************************************************
3328 + * Name : BpGetAdslDyingGaspExtIntr
3329 + *
3330 + * Description: This function returns the ADSL Dying Gasp external interrupt
3331 + * number.
3332 + *
3333 + * Parameters : [OUT] pulValue - Address of short word that the ADSL Dying Gasp
3334 + * external interrupt number is returned in.
3335 + *
3336 + * Returns : BP_SUCCESS - Success, value is returned.
3337 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3338 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
3339 + * for the board.
3340 + ***************************************************************************/
3341 +int BpGetAdslDyingGaspExtIntr( unsigned long *pulValue )
3342 +{
3343 + int nRet;
3344 +
3345 + if( g_pCurrentBp )
3346 + {
3347 + *pulValue = g_pCurrentBp->usExtIntrAdslDyingGasp;
3348 +
3349 + if( g_pCurrentBp->usExtIntrAdslDyingGasp != BP_NOT_DEFINED )
3350 + {
3351 + nRet = BP_SUCCESS;
3352 + }
3353 + else
3354 + {
3355 + nRet = BP_VALUE_NOT_DEFINED;
3356 + }
3357 + }
3358 + else
3359 + {
3360 + *pulValue = BP_NOT_DEFINED;
3361 + nRet = BP_BOARD_ID_NOT_SET;
3362 + }
3363 +
3364 + return( nRet );
3365 +} /* BpGetAdslDyingGaspExtIntr */
3366 +
3367 +/**************************************************************************
3368 + * Name : BpGetVoipExtIntr
3369 + *
3370 + * Description: This function returns the VOIP external interrupt number.
3371 + *
3372 + * Parameters : [OUT] pulValue - Address of short word that the VOIP
3373 + * external interrupt number is returned in.
3374 + * [IN] dspNum - Address of the DSP to query.
3375 + *
3376 + * Returns : BP_SUCCESS - Success, value is returned.
3377 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3378 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
3379 + * for the board.
3380 + ***************************************************************************/
3381 +int BpGetVoipExtIntr( unsigned char dspNum, unsigned long *pulValue )
3382 +{
3383 + int nRet;
3384 +
3385 + if( g_pCurrentBp )
3386 + {
3387 + VOIP_DSP_INFO *pDspInfo = BpGetVoipDspConfig( dspNum );
3388 +
3389 + if( pDspInfo )
3390 + {
3391 + *pulValue = pDspInfo->usExtIntrVoip;
3392 +
3393 + if( *pulValue != BP_NOT_DEFINED )
3394 + {
3395 + nRet = BP_SUCCESS;
3396 + }
3397 + else
3398 + {
3399 + nRet = BP_VALUE_NOT_DEFINED;
3400 + }
3401 + }
3402 + else
3403 + {
3404 + *pulValue = BP_NOT_DEFINED;
3405 + nRet = BP_BOARD_ID_NOT_FOUND;
3406 + }
3407 + }
3408 + else
3409 + {
3410 + *pulValue = BP_NOT_DEFINED;
3411 + nRet = BP_BOARD_ID_NOT_SET;
3412 + }
3413 +
3414 + return( nRet );
3415 +} /* BpGetVoipExtIntr */
3416 +
3417 +/**************************************************************************
3418 + * Name : BpGetHpnaExtIntr
3419 + *
3420 + * Description: This function returns the HPNA external interrupt number.
3421 + *
3422 + * Parameters : [OUT] pulValue - Address of short word that the HPNA
3423 + * external interrupt number is returned in.
3424 + *
3425 + * Returns : BP_SUCCESS - Success, value is returned.
3426 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3427 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
3428 + * for the board.
3429 + ***************************************************************************/
3430 +int BpGetHpnaExtIntr( unsigned long *pulValue )
3431 +{
3432 + int nRet;
3433 +
3434 + if( g_pCurrentBp )
3435 + {
3436 + *pulValue = g_pCurrentBp->usExtIntrHpna;
3437 +
3438 + if( g_pCurrentBp->usExtIntrHpna != BP_NOT_DEFINED )
3439 + {
3440 + nRet = BP_SUCCESS;
3441 + }
3442 + else
3443 + {
3444 + nRet = BP_VALUE_NOT_DEFINED;
3445 + }
3446 + }
3447 + else
3448 + {
3449 + *pulValue = BP_NOT_DEFINED;
3450 + nRet = BP_BOARD_ID_NOT_SET;
3451 + }
3452 +
3453 + return( nRet );
3454 +} /* BpGetHpnaExtIntr */
3455 +
3456 +/**************************************************************************
3457 + * Name : BpGetHpnaChipSelect
3458 + *
3459 + * Description: This function returns the HPNA chip select number.
3460 + *
3461 + * Parameters : [OUT] pulValue - Address of short word that the HPNA
3462 + * chip select number is returned in.
3463 + *
3464 + * Returns : BP_SUCCESS - Success, value is returned.
3465 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3466 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
3467 + * for the board.
3468 + ***************************************************************************/
3469 +int BpGetHpnaChipSelect( unsigned long *pulValue )
3470 +{
3471 + int nRet;
3472 +
3473 + if( g_pCurrentBp )
3474 + {
3475 + *pulValue = g_pCurrentBp->usCsHpna;
3476 +
3477 + if( g_pCurrentBp->usCsHpna != BP_NOT_DEFINED )
3478 + {
3479 + nRet = BP_SUCCESS;
3480 + }
3481 + else
3482 + {
3483 + nRet = BP_VALUE_NOT_DEFINED;
3484 + }
3485 + }
3486 + else
3487 + {
3488 + *pulValue = BP_NOT_DEFINED;
3489 + nRet = BP_BOARD_ID_NOT_SET;
3490 + }
3491 +
3492 + return( nRet );
3493 +} /* BpGetHpnaChipSelect */
3494 +
3495 +/**************************************************************************
3496 + * Name : BpGetVoipChipSelect
3497 + *
3498 + * Description: This function returns the VOIP chip select number.
3499 + *
3500 + * Parameters : [OUT] pulValue - Address of short word that the VOIP
3501 + * chip select number is returned in.
3502 + * [IN] dspNum - Address of the DSP to query.
3503 + *
3504 + * Returns : BP_SUCCESS - Success, value is returned.
3505 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3506 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
3507 + * for the board.
3508 + ***************************************************************************/
3509 +int BpGetVoipChipSelect( unsigned char dspNum, unsigned long *pulValue )
3510 +{
3511 + int nRet;
3512 +
3513 + if( g_pCurrentBp )
3514 + {
3515 + VOIP_DSP_INFO *pDspInfo = BpGetVoipDspConfig( dspNum );
3516 +
3517 + if( pDspInfo )
3518 + {
3519 + *pulValue = pDspInfo->usCsVoip;
3520 +
3521 + if( *pulValue != BP_NOT_DEFINED )
3522 + {
3523 + nRet = BP_SUCCESS;
3524 + }
3525 + else
3526 + {
3527 + nRet = BP_VALUE_NOT_DEFINED;
3528 + }
3529 + }
3530 + else
3531 + {
3532 + *pulValue = BP_NOT_DEFINED;
3533 + nRet = BP_BOARD_ID_NOT_FOUND;
3534 + }
3535 + }
3536 + else
3537 + {
3538 + *pulValue = BP_NOT_DEFINED;
3539 + nRet = BP_BOARD_ID_NOT_SET;
3540 + }
3541 +
3542 + return( nRet );
3543 +} /* BpGetVoipChipSelect */
3544 +
3545 diff -urN linux.old/arch/mips/bcm963xx/boardparms.h linux.dev/arch/mips/bcm963xx/boardparms.h
3546 --- linux.old/arch/mips/bcm963xx/boardparms.h 1970-01-01 01:00:00.000000000 +0100
3547 +++ linux.dev/arch/mips/bcm963xx/boardparms.h 2006-08-25 00:39:38.000000000 +0200
3548 @@ -0,0 +1,758 @@
3549 +/*
3550 +<:copyright-gpl
3551 +
3552 + Copyright 2003 Broadcom Corp. All Rights Reserved.
3553 +
3554 + This program is free software; you can distribute it and/or modify it
3555 + under the terms of the GNU General Public License (Version 2) as
3556 + published by the Free Software Foundation.
3557 +
3558 + This program is distributed in the hope it will be useful, but WITHOUT
3559 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
3560 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
3561 + for more details.
3562 +
3563 + You should have received a copy of the GNU General Public License along
3564 + with this program; if not, write to the Free Software Foundation, Inc.,
3565 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
3566 +
3567 +:>
3568 +*/
3569 +/**************************************************************************
3570 + * File Name : boardparms.h
3571 + *
3572 + * Description: This file contains definitions and function prototypes for
3573 + * the BCM63xx board parameter access functions.
3574 + *
3575 + * Updates : 07/14/2003 Created.
3576 + ***************************************************************************/
3577 +
3578 +#if !defined(_BOARDPARMS_H)
3579 +#define _BOARDPARMS_H
3580 +
3581 +/* Return codes. */
3582 +#define BP_SUCCESS 0
3583 +#define BP_BOARD_ID_NOT_FOUND 1
3584 +#define BP_VALUE_NOT_DEFINED 2
3585 +#define BP_BOARD_ID_NOT_SET 3
3586 +
3587 +/* Values for BpGetSdramSize. */
3588 +#define BP_MEMORY_8MB_1_CHIP 0
3589 +#define BP_MEMORY_16MB_1_CHIP 1
3590 +#define BP_MEMORY_32MB_1_CHIP 2
3591 +#define BP_MEMORY_64MB_2_CHIP 3
3592 +#define BP_MEMORY_32MB_2_CHIP 4
3593 +#define BP_MEMORY_16MB_2_CHIP 5
3594 +
3595 +/* Values for EthernetMacInfo PhyType. */
3596 +#define BP_ENET_NO_PHY 0
3597 +#define BP_ENET_INTERNAL_PHY 1
3598 +#define BP_ENET_EXTERNAL_PHY 2
3599 +#define BP_ENET_EXTERNAL_SWITCH 3
3600 +
3601 +/* Values for EthernetMacInfo Configuration type. */
3602 +#define BP_ENET_CONFIG_MDIO 0 /* Internal PHY, External PHY, Switch+(no GPIO, no SPI, no MDIO Pseudo phy */
3603 +#define BP_ENET_CONFIG_GPIO 1 /* Bcm96345GW board + Bcm5325M/E */
3604 +#define BP_ENET_CONFIG_MDIO_PSEUDO_PHY 2 /* Bcm96348GW board + Bcm5325E */
3605 +#define BP_ENET_CONFIG_SPI_SSB_0 3 /* Bcm96348GW board + Bcm5325M/E */
3606 +#define BP_ENET_CONFIG_SPI_SSB_1 4 /* Bcm96348GW board + Bcm5325M/E */
3607 +#define BP_ENET_CONFIG_SPI_SSB_2 5 /* Bcm96348GW board + Bcm5325M/E */
3608 +#define BP_ENET_CONFIG_SPI_SSB_3 6 /* Bcm96348GW board + Bcm5325M/E */
3609 +
3610 +/* Values for EthernetMacInfo Reverse MII. */
3611 +#define BP_ENET_NO_REVERSE_MII 0
3612 +#define BP_ENET_REVERSE_MII 1
3613 +
3614 +/* Values for VoIPDSPInfo DSPType. */
3615 +#define BP_VOIP_NO_DSP 0
3616 +#define BP_VOIP_DSP 1
3617 +
3618 +
3619 +/* Values for GPIO pin assignments (AH = Active High, AL = Active Low). */
3620 +#define BP_ACTIVE_MASK 0x8000
3621 +#define BP_ACTIVE_HIGH 0x0000
3622 +#define BP_ACTIVE_LOW 0x8000
3623 +#define BP_GPIO_0_AH (0 | BP_ACTIVE_HIGH)
3624 +#define BP_GPIO_0_AL (0 | BP_ACTIVE_LOW)
3625 +#define BP_GPIO_1_AH (1 | BP_ACTIVE_HIGH)
3626 +#define BP_GPIO_1_AL (1 | BP_ACTIVE_LOW)
3627 +#define BP_GPIO_2_AH (2 | BP_ACTIVE_HIGH)
3628 +#define BP_GPIO_2_AL (2 | BP_ACTIVE_LOW)
3629 +#define BP_GPIO_3_AH (3 | BP_ACTIVE_HIGH)
3630 +#define BP_GPIO_3_AL (3 | BP_ACTIVE_LOW)
3631 +#define BP_GPIO_4_AH (4 | BP_ACTIVE_HIGH)
3632 +#define BP_GPIO_4_AL (4 | BP_ACTIVE_LOW)
3633 +#define BP_GPIO_5_AH (5 | BP_ACTIVE_HIGH)
3634 +#define BP_GPIO_5_AL (5 | BP_ACTIVE_LOW)
3635 +#define BP_GPIO_6_AH (6 | BP_ACTIVE_HIGH)
3636 +#define BP_GPIO_6_AL (6 | BP_ACTIVE_LOW)
3637 +#define BP_GPIO_7_AH (7 | BP_ACTIVE_HIGH)
3638 +#define BP_GPIO_7_AL (7 | BP_ACTIVE_LOW)
3639 +#define BP_GPIO_8_AH (8 | BP_ACTIVE_HIGH)
3640 +#define BP_GPIO_8_AL (8 | BP_ACTIVE_LOW)
3641 +#define BP_GPIO_9_AH (9 | BP_ACTIVE_HIGH)
3642 +#define BP_GPIO_9_AL (9 | BP_ACTIVE_LOW)
3643 +#define BP_GPIO_10_AH (10 | BP_ACTIVE_HIGH)
3644 +#define BP_GPIO_10_AL (10 | BP_ACTIVE_LOW)
3645 +#define BP_GPIO_11_AH (11 | BP_ACTIVE_HIGH)
3646 +#define BP_GPIO_11_AL (11 | BP_ACTIVE_LOW)
3647 +#define BP_GPIO_12_AH (12 | BP_ACTIVE_HIGH)
3648 +#define BP_GPIO_12_AL (12 | BP_ACTIVE_LOW)
3649 +#define BP_GPIO_13_AH (13 | BP_ACTIVE_HIGH)
3650 +#define BP_GPIO_13_AL (13 | BP_ACTIVE_LOW)
3651 +#define BP_GPIO_14_AH (14 | BP_ACTIVE_HIGH)
3652 +#define BP_GPIO_14_AL (14 | BP_ACTIVE_LOW)
3653 +#define BP_GPIO_15_AH (15 | BP_ACTIVE_HIGH)
3654 +#define BP_GPIO_15_AL (15 | BP_ACTIVE_LOW)
3655 +#define BP_GPIO_16_AH (16 | BP_ACTIVE_HIGH)
3656 +#define BP_GPIO_16_AL (16 | BP_ACTIVE_LOW)
3657 +#define BP_GPIO_17_AH (17 | BP_ACTIVE_HIGH)
3658 +#define BP_GPIO_17_AL (17 | BP_ACTIVE_LOW)
3659 +#define BP_GPIO_18_AH (18 | BP_ACTIVE_HIGH)
3660 +#define BP_GPIO_18_AL (18 | BP_ACTIVE_LOW)
3661 +#define BP_GPIO_19_AH (19 | BP_ACTIVE_HIGH)
3662 +#define BP_GPIO_19_AL (19 | BP_ACTIVE_LOW)
3663 +#define BP_GPIO_20_AH (20 | BP_ACTIVE_HIGH)
3664 +#define BP_GPIO_20_AL (20 | BP_ACTIVE_LOW)
3665 +#define BP_GPIO_21_AH (21 | BP_ACTIVE_HIGH)
3666 +#define BP_GPIO_21_AL (21 | BP_ACTIVE_LOW)
3667 +#define BP_GPIO_22_AH (22 | BP_ACTIVE_HIGH)
3668 +#define BP_GPIO_22_AL (22 | BP_ACTIVE_LOW)
3669 +#define BP_GPIO_23_AH (23 | BP_ACTIVE_HIGH)
3670 +#define BP_GPIO_23_AL (23 | BP_ACTIVE_LOW)
3671 +#define BP_GPIO_24_AH (24 | BP_ACTIVE_HIGH)
3672 +#define BP_GPIO_24_AL (24 | BP_ACTIVE_LOW)
3673 +#define BP_GPIO_25_AH (25 | BP_ACTIVE_HIGH)
3674 +#define BP_GPIO_25_AL (25 | BP_ACTIVE_LOW)
3675 +#define BP_GPIO_26_AH (26 | BP_ACTIVE_HIGH)
3676 +#define BP_GPIO_26_AL (26 | BP_ACTIVE_LOW)
3677 +#define BP_GPIO_27_AH (27 | BP_ACTIVE_HIGH)
3678 +#define BP_GPIO_27_AL (27 | BP_ACTIVE_LOW)
3679 +#define BP_GPIO_28_AH (28 | BP_ACTIVE_HIGH)
3680 +#define BP_GPIO_28_AL (28 | BP_ACTIVE_LOW)
3681 +#define BP_GPIO_29_AH (29 | BP_ACTIVE_HIGH)
3682 +#define BP_GPIO_29_AL (29 | BP_ACTIVE_LOW)
3683 +#define BP_GPIO_30_AH (30 | BP_ACTIVE_HIGH)
3684 +#define BP_GPIO_30_AL (30 | BP_ACTIVE_LOW)
3685 +#define BP_GPIO_31_AH (31 | BP_ACTIVE_HIGH)
3686 +#define BP_GPIO_31_AL (31 | BP_ACTIVE_LOW)
3687 +#define BP_GPIO_32_AH (32 | BP_ACTIVE_HIGH)
3688 +#define BP_GPIO_32_AL (32 | BP_ACTIVE_LOW)
3689 +#define BP_GPIO_33_AH (33 | BP_ACTIVE_HIGH)
3690 +#define BP_GPIO_33_AL (33 | BP_ACTIVE_LOW)
3691 +#define BP_GPIO_34_AH (34 | BP_ACTIVE_HIGH)
3692 +#define BP_GPIO_34_AL (34 | BP_ACTIVE_LOW)
3693 +#define BP_GPIO_35_AH (35 | BP_ACTIVE_HIGH)
3694 +#define BP_GPIO_35_AL (35 | BP_ACTIVE_LOW)
3695 +#define BP_GPIO_36_AH (36 | BP_ACTIVE_HIGH)
3696 +#define BP_GPIO_36_AL (36 | BP_ACTIVE_LOW)
3697 +
3698 +/* Values for external interrupt assignments. */
3699 +#define BP_EXT_INTR_0 0
3700 +#define BP_EXT_INTR_1 1
3701 +#define BP_EXT_INTR_2 2
3702 +#define BP_EXT_INTR_3 3
3703 +
3704 +/* Values for chip select assignments. */
3705 +#define BP_CS_0 0
3706 +#define BP_CS_1 1
3707 +#define BP_CS_2 2
3708 +#define BP_CS_3 3
3709 +
3710 +/* Value for GPIO and external interrupt fields that are not used. */
3711 +#define BP_NOT_DEFINED 0xffff
3712 +#define BP_HW_DEFINED 0xfff0
3713 +#define BP_UNEQUIPPED 0xfff1
3714 +
3715 +/* Maximum size of the board id string. */
3716 +#define BP_BOARD_ID_LEN 16
3717 +
3718 +/* Maximum number of Ethernet MACs. */
3719 +#define BP_MAX_ENET_MACS 2
3720 +
3721 +/* Maximum number of VoIP DSPs. */
3722 +#define BP_MAX_VOIP_DSP 2
3723 +
3724 +/* Wireless Antenna Settings. */
3725 +#define BP_WLAN_ANT_MAIN 0
3726 +#define BP_WLAN_ANT_AUX 1
3727 +#define BP_WLAN_ANT_BOTH 3
3728 +
3729 +#if !defined(__ASSEMBLER__)
3730 +
3731 +/* Information about an Ethernet MAC. If ucPhyType is BP_ENET_NO_PHY,
3732 + * then the other fields are not valid.
3733 + */
3734 +typedef struct EthernetMacInfo
3735 +{
3736 + unsigned char ucPhyType; /* BP_ENET_xxx */
3737 + unsigned char ucPhyAddress; /* 0 to 31 */
3738 + unsigned short usGpioPhySpiSck; /* GPIO pin or not defined */
3739 + unsigned short usGpioPhySpiSs; /* GPIO pin or not defined */
3740 + unsigned short usGpioPhySpiMosi; /* GPIO pin or not defined */
3741 + unsigned short usGpioPhySpiMiso; /* GPIO pin or not defined */
3742 + unsigned short usGpioPhyReset; /* GPIO pin or not defined (96348LV) */
3743 + unsigned short numSwitchPorts; /* Number of PHY ports */
3744 + unsigned short usConfigType; /* Configuration type */
3745 + unsigned short usReverseMii; /* Reverse MII */
3746 +} ETHERNET_MAC_INFO, *PETHERNET_MAC_INFO;
3747 +
3748 +
3749 +/* Information about VoIP DSPs. If ucDspType is BP_VOIP_NO_DSP,
3750 + * then the other fields are not valid.
3751 + */
3752 +typedef struct VoIPDspInfo
3753 +{
3754 + unsigned char ucDspType;
3755 + unsigned char ucDspAddress;
3756 + unsigned short usExtIntrVoip;
3757 + unsigned short usGpioVoipReset;
3758 + unsigned short usGpioVoipIntr;
3759 + unsigned short usGpioLedVoip;
3760 + unsigned short usCsVoip;
3761 +
3762 +} VOIP_DSP_INFO;
3763 +
3764 +
3765 +/**************************************************************************
3766 + * Name : BpSetBoardId
3767 + *
3768 + * Description: This function find the BOARD_PARAMETERS structure for the
3769 + * specified board id string and assigns it to a global, static
3770 + * variable.
3771 + *
3772 + * Parameters : [IN] pszBoardId - Board id string that is saved into NVRAM.
3773 + *
3774 + * Returns : BP_SUCCESS - Success, value is returned.
3775 + * BP_BOARD_ID_NOT_FOUND - Error, board id input string does not
3776 + * have a board parameters configuration record.
3777 + ***************************************************************************/
3778 +int BpSetBoardId( char *pszBoardId );
3779 +
3780 +/**************************************************************************
3781 + * Name : BpGetBoardIds
3782 + *
3783 + * Description: This function returns all of the supported board id strings.
3784 + *
3785 + * Parameters : [OUT] pszBoardIds - Address of a buffer that the board id
3786 + * strings are returned in. Each id starts at BP_BOARD_ID_LEN
3787 + * boundary.
3788 + * [IN] nBoardIdsSize - Number of BP_BOARD_ID_LEN elements that
3789 + * were allocated in pszBoardIds.
3790 + *
3791 + * Returns : Number of board id strings returned.
3792 + ***************************************************************************/
3793 +int BpGetBoardIds( char *pszBoardIds, int nBoardIdsSize );
3794 +
3795 +/**************************************************************************
3796 + * Name : BpGetEthernetMacInfo
3797 + *
3798 + * Description: This function returns all of the supported board id strings.
3799 + *
3800 + * Parameters : [OUT] pEnetInfos - Address of an array of ETHERNET_MAC_INFO
3801 + * buffers.
3802 + * [IN] nNumEnetInfos - Number of ETHERNET_MAC_INFO elements that
3803 + * are pointed to by pEnetInfos.
3804 + *
3805 + * Returns : BP_SUCCESS - Success, value is returned.
3806 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3807 + ***************************************************************************/
3808 +int BpGetEthernetMacInfo( PETHERNET_MAC_INFO pEnetInfos, int nNumEnetInfos );
3809 +
3810 +/**************************************************************************
3811 + * Name : BpGetSdramSize
3812 + *
3813 + * Description: This function returns a constant that describees the board's
3814 + * SDRAM type and size.
3815 + *
3816 + * Parameters : [OUT] pulSdramSize - Address of short word that the SDRAM size
3817 + * is returned in.
3818 + *
3819 + * Returns : BP_SUCCESS - Success, value is returned.
3820 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3821 + ***************************************************************************/
3822 +int BpGetSdramSize( unsigned long *pulSdramSize );
3823 +
3824 +/**************************************************************************
3825 + * Name : BpGetPsiSize
3826 + *
3827 + * Description: This function returns the persistent storage size in K bytes.
3828 + *
3829 + * Parameters : [OUT] pulPsiSize - Address of short word that the persistent
3830 + * storage size is returned in.
3831 + *
3832 + * Returns : BP_SUCCESS - Success, value is returned.
3833 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3834 + ***************************************************************************/
3835 +int BpGetPsiSize( unsigned long *pulPsiSize );
3836 +
3837 +/**************************************************************************
3838 + * Name : BpGetRj11InnerOuterPairGpios
3839 + *
3840 + * Description: This function returns the GPIO pin assignments for changing
3841 + * between the RJ11 inner pair and RJ11 outer pair.
3842 + *
3843 + * Parameters : [OUT] pusInner - Address of short word that the RJ11 inner pair
3844 + * GPIO pin is returned in.
3845 + * [OUT] pusOuter - Address of short word that the RJ11 outer pair
3846 + * GPIO pin is returned in.
3847 + *
3848 + * Returns : BP_SUCCESS - Success, values are returned.
3849 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3850 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
3851 + * for the board.
3852 + ***************************************************************************/
3853 +int BpGetRj11InnerOuterPairGpios( unsigned short *pusInner,
3854 + unsigned short *pusOuter );
3855 +
3856 +/**************************************************************************
3857 + * Name : BpGetPressAndHoldResetGpio
3858 + *
3859 + * Description: This function returns the GPIO pin assignment for the press
3860 + * and hold reset button.
3861 + *
3862 + * Parameters : [OUT] pusValue - Address of short word that the press and hold
3863 + * reset button GPIO pin is returned in.
3864 + *
3865 + * Returns : BP_SUCCESS - Success, value is returned.
3866 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3867 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
3868 + * for the board.
3869 + ***************************************************************************/
3870 +int BpGetPressAndHoldResetGpio( unsigned short *pusValue );
3871 +
3872 +/**************************************************************************
3873 + * Name : BpGetVoipResetGpio
3874 + *
3875 + * Description: This function returns the GPIO pin assignment for the VOIP
3876 + * Reset operation.
3877 + *
3878 + * Parameters : [OUT] pusValue - Address of short word that the VOIP reset
3879 + * GPIO pin is returned in.
3880 + * [IN] dspNum - Address of the DSP to query.
3881 + *
3882 + * Returns : BP_SUCCESS - Success, value is returned.
3883 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3884 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
3885 + * for the board.
3886 + ***************************************************************************/
3887 +int BpGetVoipResetGpio( unsigned char dspNum, unsigned short *pusValue );
3888 +
3889 +/**************************************************************************
3890 + * Name : BpGetVoipIntrGpio
3891 + *
3892 + * Description: This function returns the GPIO pin assignment for VoIP interrupt.
3893 + *
3894 + * Parameters : [OUT] pusValue - Address of short word that the VOIP interrupt
3895 + * GPIO pin is returned in.
3896 + * [IN] dspNum - Address of the DSP to query.
3897 + *
3898 + * Returns : BP_SUCCESS - Success, value is returned.
3899 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3900 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
3901 + * for the board.
3902 + ***************************************************************************/
3903 +int BpGetVoipIntrGpio( unsigned char dspNum, unsigned short *pusValue );
3904 +
3905 +/**************************************************************************
3906 + * Name : BpGetPcmciaResetGpio
3907 + *
3908 + * Description: This function returns the GPIO pin assignment for the PCMCIA
3909 + * Reset operation.
3910 + *
3911 + * Parameters : [OUT] pusValue - Address of short word that the PCMCIA reset
3912 + * GPIO pin is returned in.
3913 + *
3914 + * Returns : BP_SUCCESS - Success, value is returned.
3915 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3916 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
3917 + * for the board.
3918 + ***************************************************************************/
3919 +int BpGetPcmciaResetGpio( unsigned short *pusValue );
3920 +
3921 +/**************************************************************************
3922 + * Name : BpGetUartRtsCtsGpios
3923 + *
3924 + * Description: This function returns the GPIO pin assignments for RTS and CTS
3925 + * UART signals.
3926 + *
3927 + * Parameters : [OUT] pusRts - Address of short word that the UART RTS GPIO
3928 + * pin is returned in.
3929 + * [OUT] pusCts - Address of short word that the UART CTS GPIO
3930 + * pin is returned in.
3931 + *
3932 + * Returns : BP_SUCCESS - Success, values are returned.
3933 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3934 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
3935 + * for the board.
3936 + ***************************************************************************/
3937 +int BpGetRtsCtsUartGpios( unsigned short *pusRts, unsigned short *pusCts );
3938 +
3939 +/**************************************************************************
3940 + * Name : BpGetAdslLedGpio
3941 + *
3942 + * Description: This function returns the GPIO pin assignment for the ADSL
3943 + * LED.
3944 + *
3945 + * Parameters : [OUT] pusValue - Address of short word that the ADSL LED
3946 + * GPIO pin is returned in.
3947 + *
3948 + * Returns : BP_SUCCESS - Success, value is returned.
3949 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3950 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
3951 + * for the board.
3952 + ***************************************************************************/
3953 +int BpGetAdslLedGpio( unsigned short *pusValue );
3954 +
3955 +/**************************************************************************
3956 + * Name : BpGetAdslFailLedGpio
3957 + *
3958 + * Description: This function returns the GPIO pin assignment for the ADSL
3959 + * LED that is used when there is a DSL connection failure.
3960 + *
3961 + * Parameters : [OUT] pusValue - Address of short word that the ADSL LED
3962 + * GPIO pin is returned in.
3963 + *
3964 + * Returns : BP_SUCCESS - Success, value is returned.
3965 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3966 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
3967 + * for the board.
3968 + ***************************************************************************/
3969 +int BpGetAdslFailLedGpio( unsigned short *pusValue );
3970 +
3971 +/**************************************************************************
3972 + * Name : BpGetWirelessLedGpio
3973 + *
3974 + * Description: This function returns the GPIO pin assignment for the Wireless
3975 + * LED.
3976 + *
3977 + * Parameters : [OUT] pusValue - Address of short word that the Wireless LED
3978 + * GPIO pin is returned in.
3979 + *
3980 + * Returns : BP_SUCCESS - Success, value is returned.
3981 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3982 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
3983 + * for the board.
3984 + ***************************************************************************/
3985 +int BpGetWirelessLedGpio( unsigned short *pusValue );
3986 +
3987 +/**************************************************************************
3988 + * Name : BpGetWirelessAntInUse
3989 + *
3990 + * Description: This function returns the antennas in use for wireless
3991 + *
3992 + * Parameters : [OUT] pusValue - Address of short word that the Wireless Antenna
3993 + * is in use.
3994 + *
3995 + * Returns : BP_SUCCESS - Success, value is returned.
3996 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3997 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
3998 + * for the board.
3999 + ***************************************************************************/
4000 +int BpGetWirelessAntInUse( unsigned short *pusValue );
4001 +
4002 +/**************************************************************************
4003 + * Name : BpGetWirelessSesBtnGpio
4004 + *
4005 + * Description: This function returns the GPIO pin assignment for the Wireless
4006 + * Ses Button.
4007 + *
4008 + * Parameters : [OUT] pusValue - Address of short word that the Wireless Ses
4009 + * Button GPIO pin is returned in.
4010 + *
4011 + * Returns : BP_SUCCESS - Success, value is returned.
4012 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4013 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
4014 + * for the board.
4015 + ***************************************************************************/
4016 +int BpGetWirelessSesBtnGpio( unsigned short *pusValue );
4017 +
4018 +/**************************************************************************
4019 + * Name : BpGetWirelessSesExtIntr
4020 + *
4021 + * Description: This function returns the external interrupt number for the
4022 + * Wireless Ses Button.
4023 + *
4024 + * Parameters : [OUT] pusValue - Address of short word that the Wireless Ses
4025 + * external interrup is returned in.
4026 + *
4027 + * Returns : BP_SUCCESS - Success, value is returned.
4028 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4029 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
4030 + * for the board.
4031 + ***************************************************************************/
4032 +int BpGetWirelessSesExtIntr( unsigned short *pusValue );
4033 +
4034 +/**************************************************************************
4035 + * Name : BpGetWirelessSesLedGpio
4036 + *
4037 + * Description: This function returns the GPIO pin assignment for the Wireless
4038 + * Ses Led.
4039 + *
4040 + * Parameters : [OUT] pusValue - Address of short word that the Wireless Ses
4041 + * Led GPIO pin is returned in.
4042 + *
4043 + * Returns : BP_SUCCESS - Success, value is returned.
4044 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4045 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
4046 + * for the board.
4047 + ***************************************************************************/
4048 +int BpGetWirelessSesLedGpio( unsigned short *pusValue );
4049 +
4050 +/**************************************************************************
4051 + * Name : BpGetUsbLedGpio
4052 + *
4053 + * Description: This function returns the GPIO pin assignment for the USB
4054 + * LED.
4055 + *
4056 + * Parameters : [OUT] pusValue - Address of short word that the USB LED
4057 + * GPIO pin is returned in.
4058 + *
4059 + * Returns : BP_SUCCESS - Success, value is returned.
4060 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4061 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
4062 + * for the board.
4063 + ***************************************************************************/
4064 +int BpGetUsbLedGpio( unsigned short *pusValue );
4065 +
4066 +/**************************************************************************
4067 + * Name : BpGetHpnaLedGpio
4068 + *
4069 + * Description: This function returns the GPIO pin assignment for the HPNA
4070 + * LED.
4071 + *
4072 + * Parameters : [OUT] pusValue - Address of short word that the HPNA LED
4073 + * GPIO pin is returned in.
4074 + *
4075 + * Returns : BP_SUCCESS - Success, value is returned.
4076 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4077 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
4078 + * for the board.
4079 + ***************************************************************************/
4080 +int BpGetHpnaLedGpio( unsigned short *pusValue );
4081 +
4082 +/**************************************************************************
4083 + * Name : BpGetWanDataLedGpio
4084 + *
4085 + * Description: This function returns the GPIO pin assignment for the WAN Data
4086 + * LED.
4087 + *
4088 + * Parameters : [OUT] pusValue - Address of short word that the WAN Data LED
4089 + * GPIO pin is returned in.
4090 + *
4091 + * Returns : BP_SUCCESS - Success, value is returned.
4092 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4093 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
4094 + * for the board.
4095 + ***************************************************************************/
4096 +int BpGetWanDataLedGpio( unsigned short *pusValue );
4097 +
4098 +/**************************************************************************
4099 + * Name : BpGetPppLedGpio
4100 + *
4101 + * Description: This function returns the GPIO pin assignment for the PPP
4102 + * LED.
4103 + *
4104 + * Parameters : [OUT] pusValue - Address of short word that the PPP LED
4105 + * GPIO pin is returned in.
4106 + *
4107 + * Returns : BP_SUCCESS - Success, value is returned.
4108 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4109 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
4110 + * for the board.
4111 + ***************************************************************************/
4112 +int BpGetPppLedGpio( unsigned short *pusValue );
4113 +
4114 +/**************************************************************************
4115 + * Name : BpGetPppFailLedGpio
4116 + *
4117 + * Description: This function returns the GPIO pin assignment for the PPP
4118 + * LED that is used when there is a PPP connection failure.
4119 + *
4120 + * Parameters : [OUT] pusValue - Address of short word that the PPP LED
4121 + * GPIO pin is returned in.
4122 + *
4123 + * Returns : BP_SUCCESS - Success, value is returned.
4124 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4125 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
4126 + * for the board.
4127 + ***************************************************************************/
4128 +int BpGetPppFailLedGpio( unsigned short *pusValue );
4129 +
4130 +/**************************************************************************
4131 + * Name : BpGetVoipLedGpio
4132 + *
4133 + * Description: This function returns the GPIO pin assignment for the VOIP
4134 + * LED.
4135 + *
4136 + * Parameters : [OUT] pusValue - Address of short word that the VOIP LED
4137 + * GPIO pin is returned in.
4138 + *
4139 + * Returns : BP_SUCCESS - Success, value is returned.
4140 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4141 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
4142 + * for the board.
4143 + ***************************************************************************/
4144 +int BpGetVoipLedGpio( unsigned short *pusValue );
4145 +
4146 +/**************************************************************************
4147 + * Name : BpGetBootloaderPowerOnLedGpio
4148 + *
4149 + * Description: This function returns the GPIO pin assignment for the power
4150 + * on LED that is set by the bootloader.
4151 + *
4152 + * Parameters : [OUT] pusValue - Address of short word that the alarm LED
4153 + * GPIO pin is returned in.
4154 + *
4155 + * Returns : BP_SUCCESS - Success, value is returned.
4156 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4157 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
4158 + * for the board.
4159 + ***************************************************************************/
4160 +int BpGetBootloaderPowerOnLedGpio( unsigned short *pusValue );
4161 +
4162 +/**************************************************************************
4163 + * Name : BpGetBootloaderAlarmLedGpio
4164 + *
4165 + * Description: This function returns the GPIO pin assignment for the alarm
4166 + * LED that is set by the bootloader.
4167 + *
4168 + * Parameters : [OUT] pusValue - Address of short word that the alarm LED
4169 + * GPIO pin is returned in.
4170 + *
4171 + * Returns : BP_SUCCESS - Success, value is returned.
4172 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4173 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
4174 + * for the board.
4175 + ***************************************************************************/
4176 +int BpGetBootloaderAlarmLedGpio( unsigned short *pusValue );
4177 +
4178 +/**************************************************************************
4179 + * Name : BpGetBootloaderResetCfgLedGpio
4180 + *
4181 + * Description: This function returns the GPIO pin assignment for the reset
4182 + * configuration LED that is set by the bootloader.
4183 + *
4184 + * Parameters : [OUT] pusValue - Address of short word that the reset
4185 + * configuration LED GPIO pin is returned in.
4186 + *
4187 + * Returns : BP_SUCCESS - Success, value is returned.
4188 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4189 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
4190 + * for the board.
4191 + ***************************************************************************/
4192 +int BpGetBootloaderResetCfgLedGpio( unsigned short *pusValue );
4193 +
4194 +/**************************************************************************
4195 + * Name : BpGetBootloaderStopLedGpio
4196 + *
4197 + * Description: This function returns the GPIO pin assignment for the break
4198 + * into bootloader LED that is set by the bootloader.
4199 + *
4200 + * Parameters : [OUT] pusValue - Address of short word that the break into
4201 + * bootloader LED GPIO pin is returned in.
4202 + *
4203 + * Returns : BP_SUCCESS - Success, value is returned.
4204 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4205 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
4206 + * for the board.
4207 + ***************************************************************************/
4208 +int BpGetBootloaderStopLedGpio( unsigned short *pusValue );
4209 +
4210 +/**************************************************************************
4211 + * Name : BpGetWirelessExtIntr
4212 + *
4213 + * Description: This function returns the Wireless external interrupt number.
4214 + *
4215 + * Parameters : [OUT] pulValue - Address of short word that the wireless
4216 + * external interrupt number is returned in.
4217 + *
4218 + * Returns : BP_SUCCESS - Success, value is returned.
4219 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4220 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
4221 + * for the board.
4222 + ***************************************************************************/
4223 +int BpGetWirelessExtIntr( unsigned long *pulValue );
4224 +
4225 +/**************************************************************************
4226 + * Name : BpGetAdslDyingGaspExtIntr
4227 + *
4228 + * Description: This function returns the ADSL Dying Gasp external interrupt
4229 + * number.
4230 + *
4231 + * Parameters : [OUT] pulValue - Address of short word that the ADSL Dying Gasp
4232 + * external interrupt number is returned in.
4233 + *
4234 + * Returns : BP_SUCCESS - Success, value is returned.
4235 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4236 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
4237 + * for the board.
4238 + ***************************************************************************/
4239 +int BpGetAdslDyingGaspExtIntr( unsigned long *pulValue );
4240 +
4241 +/**************************************************************************
4242 + * Name : BpGetVoipExtIntr
4243 + *
4244 + * Description: This function returns the VOIP external interrupt number.
4245 + *
4246 + * Parameters : [OUT] pulValue - Address of short word that the VOIP
4247 + * external interrupt number is returned in.
4248 + * [IN] dspNum - Address of the DSP to query.
4249 + *
4250 + * Returns : BP_SUCCESS - Success, value is returned.
4251 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4252 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
4253 + * for the board.
4254 + ***************************************************************************/
4255 +int BpGetVoipExtIntr( unsigned char dspNum, unsigned long *pulValue );
4256 +
4257 +/**************************************************************************
4258 + * Name : BpGetHpnaExtIntr
4259 + *
4260 + * Description: This function returns the HPNA external interrupt number.
4261 + *
4262 + * Parameters : [OUT] pulValue - Address of short word that the HPNA
4263 + * external interrupt number is returned in.
4264 + *
4265 + * Returns : BP_SUCCESS - Success, value is returned.
4266 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4267 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
4268 + * for the board.
4269 + ***************************************************************************/
4270 +int BpGetHpnaExtIntr( unsigned long *pulValue );
4271 +
4272 +/**************************************************************************
4273 + * Name : BpGetHpnaChipSelect
4274 + *
4275 + * Description: This function returns the HPNA chip select number.
4276 + *
4277 + * Parameters : [OUT] pulValue - Address of short word that the HPNA
4278 + * chip select number is returned in.
4279 + *
4280 + * Returns : BP_SUCCESS - Success, value is returned.
4281 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4282 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
4283 + * for the board.
4284 + ***************************************************************************/
4285 +int BpGetHpnaChipSelect( unsigned long *pulValue );
4286 +
4287 +/**************************************************************************
4288 + * Name : BpGetVoipChipSelect
4289 + *
4290 + * Description: This function returns the VOIP chip select number.
4291 + *
4292 + * Parameters : [OUT] pulValue - Address of short word that the VOIP
4293 + * chip select number is returned in.
4294 + * [IN] dspNum - Address of the DSP to query.
4295 + *
4296 + * Returns : BP_SUCCESS - Success, value is returned.
4297 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4298 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
4299 + * for the board.
4300 + ***************************************************************************/
4301 +int BpGetVoipChipSelect( unsigned char dspNum, unsigned long *pulValue );
4302 +
4303 +#endif /* __ASSEMBLER__ */
4304 +
4305 +#endif /* _BOARDPARMS_H */
4306 +
4307 diff -urN linux.old/arch/mips/bcm963xx/include/6338_intr.h linux.dev/arch/mips/bcm963xx/include/6338_intr.h
4308 --- linux.old/arch/mips/bcm963xx/include/6338_intr.h 1970-01-01 01:00:00.000000000 +0100
4309 +++ linux.dev/arch/mips/bcm963xx/include/6338_intr.h 2006-08-25 00:39:38.000000000 +0200
4310 @@ -0,0 +1,64 @@
4311 +/*
4312 +<:copyright-gpl
4313 + Copyright 2003 Broadcom Corp. All Rights Reserved.
4314 +
4315 + This program is free software; you can distribute it and/or modify it
4316 + under the terms of the GNU General Public License (Version 2) as
4317 + published by the Free Software Foundation.
4318 +
4319 + This program is distributed in the hope it will be useful, but WITHOUT
4320 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
4321 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
4322 + for more details.
4323 +
4324 + You should have received a copy of the GNU General Public License along
4325 + with this program; if not, write to the Free Software Foundation, Inc.,
4326 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
4327 +:>
4328 +*/
4329 +
4330 +#ifndef __6338_INTR_H
4331 +#define __6338_INTR_H
4332 +
4333 +/*=====================================================================*/
4334 +/* BCM6338 External Interrupt Level Assignments */
4335 +/*=====================================================================*/
4336 +#define INTERRUPT_ID_EXTERNAL_0 3
4337 +#define INTERRUPT_ID_EXTERNAL_1 4
4338 +#define INTERRUPT_ID_EXTERNAL_2 5
4339 +#define INTERRUPT_ID_EXTERNAL_3 6
4340 +
4341 +/*=====================================================================*/
4342 +/* BCM6338 Timer Interrupt Level Assignments */
4343 +/*=====================================================================*/
4344 +#define MIPS_TIMER_INT 7
4345 +
4346 +/*=====================================================================*/
4347 +/* Peripheral ISR Table Offset */
4348 +/*=====================================================================*/
4349 +#define INTERNAL_ISR_TABLE_OFFSET 8
4350 +
4351 +/*=====================================================================*/
4352 +/* Logical Peripheral Interrupt IDs */
4353 +/*=====================================================================*/
4354 +
4355 +#define INTERRUPT_ID_TIMER (INTERNAL_ISR_TABLE_OFFSET + 0)
4356 +#define INTERRUPT_ID_SPI (INTERNAL_ISR_TABLE_OFFSET + 1)
4357 +#define INTERRUPT_ID_UART (INTERNAL_ISR_TABLE_OFFSET + 2)
4358 +#define INTERRUPT_ID_DG (INTERNAL_ISR_TABLE_OFFSET + 4)
4359 +#define INTERRUPT_ID_ADSL (INTERNAL_ISR_TABLE_OFFSET + 5)
4360 +#define INTERRUPT_ID_ATM (INTERNAL_ISR_TABLE_OFFSET + 6)
4361 +#define INTERRUPT_ID_USBS (INTERNAL_ISR_TABLE_OFFSET + 7)
4362 +#define INTERRUPT_ID_EMAC1 (INTERNAL_ISR_TABLE_OFFSET + 8)
4363 +#define INTERRUPT_ID_EPHY (INTERNAL_ISR_TABLE_OFFSET + 9)
4364 +#define INTERRUPT_ID_SDRAM (INTERNAL_ISR_TABLE_OFFSET + 10)
4365 +#define INTERRUPT_ID_USB_CNTL_RX_DMA (INTERNAL_ISR_TABLE_OFFSET + 11)
4366 +#define INTERRUPT_ID_USB_CNTL_TX_DMA (INTERNAL_ISR_TABLE_OFFSET + 12)
4367 +#define INTERRUPT_ID_USB_BULK_RX_DMA (INTERNAL_ISR_TABLE_OFFSET + 13)
4368 +#define INTERRUPT_ID_USB_BULK_TX_DMA (INTERNAL_ISR_TABLE_OFFSET + 14)
4369 +#define INTERRUPT_ID_EMAC1_RX_DMA (INTERNAL_ISR_TABLE_OFFSET + 15)
4370 +#define INTERRUPT_ID_EMAC1_TX_DMA (INTERNAL_ISR_TABLE_OFFSET + 16)
4371 +#define INTERRUPT_ID_SDIO (INTERNAL_ISR_TABLE_OFFSET + 17)
4372 +
4373 +#endif /* __BCM6338_H */
4374 +
4375 diff -urN linux.old/arch/mips/bcm963xx/include/6338_map_part.h linux.dev/arch/mips/bcm963xx/include/6338_map_part.h
4376 --- linux.old/arch/mips/bcm963xx/include/6338_map_part.h 1970-01-01 01:00:00.000000000 +0100
4377 +++ linux.dev/arch/mips/bcm963xx/include/6338_map_part.h 2006-08-25 00:39:38.000000000 +0200
4378 @@ -0,0 +1,334 @@
4379 +/*
4380 +<:copyright-gpl
4381 + Copyright 2004 Broadcom Corp. All Rights Reserved.
4382 +
4383 + This program is free software; you can distribute it and/or modify it
4384 + under the terms of the GNU General Public License (Version 2) as
4385 + published by the Free Software Foundation.
4386 +
4387 + This program is distributed in the hope it will be useful, but WITHOUT
4388 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
4389 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
4390 + for more details.
4391 +
4392 + You should have received a copy of the GNU General Public License along
4393 + with this program; if not, write to the Free Software Foundation, Inc.,
4394 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
4395 +:>
4396 +*/
4397 +
4398 +#ifndef __BCM6338_MAP_H
4399 +#define __BCM6338_MAP_H
4400 +
4401 +#include "bcmtypes.h"
4402 +
4403 +#define PERF_BASE 0xfffe0000
4404 +#define TIMR_BASE 0xfffe0200
4405 +#define UART_BASE 0xfffe0300
4406 +#define GPIO_BASE 0xfffe0400
4407 +#define SPI_BASE 0xfffe0c00
4408 +
4409 +typedef struct PerfControl {
4410 + uint32 RevID;
4411 + uint16 testControl;
4412 + uint16 blkEnables;
4413 +#define EMAC_CLK_EN 0x0010
4414 +#define USBS_CLK_EN 0x0010
4415 +#define SAR_CLK_EN 0x0020
4416 +
4417 +#define SPI_CLK_EN 0x0200
4418 +
4419 + uint32 pll_control;
4420 +#define SOFT_RESET 0x00000001
4421 +
4422 + uint32 IrqMask;
4423 + uint32 IrqStatus;
4424 +
4425 + uint32 ExtIrqCfg;
4426 +#define EI_SENSE_SHFT 0
4427 +#define EI_STATUS_SHFT 5
4428 +#define EI_CLEAR_SHFT 10
4429 +#define EI_MASK_SHFT 15
4430 +#define EI_INSENS_SHFT 20
4431 +#define EI_LEVEL_SHFT 25
4432 +
4433 + uint32 unused[4]; /* (18) */
4434 + uint32 BlockSoftReset; /* (28) */
4435 +#define BSR_SPI 0x00000001
4436 +#define BSR_EMAC 0x00000004
4437 +#define BSR_USBH 0x00000008
4438 +#define BSR_USBS 0x00000010
4439 +#define BSR_ADSL 0x00000020
4440 +#define BSR_DMAMEM 0x00000040
4441 +#define BSR_SAR 0x00000080
4442 +#define BSR_ACLC 0x00000100
4443 +#define BSR_ADSL_MIPS_PLL 0x00000400
4444 +#define BSR_ALL_BLOCKS \
4445 + (BSR_SPI | BSR_EMAC | BSR_USBH | BSR_USBS | BSR_ADSL | BSR_DMAMEM | \
4446 + BSR_SAR | BSR_ACLC | BSR_ADSL_MIPS_PLL)
4447 +} PerfControl;
4448 +
4449 +#define PERF ((volatile PerfControl * const) PERF_BASE)
4450 +
4451 +
4452 +typedef struct Timer {
4453 + uint16 unused0;
4454 + byte TimerMask;
4455 +#define TIMER0EN 0x01
4456 +#define TIMER1EN 0x02
4457 +#define TIMER2EN 0x04
4458 + byte TimerInts;
4459 +#define TIMER0 0x01
4460 +#define TIMER1 0x02
4461 +#define TIMER2 0x04
4462 +#define WATCHDOG 0x08
4463 + uint32 TimerCtl0;
4464 + uint32 TimerCtl1;
4465 + uint32 TimerCtl2;
4466 +#define TIMERENABLE 0x80000000
4467 +#define RSTCNTCLR 0x40000000
4468 + uint32 TimerCnt0;
4469 + uint32 TimerCnt1;
4470 + uint32 TimerCnt2;
4471 + uint32 WatchDogDefCount;
4472 +
4473 + /* Write 0xff00 0x00ff to Start timer
4474 + * Write 0xee00 0x00ee to Stop and re-load default count
4475 + * Read from this register returns current watch dog count
4476 + */
4477 + uint32 WatchDogCtl;
4478 +
4479 + /* Number of 40-MHz ticks for WD Reset pulse to last */
4480 + uint32 WDResetCount;
4481 +} Timer;
4482 +
4483 +#define TIMER ((volatile Timer * const) TIMR_BASE)
4484 +typedef struct UartChannel {
4485 + byte unused0;
4486 + byte control;
4487 +#define BRGEN 0x80 /* Control register bit defs */
4488 +#define TXEN 0x40
4489 +#define RXEN 0x20
4490 +#define LOOPBK 0x10
4491 +#define TXPARITYEN 0x08
4492 +#define TXPARITYEVEN 0x04
4493 +#define RXPARITYEN 0x02
4494 +#define RXPARITYEVEN 0x01
4495 +
4496 + byte config;
4497 +#define XMITBREAK 0x40
4498 +#define BITS5SYM 0x00
4499 +#define BITS6SYM 0x10
4500 +#define BITS7SYM 0x20
4501 +#define BITS8SYM 0x30
4502 +#define ONESTOP 0x07
4503 +#define TWOSTOP 0x0f
4504 + /* 4-LSBS represent STOP bits/char
4505 + * in 1/8 bit-time intervals. Zero
4506 + * represents 1/8 stop bit interval.
4507 + * Fifteen represents 2 stop bits.
4508 + */
4509 + byte fifoctl;
4510 +#define RSTTXFIFOS 0x80
4511 +#define RSTRXFIFOS 0x40
4512 + /* 5-bit TimeoutCnt is in low bits of this register.
4513 + * This count represents the number of characters
4514 + * idle times before setting receive Irq when below threshold
4515 + */
4516 + uint32 baudword;
4517 + /* When divide SysClk/2/(1+baudword) we should get 32*bit-rate
4518 + */
4519 +
4520 + byte txf_levl; /* Read-only fifo depth */
4521 + byte rxf_levl; /* Read-only fifo depth */
4522 + byte fifocfg; /* Upper 4-bits are TxThresh, Lower are
4523 + * RxThreshold. Irq can be asserted
4524 + * when rx fifo> thresh, txfifo<thresh
4525 + */
4526 + byte prog_out; /* Set value of DTR (Bit0), RTS (Bit1)
4527 + * if these bits are also enabled to GPIO_o
4528 + */
4529 +#define DTREN 0x01
4530 +#define RTSEN 0x02
4531 +
4532 + byte unused1;
4533 + byte DeltaIPEdgeNoSense; /* Low 4-bits, set corr bit to 1 to
4534 + * detect irq on rising AND falling
4535 + * edges for corresponding GPIO_i
4536 + * if enabled (edge insensitive)
4537 + */
4538 + byte DeltaIPConfig_Mask; /* Upper 4 bits: 1 for posedge sense
4539 + * 0 for negedge sense if
4540 + * not configured for edge
4541 + * insensitive (see above)
4542 + * Lower 4 bits: Mask to enable change
4543 + * detection IRQ for corresponding
4544 + * GPIO_i
4545 + */
4546 + byte DeltaIP_SyncIP; /* Upper 4 bits show which bits
4547 + * have changed (may set IRQ).
4548 + * read automatically clears bit
4549 + * Lower 4 bits are actual status
4550 + */
4551 +
4552 + uint16 intMask; /* Same Bit defs for Mask and status */
4553 + uint16 intStatus;
4554 +#define DELTAIP 0x0001
4555 +#define TXUNDERR 0x0002
4556 +#define TXOVFERR 0x0004
4557 +#define TXFIFOTHOLD 0x0008
4558 +#define TXREADLATCH 0x0010
4559 +#define TXFIFOEMT 0x0020
4560 +#define RXUNDERR 0x0040
4561 +#define RXOVFERR 0x0080
4562 +#define RXTIMEOUT 0x0100
4563 +#define RXFIFOFULL 0x0200
4564 +#define RXFIFOTHOLD 0x0400
4565 +#define RXFIFONE 0x0800
4566 +#define RXFRAMERR 0x1000
4567 +#define RXPARERR 0x2000
4568 +#define RXBRK 0x4000
4569 +
4570 + uint16 unused2;
4571 + uint16 Data; /* Write to TX, Read from RX */
4572 + /* bits 11:8 are BRK,PAR,FRM errors */
4573 +
4574 + uint32 unused3;
4575 + uint32 unused4;
4576 +} Uart;
4577 +
4578 +#define UART ((volatile Uart * const) UART_BASE)
4579 +
4580 +typedef struct GpioControl {
4581 + uint32 unused0;
4582 + uint32 GPIODir; /* bits 7:0 */
4583 + uint32 unused1;
4584 + uint32 GPIOio; /* bits 7:0 */
4585 + uint32 LEDCtrl;
4586 +#define LED3_STROBE 0x08000000
4587 +#define LED2_STROBE 0x04000000
4588 +#define LED1_STROBE 0x02000000
4589 +#define LED0_STROBE 0x01000000
4590 +#define LED_TEST 0x00010000
4591 +#define LED3_DISABLE_LINK_ACT 0x00008000
4592 +#define LED2_DISABLE_LINK_ACT 0x00004000
4593 +#define LED1_DISABLE_LINK_ACT 0x00002000
4594 +#define LED0_DISABLE_LINK_ACT 0x00001000
4595 +#define LED_INTERVAL_SET_MASK 0x00000f00
4596 +#define LED_INTERVAL_SET_320MS 0x00000500
4597 +#define LED_INTERVAL_SET_160MS 0x00000400
4598 +#define LED_INTERVAL_SET_80MS 0x00000300
4599 +#define LED_INTERVAL_SET_40MS 0x00000200
4600 +#define LED_INTERVAL_SET_20MS 0x00000100
4601 +#define LED3_ON 0x00000080
4602 +#define LED2_ON 0x00000040
4603 +#define LED1_ON 0x00000020
4604 +#define LED0_ON 0x00000010
4605 +#define LED3_ENABLE 0x00000008
4606 +#define LED2_ENABLE 0x00000004
4607 +#define LED1_ENABLE 0x00000002
4608 +#define LED0_ENABLE 0x00000001
4609 + uint32 SpiSlaveCfg;
4610 +#define SPI_SLAVE_RESET 0x00010000
4611 +#define SPI_RESTRICT 0x00000400
4612 +#define SPI_DELAY_DISABLE 0x00000200
4613 +#define SPI_PROBE_MUX_SEL_MASK 0x000001e0
4614 +#define SPI_SER_ADDR_CFG_MASK 0x0000000c
4615 +#define SPI_MODE 0x00000001
4616 + uint32 vRegConfig;
4617 +} GpioControl;
4618 +
4619 +#define GPIO ((volatile GpioControl * const) GPIO_BASE)
4620 +
4621 +/* Number to mask conversion macro used for GPIODir and GPIOio */
4622 +#define GPIO_NUM_MAX_BITS_MASK 0x0f
4623 +#define GPIO_NUM_TO_MASK(X) (1 << ((X) & GPIO_NUM_MAX_BITS_MASK))
4624 +
4625 +/*
4626 +** Spi Controller
4627 +*/
4628 +
4629 +typedef struct SpiControl {
4630 + uint16 spiCmd; /* (0x0): SPI command */
4631 +#define SPI_CMD_START_IMMEDIATE 3
4632 +
4633 +#define SPI_CMD_COMMAND_SHIFT 0
4634 +#define SPI_CMD_DEVICE_ID_SHIFT 4
4635 +#define SPI_CMD_PREPEND_BYTE_CNT_SHIFT 8
4636 +
4637 + byte spiIntStatus; /* (0x2): SPI interrupt status */
4638 + byte spiMaskIntStatus; /* (0x3): SPI masked interrupt status */
4639 +
4640 + byte spiIntMask; /* (0x4): SPI interrupt mask */
4641 +#define SPI_INTR_CMD_DONE 0x01
4642 +#define SPI_INTR_CLEAR_ALL 0x1f
4643 +
4644 + byte spiStatus; /* (0x5): SPI status */
4645 +
4646 + byte spiClkCfg; /* (0x6): SPI clock configuration */
4647 +
4648 + byte spiFillByte; /* (0x7): SPI fill byte */
4649 +
4650 + byte unused0;
4651 + byte spiMsgTail; /* (0x9): msgtail */
4652 + byte unused1;
4653 + byte spiRxTail; /* (0xB): rxtail */
4654 +
4655 + uint32 unused2[13]; /* (0x0c - 0x3c) reserved */
4656 +
4657 + byte spiMsgCtl; /* (0x40) control byte */
4658 +#define HALF_DUPLEX_W 1
4659 +#define HALF_DUPLEX_R 2
4660 +#define SPI_MSG_TYPE_SHIFT 6
4661 +#define SPI_BYTE_CNT_SHIFT 0
4662 + byte spiMsgData[63]; /* (0x41 - 0x7f) msg data */
4663 + byte spiRxDataFifo[64]; /* (0x80 - 0xbf) rx data */
4664 + byte unused3[64]; /* (0xc0 - 0xff) reserved */
4665 +} SpiControl;
4666 +
4667 +#define SPI ((volatile SpiControl * const) SPI_BASE)
4668 +
4669 +/*
4670 +** External Bus Interface
4671 +*/
4672 +typedef struct EbiChipSelect {
4673 + uint32 base; /* base address in upper 24 bits */
4674 +#define EBI_SIZE_8K 0
4675 +#define EBI_SIZE_16K 1
4676 +#define EBI_SIZE_32K 2
4677 +#define EBI_SIZE_64K 3
4678 +#define EBI_SIZE_128K 4
4679 +#define EBI_SIZE_256K 5
4680 +#define EBI_SIZE_512K 6
4681 +#define EBI_SIZE_1M 7
4682 +#define EBI_SIZE_2M 8
4683 +#define EBI_SIZE_4M 9
4684 +#define EBI_SIZE_8M 10
4685 +#define EBI_SIZE_16M 11
4686 +#define EBI_SIZE_32M 12
4687 +#define EBI_SIZE_64M 13
4688 +#define EBI_SIZE_128M 14
4689 +#define EBI_SIZE_256M 15
4690 + uint32 config;
4691 +#define EBI_ENABLE 0x00000001 /* .. enable this range */
4692 +#define EBI_WAIT_STATES 0x0000000e /* .. mask for wait states */
4693 +#define EBI_WTST_SHIFT 1 /* .. for shifting wait states */
4694 +#define EBI_WORD_WIDE 0x00000010 /* .. 16-bit peripheral, else 8 */
4695 +#define EBI_WREN 0x00000020 /* enable posted writes */
4696 +#define EBI_POLARITY 0x00000040 /* .. set to invert something,
4697 + ** don't know what yet */
4698 +#define EBI_TS_TA_MODE 0x00000080 /* .. use TS/TA mode */
4699 +#define EBI_TS_SEL 0x00000100 /* .. drive tsize, not bs_b */
4700 +#define EBI_FIFO 0x00000200 /* .. use fifo */
4701 +#define EBI_RE 0x00000400 /* .. Reverse Endian */
4702 +} EbiChipSelect;
4703 +
4704 +typedef struct MpiRegisters {
4705 + EbiChipSelect cs[1]; /* size chip select configuration */
4706 +} MpiRegisters;
4707 +
4708 +#define MPI ((volatile MpiRegisters * const) MPI_BASE)
4709 +
4710 +
4711 +#endif
4712 +
4713 diff -urN linux.old/arch/mips/bcm963xx/include/6345_intr.h linux.dev/arch/mips/bcm963xx/include/6345_intr.h
4714 --- linux.old/arch/mips/bcm963xx/include/6345_intr.h 1970-01-01 01:00:00.000000000 +0100
4715 +++ linux.dev/arch/mips/bcm963xx/include/6345_intr.h 2006-08-25 00:39:38.000000000 +0200
4716 @@ -0,0 +1,72 @@
4717 +/*
4718 +<:copyright-gpl
4719 + Copyright 2002 Broadcom Corp. All Rights Reserved.
4720 +
4721 + This program is free software; you can distribute it and/or modify it
4722 + under the terms of the GNU General Public License (Version 2) as
4723 + published by the Free Software Foundation.
4724 +
4725 + This program is distributed in the hope it will be useful, but WITHOUT
4726 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
4727 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
4728 + for more details.
4729 +
4730 + You should have received a copy of the GNU General Public License along
4731 + with this program; if not, write to the Free Software Foundation, Inc.,
4732 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
4733 +:>
4734 +*/
4735 +
4736 +#ifndef __6345_INTR_H
4737 +#define __6345_INTR_H
4738 +
4739 +
4740 +/*=====================================================================*/
4741 +/* BCM6345 External Interrupt Level Assignments */
4742 +/*=====================================================================*/
4743 +#define INTERRUPT_ID_EXTERNAL_0 3
4744 +#define INTERRUPT_ID_EXTERNAL_1 4
4745 +#define INTERRUPT_ID_EXTERNAL_2 5
4746 +#define INTERRUPT_ID_EXTERNAL_3 6
4747 +
4748 +/*=====================================================================*/
4749 +/* BCM6345 Timer Interrupt Level Assignments */
4750 +/*=====================================================================*/
4751 +#define MIPS_TIMER_INT 7
4752 +
4753 +/*=====================================================================*/
4754 +/* Peripheral ISR Table Offset */
4755 +/*=====================================================================*/
4756 +#define INTERNAL_ISR_TABLE_OFFSET 8
4757 +#define DMA_ISR_TABLE_OFFSET (INTERNAL_ISR_TABLE_OFFSET + 13)
4758 +
4759 +/*=====================================================================*/
4760 +/* Logical Peripheral Interrupt IDs */
4761 +/*=====================================================================*/
4762 +
4763 +/* Internal peripheral interrupt IDs */
4764 +#define INTERRUPT_ID_TIMER (INTERNAL_ISR_TABLE_OFFSET + 0)
4765 +#define INTERRUPT_ID_UART (INTERNAL_ISR_TABLE_OFFSET + 2)
4766 +#define INTERRUPT_ID_ADSL (INTERNAL_ISR_TABLE_OFFSET + 3)
4767 +#define INTERRUPT_ID_ATM (INTERNAL_ISR_TABLE_OFFSET + 4)
4768 +#define INTERRUPT_ID_USB (INTERNAL_ISR_TABLE_OFFSET + 5)
4769 +#define INTERRUPT_ID_EMAC (INTERNAL_ISR_TABLE_OFFSET + 8)
4770 +#define INTERRUPT_ID_EPHY (INTERNAL_ISR_TABLE_OFFSET + 12)
4771 +
4772 +/* DMA channel interrupt IDs */
4773 +#define INTERRUPT_ID_EMAC_RX_CHAN (DMA_ISR_TABLE_OFFSET + EMAC_RX_CHAN)
4774 +#define INTERRUPT_ID_EMAC_TX_CHAN (DMA_ISR_TABLE_OFFSET + EMAC_TX_CHAN)
4775 +#define INTERRUPT_ID_EBI_RX_CHAN (DMA_ISR_TABLE_OFFSET + EBI_RX_CHAN)
4776 +#define INTERRUPT_ID_EBI_TX_CHAN (DMA_ISR_TABLE_OFFSET + EBI_TX_CHAN)
4777 +#define INTERRUPT_ID_RESERVED_RX_CHAN (DMA_ISR_TABLE_OFFSET + RESERVED_RX_CHAN)
4778 +#define INTERRUPT_ID_RESERVED_TX_CHAN (DMA_ISR_TABLE_OFFSET + RESERVED_TX_CHAN)
4779 +#define INTERRUPT_ID_USB_BULK_RX_CHAN (DMA_ISR_TABLE_OFFSET + USB_BULK_RX_CHAN)
4780 +#define INTERRUPT_ID_USB_BULK_TX_CHAN (DMA_ISR_TABLE_OFFSET + USB_BULK_TX_CHAN)
4781 +#define INTERRUPT_ID_USB_CNTL_RX_CHAN (DMA_ISR_TABLE_OFFSET + USB_CNTL_RX_CHAN)
4782 +#define INTERRUPT_ID_USB_CNTL_TX_CHAN (DMA_ISR_TABLE_OFFSET + USB_CNTL_TX_CHAN)
4783 +#define INTERRUPT_ID_USB_ISO_RX_CHAN (DMA_ISR_TABLE_OFFSET + USB_ISO_RX_CHAN)
4784 +#define INTERRUPT_ID_USB_ISO_TX_CHAN (DMA_ISR_TABLE_OFFSET + USB_ISO_TX_CHAN)
4785 +
4786 +
4787 +#endif /* __BCM6345_H */
4788 +
4789 diff -urN linux.old/arch/mips/bcm963xx/include/6345_map_part.h linux.dev/arch/mips/bcm963xx/include/6345_map_part.h
4790 --- linux.old/arch/mips/bcm963xx/include/6345_map_part.h 1970-01-01 01:00:00.000000000 +0100
4791 +++ linux.dev/arch/mips/bcm963xx/include/6345_map_part.h 2006-08-25 00:39:38.000000000 +0200
4792 @@ -0,0 +1,163 @@
4793 +/*
4794 +<:copyright-gpl
4795 + Copyright 2002 Broadcom Corp. All Rights Reserved.
4796 +
4797 + This program is free software; you can distribute it and/or modify it
4798 + under the terms of the GNU General Public License (Version 2) as
4799 + published by the Free Software Foundation.
4800 +
4801 + This program is distributed in the hope it will be useful, but WITHOUT
4802 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
4803 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
4804 + for more details.
4805 +
4806 + You should have received a copy of the GNU General Public License along
4807 + with this program; if not, write to the Free Software Foundation, Inc.,
4808 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
4809 +:>
4810 +*/
4811 +
4812 +#ifndef __BCM6345_MAP_H
4813 +#define __BCM6345_MAP_H
4814 +
4815 +
4816 +#include "bcmtypes.h"
4817 +#include "6345_intr.h"
4818 +
4819 +typedef struct IntControl {
4820 + uint32 RevID;
4821 + uint16 testControl;
4822 + uint16 blkEnables;
4823 +#define USB_CLK_EN 0x0100
4824 +#define EMAC_CLK_EN 0x0080
4825 +#define UART_CLK_EN 0x0008
4826 +#define CPU_CLK_EN 0x0001
4827 +
4828 + uint32 pll_control;
4829 +#define SOFT_RESET 0x00000001
4830 +
4831 + uint32 IrqMask;
4832 + uint32 IrqStatus;
4833 +
4834 + uint32 ExtIrqCfg;
4835 +#define EI_SENSE_SHFT 0
4836 +#define EI_STATUS_SHFT 4
4837 +#define EI_CLEAR_SHFT 8
4838 +#define EI_MASK_SHFT 12
4839 +#define EI_INSENS_SHFT 16
4840 +#define EI_LEVEL_SHFT 20
4841 +} IntControl;
4842 +
4843 +#define INTC_BASE 0xfffe0000
4844 +#define PERF ((volatile IntControl * const) INTC_BASE)
4845 +
4846 +#define TIMR_BASE 0xfffe0200
4847 +typedef struct Timer {
4848 + uint16 unused0;
4849 + byte TimerMask;
4850 +#define TIMER0EN 0x01
4851 +#define TIMER1EN 0x02
4852 +#define TIMER2EN 0x04
4853 + byte TimerInts;
4854 +#define TIMER0 0x01
4855 +#define TIMER1 0x02
4856 +#define TIMER2 0x04
4857 +#define WATCHDOG 0x08
4858 + uint32 TimerCtl0;
4859 + uint32 TimerCtl1;
4860 + uint32 TimerCtl2;
4861 +#define TIMERENABLE 0x80000000
4862 +#define RSTCNTCLR 0x40000000
4863 + uint32 TimerCnt0;
4864 + uint32 TimerCnt1;
4865 + uint32 TimerCnt2;
4866 + uint32 WatchDogDefCount;
4867 +
4868 + /* Write 0xff00 0x00ff to Start timer
4869 + * Write 0xee00 0x00ee to Stop and re-load default count
4870 + * Read from this register returns current watch dog count
4871 + */
4872 + uint32 WatchDogCtl;
4873 +
4874 + /* Number of 40-MHz ticks for WD Reset pulse to last */
4875 + uint32 WDResetCount;
4876 +} Timer;
4877 +
4878 +#define TIMER ((volatile Timer * const) TIMR_BASE)
4879 +
4880 +typedef struct UartChannel {
4881 + byte unused0;
4882 + byte control;
4883 +#define BRGEN 0x80 /* Control register bit defs */
4884 +#define TXEN 0x40
4885 +#define RXEN 0x20
4886 +#define TXPARITYEN 0x08
4887 +#define TXPARITYEVEN 0x04
4888 +#define RXPARITYEN 0x02
4889 +#define RXPARITYEVEN 0x01
4890 + byte config;
4891 +#define BITS5SYM 0x00
4892 +#define BITS6SYM 0x10
4893 +#define BITS7SYM 0x20
4894 +#define BITS8SYM 0x30
4895 +#define XMITBREAK 0x40
4896 +#define ONESTOP 0x07
4897 +#define TWOSTOP 0x0f
4898 +
4899 + byte fifoctl;
4900 +#define RSTTXFIFOS 0x80
4901 +#define RSTRXFIFOS 0x40
4902 + uint32 baudword;
4903 +
4904 + byte txf_levl;
4905 + byte rxf_levl;
4906 + byte fifocfg;
4907 + byte prog_out;
4908 +
4909 + byte unused1;
4910 + byte DeltaIPEdgeNoSense;
4911 + byte DeltaIPConfig_Mask;
4912 + byte DeltaIP_SyncIP;
4913 + uint16 intMask;
4914 + uint16 intStatus;
4915 +#define TXUNDERR 0x0002
4916 +#define TXOVFERR 0x0004
4917 +#define TXFIFOEMT 0x0020
4918 +#define RXOVFERR 0x0080
4919 +#define RXFIFONE 0x0800
4920 +#define RXFRAMERR 0x1000
4921 +#define RXPARERR 0x2000
4922 +#define RXBRK 0x4000
4923 +
4924 + uint16 unused2;
4925 + uint16 Data;
4926 + uint32 unused3;
4927 + uint32 unused4;
4928 +} Uart;
4929 +
4930 +#define UART_BASE 0xfffe0300
4931 +#define UART ((volatile Uart * const) UART_BASE)
4932 +
4933 +typedef struct GpioControl {
4934 + uint16 unused0;
4935 + byte unused1;
4936 + byte TBusSel;
4937 +
4938 + uint16 unused2;
4939 + uint16 GPIODir;
4940 + byte unused3;
4941 + byte Leds;
4942 + uint16 GPIOio;
4943 +
4944 + uint32 UartCtl;
4945 +} GpioControl;
4946 +
4947 +#define GPIO_BASE 0xfffe0400
4948 +#define GPIO ((volatile GpioControl * const) GPIO_BASE)
4949 +
4950 +#define GPIO_NUM_MAX_BITS_MASK 0x0f
4951 +#define GPIO_NUM_TO_MASK(X) (1 << ((X) & GPIO_NUM_MAX_BITS_MASK))
4952 +
4953 +
4954 +#endif
4955 +
4956 diff -urN linux.old/arch/mips/bcm963xx/include/6348_intr.h linux.dev/arch/mips/bcm963xx/include/6348_intr.h
4957 --- linux.old/arch/mips/bcm963xx/include/6348_intr.h 1970-01-01 01:00:00.000000000 +0100
4958 +++ linux.dev/arch/mips/bcm963xx/include/6348_intr.h 2006-08-25 00:39:38.000000000 +0200
4959 @@ -0,0 +1,74 @@
4960 +/*
4961 +<:copyright-gpl
4962 + Copyright 2003 Broadcom Corp. All Rights Reserved.
4963 +
4964 + This program is free software; you can distribute it and/or modify it
4965 + under the terms of the GNU General Public License (Version 2) as
4966 + published by the Free Software Foundation.
4967 +
4968 + This program is distributed in the hope it will be useful, but WITHOUT
4969 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
4970 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
4971 + for more details.
4972 +
4973 + You should have received a copy of the GNU General Public License along
4974 + with this program; if not, write to the Free Software Foundation, Inc.,
4975 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
4976 +:>
4977 +*/
4978 +
4979 +#ifndef __6348_INTR_H
4980 +#define __6348_INTR_H
4981 +
4982 +
4983 +/*=====================================================================*/
4984 +/* BCM6348 External Interrupt Level Assignments */
4985 +/*=====================================================================*/
4986 +#define INTERRUPT_ID_EXTERNAL_0 3
4987 +#define INTERRUPT_ID_EXTERNAL_1 4
4988 +#define INTERRUPT_ID_EXTERNAL_2 5
4989 +#define INTERRUPT_ID_EXTERNAL_3 6
4990 +
4991 +/*=====================================================================*/
4992 +/* BCM6348 Timer Interrupt Level Assignments */
4993 +/*=====================================================================*/
4994 +#define MIPS_TIMER_INT 7
4995 +
4996 +/*=====================================================================*/
4997 +/* Peripheral ISR Table Offset */
4998 +/*=====================================================================*/
4999 +#define INTERNAL_ISR_TABLE_OFFSET 8
5000 +
5001 +/*=====================================================================*/
5002 +/* Logical Peripheral Interrupt IDs */
5003 +/*=====================================================================*/
5004 +
5005 +#define INTERRUPT_ID_TIMER (INTERNAL_ISR_TABLE_OFFSET + 0)
5006 +#define INTERRUPT_ID_SPI (INTERNAL_ISR_TABLE_OFFSET + 1)
5007 +#define INTERRUPT_ID_UART (INTERNAL_ISR_TABLE_OFFSET + 2)
5008 +#define INTERRUPT_ID_ADSL (INTERNAL_ISR_TABLE_OFFSET + 4)
5009 +#define INTERRUPT_ID_ATM (INTERNAL_ISR_TABLE_OFFSET + 5)
5010 +#define INTERRUPT_ID_USBS (INTERNAL_ISR_TABLE_OFFSET + 6)
5011 +#define INTERRUPT_ID_EMAC2 (INTERNAL_ISR_TABLE_OFFSET + 7)
5012 +#define INTERRUPT_ID_EMAC1 (INTERNAL_ISR_TABLE_OFFSET + 8)
5013 +#define INTERRUPT_ID_EPHY (INTERNAL_ISR_TABLE_OFFSET + 9)
5014 +#define INTERRUPT_ID_M2M (INTERNAL_ISR_TABLE_OFFSET + 10)
5015 +#define INTERRUPT_ID_ACLC (INTERNAL_ISR_TABLE_OFFSET + 11)
5016 +#define INTERRUPT_ID_USBH (INTERNAL_ISR_TABLE_OFFSET + 12)
5017 +#define INTERRUPT_ID_SDRAM (INTERNAL_ISR_TABLE_OFFSET + 13)
5018 +#define INTERRUPT_ID_USB_CNTL_RX_DMA (INTERNAL_ISR_TABLE_OFFSET + 14)
5019 +#define INTERRUPT_ID_USB_CNTL_TX_DMA (INTERNAL_ISR_TABLE_OFFSET + 15)
5020 +#define INTERRUPT_ID_USB_BULK_RX_DMA (INTERNAL_ISR_TABLE_OFFSET + 16)
5021 +#define INTERRUPT_ID_USB_BULK_TX_DMA (INTERNAL_ISR_TABLE_OFFSET + 17)
5022 +#define INTERRUPT_ID_USB_ISO_RX_DMA (INTERNAL_ISR_TABLE_OFFSET + 18)
5023 +#define INTERRUPT_ID_USB_ISO_TX_DMA (INTERNAL_ISR_TABLE_OFFSET + 19)
5024 +#define INTERRUPT_ID_EMAC1_RX_DMA (INTERNAL_ISR_TABLE_OFFSET + 20)
5025 +#define INTERRUPT_ID_EMAC1_TX_DMA (INTERNAL_ISR_TABLE_OFFSET + 21)
5026 +#define INTERRUPT_ID_EMAC2_RX_DMA (INTERNAL_ISR_TABLE_OFFSET + 22)
5027 +#define INTERRUPT_ID_EMAC2_TX_DMA (INTERNAL_ISR_TABLE_OFFSET + 23)
5028 +#define INTERRUPT_ID_MPI (INTERNAL_ISR_TABLE_OFFSET + 24)
5029 +#define INTERRUPT_ID_DG (INTERNAL_ISR_TABLE_OFFSET + 25)
5030 +
5031 +
5032 +#endif /* __BCM6348_H */
5033 +
5034 diff -urN linux.old/arch/mips/bcm963xx/include/6348_map_part.h linux.dev/arch/mips/bcm963xx/include/6348_map_part.h
5035 --- linux.old/arch/mips/bcm963xx/include/6348_map_part.h 1970-01-01 01:00:00.000000000 +0100
5036 +++ linux.dev/arch/mips/bcm963xx/include/6348_map_part.h 2006-08-25 00:39:38.000000000 +0200
5037 @@ -0,0 +1,500 @@
5038 +/*
5039 +<:copyright-gpl
5040 + Copyright 2002 Broadcom Corp. All Rights Reserved.
5041 +
5042 + This program is free software; you can distribute it and/or modify it
5043 + under the terms of the GNU General Public License (Version 2) as
5044 + published by the Free Software Foundation.
5045 +
5046 + This program is distributed in the hope it will be useful, but WITHOUT
5047 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
5048 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
5049 + for more details.
5050 +
5051 + You should have received a copy of the GNU General Public License along
5052 + with this program; if not, write to the Free Software Foundation, Inc.,
5053 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
5054 +:>
5055 +*/
5056 +
5057 +#ifndef __BCM6348_MAP_H
5058 +#define __BCM6348_MAP_H
5059 +
5060 +#include "bcmtypes.h"
5061 +
5062 +#define PERF_BASE 0xfffe0000
5063 +#define TIMR_BASE 0xfffe0200
5064 +#define UART_BASE 0xfffe0300
5065 +#define GPIO_BASE 0xfffe0400
5066 +#define MPI_BASE 0xfffe2000 /* MPI control registers */
5067 +#define USB_HOST_BASE 0xfffe1b00 /* USB host registers */
5068 +#define USB_HOST_NON_OHCI 0xfffe1c00 /* USB host non-OHCI registers */
5069 +
5070 +typedef struct PerfControl {
5071 + uint32 RevID;
5072 + uint16 testControl;
5073 + uint16 blkEnables;
5074 +#define EMAC_CLK_EN 0x0010
5075 +#define SAR_CLK_EN 0x0020
5076 +#define USBS_CLK_EN 0x0040
5077 +#define USBH_CLK_EN 0x0100
5078 +
5079 + uint32 pll_control;
5080 +#define SOFT_RESET 0x00000001
5081 +
5082 + uint32 IrqMask;
5083 + uint32 IrqStatus;
5084 +
5085 + uint32 ExtIrqCfg;
5086 +#define EI_SENSE_SHFT 0
5087 +#define EI_STATUS_SHFT 5
5088 +#define EI_CLEAR_SHFT 10
5089 +#define EI_MASK_SHFT 15
5090 +#define EI_INSENS_SHFT 20
5091 +#define EI_LEVEL_SHFT 25
5092 +
5093 + uint32 unused[4]; /* (18) */
5094 + uint32 BlockSoftReset; /* (28) */
5095 +#define BSR_SPI 0x00000001
5096 +#define BSR_EMAC 0x00000004
5097 +#define BSR_USBH 0x00000008
5098 +#define BSR_USBS 0x00000010
5099 +#define BSR_ADSL 0x00000020
5100 +#define BSR_DMAMEM 0x00000040
5101 +#define BSR_SAR 0x00000080
5102 +#define BSR_ACLC 0x00000100
5103 +#define BSR_ADSL_MIPS_PLL 0x00000400
5104 +#define BSR_ALL_BLOCKS \
5105 + (BSR_SPI | BSR_EMAC | BSR_USBH | BSR_USBS | BSR_ADSL | BSR_DMAMEM | \
5106 + BSR_SAR | BSR_ACLC | BSR_ADSL_MIPS_PLL)
5107 + uint32 unused2[2]; /* (2c) */
5108 + uint32 PllStrap; /* (34) */
5109 +#define PLL_N1_SHFT 20
5110 +#define PLL_N1_MASK (7<<PLL_N1_SHFT)
5111 +#define PLL_N2_SHFT 15
5112 +#define PLL_N2_MASK (0x1f<<PLL_N2_SHFT)
5113 +#define PLL_M1_REF_SHFT 12
5114 +#define PLL_M1_REF_MASK (7<<PLL_M1_REF_SHFT)
5115 +#define PLL_M2_REF_SHFT 9
5116 +#define PLL_M2_REF_MASK (7<<PLL_M2_REF_SHFT)
5117 +#define PLL_M1_CPU_SHFT 6
5118 +#define PLL_M1_CPU_MASK (7<<PLL_M1_CPU_SHFT)
5119 +#define PLL_M1_BUS_SHFT 3
5120 +#define PLL_M1_BUS_MASK (7<<PLL_M1_BUS_SHFT)
5121 +#define PLL_M2_BUS_SHFT 0
5122 +#define PLL_M2_BUS_MASK (7<<PLL_M2_BUS_SHFT)
5123 +} PerfControl;
5124 +
5125 +#define PERF ((volatile PerfControl * const) PERF_BASE)
5126 +
5127 +typedef struct Timer {
5128 + uint16 unused0;
5129 + byte TimerMask;
5130 +#define TIMER0EN 0x01
5131 +#define TIMER1EN 0x02
5132 +#define TIMER2EN 0x04
5133 + byte TimerInts;
5134 +#define TIMER0 0x01
5135 +#define TIMER1 0x02
5136 +#define TIMER2 0x04
5137 +#define WATCHDOG 0x08
5138 + uint32 TimerCtl0;
5139 + uint32 TimerCtl1;
5140 + uint32 TimerCtl2;
5141 +#define TIMERENABLE 0x80000000
5142 +#define RSTCNTCLR 0x40000000
5143 + uint32 TimerCnt0;
5144 + uint32 TimerCnt1;
5145 + uint32 TimerCnt2;
5146 + uint32 WatchDogDefCount;
5147 +
5148 + /* Write 0xff00 0x00ff to Start timer
5149 + * Write 0xee00 0x00ee to Stop and re-load default count
5150 + * Read from this register returns current watch dog count
5151 + */
5152 + uint32 WatchDogCtl;
5153 +
5154 + /* Number of 40-MHz ticks for WD Reset pulse to last */
5155 + uint32 WDResetCount;
5156 +} Timer;
5157 +
5158 +#define TIMER ((volatile Timer * const) TIMR_BASE)
5159 +
5160 +typedef struct UartChannel {
5161 + byte unused0;
5162 + byte control;
5163 +#define BRGEN 0x80 /* Control register bit defs */
5164 +#define TXEN 0x40
5165 +#define RXEN 0x20
5166 +#define LOOPBK 0x10
5167 +#define TXPARITYEN 0x08
5168 +#define TXPARITYEVEN 0x04
5169 +#define RXPARITYEN 0x02
5170 +#define RXPARITYEVEN 0x01
5171 +
5172 + byte config;
5173 +#define XMITBREAK 0x40
5174 +#define BITS5SYM 0x00
5175 +#define BITS6SYM 0x10
5176 +#define BITS7SYM 0x20
5177 +#define BITS8SYM 0x30
5178 +#define ONESTOP 0x07
5179 +#define TWOSTOP 0x0f
5180 + /* 4-LSBS represent STOP bits/char
5181 + * in 1/8 bit-time intervals. Zero
5182 + * represents 1/8 stop bit interval.
5183 + * Fifteen represents 2 stop bits.
5184 + */
5185 + byte fifoctl;
5186 +#define RSTTXFIFOS 0x80
5187 +#define RSTRXFIFOS 0x40
5188 + /* 5-bit TimeoutCnt is in low bits of this register.
5189 + * This count represents the number of characters
5190 + * idle times before setting receive Irq when below threshold
5191 + */
5192 + uint32 baudword;
5193 + /* When divide SysClk/2/(1+baudword) we should get 32*bit-rate
5194 + */
5195 +
5196 + byte txf_levl; /* Read-only fifo depth */
5197 + byte rxf_levl; /* Read-only fifo depth */
5198 + byte fifocfg; /* Upper 4-bits are TxThresh, Lower are
5199 + * RxThreshold. Irq can be asserted
5200 + * when rx fifo> thresh, txfifo<thresh
5201 + */
5202 + byte prog_out; /* Set value of DTR (Bit0), RTS (Bit1)
5203 + * if these bits are also enabled to GPIO_o
5204 + */
5205 +#define DTREN 0x01
5206 +#define RTSEN 0x02
5207 +
5208 + byte unused1;
5209 + byte DeltaIPEdgeNoSense; /* Low 4-bits, set corr bit to 1 to
5210 + * detect irq on rising AND falling
5211 + * edges for corresponding GPIO_i
5212 + * if enabled (edge insensitive)
5213 + */
5214 + byte DeltaIPConfig_Mask; /* Upper 4 bits: 1 for posedge sense
5215 + * 0 for negedge sense if
5216 + * not configured for edge
5217 + * insensitive (see above)
5218 + * Lower 4 bits: Mask to enable change
5219 + * detection IRQ for corresponding
5220 + * GPIO_i
5221 + */
5222 + byte DeltaIP_SyncIP; /* Upper 4 bits show which bits
5223 + * have changed (may set IRQ).
5224 + * read automatically clears bit
5225 + * Lower 4 bits are actual status
5226 + */
5227 +
5228 + uint16 intMask; /* Same Bit defs for Mask and status */
5229 + uint16 intStatus;
5230 +#define DELTAIP 0x0001
5231 +#define TXUNDERR 0x0002
5232 +#define TXOVFERR 0x0004
5233 +#define TXFIFOTHOLD 0x0008
5234 +#define TXREADLATCH 0x0010
5235 +#define TXFIFOEMT 0x0020
5236 +#define RXUNDERR 0x0040
5237 +#define RXOVFERR 0x0080
5238 +#define RXTIMEOUT 0x0100
5239 +#define RXFIFOFULL 0x0200
5240 +#define RXFIFOTHOLD 0x0400
5241 +#define RXFIFONE 0x0800
5242 +#define RXFRAMERR 0x1000
5243 +#define RXPARERR 0x2000
5244 +#define RXBRK 0x4000
5245 +
5246 + uint16 unused2;
5247 + uint16 Data; /* Write to TX, Read from RX */
5248 + /* bits 11:8 are BRK,PAR,FRM errors */
5249 +
5250 + uint32 unused3;
5251 + uint32 unused4;
5252 +} Uart;
5253 +
5254 +#define UART ((volatile Uart * const) UART_BASE)
5255 +
5256 +typedef struct GpioControl {
5257 + uint32 GPIODir_high; /* bits 36:32 */
5258 + uint32 GPIODir; /* bits 31:00 */
5259 + uint32 GPIOio_high; /* bits 36:32 */
5260 + uint32 GPIOio; /* bits 31:00 */
5261 + uint32 LEDCtrl;
5262 +#define LED3_STROBE 0x08000000
5263 +#define LED2_STROBE 0x04000000
5264 +#define LED1_STROBE 0x02000000
5265 +#define LED0_STROBE 0x01000000
5266 +#define LED_TEST 0x00010000
5267 +#define LED3_DISABLE_LINK_ACT 0x00008000
5268 +#define LED2_DISABLE_LINK_ACT 0x00004000
5269 +#define LED1_DISABLE_LINK_ACT 0x00002000
5270 +#define LED0_DISABLE_LINK_ACT 0x00001000
5271 +#define LED_INTERVAL_SET_MASK 0x00000f00
5272 +#define LED_INTERVAL_SET_320MS 0x00000500
5273 +#define LED_INTERVAL_SET_160MS 0x00000400
5274 +#define LED_INTERVAL_SET_80MS 0x00000300
5275 +#define LED_INTERVAL_SET_40MS 0x00000200
5276 +#define LED_INTERVAL_SET_20MS 0x00000100
5277 +#define LED3_ON 0x00000080
5278 +#define LED2_ON 0x00000040
5279 +#define LED1_ON 0x00000020
5280 +#define LED0_ON 0x00000010
5281 +#define LED3_ENABLE 0x00000008
5282 +#define LED2_ENABLE 0x00000004
5283 +#define LED1_ENABLE 0x00000002
5284 +#define LED0_ENABLE 0x00000001
5285 + uint32 SpiSlaveCfg;
5286 +#define SPI_SLAVE_RESET 0x00010000
5287 +#define SPI_RESTRICT 0x00000400
5288 +#define SPI_DELAY_DISABLE 0x00000200
5289 +#define SPI_PROBE_MUX_SEL_MASK 0x000001e0
5290 +#define SPI_SER_ADDR_CFG_MASK 0x0000000c
5291 +#define SPI_MODE 0x00000001
5292 + uint32 GPIOMode;
5293 +#define GROUP4_DIAG 0x00090000
5294 +#define GROUP4_UTOPIA 0x00080000
5295 +#define GROUP4_LEGACY_LED 0x00030000
5296 +#define GROUP4_MII_SNOOP 0x00020000
5297 +#define GROUP4_EXT_EPHY 0x00010000
5298 +#define GROUP3_DIAG 0x00009000
5299 +#define GROUP3_UTOPIA 0x00008000
5300 +#define GROUP3_EXT_MII 0x00007000
5301 +#define GROUP2_DIAG 0x00000900
5302 +#define GROUP2_PCI 0x00000500
5303 +#define GROUP1_DIAG 0x00000090
5304 +#define GROUP1_UTOPIA 0x00000080
5305 +#define GROUP1_SPI_UART 0x00000060
5306 +#define GROUP1_SPI_MASTER 0x00000060
5307 +#define GROUP1_MII_PCCARD 0x00000040
5308 +#define GROUP1_MII_SNOOP 0x00000020
5309 +#define GROUP1_EXT_EPHY 0x00000010
5310 +#define GROUP0_DIAG 0x00000009
5311 +#define GROUP0_EXT_MII 0x00000007
5312 +
5313 +} GpioControl;
5314 +
5315 +#define GPIO ((volatile GpioControl * const) GPIO_BASE)
5316 +
5317 +/* Number to mask conversion macro used for GPIODir and GPIOio */
5318 +#define GPIO_NUM_TOTAL_BITS_MASK 0x3f
5319 +#define GPIO_NUM_MAX_BITS_MASK 0x1f
5320 +#define GPIO_NUM_TO_MASK(X) ( (((X) & GPIO_NUM_TOTAL_BITS_MASK) < 32) ? (1 << ((X) & GPIO_NUM_MAX_BITS_MASK)) : (0) )
5321 +
5322 +/* Number to mask conversion macro used for GPIODir_high and GPIOio_high */
5323 +#define GPIO_NUM_MAX_BITS_MASK_HIGH 0x07
5324 +#define GPIO_NUM_TO_MASK_HIGH(X) ( (((X) & GPIO_NUM_TOTAL_BITS_MASK) >= 32) ? (1 << ((X-32) & GPIO_NUM_MAX_BITS_MASK_HIGH)) : (0) )
5325 +
5326 +
5327 +/*
5328 +** External Bus Interface
5329 +*/
5330 +typedef struct EbiChipSelect {
5331 + uint32 base; /* base address in upper 24 bits */
5332 +#define EBI_SIZE_8K 0
5333 +#define EBI_SIZE_16K 1
5334 +#define EBI_SIZE_32K 2
5335 +#define EBI_SIZE_64K 3
5336 +#define EBI_SIZE_128K 4
5337 +#define EBI_SIZE_256K 5
5338 +#define EBI_SIZE_512K 6
5339 +#define EBI_SIZE_1M 7
5340 +#define EBI_SIZE_2M 8
5341 +#define EBI_SIZE_4M 9
5342 +#define EBI_SIZE_8M 10
5343 +#define EBI_SIZE_16M 11
5344 +#define EBI_SIZE_32M 12
5345 +#define EBI_SIZE_64M 13
5346 +#define EBI_SIZE_128M 14
5347 +#define EBI_SIZE_256M 15
5348 + uint32 config;
5349 +#define EBI_ENABLE 0x00000001 /* .. enable this range */
5350 +#define EBI_WAIT_STATES 0x0000000e /* .. mask for wait states */
5351 +#define EBI_WTST_SHIFT 1 /* .. for shifting wait states */
5352 +#define EBI_WORD_WIDE 0x00000010 /* .. 16-bit peripheral, else 8 */
5353 +#define EBI_WREN 0x00000020 /* enable posted writes */
5354 +#define EBI_POLARITY 0x00000040 /* .. set to invert something,
5355 + ** don't know what yet */
5356 +#define EBI_TS_TA_MODE 0x00000080 /* .. use TS/TA mode */
5357 +#define EBI_TS_SEL 0x00000100 /* .. drive tsize, not bs_b */
5358 +#define EBI_FIFO 0x00000200 /* .. use fifo */
5359 +#define EBI_RE 0x00000400 /* .. Reverse Endian */
5360 +} EbiChipSelect;
5361 +
5362 +typedef struct MpiRegisters {
5363 + EbiChipSelect cs[7]; /* size chip select configuration */
5364 +#define EBI_CS0_BASE 0
5365 +#define EBI_CS1_BASE 1
5366 +#define EBI_CS2_BASE 2
5367 +#define EBI_CS3_BASE 3
5368 +#define PCMCIA_COMMON_BASE 4
5369 +#define PCMCIA_ATTRIBUTE_BASE 5
5370 +#define PCMCIA_IO_BASE 6
5371 + uint32 unused0[2]; /* reserved */
5372 + uint32 ebi_control; /* ebi control */
5373 + uint32 unused1[4]; /* reserved */
5374 +#define EBI_ACCESS_TIMEOUT 0x000007FF
5375 + uint32 pcmcia_cntl1; /* pcmcia control 1 */
5376 +#define PCCARD_CARD_RESET 0x00040000
5377 +#define CARDBUS_ENABLE 0x00008000
5378 +#define PCMCIA_ENABLE 0x00004000
5379 +#define PCMCIA_GPIO_ENABLE 0x00002000
5380 +#define CARDBUS_IDSEL 0x00001F00
5381 +#define VS2_OEN 0x00000080
5382 +#define VS1_OEN 0x00000040
5383 +#define VS2_OUT 0x00000020
5384 +#define VS1_OUT 0x00000010
5385 +#define VS2_IN 0x00000008
5386 +#define VS1_IN 0x00000004
5387 +#define CD2_IN 0x00000002
5388 +#define CD1_IN 0x00000001
5389 +#define VS_MASK 0x0000000C
5390 +#define CD_MASK 0x00000003
5391 + uint32 unused2; /* reserved */
5392 + uint32 pcmcia_cntl2; /* pcmcia control 2 */
5393 +#define PCMCIA_BYTESWAP_DIS 0x00000002
5394 +#define PCMCIA_HALFWORD_EN 0x00000001
5395 +#define RW_ACTIVE_CNT_BIT 2
5396 +#define INACTIVE_CNT_BIT 8
5397 +#define CE_SETUP_CNT_BIT 16
5398 +#define CE_HOLD_CNT_BIT 24
5399 + uint32 unused3[40]; /* reserved */
5400 +
5401 + uint32 sp0range; /* PCI to internal system bus address space */
5402 + uint32 sp0remap;
5403 + uint32 sp0cfg;
5404 + uint32 sp1range;
5405 + uint32 sp1remap;
5406 + uint32 sp1cfg;
5407 +
5408 + uint32 EndianCfg;
5409 +
5410 + uint32 l2pcfgctl; /* internal system bus to PCI IO/Cfg control */
5411 +#define DIR_CFG_SEL 0x80000000 /* change from PCI I/O access to PCI config access */
5412 +#define DIR_CFG_USEREG 0x40000000 /* use this register info for PCI configuration access */
5413 +#define DEVICE_NUMBER 0x00007C00 /* device number for the PCI configuration access */
5414 +#define FUNC_NUMBER 0x00000300 /* function number for the PCI configuration access */
5415 +#define REG_NUMBER 0x000000FC /* register number for the PCI configuration access */
5416 +#define CONFIG_TYPE 0x00000003 /* configuration type for the PCI configuration access */
5417 +
5418 + uint32 l2pmrange1; /* internal system bus to PCI memory space */
5419 +#define PCI_SIZE_64K 0xFFFF0000
5420 +#define PCI_SIZE_128K 0xFFFE0000
5421 +#define PCI_SIZE_256K 0xFFFC0000
5422 +#define PCI_SIZE_512K 0xFFF80000
5423 +#define PCI_SIZE_1M 0xFFF00000
5424 +#define PCI_SIZE_2M 0xFFE00000
5425 +#define PCI_SIZE_4M 0xFFC00000
5426 +#define PCI_SIZE_8M 0xFF800000
5427 +#define PCI_SIZE_16M 0xFF000000
5428 +#define PCI_SIZE_32M 0xFE000000
5429 + uint32 l2pmbase1; /* kseg0 or kseg1 address & 0x1FFFFFFF */
5430 + uint32 l2pmremap1;
5431 +#define CARDBUS_MEM 0x00000004
5432 +#define MEM_WINDOW_EN 0x00000001
5433 + uint32 l2pmrange2;
5434 + uint32 l2pmbase2;
5435 + uint32 l2pmremap2;
5436 + uint32 l2piorange; /* internal system bus to PCI I/O space */
5437 + uint32 l2piobase;
5438 + uint32 l2pioremap;
5439 +
5440 + uint32 pcimodesel;
5441 +#define PCI2_INT_BUS_RD_PREFECH 0x000000F0
5442 +#define PCI_BAR2_NOSWAP 0x00000002 /* BAR at offset 0x20 */
5443 +#define PCI_BAR1_NOSWAP 0x00000001 /* BAR at affset 0x1c */
5444 +
5445 + uint32 pciintstat; /* PCI interrupt mask/status */
5446 +#define MAILBOX1_SENT 0x08
5447 +#define MAILBOX0_SENT 0x04
5448 +#define MAILBOX1_MSG_RCV 0x02
5449 +#define MAILBOX0_MSG_RCV 0x01
5450 + uint32 locbuscntrl; /* internal system bus control */
5451 +#define DIR_U2P_NOSWAP 0x00000002
5452 +#define EN_PCI_GPIO 0x00000001
5453 + uint32 locintstat; /* internal system bus interrupt mask/status */
5454 +#define CSERR 0x0200
5455 +#define SERR 0x0100
5456 +#define EXT_PCI_INT 0x0080
5457 +#define DIR_FAILED 0x0040
5458 +#define DIR_COMPLETE 0x0020
5459 +#define PCI_CFG 0x0010
5460 + uint32 unused5[7];
5461 +
5462 + uint32 mailbox0;
5463 + uint32 mailbox1;
5464 +
5465 + uint32 pcicfgcntrl; /* internal system bus PCI configuration control */
5466 +#define PCI_CFG_REG_WRITE_EN 0x00000080
5467 +#define PCI_CFG_ADDR 0x0000003C
5468 + uint32 pcicfgdata; /* internal system bus PCI configuration data */
5469 +
5470 + uint32 locch2ctl; /* PCI to interrnal system bus DMA (downstream) local control */
5471 +#define MPI_DMA_HALT 0x00000008 /* idle after finish current memory burst */
5472 +#define MPI_DMA_PKT_HALT 0x00000004 /* idle after an EOP flag is detected */
5473 +#define MPI_DMA_STALL 0x00000002 /* idle after an EOP flag is detected */
5474 +#define MPI_DMA_ENABLE 0x00000001 /* set to enable channel */
5475 + uint32 locch2intStat;
5476 +#define MPI_DMA_NO_DESC 0x00000004 /* no valid descriptors */
5477 +#define MPI_DMA_DONE 0x00000002 /* packet xfer complete */
5478 +#define MPI_DMA_BUFF_DONE 0x00000001 /* buffer done */
5479 + uint32 locch2intMask;
5480 + uint32 unused6;
5481 + uint32 locch2descaddr;
5482 + uint32 locch2status1;
5483 +#define LOCAL_DESC_STATE 0xE0000000
5484 +#define PCI_DESC_STATE 0x1C000000
5485 +#define BYTE_DONE 0x03FFC000
5486 +#define RING_ADDR 0x00003FFF
5487 + uint32 locch2status2;
5488 +#define BUFPTR_OFFSET 0x1FFF0000
5489 +#define PCI_MASTER_STATE 0x000000C0
5490 +#define LOC_MASTER_STATE 0x00000038
5491 +#define CONTROL_STATE 0x00000007
5492 + uint32 unused7;
5493 +
5494 + uint32 locch1Ctl; /*internal system bus to PCI DMA (upstream) local control */
5495 +#define DMA_U2P_LE 0x00000200 /* local bus is little endian */
5496 +#define DMA_U2P_NOSWAP 0x00000100 /* lccal bus is little endian but no data swapped */
5497 + uint32 locch1intstat;
5498 + uint32 locch1intmask;
5499 + uint32 unused8;
5500 + uint32 locch1descaddr;
5501 + uint32 locch1status1;
5502 + uint32 locch1status2;
5503 + uint32 unused9;
5504 +
5505 + uint32 pcich1ctl; /* internal system bus to PCI DMA PCI control */
5506 + uint32 pcich1intstat;
5507 + uint32 pcich1intmask;
5508 + uint32 pcich1descaddr;
5509 + uint32 pcich1status1;
5510 + uint32 pcich1status2;
5511 +
5512 + uint32 pcich2Ctl; /* PCI to internal system bus DMA PCI control */
5513 + uint32 pcich2intstat;
5514 + uint32 pcich2intmask;
5515 + uint32 pcich2descaddr;
5516 + uint32 pcich2status1;
5517 + uint32 pcich2status2;
5518 +
5519 + uint32 perm_id; /* permanent device and vendor id */
5520 + uint32 perm_rev; /* permanent revision id */
5521 +} MpiRegisters;
5522 +
5523 +#define MPI ((volatile MpiRegisters * const) MPI_BASE)
5524 +
5525 +/* PCI configuration address space start offset 0x40 */
5526 +#define BRCM_PCI_CONFIG_TIMER 0x40
5527 +#define BRCM_PCI_CONFIG_TIMER_RETRY_MASK 0x0000FF00
5528 +#define BRCM_PCI_CONFIG_TIMER_TRDY_MASK 0x000000FF
5529 +
5530 +/* USB host non-Open HCI register, USB_HOST_NON_OHCI, bit definitions. */
5531 +#define NON_OHCI_ENABLE_PORT1 0x00000001 /* Use USB port 1 for host, not dev */
5532 +#define NON_OHCI_BYTE_SWAP 0x00000008 /* Swap USB host registers */
5533 +
5534 +#define USBH_NON_OHCI ((volatile unsigned long * const) USB_HOST_NON_OHCI)
5535 +
5536 +#endif
5537 +
5538 diff -urN linux.old/arch/mips/bcm963xx/include/bcm_intr.h linux.dev/arch/mips/bcm963xx/include/bcm_intr.h
5539 --- linux.old/arch/mips/bcm963xx/include/bcm_intr.h 1970-01-01 01:00:00.000000000 +0100
5540 +++ linux.dev/arch/mips/bcm963xx/include/bcm_intr.h 2006-08-25 00:39:38.000000000 +0200
5541 @@ -0,0 +1,59 @@
5542 +/*
5543 +<:copyright-gpl
5544 + Copyright 2003 Broadcom Corp. All Rights Reserved.
5545 +
5546 + This program is free software; you can distribute it and/or modify it
5547 + under the terms of the GNU General Public License (Version 2) as
5548 + published by the Free Software Foundation.
5549 +
5550 + This program is distributed in the hope it will be useful, but WITHOUT
5551 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
5552 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
5553 + for more details.
5554 +
5555 + You should have received a copy of the GNU General Public License along
5556 + with this program; if not, write to the Free Software Foundation, Inc.,
5557 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
5558 +:>
5559 +*/
5560 +
5561 +#ifndef __BCM_INTR_H
5562 +#define __BCM_INTR_H
5563 +
5564 +#ifdef __cplusplus
5565 + extern "C" {
5566 +#endif
5567 +
5568 +#if defined(CONFIG_BCM96338)
5569 +#include <6338_intr.h>
5570 +#endif
5571 +#if defined(CONFIG_BCM96345)
5572 +#include <6345_intr.h>
5573 +#endif
5574 +#if defined(CONFIG_BCM96348)
5575 +#include <6348_intr.h>
5576 +#endif
5577 +
5578 +/* defines */
5579 +struct pt_regs;
5580 +typedef int (*FN_HANDLER) (int, void *, struct pt_regs *);
5581 +
5582 +/* prototypes */
5583 +extern void enable_brcm_irq(unsigned int irq);
5584 +extern void disable_brcm_irq(unsigned int irq);
5585 +extern int request_external_irq(unsigned int irq,
5586 + FN_HANDLER handler, unsigned long irqflags,
5587 + const char * devname, void *dev_id);
5588 +extern unsigned int BcmHalMapInterrupt(FN_HANDLER isr, unsigned int param,
5589 + unsigned int interruptId);
5590 +extern void dump_intr_regs(void);
5591 +
5592 +/* compatibility definitions */
5593 +#define BcmHalInterruptEnable(irq) enable_brcm_irq( irq )
5594 +#define BcmHalInterruptDisable(irq) disable_brcm_irq( irq )
5595 +
5596 +#ifdef __cplusplus
5597 + }
5598 +#endif
5599 +
5600 +#endif
5601 diff -urN linux.old/arch/mips/bcm963xx/include/bcm_map_part.h linux.dev/arch/mips/bcm963xx/include/bcm_map_part.h
5602 --- linux.old/arch/mips/bcm963xx/include/bcm_map_part.h 1970-01-01 01:00:00.000000000 +0100
5603 +++ linux.dev/arch/mips/bcm963xx/include/bcm_map_part.h 2006-08-25 00:39:38.000000000 +0200
5604 @@ -0,0 +1,34 @@
5605 +/*
5606 +<:copyright-gpl
5607 + Copyright 2004 Broadcom Corp. All Rights Reserved.
5608 +
5609 + This program is free software; you can distribute it and/or modify it
5610 + under the terms of the GNU General Public License (Version 2) as
5611 + published by the Free Software Foundation.
5612 +
5613 + This program is distributed in the hope it will be useful, but WITHOUT
5614 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
5615 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
5616 + for more details.
5617 +
5618 + You should have received a copy of the GNU General Public License along
5619 + with this program; if not, write to the Free Software Foundation, Inc.,
5620 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
5621 +:>
5622 +*/
5623 +
5624 +#ifndef __BCM_MAP_PART_H
5625 +#define __BCM_MAP_PART_H
5626 +
5627 +#if defined(CONFIG_BCM96338)
5628 +#include <6338_map_part.h>
5629 +#endif
5630 +#if defined(CONFIG_BCM96345)
5631 +#include <6345_map_part.h>
5632 +#endif
5633 +#if defined(CONFIG_BCM96348)
5634 +#include <6348_map_part.h>
5635 +#endif
5636 +
5637 +#endif
5638 +
5639 diff -urN linux.old/arch/mips/bcm963xx/include/bcmpci.h linux.dev/arch/mips/bcm963xx/include/bcmpci.h
5640 --- linux.old/arch/mips/bcm963xx/include/bcmpci.h 1970-01-01 01:00:00.000000000 +0100
5641 +++ linux.dev/arch/mips/bcm963xx/include/bcmpci.h 2006-08-25 00:39:38.000000000 +0200
5642 @@ -0,0 +1,87 @@
5643 +/*
5644 +<:copyright-gpl
5645 + Copyright 2004 Broadcom Corp. All Rights Reserved.
5646 +
5647 + This program is free software; you can distribute it and/or modify it
5648 + under the terms of the GNU General Public License (Version 2) as
5649 + published by the Free Software Foundation.
5650 +
5651 + This program is distributed in the hope it will be useful, but WITHOUT
5652 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
5653 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
5654 + for more details.
5655 +
5656 + You should have received a copy of the GNU General Public License along
5657 + with this program; if not, write to the Free Software Foundation, Inc.,
5658 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
5659 +:>
5660 +*/
5661 +
5662 +//
5663 +// bcmpci.h - bcm96348 PCI, Cardbus, and PCMCIA definition
5664 +//
5665 +#ifndef BCMPCI_H
5666 +#define BCMPCI_H
5667 +
5668 +/* Memory window in internal system bus address space */
5669 +#define BCM_PCI_MEM_BASE 0x08000000
5670 +/* IO window in internal system bus address space */
5671 +#define BCM_PCI_IO_BASE 0x0C000000
5672 +
5673 +#define BCM_PCI_ADDR_MASK 0x1fffffff
5674 +
5675 +/* Memory window size (range) */
5676 +#define BCM_PCI_MEM_SIZE_16MB 0x01000000
5677 +/* IO window size (range) */
5678 +#define BCM_PCI_IO_SIZE_64KB 0x00010000
5679 +
5680 +/* PCI Configuration and I/O space acesss */
5681 +#define BCM_PCI_CFG(d, f, o) ( (d << 11) | (f << 8) | (o/4 << 2) )
5682 +
5683 +/* fake USB PCI slot */
5684 +#define USB_HOST_SLOT 9
5685 +#define USB_BAR0_MEM_SIZE 0x0800
5686 +
5687 +#define BCM_HOST_MEM_SPACE1 0x10000000
5688 +#define BCM_HOST_MEM_SPACE2 0x00000000
5689 +
5690 +/*
5691 + * EBI bus clock is 33MHz and share with PCI bus
5692 + * each clock cycle is 30ns.
5693 + */
5694 +/* attribute memory access wait cnt for 4306 */
5695 +#define PCMCIA_ATTR_CE_HOLD 3 // data hold time 70ns
5696 +#define PCMCIA_ATTR_CE_SETUP 3 // data setup time 50ns
5697 +#define PCMCIA_ATTR_INACTIVE 6 // time between read/write cycles 180ns. For the total cycle time 600ns (cnt1+cnt2+cnt3+cnt4)
5698 +#define PCMCIA_ATTR_ACTIVE 10 // OE/WE pulse width 300ns
5699 +
5700 +/* common memory access wait cnt for 4306 */
5701 +#define PCMCIA_MEM_CE_HOLD 1 // data hold time 30ns
5702 +#define PCMCIA_MEM_CE_SETUP 1 // data setup time 30ns
5703 +#define PCMCIA_MEM_INACTIVE 2 // time between read/write cycles 40ns. For the total cycle time 250ns (cnt1+cnt2+cnt3+cnt4)
5704 +#define PCMCIA_MEM_ACTIVE 5 // OE/WE pulse width 150ns
5705 +
5706 +#define PCCARD_VCC_MASK 0x00070000 // Mask Reset also
5707 +#define PCCARD_VCC_33V 0x00010000
5708 +#define PCCARD_VCC_50V 0x00020000
5709 +
5710 +typedef enum {
5711 + MPI_CARDTYPE_NONE, // No Card in slot
5712 + MPI_CARDTYPE_PCMCIA, // 16-bit PCMCIA card in slot
5713 + MPI_CARDTYPE_CARDBUS, // 32-bit CardBus card in slot
5714 +} CardType;
5715 +
5716 +#define CARDBUS_SLOT 0 // Slot 0 is default for CardBus
5717 +
5718 +#define pcmciaAttrOffset 0x00200000
5719 +#define pcmciaMemOffset 0x00000000
5720 +// Needs to be right above PCI I/O space. Give 0x8000 (32K) to PCMCIA.
5721 +#define pcmciaIoOffset (BCM_PCI_IO_BASE + 0x80000)
5722 +// Base Address is that mapped into the MPI ChipSelect registers.
5723 +// UBUS bridge MemoryWindow 0 outputs a 0x00 for the base.
5724 +#define pcmciaBase 0xbf000000
5725 +#define pcmciaAttr (pcmciaAttrOffset | pcmciaBase)
5726 +#define pcmciaMem (pcmciaMemOffset | pcmciaBase)
5727 +#define pcmciaIo (pcmciaIoOffset | pcmciaBase)
5728 +
5729 +#endif
5730 diff -urN linux.old/arch/mips/bcm963xx/include/bcmTag.h linux.dev/arch/mips/bcm963xx/include/bcmTag.h
5731 --- linux.old/arch/mips/bcm963xx/include/bcmTag.h 1970-01-01 01:00:00.000000000 +0100
5732 +++ linux.dev/arch/mips/bcm963xx/include/bcmTag.h 2006-08-25 00:39:38.000000000 +0200
5733 @@ -0,0 +1,153 @@
5734 +/*
5735 +<:copyright-gpl
5736 + Copyright 2002 Broadcom Corp. All Rights Reserved.
5737 +
5738 + This program is free software; you can distribute it and/or modify it
5739 + under the terms of the GNU General Public License (Version 2) as
5740 + published by the Free Software Foundation.
5741 +
5742 + This program is distributed in the hope it will be useful, but WITHOUT
5743 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
5744 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
5745 + for more details.
5746 +
5747 + You should have received a copy of the GNU General Public License along
5748 + with this program; if not, write to the Free Software Foundation, Inc.,
5749 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
5750 +:>
5751 +*/
5752 +//**************************************************************************************
5753 +// File Name : bcmTag.h
5754 +//
5755 +// Description: add tag with validation system to the firmware image file to be uploaded
5756 +// via http
5757 +//
5758 +// Created : 02/28/2002 seanl
5759 +//**************************************************************************************
5760 +
5761 +#ifndef _BCMTAG_H_
5762 +#define _BCMTAG_H_
5763 +
5764 +
5765 +#define BCM_SIG_1 "Broadcom Corporation"
5766 +#define BCM_SIG_2 "ver. 2.0" // was "firmware version 2.0" now it is split 6 char out for chip id.
5767 +
5768 +#define BCM_TAG_VER "6"
5769 +#define BCM_TAG_VER_LAST "26"
5770 +
5771 +// file tag (head) structure all is in clear text except validationTokens (crc, md5, sha1, etc). Total: 128 unsigned chars
5772 +#define TAG_LEN 256
5773 +#define TAG_VER_LEN 4
5774 +#define SIG_LEN 20
5775 +#define SIG_LEN_2 14 // Original second SIG = 20 is now devided into 14 for SIG_LEN_2 and 6 for CHIP_ID
5776 +#define CHIP_ID_LEN 6
5777 +#define IMAGE_LEN 10
5778 +#define ADDRESS_LEN 12
5779 +#define FLAG_LEN 2
5780 +#define TOKEN_LEN 20
5781 +#define BOARD_ID_LEN 16
5782 +#define RESERVED_LEN (TAG_LEN - TAG_VER_LEN - SIG_LEN - SIG_LEN_2 - CHIP_ID_LEN - BOARD_ID_LEN - \
5783 + (4*IMAGE_LEN) - (3*ADDRESS_LEN) - (3*FLAG_LEN) - (2*TOKEN_LEN))
5784 +
5785 +
5786 +// TAG for downloadable image (kernel plus file system)
5787 +typedef struct _FILE_TAG
5788 +{
5789 + unsigned char tagVersion[TAG_VER_LEN]; // tag version. Will be 2 here.
5790 + unsigned char signiture_1[SIG_LEN]; // text line for company info
5791 + unsigned char signiture_2[SIG_LEN_2]; // additional info (can be version number)
5792 + unsigned char chipId[CHIP_ID_LEN]; // chip id
5793 + unsigned char boardId[BOARD_ID_LEN]; // board id
5794 + unsigned char bigEndian[FLAG_LEN]; // if = 1 - big, = 0 - little endia of the host
5795 + unsigned char totalImageLen[IMAGE_LEN]; // the sum of all the following length
5796 + unsigned char cfeAddress[ADDRESS_LEN]; // if non zero, cfe starting address
5797 + unsigned char cfeLen[IMAGE_LEN]; // if non zero, cfe size in clear ASCII text.
5798 + unsigned char rootfsAddress[ADDRESS_LEN]; // if non zero, filesystem starting address
5799 + unsigned char rootfsLen[IMAGE_LEN]; // if non zero, filesystem size in clear ASCII text.
5800 + unsigned char kernelAddress[ADDRESS_LEN]; // if non zero, kernel starting address
5801 + unsigned char kernelLen[IMAGE_LEN]; // if non zero, kernel size in clear ASCII text.
5802 + unsigned char dualImage[FLAG_LEN]; // if 1, dual image
5803 + unsigned char inactiveLen[FLAG_LEN]; // if 1, the image is INACTIVE; if 0, active
5804 + unsigned char reserved[RESERVED_LEN]; // reserved for later use
5805 + unsigned char imageValidationToken[TOKEN_LEN];// image validation token - can be crc, md5, sha; for
5806 + // now will be 4 unsigned char crc
5807 + unsigned char tagValidationToken[TOKEN_LEN]; // validation token for tag(from signiture_1 to end of // mageValidationToken)
5808 +} FILE_TAG, *PFILE_TAG;
5809 +
5810 +#define CRC32_INIT_VALUE 0xffffffff /* Initial CRC32 checksum value */
5811 +#define CRC_LEN 4
5812 +
5813 +// only included if for bcmTag.exe program
5814 +#ifdef BCMTAG_EXE_USE
5815 +
5816 +static unsigned long Crc32_table[256] = {
5817 + 0x00000000, 0x77073096, 0xEE0E612C, 0x990951BA,
5818 + 0x076DC419, 0x706AF48F, 0xE963A535, 0x9E6495A3,
5819 + 0x0EDB8832, 0x79DCB8A4, 0xE0D5E91E, 0x97D2D988,
5820 + 0x09B64C2B, 0x7EB17CBD, 0xE7B82D07, 0x90BF1D91,
5821 + 0x1DB71064, 0x6AB020F2, 0xF3B97148, 0x84BE41DE,
5822 + 0x1ADAD47D, 0x6DDDE4EB, 0xF4D4B551, 0x83D385C7,
5823 + 0x136C9856, 0x646BA8C0, 0xFD62F97A, 0x8A65C9EC,
5824 + 0x14015C4F, 0x63066CD9, 0xFA0F3D63, 0x8D080DF5,
5825 + 0x3B6E20C8, 0x4C69105E, 0xD56041E4, 0xA2677172,
5826 + 0x3C03E4D1, 0x4B04D447, 0xD20D85FD, 0xA50AB56B,
5827 + 0x35B5A8FA, 0x42B2986C, 0xDBBBC9D6, 0xACBCF940,
5828 + 0x32D86CE3, 0x45DF5C75, 0xDCD60DCF, 0xABD13D59,
5829 + 0x26D930AC, 0x51DE003A, 0xC8D75180, 0xBFD06116,
5830 + 0x21B4F4B5, 0x56B3C423, 0xCFBA9599, 0xB8BDA50F,
5831 + 0x2802B89E, 0x5F058808, 0xC60CD9B2, 0xB10BE924,
5832 + 0x2F6F7C87, 0x58684C11, 0xC1611DAB, 0xB6662D3D,
5833 + 0x76DC4190, 0x01DB7106, 0x98D220BC, 0xEFD5102A,
5834 + 0x71B18589, 0x06B6B51F, 0x9FBFE4A5, 0xE8B8D433,
5835 + 0x7807C9A2, 0x0F00F934, 0x9609A88E, 0xE10E9818,
5836 + 0x7F6A0DBB, 0x086D3D2D, 0x91646C97, 0xE6635C01,
5837 + 0x6B6B51F4, 0x1C6C6162, 0x856530D8, 0xF262004E,
5838 + 0x6C0695ED, 0x1B01A57B, 0x8208F4C1, 0xF50FC457,
5839 + 0x65B0D9C6, 0x12B7E950, 0x8BBEB8EA, 0xFCB9887C,
5840 + 0x62DD1DDF, 0x15DA2D49, 0x8CD37CF3, 0xFBD44C65,
5841 + 0x4DB26158, 0x3AB551CE, 0xA3BC0074, 0xD4BB30E2,
5842 + 0x4ADFA541, 0x3DD895D7, 0xA4D1C46D, 0xD3D6F4FB,
5843 + 0x4369E96A, 0x346ED9FC, 0xAD678846, 0xDA60B8D0,
5844 + 0x44042D73, 0x33031DE5, 0xAA0A4C5F, 0xDD0D7CC9,
5845 + 0x5005713C, 0x270241AA, 0xBE0B1010, 0xC90C2086,
5846 + 0x5768B525, 0x206F85B3, 0xB966D409, 0xCE61E49F,
5847 + 0x5EDEF90E, 0x29D9C998, 0xB0D09822, 0xC7D7A8B4,
5848 + 0x59B33D17, 0x2EB40D81, 0xB7BD5C3B, 0xC0BA6CAD,
5849 + 0xEDB88320, 0x9ABFB3B6, 0x03B6E20C, 0x74B1D29A,
5850 + 0xEAD54739, 0x9DD277AF, 0x04DB2615, 0x73DC1683,
5851 + 0xE3630B12, 0x94643B84, 0x0D6D6A3E, 0x7A6A5AA8,
5852 + 0xE40ECF0B, 0x9309FF9D, 0x0A00AE27, 0x7D079EB1,
5853 + 0xF00F9344, 0x8708A3D2, 0x1E01F268, 0x6906C2FE,
5854 + 0xF762575D, 0x806567CB, 0x196C3671, 0x6E6B06E7,
5855 + 0xFED41B76, 0x89D32BE0, 0x10DA7A5A, 0x67DD4ACC,
5856 + 0xF9B9DF6F, 0x8EBEEFF9, 0x17B7BE43, 0x60B08ED5,
5857 + 0xD6D6A3E8, 0xA1D1937E, 0x38D8C2C4, 0x4FDFF252,
5858 + 0xD1BB67F1, 0xA6BC5767, 0x3FB506DD, 0x48B2364B,
5859 + 0xD80D2BDA, 0xAF0A1B4C, 0x36034AF6, 0x41047A60,
5860 + 0xDF60EFC3, 0xA867DF55, 0x316E8EEF, 0x4669BE79,
5861 + 0xCB61B38C, 0xBC66831A, 0x256FD2A0, 0x5268E236,
5862 + 0xCC0C7795, 0xBB0B4703, 0x220216B9, 0x5505262F,
5863 + 0xC5BA3BBE, 0xB2BD0B28, 0x2BB45A92, 0x5CB36A04,
5864 + 0xC2D7FFA7, 0xB5D0CF31, 0x2CD99E8B, 0x5BDEAE1D,
5865 + 0x9B64C2B0, 0xEC63F226, 0x756AA39C, 0x026D930A,
5866 + 0x9C0906A9, 0xEB0E363F, 0x72076785, 0x05005713,
5867 + 0x95BF4A82, 0xE2B87A14, 0x7BB12BAE, 0x0CB61B38,
5868 + 0x92D28E9B, 0xE5D5BE0D, 0x7CDCEFB7, 0x0BDBDF21,
5869 + 0x86D3D2D4, 0xF1D4E242, 0x68DDB3F8, 0x1FDA836E,
5870 + 0x81BE16CD, 0xF6B9265B, 0x6FB077E1, 0x18B74777,
5871 + 0x88085AE6, 0xFF0F6A70, 0x66063BCA, 0x11010B5C,
5872 + 0x8F659EFF, 0xF862AE69, 0x616BFFD3, 0x166CCF45,
5873 + 0xA00AE278, 0xD70DD2EE, 0x4E048354, 0x3903B3C2,
5874 + 0xA7672661, 0xD06016F7, 0x4969474D, 0x3E6E77DB,
5875 + 0xAED16A4A, 0xD9D65ADC, 0x40DF0B66, 0x37D83BF0,
5876 + 0xA9BCAE53, 0xDEBB9EC5, 0x47B2CF7F, 0x30B5FFE9,
5877 + 0xBDBDF21C, 0xCABAC28A, 0x53B39330, 0x24B4A3A6,
5878 + 0xBAD03605, 0xCDD70693, 0x54DE5729, 0x23D967BF,
5879 + 0xB3667A2E, 0xC4614AB8, 0x5D681B02, 0x2A6F2B94,
5880 + 0xB40BBE37, 0xC30C8EA1, 0x5A05DF1B, 0x2D02EF8D
5881 +};
5882 +#endif // BCMTAG_USE
5883 +
5884 +
5885 +#endif // _BCMTAG_H_
5886 +
5887 diff -urN linux.old/arch/mips/bcm963xx/include/bcmtypes.h linux.dev/arch/mips/bcm963xx/include/bcmtypes.h
5888 --- linux.old/arch/mips/bcm963xx/include/bcmtypes.h 1970-01-01 01:00:00.000000000 +0100
5889 +++ linux.dev/arch/mips/bcm963xx/include/bcmtypes.h 2006-08-25 00:39:38.000000000 +0200
5890 @@ -0,0 +1,163 @@
5891 +/*
5892 +<:copyright-gpl
5893 + Copyright 2002 Broadcom Corp. All Rights Reserved.
5894 +
5895 + This program is free software; you can distribute it and/or modify it
5896 + under the terms of the GNU General Public License (Version 2) as
5897 + published by the Free Software Foundation.
5898 +
5899 + This program is distributed in the hope it will be useful, but WITHOUT
5900 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
5901 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
5902 + for more details.
5903 +
5904 + You should have received a copy of the GNU General Public License along
5905 + with this program; if not, write to the Free Software Foundation, Inc.,
5906 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
5907 +:>
5908 +*/
5909 +
5910 +//
5911 +// bcmtypes.h - misc useful typedefs
5912 +//
5913 +#ifndef BCMTYPES_H
5914 +#define BCMTYPES_H
5915 +
5916 +// These are also defined in typedefs.h in the application area, so I need to
5917 +// protect against re-definition.
5918 +
5919 +#ifndef _TYPEDEFS_H_
5920 +typedef unsigned char uint8;
5921 +typedef unsigned short uint16;
5922 +typedef unsigned long uint32;
5923 +typedef signed char int8;
5924 +typedef signed short int16;
5925 +typedef signed long int32;
5926 +#if !defined(__cplusplus)
5927 +typedef int bool;
5928 +#endif
5929 +#endif
5930 +
5931 +typedef unsigned char byte;
5932 +// typedef unsigned long sem_t;
5933 +
5934 +typedef unsigned long HANDLE,*PULONG,DWORD,*PDWORD;
5935 +typedef signed long LONG,*PLONG;
5936 +
5937 +typedef unsigned int *PUINT;
5938 +typedef signed int INT;
5939 +
5940 +typedef unsigned short *PUSHORT;
5941 +typedef signed short SHORT,*PSHORT;
5942 +typedef unsigned short WORD,*PWORD;
5943 +
5944 +typedef unsigned char *PUCHAR;
5945 +typedef signed char *PCHAR;
5946 +
5947 +typedef void *PVOID;
5948 +
5949 +typedef unsigned char BOOLEAN, *PBOOL, *PBOOLEAN;
5950 +
5951 +typedef unsigned char BYTE,*PBYTE;
5952 +
5953 +//#ifndef __GNUC__
5954 +//The following has been defined in Vxworks internally: vxTypesOld.h
5955 +//redefine under vxworks will cause error
5956 +typedef signed int *PINT;
5957 +
5958 +typedef signed char INT8;
5959 +typedef signed short INT16;
5960 +typedef signed long INT32;
5961 +
5962 +typedef unsigned char UINT8;
5963 +typedef unsigned short UINT16;
5964 +typedef unsigned long UINT32;
5965 +
5966 +typedef unsigned char UCHAR;
5967 +typedef unsigned short USHORT;
5968 +typedef unsigned int UINT;
5969 +typedef unsigned long ULONG;
5970 +
5971 +typedef void VOID;
5972 +typedef unsigned char BOOL;
5973 +
5974 +//#endif /* __GNUC__ */
5975 +
5976 +
5977 +// These are also defined in typedefs.h in the application area, so I need to
5978 +// protect against re-definition.
5979 +#ifndef TYPEDEFS_H
5980 +
5981 +// Maximum and minimum values for a signed 16 bit integer.
5982 +#define MAX_INT16 32767
5983 +#define MIN_INT16 -32768
5984 +
5985 +// Useful for true/false return values. This uses the
5986 +// Taligent notation (k for constant).
5987 +typedef enum
5988 +{
5989 + kFalse = 0,
5990 + kTrue = 1
5991 +} Bool;
5992 +
5993 +#endif
5994 +
5995 +/* macros to protect against unaligned accesses */
5996 +
5997 +#if 0
5998 +/* first arg is an address, second is a value */
5999 +#define PUT16( a, d ) { \
6000 + *((byte *)a) = (byte)((d)>>8); \
6001 + *(((byte *)a)+1) = (byte)(d); \
6002 +}
6003 +
6004 +#define PUT32( a, d ) { \
6005 + *((byte *)a) = (byte)((d)>>24); \
6006 + *(((byte *)a)+1) = (byte)((d)>>16); \
6007 + *(((byte *)a)+2) = (byte)((d)>>8); \
6008 + *(((byte *)a)+3) = (byte)(d); \
6009 +}
6010 +
6011 +/* first arg is an address, returns a value */
6012 +#define GET16( a ) ( \
6013 + (*((byte *)a) << 8) | \
6014 + (*(((byte *)a)+1)) \
6015 +)
6016 +
6017 +#define GET32( a ) ( \
6018 + (*((byte *)a) << 24) | \
6019 + (*(((byte *)a)+1) << 16) | \
6020 + (*(((byte *)a)+2) << 8) | \
6021 + (*(((byte *)a)+3)) \
6022 +)
6023 +#endif
6024 +
6025 +#ifndef YES
6026 +#define YES 1
6027 +#endif
6028 +
6029 +#ifndef NO
6030 +#define NO 0
6031 +#endif
6032 +
6033 +#ifndef IN
6034 +#define IN
6035 +#endif
6036 +
6037 +#ifndef OUT
6038 +#define OUT
6039 +#endif
6040 +
6041 +#ifndef TRUE
6042 +#define TRUE 1
6043 +#endif
6044 +
6045 +#ifndef FALSE
6046 +#define FALSE 0
6047 +#endif
6048 +
6049 +#define READ32(addr) (*(volatile UINT32 *)((ULONG)&addr))
6050 +#define READ16(addr) (*(volatile UINT16 *)((ULONG)&addr))
6051 +#define READ8(addr) (*(volatile UINT8 *)((ULONG)&addr))
6052 +
6053 +#endif
6054 diff -urN linux.old/arch/mips/bcm963xx/include/board.h linux.dev/arch/mips/bcm963xx/include/board.h
6055 --- linux.old/arch/mips/bcm963xx/include/board.h 1970-01-01 01:00:00.000000000 +0100
6056 +++ linux.dev/arch/mips/bcm963xx/include/board.h 2006-08-25 01:52:34.000000000 +0200
6057 @@ -0,0 +1,373 @@
6058 +/*
6059 +<:copyright-gpl
6060 + Copyright 2002 Broadcom Corp. All Rights Reserved.
6061 +
6062 + This program is free software; you can distribute it and/or modify it
6063 + under the terms of the GNU General Public License (Version 2) as
6064 + published by the Free Software Foundation.
6065 +
6066 + This program is distributed in the hope it will be useful, but WITHOUT
6067 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6068 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
6069 + for more details.
6070 +
6071 + You should have received a copy of the GNU General Public License along
6072 + with this program; if not, write to the Free Software Foundation, Inc.,
6073 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
6074 +:>
6075 +*/
6076 +/***********************************************************************/
6077 +/* */
6078 +/* MODULE: board.h */
6079 +/* DATE: 97/02/18 */
6080 +/* PURPOSE: Board specific information. This module should include */
6081 +/* all base device addresses and board specific macros. */
6082 +/* */
6083 +/***********************************************************************/
6084 +#ifndef _BOARD_H
6085 +#define _BOARD_H
6086 +
6087 +/*****************************************************************************/
6088 +/* Misc board definitions */
6089 +/*****************************************************************************/
6090 +
6091 +#define DYING_GASP_API
6092 +
6093 +/*****************************************************************************/
6094 +/* Physical Memory Map */
6095 +/*****************************************************************************/
6096 +
6097 +#define PHYS_DRAM_BASE 0x00000000 /* Dynamic RAM Base */
6098 +#define PHYS_FLASH_BASE 0x1FC00000 /* Flash Memory */
6099 +
6100 +/*****************************************************************************/
6101 +/* Note that the addresses above are physical addresses and that programs */
6102 +/* have to use converted addresses defined below: */
6103 +/*****************************************************************************/
6104 +#define DRAM_BASE (0x80000000 | PHYS_DRAM_BASE) /* cached DRAM */
6105 +#define DRAM_BASE_NOCACHE (0xA0000000 | PHYS_DRAM_BASE) /* uncached DRAM */
6106 +#define FLASH_BASE (0xA0000000 | PHYS_FLASH_BASE) /* uncached Flash */
6107 +
6108 +/*****************************************************************************/
6109 +/* Select the PLL value to get the desired CPU clock frequency. */
6110 +/* */
6111 +/* */
6112 +/*****************************************************************************/
6113 +#define FPERIPH 50000000
6114 +
6115 +#define ONEK 1024
6116 +#define BLK64K (64*ONEK)
6117 +#define FLASH45_BLKS_BOOT_ROM 1
6118 +#define FLASH45_LENGTH_BOOT_ROM (FLASH45_BLKS_BOOT_ROM * BLK64K)
6119 +#define FLASH_RESERVED_AT_END (64*ONEK) /*reserved for PSI, scratch pad*/
6120 +
6121 +/*****************************************************************************/
6122 +/* Note that the addresses above are physical addresses and that programs */
6123 +/* have to use converted addresses defined below: */
6124 +/*****************************************************************************/
6125 +#define DRAM_BASE (0x80000000 | PHYS_DRAM_BASE) /* cached DRAM */
6126 +#define DRAM_BASE_NOCACHE (0xA0000000 | PHYS_DRAM_BASE) /* uncached DRAM */
6127 +#define FLASH_BASE (0xA0000000 | PHYS_FLASH_BASE) /* uncached Flash */
6128 +
6129 +/*****************************************************************************/
6130 +/* Select the PLL value to get the desired CPU clock frequency. */
6131 +/* */
6132 +/* */
6133 +/*****************************************************************************/
6134 +#define FPERIPH 50000000
6135 +
6136 +#define SDRAM_TYPE_ADDRESS_OFFSET 16
6137 +#define NVRAM_DATA_OFFSET 0x0580
6138 +#define NVRAM_DATA_ID 0x0f1e2d3c
6139 +#define BOARD_SDRAM_TYPE *(unsigned long *) \
6140 + (FLASH_BASE + SDRAM_TYPE_ADDRESS_OFFSET)
6141 +
6142 +#define ONEK 1024
6143 +#define BLK64K (64*ONEK)
6144 +
6145 +// nvram and psi flash definitions for 45
6146 +#define FLASH45_LENGTH_NVRAM ONEK // 1k nvram
6147 +#define NVRAM_PSI_DEFAULT 24 // default psi in K byes
6148 +
6149 +/*****************************************************************************/
6150 +/* NVRAM Offset and definition */
6151 +/*****************************************************************************/
6152 +
6153 +#define NVRAM_VERSION_NUMBER 2
6154 +#define NVRAM_VERSION_NUMBER_ADDRESS 0
6155 +
6156 +#define NVRAM_BOOTLINE_LEN 256
6157 +#define NVRAM_BOARD_ID_STRING_LEN 16
6158 +#define NVRAM_MAC_ADDRESS_LEN 6
6159 +#define NVRAM_MAC_COUNT_MAX 32
6160 +
6161 +/*****************************************************************************/
6162 +/* Misc Offsets */
6163 +/*****************************************************************************/
6164 +
6165 +#define CFE_VERSION_OFFSET 0x0570
6166 +#define CFE_VERSION_MARK_SIZE 5
6167 +#define CFE_VERSION_SIZE 5
6168 +
6169 +typedef struct
6170 +{
6171 + unsigned long ulVersion;
6172 + char szBootline[NVRAM_BOOTLINE_LEN];
6173 + char szBoardId[NVRAM_BOARD_ID_STRING_LEN];
6174 + unsigned long ulReserved1[2];
6175 + unsigned long ulNumMacAddrs;
6176 + unsigned char ucaBaseMacAddr[NVRAM_MAC_ADDRESS_LEN];
6177 + char chReserved[2];
6178 + unsigned long ulCheckSum;
6179 +} NVRAM_DATA, *PNVRAM_DATA;
6180 +
6181 +
6182 +/*****************************************************************************/
6183 +/* board ioctl calls for flash, led and some other utilities */
6184 +/*****************************************************************************/
6185 +
6186 +
6187 +/* Defines. for board driver */
6188 +#define BOARD_IOCTL_MAGIC 'B'
6189 +#define BOARD_DRV_MAJOR 206
6190 +
6191 +#define MAC_ADDRESS_ANY (unsigned long) -1
6192 +
6193 +#define BOARD_IOCTL_FLASH_INIT \
6194 + _IOWR(BOARD_IOCTL_MAGIC, 0, BOARD_IOCTL_PARMS)
6195 +
6196 +#define BOARD_IOCTL_FLASH_WRITE \
6197 + _IOWR(BOARD_IOCTL_MAGIC, 1, BOARD_IOCTL_PARMS)
6198 +
6199 +#define BOARD_IOCTL_FLASH_READ \
6200 + _IOWR(BOARD_IOCTL_MAGIC, 2, BOARD_IOCTL_PARMS)
6201 +
6202 +#define BOARD_IOCTL_GET_NR_PAGES \
6203 + _IOWR(BOARD_IOCTL_MAGIC, 3, BOARD_IOCTL_PARMS)
6204 +
6205 +#define BOARD_IOCTL_DUMP_ADDR \
6206 + _IOWR(BOARD_IOCTL_MAGIC, 4, BOARD_IOCTL_PARMS)
6207 +
6208 +#define BOARD_IOCTL_SET_MEMORY \
6209 + _IOWR(BOARD_IOCTL_MAGIC, 5, BOARD_IOCTL_PARMS)
6210 +
6211 +#define BOARD_IOCTL_MIPS_SOFT_RESET \
6212 + _IOWR(BOARD_IOCTL_MAGIC, 6, BOARD_IOCTL_PARMS)
6213 +
6214 +#define BOARD_IOCTL_LED_CTRL \
6215 + _IOWR(BOARD_IOCTL_MAGIC, 7, BOARD_IOCTL_PARMS)
6216 +
6217 +#define BOARD_IOCTL_GET_ID \
6218 + _IOWR(BOARD_IOCTL_MAGIC, 8, BOARD_IOCTL_PARMS)
6219 +
6220 +#define BOARD_IOCTL_GET_MAC_ADDRESS \
6221 + _IOWR(BOARD_IOCTL_MAGIC, 9, BOARD_IOCTL_PARMS)
6222 +
6223 +#define BOARD_IOCTL_RELEASE_MAC_ADDRESS \
6224 + _IOWR(BOARD_IOCTL_MAGIC, 10, BOARD_IOCTL_PARMS)
6225 +
6226 +#define BOARD_IOCTL_GET_PSI_SIZE \
6227 + _IOWR(BOARD_IOCTL_MAGIC, 11, BOARD_IOCTL_PARMS)
6228 +
6229 +#define BOARD_IOCTL_GET_SDRAM_SIZE \
6230 + _IOWR(BOARD_IOCTL_MAGIC, 12, BOARD_IOCTL_PARMS)
6231 +
6232 +#define BOARD_IOCTL_SET_MONITOR_FD \
6233 + _IOWR(BOARD_IOCTL_MAGIC, 13, BOARD_IOCTL_PARMS)
6234 +
6235 +#define BOARD_IOCTL_WAKEUP_MONITOR_TASK \
6236 + _IOWR(BOARD_IOCTL_MAGIC, 14, BOARD_IOCTL_PARMS)
6237 +
6238 +#define BOARD_IOCTL_GET_BOOTLINE \
6239 + _IOWR(BOARD_IOCTL_MAGIC, 15, BOARD_IOCTL_PARMS)
6240 +
6241 +#define BOARD_IOCTL_SET_BOOTLINE \
6242 + _IOWR(BOARD_IOCTL_MAGIC, 16, BOARD_IOCTL_PARMS)
6243 +
6244 +#define BOARD_IOCTL_GET_BASE_MAC_ADDRESS \
6245 + _IOWR(BOARD_IOCTL_MAGIC, 17, BOARD_IOCTL_PARMS)
6246 +
6247 +#define BOARD_IOCTL_GET_CHIP_ID \
6248 + _IOWR(BOARD_IOCTL_MAGIC, 18, BOARD_IOCTL_PARMS)
6249 +
6250 +#define BOARD_IOCTL_GET_NUM_ENET \
6251 + _IOWR(BOARD_IOCTL_MAGIC, 19, BOARD_IOCTL_PARMS)
6252 +
6253 +#define BOARD_IOCTL_GET_CFE_VER \
6254 + _IOWR(BOARD_IOCTL_MAGIC, 20, BOARD_IOCTL_PARMS)
6255 +
6256 +#define BOARD_IOCTL_GET_ENET_CFG \
6257 + _IOWR(BOARD_IOCTL_MAGIC, 21, BOARD_IOCTL_PARMS)
6258 +
6259 +#define BOARD_IOCTL_GET_WLAN_ANT_INUSE \
6260 + _IOWR(BOARD_IOCTL_MAGIC, 22, BOARD_IOCTL_PARMS)
6261 +
6262 +#define BOARD_IOCTL_SET_TRIGGER_EVENT \
6263 + _IOWR(BOARD_IOCTL_MAGIC, 23, BOARD_IOCTL_PARMS)
6264 +
6265 +#define BOARD_IOCTL_GET_TRIGGER_EVENT \
6266 + _IOWR(BOARD_IOCTL_MAGIC, 24, BOARD_IOCTL_PARMS)
6267 +
6268 +#define BOARD_IOCTL_UNSET_TRIGGER_EVENT \
6269 + _IOWR(BOARD_IOCTL_MAGIC, 25, BOARD_IOCTL_PARMS)
6270 +
6271 +#define BOARD_IOCTL_SET_SES_LED \
6272 + _IOWR(BOARD_IOCTL_MAGIC, 26, BOARD_IOCTL_PARMS)
6273 +
6274 +//<<JUNHON, 2004/09/15, get reset button status , tim hou , 05/04/12
6275 +#define RESET_BUTTON_UP 1
6276 +#define RESET_BUTTON_PRESSDOWN 0
6277 +#define BOARD_IOCTL_GET_RESETHOLD \
6278 + _IOWR(BOARD_IOCTL_MAGIC, 27, BOARD_IOCTL_PARMS)
6279 +//>>JUNHON, 2004/09/15
6280 +
6281 +// for the action in BOARD_IOCTL_PARMS for flash operation
6282 +typedef enum
6283 +{
6284 + PERSISTENT,
6285 + NVRAM,
6286 + BCM_IMAGE_CFE,
6287 + BCM_IMAGE_FS,
6288 + BCM_IMAGE_KERNEL,
6289 + BCM_IMAGE_WHOLE,
6290 + SCRATCH_PAD,
6291 + FLASH_SIZE,
6292 +} BOARD_IOCTL_ACTION;
6293 +
6294 +
6295 +typedef struct boardIoctParms
6296 +{
6297 + char *string;
6298 + char *buf;
6299 + int strLen;
6300 + int offset;
6301 + BOARD_IOCTL_ACTION action; /* flash read/write: nvram, persistent, bcm image */
6302 + int result;
6303 +} BOARD_IOCTL_PARMS;
6304 +
6305 +
6306 +// LED defines
6307 +typedef enum
6308 +{
6309 + kLedAdsl,
6310 + kLedWireless,
6311 + kLedUsb,
6312 + kLedHpna,
6313 + kLedWanData,
6314 + kLedPPP,
6315 + kLedVoip,
6316 + kLedSes,
6317 + kLedLan,
6318 + kLedSelfTest,
6319 + kLedEnd, // NOTE: Insert the new led name before this one. Alway stay at the end.
6320 +} BOARD_LED_NAME;
6321 +
6322 +typedef enum
6323 +{
6324 + kLedStateOff, /* turn led off */
6325 + kLedStateOn, /* turn led on */
6326 + kLedStateFail, /* turn led on red */
6327 + kLedStateBlinkOnce, /* blink once, ~100ms and ignore the same call during the 100ms period */
6328 + kLedStateSlowBlinkContinues, /* slow blink continues at ~600ms interval */
6329 + kLedStateFastBlinkContinues, /* fast blink continues at ~200ms interval */
6330 +} BOARD_LED_STATE;
6331 +
6332 +
6333 +// virtual and physical map pair defined in board.c
6334 +typedef struct ledmappair
6335 +{
6336 + BOARD_LED_NAME ledName; // virtual led name
6337 + BOARD_LED_STATE ledInitState; // initial led state when the board boots.
6338 + unsigned short ledMask; // physical GPIO pin mask
6339 + unsigned short ledActiveLow; // reset bit to turn on LED
6340 + unsigned short ledMaskFail; // physical GPIO pin mask for state failure
6341 + unsigned short ledActiveLowFail;// reset bit to turn on LED
6342 +} LED_MAP_PAIR, *PLED_MAP_PAIR;
6343 +
6344 +typedef void (*HANDLE_LED_FUNC)(BOARD_LED_NAME ledName, BOARD_LED_STATE ledState);
6345 +
6346 +/* Flash storage address information that is determined by the flash driver. */
6347 +typedef struct flashaddrinfo
6348 +{
6349 + int flash_persistent_start_blk;
6350 + int flash_persistent_number_blk;
6351 + int flash_persistent_length;
6352 + unsigned long flash_persistent_blk_offset;
6353 + int flash_scratch_pad_start_blk; // start before psi (SP_BUF_LEN)
6354 + int flash_scratch_pad_number_blk;
6355 + int flash_scratch_pad_length;
6356 + unsigned long flash_scratch_pad_blk_offset;
6357 + int flash_nvram_start_blk;
6358 + int flash_nvram_number_blk;
6359 + int flash_nvram_length;
6360 + unsigned long flash_nvram_blk_offset;
6361 +} FLASH_ADDR_INFO, *PFLASH_ADDR_INFO;
6362 +
6363 +// scratch pad defines
6364 +/* SP - Persisten Scratch Pad format:
6365 + sp header : 32 bytes
6366 + tokenId-1 : 8 bytes
6367 + tokenId-1 len : 4 bytes
6368 + tokenId-1 data
6369 + ....
6370 + tokenId-n : 8 bytes
6371 + tokenId-n len : 4 bytes
6372 + tokenId-n data
6373 +*/
6374 +
6375 +#define MAGIC_NUM_LEN 8
6376 +#define MAGIC_NUMBER "gOGoBrCm"
6377 +#define TOKEN_NAME_LEN 16
6378 +#define SP_VERSION 1
6379 +#define SP_MAX_LEN 8 * 1024 // 8k buf before psi
6380 +#define SP_RESERVERD 16
6381 +
6382 +typedef struct _SP_HEADER
6383 +{
6384 + char SPMagicNum[MAGIC_NUM_LEN]; // 8 bytes of magic number
6385 + int SPVersion; // version number
6386 + int SPUsedLen; // used sp len
6387 + char SPReserved[SP_RESERVERD]; // reservied, total 32 bytes
6388 +} SP_HEADER, *PSP_HEADER;
6389 +
6390 +typedef struct _TOKEN_DEF
6391 +{
6392 + char tokenName[TOKEN_NAME_LEN];
6393 + int tokenLen;
6394 +} SP_TOKEN, *PSP_TOKEN;
6395 +
6396 +
6397 +/*****************************************************************************/
6398 +/* Function Prototypes */
6399 +/*****************************************************************************/
6400 +#if !defined(__ASM_ASM_H)
6401 +void dumpaddr( unsigned char *pAddr, int nLen );
6402 +
6403 +int kerSysNvRamGet(char *string, int strLen, int offset);
6404 +int kerSysNvRamSet(char *string, int strLen, int offset);
6405 +int kerSysPersistentGet(char *string, int strLen, int offset);
6406 +int kerSysPersistentSet(char *string, int strLen, int offset);
6407 +int kerSysScratchPadGet(char *tokName, char *tokBuf, int tokLen);
6408 +int kerSysScratchPadSet(char *tokName, char *tokBuf, int tokLen);
6409 +int kerSysBcmImageSet( int flash_start_addr, char *string, int size);
6410 +int kerSysGetMacAddress( unsigned char *pucaAddr, unsigned long ulId );
6411 +int kerSysReleaseMacAddress( unsigned char *pucaAddr );
6412 +int kerSysGetSdramSize( void );
6413 +void kerSysGetBootline(char *string, int strLen);
6414 +void kerSysSetBootline(char *string, int strLen);
6415 +void kerSysMipsSoftReset(void);
6416 +void kerSysLedCtrl(BOARD_LED_NAME, BOARD_LED_STATE);
6417 +void kerSysLedRegisterHwHandler( BOARD_LED_NAME, HANDLE_LED_FUNC, int );
6418 +int kerSysFlashSizeGet(void);
6419 +void kerSysRegisterDyingGaspHandler(char *devname, void *cbfn, void *context);
6420 +void kerSysDeregisterDyingGaspHandler(char *devname);
6421 +void kerSysWakeupMonitorTask( void );
6422 +#endif
6423 +
6424 +#define BOOT_CFE 0
6425 +#define BOOT_REDBOOT 1
6426 +
6427 +extern int boot_loader_type;
6428 +
6429 +#endif /* _BOARD_H */
6430 +
6431 diff -urN linux.old/arch/mips/bcm963xx/int-handler.S linux.dev/arch/mips/bcm963xx/int-handler.S
6432 --- linux.old/arch/mips/bcm963xx/int-handler.S 1970-01-01 01:00:00.000000000 +0100
6433 +++ linux.dev/arch/mips/bcm963xx/int-handler.S 2006-08-25 02:13:33.000000000 +0200
6434 @@ -0,0 +1,59 @@
6435 +/*
6436 +<:copyright-gpl
6437 + Copyright 2002 Broadcom Corp. All Rights Reserved.
6438 +
6439 + This program is free software; you can distribute it and/or modify it
6440 + under the terms of the GNU General Public License (Version 2) as
6441 + published by the Free Software Foundation.
6442 +
6443 + This program is distributed in the hope it will be useful, but WITHOUT
6444 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6445 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
6446 + for more details.
6447 +
6448 + You should have received a copy of the GNU General Public License along
6449 + with this program; if not, write to the Free Software Foundation, Inc.,
6450 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
6451 +:>
6452 +*/
6453 +/*
6454 + * Generic interrupt handler for Broadcom MIPS boards
6455 + */
6456 +
6457 +#include <linux/config.h>
6458 +
6459 +#include <asm/asm.h>
6460 +#include <asm/mipsregs.h>
6461 +#include <asm/regdef.h>
6462 +#include <asm/stackframe.h>
6463 +
6464 +/*
6465 + * MIPS IRQ Source
6466 + * -------- ------
6467 + * 0 Software (ignored)
6468 + * 1 Software (ignored)
6469 + * 2 Combined hardware interrupt (hw0)
6470 + * 3 Hardware
6471 + * 4 Hardware
6472 + * 5 Hardware
6473 + * 6 Hardware
6474 + * 7 R4k timer
6475 + */
6476 +
6477 + .text
6478 + .set noreorder
6479 + .set noat
6480 + .align 5
6481 + NESTED(brcmIRQ, PT_SIZE, sp)
6482 + SAVE_ALL
6483 + CLI
6484 + .set noreorder
6485 + .set at
6486 +
6487 + jal plat_irq_dispatch
6488 + move a0, sp
6489 +
6490 + j ret_from_irq
6491 + nop
6492 +
6493 + END(brcmIRQ)
6494 diff -urN linux.old/arch/mips/bcm963xx/irq.c linux.dev/arch/mips/bcm963xx/irq.c
6495 --- linux.old/arch/mips/bcm963xx/irq.c 1970-01-01 01:00:00.000000000 +0100
6496 +++ linux.dev/arch/mips/bcm963xx/irq.c 2006-08-25 03:54:34.000000000 +0200
6497 @@ -0,0 +1,256 @@
6498 +/*
6499 +<:copyright-gpl
6500 + Copyright 2002 Broadcom Corp. All Rights Reserved.
6501 +
6502 + This program is free software; you can distribute it and/or modify it
6503 + under the terms of the GNU General Public License (Version 2) as
6504 + published by the Free Software Foundation.
6505 +
6506 + This program is distributed in the hope it will be useful, but WITHOUT
6507 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6508 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
6509 + for more details.
6510 +
6511 + You should have received a copy of the GNU General Public License along
6512 + with this program; if not, write to the Free Software Foundation, Inc.,
6513 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
6514 +:>
6515 +*/
6516 +/*
6517 + * Interrupt control functions for Broadcom 963xx MIPS boards
6518 + */
6519 +
6520 +#include <asm/atomic.h>
6521 +
6522 +#include <linux/delay.h>
6523 +#include <linux/init.h>
6524 +#include <linux/ioport.h>
6525 +#include <linux/irq.h>
6526 +#include <linux/interrupt.h>
6527 +#include <linux/kernel.h>
6528 +#include <linux/slab.h>
6529 +#include <linux/module.h>
6530 +
6531 +#include <asm/irq.h>
6532 +#include <asm/mipsregs.h>
6533 +#include <asm/addrspace.h>
6534 +#include <asm/signal.h>
6535 +#include <bcm_map_part.h>
6536 +#include <bcm_intr.h>
6537 +
6538 +static void irq_dispatch_int(struct pt_regs *regs)
6539 +{
6540 + unsigned int pendingIrqs;
6541 + static unsigned int irqBit;
6542 + static unsigned int isrNumber = 31;
6543 +
6544 + pendingIrqs = PERF->IrqStatus & PERF->IrqMask;
6545 + if (!pendingIrqs) {
6546 + return;
6547 + }
6548 +
6549 + while (1) {
6550 + irqBit <<= 1;
6551 + isrNumber++;
6552 + if (isrNumber == 32) {
6553 + isrNumber = 0;
6554 + irqBit = 0x1;
6555 + }
6556 + if (pendingIrqs & irqBit) {
6557 + PERF->IrqMask &= ~irqBit; // mask
6558 + do_IRQ(isrNumber + INTERNAL_ISR_TABLE_OFFSET, regs);
6559 + break;
6560 + }
6561 + }
6562 +}
6563 +
6564 +static void irq_dispatch_ext(uint32 irq, struct pt_regs *regs)
6565 +{
6566 + if (!(PERF->ExtIrqCfg & (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_MASK_SHFT)))) {
6567 + printk("**** Ext IRQ mask. Should not dispatch ****\n");
6568 + }
6569 + /* disable and clear interrupt in the controller */
6570 + PERF->ExtIrqCfg |= (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_CLEAR_SHFT));
6571 + PERF->ExtIrqCfg &= ~(1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_MASK_SHFT));
6572 + do_IRQ(irq, regs);
6573 +}
6574 +
6575 +
6576 +extern void brcm_timer_interrupt(struct pt_regs *regs);
6577 +
6578 +asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
6579 +{
6580 + u32 cause;
6581 + while((cause = (read_c0_cause()& CAUSEF_IP))) {
6582 + if (cause & CAUSEF_IP7)
6583 + brcm_timer_interrupt(regs);
6584 + else if (cause & CAUSEF_IP2)
6585 + irq_dispatch_int(regs);
6586 + else if (cause & CAUSEF_IP3)
6587 + irq_dispatch_ext(INTERRUPT_ID_EXTERNAL_0, regs);
6588 + else if (cause & CAUSEF_IP4)
6589 + irq_dispatch_ext(INTERRUPT_ID_EXTERNAL_1, regs);
6590 + else if (cause & CAUSEF_IP5)
6591 + irq_dispatch_ext(INTERRUPT_ID_EXTERNAL_2, regs);
6592 + else if (cause & CAUSEF_IP6)
6593 + irq_dispatch_ext(INTERRUPT_ID_EXTERNAL_3, regs);
6594 + local_irq_disable();
6595 + }
6596 +}
6597 +
6598 +
6599 +void enable_brcm_irq(unsigned int irq)
6600 +{
6601 + unsigned long flags;
6602 +
6603 + local_irq_save(flags);
6604 + if( irq >= INTERNAL_ISR_TABLE_OFFSET ) {
6605 + PERF->IrqMask |= (1 << (irq - INTERNAL_ISR_TABLE_OFFSET));
6606 + }
6607 + else if (irq >= INTERRUPT_ID_EXTERNAL_0 && irq <= INTERRUPT_ID_EXTERNAL_3) {
6608 + /* enable and clear interrupt in the controller */
6609 + PERF->ExtIrqCfg |= (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_CLEAR_SHFT));
6610 + PERF->ExtIrqCfg |= (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_MASK_SHFT));
6611 + }
6612 + local_irq_restore(flags);
6613 +}
6614 +
6615 +void disable_brcm_irq(unsigned int irq)
6616 +{
6617 + unsigned long flags;
6618 +
6619 + local_irq_save(flags);
6620 + if( irq >= INTERNAL_ISR_TABLE_OFFSET ) {
6621 + PERF->IrqMask &= ~(1 << (irq - INTERNAL_ISR_TABLE_OFFSET));
6622 + }
6623 + else if (irq >= INTERRUPT_ID_EXTERNAL_0 && irq <= INTERRUPT_ID_EXTERNAL_3) {
6624 + /* disable interrupt in the controller */
6625 + PERF->ExtIrqCfg &= ~(1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_MASK_SHFT));
6626 + }
6627 + local_irq_restore(flags);
6628 +}
6629 +
6630 +void ack_brcm_irq(unsigned int irq)
6631 +{
6632 + /* Already done in brcm_irq_dispatch */
6633 +}
6634 +
6635 +unsigned int startup_brcm_irq(unsigned int irq)
6636 +{
6637 + enable_brcm_irq(irq);
6638 +
6639 + return 0; /* never anything pending */
6640 +}
6641 +
6642 +unsigned int startup_brcm_none(unsigned int irq)
6643 +{
6644 + return 0;
6645 +}
6646 +
6647 +void end_brcm_irq(unsigned int irq)
6648 +{
6649 + if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
6650 + enable_brcm_irq(irq);
6651 +}
6652 +
6653 +void end_brcm_none(unsigned int irq)
6654 +{
6655 +}
6656 +
6657 +static struct hw_interrupt_type brcm_irq_type = {
6658 + .typename = "MIPS",
6659 + .startup = startup_brcm_irq,
6660 + .shutdown = disable_brcm_irq,
6661 + .enable = enable_brcm_irq,
6662 + .disable = disable_brcm_irq,
6663 + .ack = ack_brcm_irq,
6664 + .end = end_brcm_irq,
6665 + .set_affinity = NULL
6666 +};
6667 +
6668 +static struct hw_interrupt_type brcm_irq_no_end_type = {
6669 + .typename = "MIPS",
6670 + .startup = startup_brcm_none,
6671 + .shutdown = disable_brcm_irq,
6672 + .enable = enable_brcm_irq,
6673 + .disable = disable_brcm_irq,
6674 + .ack = ack_brcm_irq,
6675 + .end = end_brcm_none,
6676 + .set_affinity = NULL
6677 +};
6678 +
6679 +void __init arch_init_irq(void)
6680 +{
6681 + int i;
6682 +
6683 + clear_c0_status(ST0_BEV);
6684 + change_c0_status(ST0_IM, (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4));
6685 +
6686 + for (i = 0; i < NR_IRQS; i++) {
6687 + irq_desc[i].status = IRQ_DISABLED;
6688 + irq_desc[i].action = 0;
6689 + irq_desc[i].depth = 1;
6690 + irq_desc[i].handler = &brcm_irq_type;
6691 + }
6692 +}
6693 +
6694 +int request_external_irq(unsigned int irq,
6695 + FN_HANDLER handler,
6696 + unsigned long irqflags,
6697 + const char * devname,
6698 + void *dev_id)
6699 +{
6700 + unsigned long flags;
6701 +
6702 + local_irq_save(flags);
6703 +
6704 + PERF->ExtIrqCfg |= (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_CLEAR_SHFT)); // Clear
6705 + PERF->ExtIrqCfg &= ~(1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_MASK_SHFT)); // Mask
6706 + PERF->ExtIrqCfg &= ~(1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_INSENS_SHFT)); // Edge insesnsitive
6707 + PERF->ExtIrqCfg |= (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_LEVEL_SHFT)); // Level triggered
6708 + PERF->ExtIrqCfg &= ~(1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_SENSE_SHFT)); // Low level
6709 +
6710 + local_irq_restore(flags);
6711 +
6712 + return( request_irq(irq, handler, irqflags, devname, dev_id) );
6713 +}
6714 +
6715 +/* VxWorks compatibility function(s). */
6716 +
6717 +unsigned int BcmHalMapInterrupt(FN_HANDLER pfunc, unsigned int param,
6718 + unsigned int interruptId)
6719 +{
6720 + int nRet = -1;
6721 + char *devname;
6722 +
6723 + devname = kmalloc(16, GFP_KERNEL);
6724 + if (devname)
6725 + sprintf( devname, "brcm_%d", interruptId );
6726 +
6727 + /* Set the IRQ description to not automatically enable the interrupt at
6728 + * the end of an ISR. The driver that handles the interrupt must
6729 + * explicitly call BcmHalInterruptEnable or enable_brcm_irq. This behavior
6730 + * is consistent with interrupt handling on VxWorks.
6731 + */
6732 + irq_desc[interruptId].handler = &brcm_irq_no_end_type;
6733 +
6734 + if( interruptId >= INTERNAL_ISR_TABLE_OFFSET )
6735 + {
6736 + nRet = request_irq( interruptId, pfunc, SA_SAMPLE_RANDOM | SA_INTERRUPT,
6737 + devname, (void *) param );
6738 + }
6739 + else if (interruptId >= INTERRUPT_ID_EXTERNAL_0 && interruptId <= INTERRUPT_ID_EXTERNAL_3)
6740 + {
6741 + nRet = request_external_irq( interruptId, pfunc, SA_SAMPLE_RANDOM | SA_INTERRUPT,
6742 + devname, (void *) param );
6743 + }
6744 +
6745 + return( nRet );
6746 +}
6747 +
6748 +
6749 +EXPORT_SYMBOL(enable_brcm_irq);
6750 +EXPORT_SYMBOL(disable_brcm_irq);
6751 +EXPORT_SYMBOL(request_external_irq);
6752 +EXPORT_SYMBOL(BcmHalMapInterrupt);
6753 +
6754 diff -urN linux.old/arch/mips/bcm963xx/Kconfig linux.dev/arch/mips/bcm963xx/Kconfig
6755 --- linux.old/arch/mips/bcm963xx/Kconfig 1970-01-01 01:00:00.000000000 +0100
6756 +++ linux.dev/arch/mips/bcm963xx/Kconfig 2006-08-25 01:22:39.000000000 +0200
6757 @@ -0,0 +1,138 @@
6758 +# Kernel and Driver configuration for Broadcom Commengine ADSL board
6759 +choice
6760 + prompt "Broadcom Commengine ADSL board"
6761 + depends on MIPS_BRCM
6762 + default BCM96345
6763 + help
6764 + Select different Broadcom ADSL board
6765 +
6766 +config BCM96338
6767 + bool "96338 ADSL board"
6768 + select DMA_NONCOHERENT
6769 + select HW_HAS_PCI
6770 +
6771 +config BCM96345
6772 + bool "96345 ADSL board"
6773 + select DMA_NONCOHERENT
6774 + select HW_HAS_PCI
6775 +
6776 +config BCM96348
6777 + bool "96348 ADSL board"
6778 + select DMA_NONCOHERENT
6779 + select HW_HAS_PCI
6780 +
6781 +endchoice
6782 +
6783 +config BCM_BOARD
6784 + bool "Support for Broadcom Board"
6785 + depends on BCM96338 || BCM96345 || BCM96348
6786 +
6787 +config BCM_SERIAL
6788 + bool "Support for Serial Port"
6789 + depends on BCM96338 || BCM96345 || BCM96348
6790 +
6791 +config BCM_ENET
6792 + tristate "Support for Ethernet"
6793 + depends on BCM96338 || BCM96345 || BCM96348
6794 +
6795 +config BCM_USB
6796 + tristate "Support for USB"
6797 + depends on BCM96338 || BCM96345 || BCM96348
6798 +
6799 +config BCM_WLAN
6800 + tristate "Support for Wireless"
6801 + depends on BCM96338 || BCM96345 || BCM96348
6802 +
6803 +config BCM_PCI
6804 + bool "Support for PCI"
6805 + depends on BCM96338 || BCM96345 || BCM96348
6806 + select PCI
6807 +
6808 +config BCM_ATMAPI
6809 + tristate "Support for ATM"
6810 + depends on BCM96338 || BCM96345 || BCM96348
6811 +
6812 +config BCM_ATMTEST
6813 + tristate "Support for ATM Diagnostic"
6814 + depends on BCM96338 || BCM96345 || BCM96348
6815 +
6816 +config BCM_ADSL
6817 + tristate "Support for ADSL"
6818 + depends on BCM96338 || BCM96345 || BCM96348
6819 +
6820 +config BCM_ENDPOINT
6821 + tristate "Support for VOICE"
6822 + depends on BCM96338 || BCM96345 || BCM96348
6823 +
6824 +config BCM_PROCFS
6825 + tristate "Support for PROCFS"
6826 + depends on BCM96338 || BCM96345 || BCM96348
6827 +
6828 +config BCM_VDSL
6829 + tristate "Support for VDSL"
6830 + depends on BCM96338 || BCM96345 || BCM96348
6831 +
6832 +config BCM_SECURITY
6833 + tristate "Support for SECURITY"
6834 + depends on BCM96338 || BCM96345 || BCM96348
6835 +
6836 +config BCM_HPNA
6837 + tristate "Support for HPNA"
6838 + depends on BCM96338 || BCM96345 || BCM96348
6839 +
6840 +config BCM_BOARD_IMPL
6841 + int "Implementation index for ADSL Board"
6842 + depends on BCM96338 || BCM96345 || BCM96348
6843 +
6844 +config BCM_SERIAL_IMPL
6845 + int "Implementation index for Serial"
6846 + depends on BCM96338 || BCM96345 || BCM96348
6847 +
6848 +config BCM_ENET_IMPL
6849 + int "Implementation index for Ethernet"
6850 + depends on BCM96338 || BCM96345 || BCM96348
6851 +
6852 +config BCM_USB_IMPL
6853 + int "Implementation index for USB"
6854 + depends on BCM96338 || BCM96345 || BCM96348
6855 +
6856 +config BCM_WLAN_IMPL
6857 + int "Implementation index for WIRELESS"
6858 + depends on BCM96338 || BCM96345 || BCM96348
6859 +
6860 +config BCM_ATMAPI_IMPL
6861 + int "Implementation index for ATM"
6862 + depends on BCM96338 || BCM96345 || BCM96348
6863 +
6864 +config BCM_ATMTEST_IMPL
6865 + int "Implementation index for ATM Diagnostic"
6866 + depends on BCM96338 || BCM96345 || BCM96348
6867 +
6868 +config BCM_BLAA_IMPL
6869 + int "Implementation index for BLAA"
6870 + depends on BCM96338 || BCM96345 || BCM96348
6871 +
6872 +config BCM_ADSL_IMPL
6873 + int "Implementation index for ADSL"
6874 + depends on BCM96338 || BCM96345 || BCM96348
6875 +
6876 +config BCM_ENDPOINT_IMPL
6877 + int "Implementation index for VOICE"
6878 + depends on BCM96338 || BCM96345 || BCM96348
6879 +
6880 +config BCM_PROCFS_IMPL
6881 + int "Implementation index for PROCFS"
6882 + depends on BCM96338 || BCM96345 || BCM96348
6883 +
6884 +config BCM_VDSL_IMPL
6885 + int "Implementation index for VDSL"
6886 + depends on BCM96338 || BCM96345 || BCM96348
6887 +
6888 +config BCM_SECURITY_IMPL
6889 + int "Implementation index for SECURITY"
6890 + depends on BCM96338 || BCM96345 || BCM96348
6891 +
6892 +config BCM_HPNA_IMPL
6893 + int "Implementation index for HPNA"
6894 + depends on BCM96338 || BCM96345 || BCM96348
6895 +
6896 diff -urN linux.old/arch/mips/bcm963xx/Makefile linux.dev/arch/mips/bcm963xx/Makefile
6897 --- linux.old/arch/mips/bcm963xx/Makefile 1970-01-01 01:00:00.000000000 +0100
6898 +++ linux.dev/arch/mips/bcm963xx/Makefile 2006-08-25 02:04:27.000000000 +0200
6899 @@ -0,0 +1,23 @@
6900 +#
6901 +# Makefile for generic Broadcom MIPS boards
6902 +#
6903 +# Copyright (C) 2004 Broadcom Corporation
6904 +#
6905 +obj-y := irq.o prom.o setup.o time.o ser_init.o bcm63xx_led.o board.o boardparms.o int-handler.o
6906 +
6907 +SRCBASE := $(TOPDIR)
6908 +EXTRA_CFLAGS += -I$(SRCBASE)/include
6909 +#EXTRA_CFLAGS += -I$(INC_ADSLDRV_PATH) -DDBG
6910 +EXTRA_CFLAGS += -I$(INC_ADSLDRV_PATH)
6911 +
6912 +
6913 +ifeq "$(ADSL)" "ANNEX_B"
6914 +EXTRA_CFLAGS += -DADSL_ANNEXB
6915 +endif
6916 +ifeq "$(ADSL)" "SADSL"
6917 +EXTRA_CFLAGS += -DADSL_SADSL
6918 +endif
6919 +ifeq "$(ADSL)" "ANNEX_C"
6920 +EXTRA_CFLAGS += -DADSL_ANNEXC
6921 +endif
6922 +
6923 diff -urN linux-2.6.17/arch/mips/bcm963xx/prom.c linux-2.6.17-brcm63xx/arch/mips/bcm963xx/prom.c
6924 --- linux-2.6.17/arch/mips/bcm963xx/prom.c 1970-01-01 01:00:00.000000000 +0100
6925 +++ linux-2.6.17-brcm63xx/arch/mips/bcm963xx/prom.c 2006-08-29 07:10:10.000000000 +0200
6926 @@ -0,0 +1,143 @@
6927 +/*
6928 +<:copyright-gpl
6929 + Copyright 2004 Broadcom Corp. All Rights Reserved.
6930 +
6931 + This program is free software; you can distribute it and/or modify it
6932 + under the terms of the GNU General Public License (Version 2) as
6933 + published by the Free Software Foundation.
6934 +
6935 + This program is distributed in the hope it will be useful, but WITHOUT
6936 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6937 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
6938 + for more details.
6939 +
6940 + You should have received a copy of the GNU General Public License along
6941 + with this program; if not, write to the Free Software Foundation, Inc.,
6942 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
6943 +:>
6944 +*/
6945 +/*
6946 + * prom.c: PROM library initialization code.
6947 + *
6948 + */
6949 +#include <linux/init.h>
6950 +#include <linux/mm.h>
6951 +#include <linux/sched.h>
6952 +#include <linux/bootmem.h>
6953 +#include <linux/blkdev.h>
6954 +#include <asm/addrspace.h>
6955 +#include <asm/bootinfo.h>
6956 +#include <asm/cpu.h>
6957 +#include <asm/time.h>
6958 +
6959 +#include <bcm_map_part.h>
6960 +#include <board.h>
6961 +#include "boardparms.h"
6962 +#include "softdsl/AdslCoreDefs.h"
6963 +
6964 +
6965 +//char arcs_cmdline[CL_SIZE] __initdata = {0};
6966 +/* inv_xde */
6967 +int boot_loader_type;
6968 +int prom_argc;
6969 +char **prom_argv, **prom_envp;
6970 +
6971 +extern int do_syslog(int, char *, int);
6972 +extern void serial_init(void);
6973 +extern void __init InitNvramInfo( void );
6974 +extern void kerSysFlashInit( void );
6975 +extern unsigned long get_nvram_start_addr(void);
6976 +void __init create_root_nfs_cmdline( char *cmdline );
6977 +
6978 +#define MACH_BCM MACH_BCM96348
6979 +
6980 +const char *get_system_type(void)
6981 +{
6982 + /*PNVRAM_DATA pNvramData = (PNVRAM_DATA) get_nvram_start_addr();
6983 +
6984 + return( pNvramData->szBoardId );*/
6985 + return "brcm63xx";
6986 +}
6987 +
6988 +unsigned long getMemorySize(void)
6989 +{
6990 + unsigned long ulSdramType = BOARD_SDRAM_TYPE;
6991 +
6992 + unsigned long ulSdramSize;
6993 +
6994 + switch( ulSdramType )
6995 + {
6996 + case BP_MEMORY_16MB_1_CHIP:
6997 + case BP_MEMORY_16MB_2_CHIP:
6998 + ulSdramSize = 16 * 1024 * 1024;
6999 + break;
7000 + case BP_MEMORY_32MB_1_CHIP:
7001 + case BP_MEMORY_32MB_2_CHIP:
7002 + ulSdramSize = 32 * 1024 * 1024;
7003 + break;
7004 + case BP_MEMORY_64MB_2_CHIP:
7005 + ulSdramSize = 64 * 1024 * 1024;
7006 + break;
7007 + default:
7008 + ulSdramSize = 8 * 1024 * 1024;
7009 + break;
7010 + }
7011 + if (boot_loader_type == BOOT_CFE)
7012 + return ulSdramSize;
7013 + else
7014 + // assume that there is one contiguous memory map
7015 + return boot_mem_map.map[0].size;
7016 +}
7017 +
7018 +/* --------------------------------------------------------------------------
7019 + Name: prom_init
7020 + -------------------------------------------------------------------------- */
7021 +void __init prom_init(void)
7022 +{
7023 + extern ulong r4k_interval;
7024 +
7025 + serial_init();
7026 +
7027 + prom_argc = fw_arg0;
7028 + prom_argv = (char **) fw_arg1;
7029 + prom_envp = (char **) fw_arg2;
7030 +
7031 + if ((prom_argv > 0x80000000) && (prom_argv < 0x82000000)) {
7032 + strncpy(arcs_cmdline, prom_argv[1], CL_SIZE);
7033 + }
7034 +
7035 + if (strncmp(arcs_cmdline, "boot_loader=RedBoot", 19) != 0) {
7036 + boot_loader_type = BOOT_CFE;
7037 + }
7038 + else {
7039 + boot_loader_type = BOOT_REDBOOT;
7040 + }
7041 +
7042 + do_syslog(8, NULL, 8);
7043 +
7044 + printk( "%s prom init\n", get_system_type() );
7045 +
7046 + PERF->IrqMask = 0;
7047 +
7048 + arcs_cmdline[0] = '\0';
7049 +
7050 + if (boot_loader_type == BOOT_CFE)
7051 + add_memory_region(0, (getMemorySize() - ADSL_SDRAM_IMAGE_SIZE), BOOT_MEM_RAM);
7052 + else
7053 + add_memory_region(0, (0x01000000 - ADSL_SDRAM_IMAGE_SIZE), BOOT_MEM_RAM);
7054 +
7055 + mips_machgroup = MACH_GROUP_BRCM;
7056 + mips_machtype = MACH_BCM;
7057 +
7058 + BpSetBoardId("96348GW-10");
7059 +}
7060 +
7061 +/* --------------------------------------------------------------------------
7062 + Name: prom_free_prom_memory
7063 +Abstract:
7064 + -------------------------------------------------------------------------- */
7065 +void __init prom_free_prom_memory(void)
7066 +{
7067 +
7068 +}
7069 +
7070 diff -urN linux.old/arch/mips/bcm963xx/ser_init.c linux.dev/arch/mips/bcm963xx/ser_init.c
7071 --- linux.old/arch/mips/bcm963xx/ser_init.c 1970-01-01 01:00:00.000000000 +0100
7072 +++ linux.dev/arch/mips/bcm963xx/ser_init.c 2006-08-25 00:39:38.000000000 +0200
7073 @@ -0,0 +1,180 @@
7074 +/*
7075 +<:copyright-gpl
7076 + Copyright 2004 Broadcom Corp. All Rights Reserved.
7077 +
7078 + This program is free software; you can distribute it and/or modify it
7079 + under the terms of the GNU General Public License (Version 2) as
7080 + published by the Free Software Foundation.
7081 +
7082 + This program is distributed in the hope it will be useful, but WITHOUT
7083 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
7084 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
7085 + for more details.
7086 +
7087 + You should have received a copy of the GNU General Public License along
7088 + with this program; if not, write to the Free Software Foundation, Inc.,
7089 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
7090 +:>
7091 +*/
7092 +/*
7093 + * Broadcom bcm63xx serial port initialization, also prepare for printk
7094 + * by registering with console_init
7095 + *
7096 + */
7097 +
7098 +#include <linux/config.h>
7099 +#include <linux/init.h>
7100 +#include <linux/interrupt.h>
7101 +#include <linux/kernel.h>
7102 +#include <linux/types.h>
7103 +#include <linux/console.h>
7104 +#include <linux/sched.h>
7105 +
7106 +#include <asm/addrspace.h>
7107 +#include <asm/irq.h>
7108 +#include <asm/reboot.h>
7109 +#include <asm/gdb-stub.h>
7110 +#include <asm/mc146818rtc.h>
7111 +
7112 +#include <bcm_map_part.h>
7113 +#include <board.h>
7114 +
7115 +#define SER63XX_DEFAULT_BAUD 115200
7116 +#define BD_BCM63XX_TIMER_CLOCK_INPUT (FPERIPH)
7117 +#define stUart ((volatile Uart * const) UART_BASE)
7118 +
7119 +// Transmit interrupts
7120 +#define TXINT (TXFIFOEMT | TXUNDERR | TXOVFERR)
7121 +// Receive interrupts
7122 +#define RXINT (RXFIFONE | RXOVFERR)
7123 +
7124 +/* --------------------------------------------------------------------------
7125 + Name: serial_init
7126 + Purpose: Initalize the UART
7127 +-------------------------------------------------------------------------- */
7128 +void __init serial_init(void)
7129 +{
7130 + UINT32 tmpVal = SER63XX_DEFAULT_BAUD;
7131 + ULONG clockFreqHz;
7132 +
7133 +#if defined(CONFIG_BCM96345)
7134 + // Make sure clock is ticking
7135 + PERF->blkEnables |= UART_CLK_EN;
7136 +#endif
7137 +
7138 + /* Dissable channel's receiver and transmitter. */
7139 + stUart->control &= ~(BRGEN|TXEN|RXEN);
7140 +
7141 + /*--------------------------------------------------------------------*/
7142 + /* Write the table value to the clock select register. */
7143 + /* DPullen - this is the equation to use: */
7144 + /* value = clockFreqHz / baud / 32-1; */
7145 + /* (snmod) Actually you should also take into account any necessary */
7146 + /* rounding. Divide by 16, look at lsb, if 0, divide by 2 */
7147 + /* and subtract 1. If 1, just divide by 2 */
7148 + /*--------------------------------------------------------------------*/
7149 + clockFreqHz = BD_BCM63XX_TIMER_CLOCK_INPUT;
7150 + tmpVal = (clockFreqHz / tmpVal) / 16;
7151 + if( tmpVal & 0x01 )
7152 + tmpVal /= 2; //Rounding up, so sub is already accounted for
7153 + else
7154 + tmpVal = (tmpVal / 2) - 1; // Rounding down so we must sub 1
7155 + stUart->baudword = tmpVal;
7156 +
7157 + /* Finally, re-enable the transmitter and receiver. */
7158 + stUart->control |= (BRGEN|TXEN|RXEN);
7159 +
7160 + stUart->config = (BITS8SYM | ONESTOP);
7161 + // Set the FIFO interrupt depth ... stUart->fifocfg = 0xAA;
7162 + stUart->fifoctl = RSTTXFIFOS | RSTRXFIFOS;
7163 + stUart->intMask = 0;
7164 + stUart->intMask = RXINT | TXINT;
7165 +}
7166 +
7167 +
7168 +/* prom_putc()
7169 + * Output a character to the UART
7170 + */
7171 +void prom_putc(char c)
7172 +{
7173 + /* Wait for Tx uffer to empty */
7174 + while (! (READ16(stUart->intStatus) & TXFIFOEMT));
7175 + /* Send character */
7176 + stUart->Data = c;
7177 +}
7178 +
7179 +/* prom_puts()
7180 + * Write a string to the UART
7181 + */
7182 +void prom_puts(const char *s)
7183 +{
7184 + while (*s) {
7185 + if (*s == '\n') {
7186 + prom_putc('\r');
7187 + }
7188 + prom_putc(*s++);
7189 + }
7190 +}
7191 +
7192 +
7193 +/* prom_getc_nowait()
7194 + * Returns a character from the UART
7195 + * Returns -1 if no characters available or corrupted
7196 + */
7197 +int prom_getc_nowait(void)
7198 +{
7199 + uint16 uStatus;
7200 + int cData = -1;
7201 +
7202 + uStatus = READ16(stUart->intStatus);
7203 +
7204 + if (uStatus & RXFIFONE) { /* Do we have a character? */
7205 + cData = READ16(stUart->Data) & 0xff; /* Read character */
7206 + if (uStatus & (RXFRAMERR | RXPARERR)) { /* If we got an error, throw it away */
7207 + cData = -1;
7208 + }
7209 + }
7210 +
7211 + return cData;
7212 +}
7213 +
7214 +/* prom_getc()
7215 + * Returns a charcter from the serial port
7216 + * Will block until it receives a valid character
7217 +*/
7218 +char prom_getc(void)
7219 +{
7220 + int cData = -1;
7221 +
7222 + /* Loop until we get a valid character */
7223 + while(cData == -1) {
7224 + cData = prom_getc_nowait();
7225 + }
7226 + return (char) cData;
7227 +}
7228 +
7229 +/* prom_testc()
7230 + * Returns 0 if no characters available
7231 + */
7232 +int prom_testc(void)
7233 +{
7234 + uint16 uStatus;
7235 +
7236 + uStatus = READ16(stUart->intStatus);
7237 +
7238 + return (uStatus & RXFIFONE);
7239 +}
7240 +
7241 +#if defined (CONFIG_REMOTE_DEBUG)
7242 +/* Prevent other code from writing to the serial port */
7243 +void _putc(char c) { }
7244 +void _puts(const char *ptr) { }
7245 +#else
7246 +/* Low level outputs call prom routines */
7247 +void _putc(char c) {
7248 + prom_putc(c);
7249 +}
7250 +void _puts(const char *ptr) {
7251 + prom_puts(ptr);
7252 +}
7253 +#endif
7254 diff -urN linux.old/arch/mips/bcm963xx/setup.c linux.dev/arch/mips/bcm963xx/setup.c
7255 --- linux.old/arch/mips/bcm963xx/setup.c 1970-01-01 01:00:00.000000000 +0100
7256 +++ linux.dev/arch/mips/bcm963xx/setup.c 2006-08-25 02:26:58.000000000 +0200
7257 @@ -0,0 +1,525 @@
7258 +/*
7259 +<:copyright-gpl
7260 + Copyright 2002 Broadcom Corp. All Rights Reserved.
7261 +
7262 + This program is free software; you can distribute it and/or modify it
7263 + under the terms of the GNU General Public License (Version 2) as
7264 + published by the Free Software Foundation.
7265 +
7266 + This program is distributed in the hope it will be useful, but WITHOUT
7267 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
7268 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
7269 + for more details.
7270 +
7271 + You should have received a copy of the GNU General Public License along
7272 + with this program; if not, write to the Free Software Foundation, Inc.,
7273 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
7274 +:>
7275 +*/
7276 +/*
7277 + * Generic setup routines for Broadcom 963xx MIPS boards
7278 + */
7279 +
7280 +#include <linux/config.h>
7281 +#include <linux/init.h>
7282 +#include <linux/interrupt.h>
7283 +#include <linux/kernel.h>
7284 +#include <linux/kdev_t.h>
7285 +#include <linux/types.h>
7286 +#include <linux/console.h>
7287 +#include <linux/sched.h>
7288 +#include <linux/mm.h>
7289 +#include <linux/slab.h>
7290 +#include <linux/module.h>
7291 +#include <linux/pm.h>
7292 +
7293 +#include <asm/addrspace.h>
7294 +#include <asm/bcache.h>
7295 +#include <asm/irq.h>
7296 +#include <asm/time.h>
7297 +#include <asm/reboot.h>
7298 +#include <asm/gdb-stub.h>
7299 +
7300 +extern void brcm_time_init(void);
7301 +extern void brcm_timer_setup(struct irqaction *irq);
7302 +extern unsigned long getMemorySize(void);
7303 +
7304 +#if defined(CONFIG_BCM96348) && defined(CONFIG_PCI)
7305 +#include <linux/pci.h>
7306 +#include <linux/delay.h>
7307 +#include <bcm_map_part.h>
7308 +#include <bcmpci.h>
7309 +
7310 +static volatile MpiRegisters * mpi = (MpiRegisters *)(MPI_BASE);
7311 +#endif
7312 +
7313 +/* This function should be in a board specific directory. For now,
7314 + * assume that all boards that include this file use a Broadcom chip
7315 + * with a soft reset bit in the PLL control register.
7316 + */
7317 +static void brcm_machine_restart(char *command)
7318 +{
7319 + const unsigned long ulSoftReset = 0x00000001;
7320 + unsigned long *pulPllCtrl = (unsigned long *) 0xfffe0008;
7321 + *pulPllCtrl |= ulSoftReset;
7322 +}
7323 +
7324 +static void brcm_machine_halt(void)
7325 +{
7326 + printk("System halted\n");
7327 + while (1);
7328 +}
7329 +
7330 +#if defined(CONFIG_BCM96348) && defined(CONFIG_PCI)
7331 +
7332 +static void mpi_SetLocalPciConfigReg(uint32 reg, uint32 value)
7333 +{
7334 + /* write index then value */
7335 + mpi->pcicfgcntrl = PCI_CFG_REG_WRITE_EN + reg;;
7336 + mpi->pcicfgdata = value;
7337 +}
7338 +
7339 +static uint32 mpi_GetLocalPciConfigReg(uint32 reg)
7340 +{
7341 + /* write index then get value */
7342 + mpi->pcicfgcntrl = PCI_CFG_REG_WRITE_EN + reg;;
7343 + return mpi->pcicfgdata;
7344 +}
7345 +
7346 +/*
7347 + * mpi_ResetPcCard: Set/Reset the PcCard
7348 + */
7349 +static void mpi_ResetPcCard(int cardtype, BOOL bReset)
7350 +{
7351 + if (cardtype == MPI_CARDTYPE_NONE) {
7352 + return;
7353 + }
7354 +
7355 + if (cardtype == MPI_CARDTYPE_CARDBUS) {
7356 + bReset = ! bReset;
7357 + }
7358 +
7359 + if (bReset) {
7360 + mpi->pcmcia_cntl1 = (mpi->pcmcia_cntl1 & ~PCCARD_CARD_RESET);
7361 + } else {
7362 + mpi->pcmcia_cntl1 = (mpi->pcmcia_cntl1 | PCCARD_CARD_RESET);
7363 + }
7364 +}
7365 +
7366 +/*
7367 + * mpi_ConfigCs: Configure an MPI/EBI chip select
7368 + */
7369 +static void mpi_ConfigCs(uint32 cs, uint32 base, uint32 size, uint32 flags)
7370 +{
7371 + mpi->cs[cs].base = ((base & 0x1FFFFFFF) | size);
7372 + mpi->cs[cs].config = flags;
7373 +}
7374 +
7375 +/*
7376 + * mpi_InitPcmciaSpace
7377 + */
7378 +static void mpi_InitPcmciaSpace(void)
7379 +{
7380 + // ChipSelect 4 controls PCMCIA Memory accesses
7381 + mpi_ConfigCs(PCMCIA_COMMON_BASE, pcmciaMem, EBI_SIZE_1M, (EBI_WORD_WIDE|EBI_ENABLE));
7382 + // ChipSelect 5 controls PCMCIA Attribute accesses
7383 + mpi_ConfigCs(PCMCIA_ATTRIBUTE_BASE, pcmciaAttr, EBI_SIZE_1M, (EBI_WORD_WIDE|EBI_ENABLE));
7384 + // ChipSelect 6 controls PCMCIA I/O accesses
7385 + mpi_ConfigCs(PCMCIA_IO_BASE, pcmciaIo, EBI_SIZE_64K, (EBI_WORD_WIDE|EBI_ENABLE));
7386 +
7387 + mpi->pcmcia_cntl2 = ((PCMCIA_ATTR_ACTIVE << RW_ACTIVE_CNT_BIT) |
7388 + (PCMCIA_ATTR_INACTIVE << INACTIVE_CNT_BIT) |
7389 + (PCMCIA_ATTR_CE_SETUP << CE_SETUP_CNT_BIT) |
7390 + (PCMCIA_ATTR_CE_HOLD << CE_HOLD_CNT_BIT));
7391 +
7392 + mpi->pcmcia_cntl2 |= (PCMCIA_HALFWORD_EN | PCMCIA_BYTESWAP_DIS);
7393 +}
7394 +
7395 +/*
7396 + * cardtype_vcc_detect: PC Card's card detect and voltage sense connection
7397 + *
7398 + * CD1#/ CD2#/ VS1#/ VS2#/ Card Initial Vcc
7399 + * CCD1# CCD2# CVS1 CVS2 Type
7400 + *
7401 + * GND GND open open 16-bit 5 vdc
7402 + *
7403 + * GND GND GND open 16-bit 3.3 vdc
7404 + *
7405 + * GND GND open GND 16-bit x.x vdc
7406 + *
7407 + * GND GND GND GND 16-bit 3.3 & x.x vdc
7408 + *
7409 + *====================================================================
7410 + *
7411 + * CVS1 GND CCD1# open CardBus 3.3 vdc
7412 + *
7413 + * GND CVS2 open CCD2# CardBus x.x vdc
7414 + *
7415 + * GND CVS1 CCD2# open CardBus y.y vdc
7416 + *
7417 + * GND CVS2 GND CCD2# CardBus 3.3 & x.x vdc
7418 + *
7419 + * CVS2 GND open CCD1# CardBus x.x & y.y vdc
7420 + *
7421 + * GND CVS1 CCD2# open CardBus 3.3, x.x & y.y vdc
7422 + *
7423 + */
7424 +static int cardtype_vcc_detect(void)
7425 +{
7426 + uint32 data32;
7427 + int cardtype;
7428 +
7429 + cardtype = MPI_CARDTYPE_NONE;
7430 + mpi->pcmcia_cntl1 = 0x0000A000; // Turn on the output enables and drive
7431 + // the CVS pins to 0.
7432 + data32 = mpi->pcmcia_cntl1;
7433 + switch (data32 & 0x00000003) // Test CD1# and CD2#, see if card is plugged in.
7434 + {
7435 + case 0x00000003: // No Card is in the slot.
7436 + printk("mpi: No Card is in the PCMCIA slot\n");
7437 + break;
7438 +
7439 + case 0x00000002: // Partial insertion, No CD2#.
7440 + printk("mpi: Card in the PCMCIA slot partial insertion, no CD2 signal\n");
7441 + break;
7442 +
7443 + case 0x00000001: // Partial insertion, No CD1#.
7444 + printk("mpi: Card in the PCMCIA slot partial insertion, no CD1 signal\n");
7445 + break;
7446 +
7447 + case 0x00000000:
7448 + mpi->pcmcia_cntl1 = 0x0000A0C0; // Turn off the CVS output enables and
7449 + // float the CVS pins.
7450 + mdelay(1);
7451 + data32 = mpi->pcmcia_cntl1;
7452 + // Read the Register.
7453 + switch (data32 & 0x0000000C) // See what is on the CVS pins.
7454 + {
7455 + case 0x00000000: // CVS1 and CVS2 are tied to ground, only 1 option.
7456 + printk("mpi: Detected 3.3 & x.x 16-bit PCMCIA card\n");
7457 + cardtype = MPI_CARDTYPE_PCMCIA;
7458 + break;
7459 +
7460 + case 0x00000004: // CVS1 is open or tied to CCD1/CCD2 and CVS2 is tied to ground.
7461 + // 2 valid voltage options.
7462 + switch (data32 & 0x00000003) // Test the values of CCD1 and CCD2.
7463 + {
7464 + case 0x00000003: // CCD1 and CCD2 are tied to 1 of the CVS pins.
7465 + // This is not a valid combination.
7466 + printk("mpi: Unknown card plugged into slot\n");
7467 + break;
7468 +
7469 + case 0x00000002: // CCD2 is tied to either CVS1 or CVS2.
7470 + mpi->pcmcia_cntl1 = 0x0000A080; // Drive CVS1 to a 0.
7471 + mdelay(1);
7472 + data32 = mpi->pcmcia_cntl1;
7473 + if (data32 & 0x00000002) { // CCD2 is tied to CVS2, not valid.
7474 + printk("mpi: Unknown card plugged into slot\n");
7475 + } else { // CCD2 is tied to CVS1.
7476 + printk("mpi: Detected 3.3, x.x and y.y Cardbus card\n");
7477 + cardtype = MPI_CARDTYPE_CARDBUS;
7478 + }
7479 + break;
7480 +
7481 + case 0x00000001: // CCD1 is tied to either CVS1 or CVS2.
7482 + // This is not a valid combination.
7483 + printk("mpi: Unknown card plugged into slot\n");
7484 + break;
7485 +
7486 + case 0x00000000: // CCD1 and CCD2 are tied to ground.
7487 + printk("mpi: Detected x.x vdc 16-bit PCMCIA card\n");
7488 + cardtype = MPI_CARDTYPE_PCMCIA;
7489 + break;
7490 + }
7491 + break;
7492 +
7493 + case 0x00000008: // CVS2 is open or tied to CCD1/CCD2 and CVS1 is tied to ground.
7494 + // 2 valid voltage options.
7495 + switch (data32 & 0x00000003) // Test the values of CCD1 and CCD2.
7496 + {
7497 + case 0x00000003: // CCD1 and CCD2 are tied to 1 of the CVS pins.
7498 + // This is not a valid combination.
7499 + printk("mpi: Unknown card plugged into slot\n");
7500 + break;
7501 +
7502 + case 0x00000002: // CCD2 is tied to either CVS1 or CVS2.
7503 + mpi->pcmcia_cntl1 = 0x0000A040; // Drive CVS2 to a 0.
7504 + mdelay(1);
7505 + data32 = mpi->pcmcia_cntl1;
7506 + if (data32 & 0x00000002) { // CCD2 is tied to CVS1, not valid.
7507 + printk("mpi: Unknown card plugged into slot\n");
7508 + } else {// CCD2 is tied to CVS2.
7509 + printk("mpi: Detected 3.3 and x.x Cardbus card\n");
7510 + cardtype = MPI_CARDTYPE_CARDBUS;
7511 + }
7512 + break;
7513 +
7514 + case 0x00000001: // CCD1 is tied to either CVS1 or CVS2.
7515 + // This is not a valid combination.
7516 + printk("mpi: Unknown card plugged into slot\n");
7517 + break;
7518 +
7519 + case 0x00000000: // CCD1 and CCD2 are tied to ground.
7520 + cardtype = MPI_CARDTYPE_PCMCIA;
7521 + printk("mpi: Detected 3.3 vdc 16-bit PCMCIA card\n");
7522 + break;
7523 + }
7524 + break;
7525 +
7526 + case 0x0000000C: // CVS1 and CVS2 are open or tied to CCD1/CCD2.
7527 + // 5 valid voltage options.
7528 +
7529 + switch (data32 & 0x00000003) // Test the values of CCD1 and CCD2.
7530 + {
7531 + case 0x00000003: // CCD1 and CCD2 are tied to 1 of the CVS pins.
7532 + // This is not a valid combination.
7533 + printk("mpi: Unknown card plugged into slot\n");
7534 + break;
7535 +
7536 + case 0x00000002: // CCD2 is tied to either CVS1 or CVS2.
7537 + // CCD1 is tied to ground.
7538 + mpi->pcmcia_cntl1 = 0x0000A040; // Drive CVS2 to a 0.
7539 + mdelay(1);
7540 + data32 = mpi->pcmcia_cntl1;
7541 + if (data32 & 0x00000002) { // CCD2 is tied to CVS1.
7542 + printk("mpi: Detected y.y vdc Cardbus card\n");
7543 + } else { // CCD2 is tied to CVS2.
7544 + printk("mpi: Detected x.x vdc Cardbus card\n");
7545 + }
7546 + cardtype = MPI_CARDTYPE_CARDBUS;
7547 + break;
7548 +
7549 + case 0x00000001: // CCD1 is tied to either CVS1 or CVS2.
7550 + // CCD2 is tied to ground.
7551 +
7552 + mpi->pcmcia_cntl1 = 0x0000A040; // Drive CVS2 to a 0.
7553 + mdelay(1);
7554 + data32 = mpi->pcmcia_cntl1;
7555 + if (data32 & 0x00000001) {// CCD1 is tied to CVS1.
7556 + printk("mpi: Detected 3.3 vdc Cardbus card\n");
7557 + } else { // CCD1 is tied to CVS2.
7558 + printk("mpi: Detected x.x and y.y Cardbus card\n");
7559 + }
7560 + cardtype = MPI_CARDTYPE_CARDBUS;
7561 + break;
7562 +
7563 + case 0x00000000: // CCD1 and CCD2 are tied to ground.
7564 + cardtype = MPI_CARDTYPE_PCMCIA;
7565 + printk("mpi: Detected 5 vdc 16-bit PCMCIA card\n");
7566 + break;
7567 + }
7568 + break;
7569 +
7570 + default:
7571 + printk("mpi: Unknown card plugged into slot\n");
7572 + break;
7573 +
7574 + }
7575 + }
7576 + return cardtype;
7577 +}
7578 +
7579 +/*
7580 + * mpi_DetectPcCard: Detect the plugged in PC-Card
7581 + * Return: < 0 => Unknown card detected
7582 + * 0 => No card detected
7583 + * 1 => 16-bit card detected
7584 + * 2 => 32-bit CardBus card detected
7585 + */
7586 +static int mpi_DetectPcCard(void)
7587 +{
7588 + int cardtype;
7589 +
7590 + cardtype = cardtype_vcc_detect();
7591 + switch(cardtype) {
7592 + case MPI_CARDTYPE_PCMCIA:
7593 + mpi->pcmcia_cntl1 &= ~0x0000e000; // disable enable bits
7594 + //mpi->pcmcia_cntl1 = (mpi->pcmcia_cntl1 & ~PCCARD_CARD_RESET);
7595 + mpi->pcmcia_cntl1 |= (PCMCIA_ENABLE | PCMCIA_GPIO_ENABLE);
7596 + mpi_InitPcmciaSpace();
7597 + mpi_ResetPcCard(cardtype, FALSE);
7598 + // Hold card in reset for 10ms
7599 + mdelay(10);
7600 + mpi_ResetPcCard(cardtype, TRUE);
7601 + // Let card come out of reset
7602 + mdelay(100);
7603 + break;
7604 + case MPI_CARDTYPE_CARDBUS:
7605 + // 8 => CardBus Enable
7606 + // 1 => PCI Slot Number
7607 + // C => Float VS1 & VS2
7608 + mpi->pcmcia_cntl1 = (mpi->pcmcia_cntl1 & 0xFFFF0000) |
7609 + CARDBUS_ENABLE |
7610 + (CARDBUS_SLOT << 8)|
7611 + VS2_OEN |
7612 + VS1_OEN;
7613 + /* access to this memory window will be to/from CardBus */
7614 + mpi->l2pmremap1 |= CARDBUS_MEM;
7615 +
7616 + // Need to reset the Cardbus Card. There's no CardManager to do this,
7617 + // and we need to be ready for PCI configuration.
7618 + mpi_ResetPcCard(cardtype, FALSE);
7619 + // Hold card in reset for 10ms
7620 + mdelay(10);
7621 + mpi_ResetPcCard(cardtype, TRUE);
7622 + // Let card come out of reset
7623 + mdelay(100);
7624 + break;
7625 + default:
7626 + break;
7627 + }
7628 + return cardtype;
7629 +}
7630 +
7631 +static int mpi_init(void)
7632 +{
7633 + unsigned long data;
7634 + unsigned int chipid;
7635 + unsigned int chiprev;
7636 + unsigned int sdramsize;
7637 +
7638 + chipid = (PERF->RevID & 0xFFFF0000) >> 16;
7639 + chiprev = (PERF->RevID & 0xFF);
7640 + sdramsize = getMemorySize();
7641 + /*
7642 + * Init the pci interface
7643 + */
7644 + data = GPIO->GPIOMode; // GPIO mode register
7645 + data |= GROUP2_PCI | GROUP1_MII_PCCARD; // PCI internal arbiter + Cardbus
7646 + GPIO->GPIOMode = data; // PCI internal arbiter
7647 +
7648 + /*
7649 + * In the BCM6348 CardBus support is defaulted to Slot 0
7650 + * because there is no external IDSEL for CardBus. To disable
7651 + * the CardBus and allow a standard PCI card in Slot 0
7652 + * set the cbus_idsel field to 0x1f.
7653 + */
7654 + /*
7655 + uData = mpi->pcmcia_cntl1;
7656 + uData |= CARDBUS_IDSEL;
7657 + mpi->pcmcia_cntl1 = uData;
7658 + */
7659 + // Setup PCI I/O Window range. Give 64K to PCI I/O
7660 + mpi->l2piorange = ~(BCM_PCI_IO_SIZE_64KB-1);
7661 + // UBUS to PCI I/O base address
7662 + mpi->l2piobase = BCM_PCI_IO_BASE & BCM_PCI_ADDR_MASK;
7663 + // UBUS to PCI I/O Window remap
7664 + mpi->l2pioremap = (BCM_PCI_IO_BASE | MEM_WINDOW_EN);
7665 +
7666 + // enable PCI related GPIO pins and data swap between system and PCI bus
7667 + mpi->locbuscntrl = (EN_PCI_GPIO | DIR_U2P_NOSWAP);
7668 +
7669 + /* Enable 6348 BusMaster and Memory access mode */
7670 + data = mpi_GetLocalPciConfigReg(PCI_COMMAND);
7671 + data |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
7672 + mpi_SetLocalPciConfigReg(PCI_COMMAND, data);
7673 +
7674 + /* Configure two 16 MByte PCI to System memory regions. */
7675 + /* These memory regions are used when PCI device is a bus master */
7676 + /* Accesses to the SDRAM from PCI bus will be "byte swapped" for this region */
7677 + mpi_SetLocalPciConfigReg(PCI_BASE_ADDRESS_3, BCM_HOST_MEM_SPACE1);
7678 + mpi->sp0remap = 0x0;
7679 +
7680 + /* Accesses to the SDRAM from PCI bus will not be "byte swapped" for this region */
7681 + mpi_SetLocalPciConfigReg(PCI_BASE_ADDRESS_4, BCM_HOST_MEM_SPACE2);
7682 + mpi->sp1remap = 0x0;
7683 + mpi->pcimodesel |= (PCI_BAR2_NOSWAP | 0x40);
7684 +
7685 + if ((chipid == 0x6348) && (chiprev == 0xb0)) {
7686 + mpi->sp0range = ~(sdramsize-1);
7687 + mpi->sp1range = ~(sdramsize-1);
7688 + }
7689 + /*
7690 + * Change 6348 PCI Cfg Reg. offset 0x40 to PCI memory read retry count infinity
7691 + * by set 0 in bit 8~15. This resolve read Bcm4306 srom return 0xffff in
7692 + * first read.
7693 + */
7694 + data = mpi_GetLocalPciConfigReg(BRCM_PCI_CONFIG_TIMER);
7695 + data &= ~BRCM_PCI_CONFIG_TIMER_RETRY_MASK;
7696 + data |= 0x00000080;
7697 + mpi_SetLocalPciConfigReg(BRCM_PCI_CONFIG_TIMER, data);
7698 +
7699 + /* enable pci interrupt */
7700 + mpi->locintstat |= (EXT_PCI_INT << 16);
7701 +
7702 + mpi_DetectPcCard();
7703 +
7704 + ioport_resource.start = BCM_PCI_IO_BASE;
7705 + ioport_resource.end = BCM_PCI_IO_BASE + BCM_PCI_IO_SIZE_64KB;
7706 +
7707 +#if defined(CONFIG_USB)
7708 + PERF->blkEnables |= USBH_CLK_EN;
7709 + mdelay(100);
7710 + *USBH_NON_OHCI = NON_OHCI_BYTE_SWAP;
7711 +#endif
7712 +
7713 + return 0;
7714 +}
7715 +#endif
7716 +
7717 +static int __init brcm63xx_setup(void)
7718 +{
7719 + extern int panic_timeout;
7720 +
7721 + _machine_restart = brcm_machine_restart;
7722 + _machine_halt = brcm_machine_halt;
7723 + pm_power_off = brcm_machine_halt;
7724 +
7725 + board_time_init = brcm_time_init;
7726 + board_timer_setup = brcm_timer_setup;
7727 +
7728 + panic_timeout = 5;
7729 +
7730 +#if defined(CONFIG_BCM96348) && defined(CONFIG_PCI)
7731 + /* mpi initialization */
7732 + mpi_init();
7733 +#endif
7734 + return 0;
7735 +}
7736 +
7737 +void plat_setup(void)
7738 +{
7739 + brcm63xx_setup();
7740 +}
7741 +
7742 +/***************************************************************************
7743 + * C++ New and delete operator functions
7744 + ***************************************************************************/
7745 +
7746 +/* void *operator new(unsigned int sz) */
7747 +void *_Znwj(unsigned int sz)
7748 +{
7749 + return( kmalloc(sz, GFP_KERNEL) );
7750 +}
7751 +
7752 +/* void *operator new[](unsigned int sz)*/
7753 +void *_Znaj(unsigned int sz)
7754 +{
7755 + return( kmalloc(sz, GFP_KERNEL) );
7756 +}
7757 +
7758 +/* placement new operator */
7759 +/* void *operator new (unsigned int size, void *ptr) */
7760 +void *ZnwjPv(unsigned int size, void *ptr)
7761 +{
7762 + return ptr;
7763 +}
7764 +
7765 +/* void operator delete(void *m) */
7766 +void _ZdlPv(void *m)
7767 +{
7768 + kfree(m);
7769 +}
7770 +
7771 +/* void operator delete[](void *m) */
7772 +void _ZdaPv(void *m)
7773 +{
7774 + kfree(m);
7775 +}
7776 +
7777 +EXPORT_SYMBOL(_Znwj);
7778 +EXPORT_SYMBOL(_Znaj);
7779 +EXPORT_SYMBOL(ZnwjPv);
7780 +EXPORT_SYMBOL(_ZdlPv);
7781 +EXPORT_SYMBOL(_ZdaPv);
7782 +
7783 diff -urN linux.old/arch/mips/bcm963xx/softdsl/AdslCoreDefs.h linux.dev/arch/mips/bcm963xx/softdsl/AdslCoreDefs.h
7784 --- linux.old/arch/mips/bcm963xx/softdsl/AdslCoreDefs.h 1970-01-01 01:00:00.000000000 +0100
7785 +++ linux.dev/arch/mips/bcm963xx/softdsl/AdslCoreDefs.h 2006-08-25 00:39:38.000000000 +0200
7786 @@ -0,0 +1,2 @@
7787 +#define ADSL_SDRAM_IMAGE_SIZE (384*1024)
7788 +
7789 diff -urN linux.old/arch/mips/bcm963xx/time.c linux.dev/arch/mips/bcm963xx/time.c
7790 --- linux.old/arch/mips/bcm963xx/time.c 1970-01-01 01:00:00.000000000 +0100
7791 +++ linux.dev/arch/mips/bcm963xx/time.c 2006-08-25 03:58:22.000000000 +0200
7792 @@ -0,0 +1,114 @@
7793 +/*
7794 +<:copyright-gpl
7795 + Copyright 2004 Broadcom Corp. All Rights Reserved.
7796 +
7797 + This program is free software; you can distribute it and/or modify it
7798 + under the terms of the GNU General Public License (Version 2) as
7799 + published by the Free Software Foundation.
7800 +
7801 + This program is distributed in the hope it will be useful, but WITHOUT
7802 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
7803 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
7804 + for more details.
7805 +
7806 + You should have received a copy of the GNU General Public License along
7807 + with this program; if not, write to the Free Software Foundation, Inc.,
7808 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
7809 +:>
7810 +*/
7811 +/*
7812 + * Setup time for Broadcom 963xx MIPS boards
7813 + */
7814 +
7815 +#include <linux/config.h>
7816 +#include <linux/init.h>
7817 +#include <linux/kernel_stat.h>
7818 +#include <linux/sched.h>
7819 +#include <linux/spinlock.h>
7820 +#include <linux/interrupt.h>
7821 +#include <linux/module.h>
7822 +#include <linux/time.h>
7823 +#include <linux/timex.h>
7824 +
7825 +#include <asm/mipsregs.h>
7826 +#include <asm/ptrace.h>
7827 +#include <asm/div64.h>
7828 +#include <asm/time.h>
7829 +
7830 +#include <bcm_map_part.h>
7831 +#include <bcm_intr.h>
7832 +
7833 +static unsigned long r4k_offset; /* Amount to increment compare reg each time */
7834 +static unsigned long r4k_cur; /* What counter should be at next timer irq */
7835 +
7836 +/* *********************************************************************
7837 + * calculateCpuSpeed()
7838 + * Calculate the BCM6348 CPU speed by reading the PLL strap register
7839 + * and applying the following formula:
7840 + * cpu_clk = (.25 * 64MHz freq) * (N1 + 1) * (N2 + 2) / (M1_CPU + 1)
7841 + * Input parameters:
7842 + * none
7843 + * Return value:
7844 + * none
7845 + ********************************************************************* */
7846 +
7847 +static inline unsigned long __init calculateCpuSpeed(void)
7848 +{
7849 + UINT32 pllStrap = PERF->PllStrap;
7850 + int n1 = (pllStrap & PLL_N1_MASK) >> PLL_N1_SHFT;
7851 + int n2 = (pllStrap & PLL_N2_MASK) >> PLL_N2_SHFT;
7852 + int m1cpu = (pllStrap & PLL_M1_CPU_MASK) >> PLL_M1_CPU_SHFT;
7853 +
7854 + return (16 * (n1 + 1) * (n2 + 2) / (m1cpu + 1)) * 1000000;
7855 +}
7856 +
7857 +
7858 +static inline unsigned long __init cal_r4koff(void)
7859 +{
7860 + mips_hpt_frequency = calculateCpuSpeed() / 2;
7861 + return (mips_hpt_frequency / HZ);
7862 +}
7863 +
7864 +
7865 +/*
7866 + * There are a lot of conceptually broken versions of the MIPS timer interrupt
7867 + * handler floating around. This one is rather different, but the algorithm
7868 + * is provably more robust.
7869 + */
7870 +irqreturn_t brcm_timer_interrupt(struct pt_regs *regs)
7871 +{
7872 + int irq = MIPS_TIMER_INT;
7873 +
7874 + irq_enter();
7875 + kstat_this_cpu.irqs[irq]++;
7876 +
7877 + timer_interrupt(irq, NULL, regs);
7878 + irq_exit();
7879 + return IRQ_HANDLED;
7880 +}
7881 +
7882 +
7883 +void __init brcm_time_init(void)
7884 +{
7885 + unsigned int est_freq, flags;
7886 + local_irq_save(flags);
7887 +
7888 + printk("calculating r4koff... ");
7889 + r4k_offset = cal_r4koff();
7890 + printk("%08lx(%d)\n", r4k_offset, (int)r4k_offset);
7891 +
7892 + est_freq = 2 * r4k_offset * HZ;
7893 + est_freq += 5000; /* round */
7894 + est_freq -= est_freq % 10000;
7895 + printk("CPU frequency %d.%02d MHz\n", est_freq / 1000000,
7896 + (est_freq % 1000000) * 100 / 1000000);
7897 + local_irq_restore(flags);
7898 +}
7899 +
7900 +
7901 +void __init brcm_timer_setup(struct irqaction *irq)
7902 +{
7903 + r4k_cur = (read_c0_count() + r4k_offset);
7904 + write_c0_compare(r4k_cur);
7905 + set_c0_status(IE_IRQ5);
7906 +}
7907 diff -urN linux.old/arch/mips/Kconfig linux.dev/arch/mips/Kconfig
7908 --- linux.old/arch/mips/Kconfig 2006-08-25 00:43:39.000000000 +0200
7909 +++ linux.dev/arch/mips/Kconfig 2006-08-25 01:57:46.000000000 +0200
7910 @@ -12,6 +12,15 @@
7911 prompt "System type"
7912 default SGI_IP22
7913
7914 +config MIPS_BRCM
7915 + bool "Support for the Broadcom boards"
7916 + select SYS_SUPPORTS_32BIT_KERNEL
7917 + select SYS_SUPPORTS_BIG_ENDIAN
7918 + select SYS_HAS_CPU_MIPS32_R1
7919 + select IRQ_CPU
7920 + help
7921 + This is a fmaily of boards based on the Broadcom MIPS32
7922 +
7923 config MIPS_MTX1
7924 bool "4G Systems MTX-1 board"
7925 select DMA_NONCOHERENT
7926 @@ -780,6 +789,7 @@
7927
7928 endchoice
7929
7930 +source "arch/mips/bcm963xx/Kconfig"
7931 source "arch/mips/ddb5xxx/Kconfig"
7932 source "arch/mips/gt64120/ev64120/Kconfig"
7933 source "arch/mips/jazz/Kconfig"
7934 diff -urN linux.old/arch/mips/kernel/cpu-probe.c linux.dev/arch/mips/kernel/cpu-probe.c
7935 --- linux.old/arch/mips/kernel/cpu-probe.c 2006-08-25 00:43:39.000000000 +0200
7936 +++ linux.dev/arch/mips/kernel/cpu-probe.c 2006-08-25 00:39:38.000000000 +0200
7937 @@ -568,6 +568,25 @@
7938 return;
7939 }
7940
7941 +static inline void cpu_probe_broadcom(struct cpuinfo_mips *c)
7942 +{
7943 + decode_configs(c);
7944 + switch (c->processor_id & 0xff00) {
7945 + case PRID_IMP_BCM6338:
7946 + c->cputype = CPU_BCM6338;
7947 + break;
7948 + case PRID_IMP_BCM6345:
7949 + c->cputype = CPU_BCM6345;
7950 + break;
7951 + case PRID_IMP_BCM6348:
7952 + c->cputype = CPU_BCM6348;
7953 + break;
7954 + default:
7955 + c->cputype = CPU_UNKNOWN;
7956 + break;
7957 + }
7958 +}
7959 +
7960 static inline void cpu_probe_mips(struct cpuinfo_mips *c)
7961 {
7962 decode_configs(c);
7963 @@ -704,6 +723,9 @@
7964 case PRID_COMP_LEGACY:
7965 cpu_probe_legacy(c);
7966 break;
7967 + case PRID_COMP_BROADCOM:
7968 + cpu_probe_broadcom(c);
7969 + break;
7970 case PRID_COMP_MIPS:
7971 cpu_probe_mips(c);
7972 break;
7973 diff -urN linux.old/arch/mips/kernel/proc.c linux.dev/arch/mips/kernel/proc.c
7974 --- linux.old/arch/mips/kernel/proc.c 2006-08-25 00:43:39.000000000 +0200
7975 +++ linux.dev/arch/mips/kernel/proc.c 2006-08-25 00:39:38.000000000 +0200
7976 @@ -85,6 +85,9 @@
7977 [CPU_VR4181A] = "NEC VR4181A",
7978 [CPU_SR71000] = "Sandcraft SR71000",
7979 [CPU_PR4450] = "Philips PR4450",
7980 + [CPU_BCM6338] = "BCM6338",
7981 + [CPU_BCM6345] = "BCM6345",
7982 + [CPU_BCM6348] = "BCM6348",
7983 };
7984
7985
7986 diff -urN linux.old/arch/mips/Makefile linux.dev/arch/mips/Makefile
7987 --- linux.old/arch/mips/Makefile 2006-08-25 00:43:39.000000000 +0200
7988 +++ linux.dev/arch/mips/Makefile 2006-08-25 15:39:54.000000000 +0200
7989 @@ -145,6 +145,15 @@
7990 #
7991
7992 #
7993 +# Broadcom board
7994 +#
7995 +core-$(CONFIG_MIPS_BRCM) += arch/mips/bcm963xx/
7996 +cflags-$(CONFIG_MIPS_BRCM) += -Iinclude/asm-mips/mach-bcm963xx
7997 +cflags-$(CONFIG_MIPS_BRCM) += -Iarch/mips/bcm963xx/include
7998 +load-$(CONFIG_MIPS_BRCM) += 0xffffffff80010000
7999 +
8000 +
8001 +#
8002 # Acer PICA 61, Mips Magnum 4000 and Olivetti M700.
8003 #
8004 core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/
8005 diff -urN linux.old/arch/mips/mm/c-r4k.c linux.dev/arch/mips/mm/c-r4k.c
8006 --- linux.old/arch/mips/mm/c-r4k.c 2006-08-25 00:43:39.000000000 +0200
8007 +++ linux.dev/arch/mips/mm/c-r4k.c 2006-08-25 00:39:38.000000000 +0200
8008 @@ -914,6 +914,13 @@
8009 if (!(config & MIPS_CONF_M))
8010 panic("Don't know how to probe P-caches on this cpu.");
8011
8012 + if (c->cputype == CPU_BCM6338 || c->cputype == CPU_BCM6345 || c->cputype == CPU_BCM6348)
8013 + {
8014 + printk("brcm mips: enabling icache and dcache...\n");
8015 + /* Enable caches */
8016 + write_c0_diag(read_c0_diag() | 0xC0000000);
8017 + }
8018 +
8019 /*
8020 * So we seem to be a MIPS32 or MIPS64 CPU
8021 * So let's probe the I-cache ...
8022 diff -urN linux.old/arch/mips/mm/tlbex.c linux.dev/arch/mips/mm/tlbex.c
8023 --- linux.old/arch/mips/mm/tlbex.c 2006-08-25 00:43:39.000000000 +0200
8024 +++ linux.dev/arch/mips/mm/tlbex.c 2006-08-25 00:39:38.000000000 +0200
8025 @@ -882,6 +882,9 @@
8026 case CPU_4KSC:
8027 case CPU_20KC:
8028 case CPU_25KF:
8029 + case CPU_BCM6338:
8030 + case CPU_BCM6345:
8031 + case CPU_BCM6348:
8032 tlbw(p);
8033 break;
8034
8035 diff -urN linux-2.6.17/arch/mips/pci/fixup-bcm96348.c linux-2.6.17-brcm63xx/arch/mips/pci/fixup-bcm96348.c
8036 --- linux-2.6.17/arch/mips/pci/fixup-bcm96348.c 1970-01-01 01:00:00.000000000 +0100
8037 +++ linux-2.6.17-brcm63xx/arch/mips/pci/fixup-bcm96348.c 2006-08-29 10:25:22.000000000 +0200
8038 @@ -0,0 +1,93 @@
8039 +/*
8040 +<:copyright-gpl
8041 + Copyright 2002 Broadcom Corp. All Rights Reserved.
8042 +
8043 + This program is free software; you can distribute it and/or modify it
8044 + under the terms of the GNU General Public License (Version 2) as
8045 + published by the Free Software Foundation.
8046 +
8047 + This program is distributed in the hope it will be useful, but WITHOUT
8048 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
8049 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
8050 + for more details.
8051 +
8052 + You should have received a copy of the GNU General Public License along
8053 + with this program; if not, write to the Free Software Foundation, Inc.,
8054 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
8055 +:>
8056 +*/
8057 +#include <linux/init.h>
8058 +#include <linux/types.h>
8059 +#include <linux/pci.h>
8060 +
8061 +#include <bcmpci.h>
8062 +#include <bcm_intr.h>
8063 +#include <bcm_map_part.h>
8064 +
8065 +static volatile MpiRegisters * mpi = (MpiRegisters *)(MPI_BASE);
8066 +
8067 +static char irq_tab_bcm96348[] __initdata = {
8068 + [0] = INTERRUPT_ID_MPI,
8069 + [1] = INTERRUPT_ID_MPI,
8070 +#if defined(CONFIG_USB)
8071 + [USB_HOST_SLOT] = INTERRUPT_ID_USBH
8072 +#endif
8073 +};
8074 +
8075 +int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
8076 +{
8077 + return irq_tab_bcm96348[slot];
8078 +}
8079 +
8080 +static void bcm96348_fixup(struct pci_dev *dev)
8081 +{
8082 + uint32 memaddr;
8083 + uint32 size;
8084 +
8085 + memaddr = pci_resource_start(dev, 0);
8086 + size = pci_resource_len(dev, 0);
8087 +
8088 + switch (PCI_SLOT(dev->devfn)) {
8089 + case 0:
8090 + // UBUS to PCI address range
8091 + // Memory Window 1. Mask determines which bits are decoded.
8092 + mpi->l2pmrange1 = ~(size-1);
8093 + // UBUS to PCI Memory base address. This is akin to the ChipSelect base
8094 + // register.
8095 + mpi->l2pmbase1 = memaddr & BCM_PCI_ADDR_MASK;
8096 + // UBUS to PCI Remap Address. Replaces the masked address bits in the
8097 + // range register with this setting.
8098 + // Also, enable direct I/O and direct Memory accesses
8099 + mpi->l2pmremap1 = (memaddr | MEM_WINDOW_EN);
8100 + break;
8101 +
8102 + case 1:
8103 + // Memory Window 2
8104 + mpi->l2pmrange2 = ~(size-1);
8105 + // UBUS to PCI Memory base address.
8106 + mpi->l2pmbase2 = memaddr & BCM_PCI_ADDR_MASK;
8107 + // UBUS to PCI Remap Address
8108 + mpi->l2pmremap2 = (memaddr | MEM_WINDOW_EN);
8109 + break;
8110 +
8111 +#if defined(CONFIG_USB)
8112 + case USB_HOST_SLOT:
8113 + dev->resource[0].start = USB_HOST_BASE;
8114 + dev->resource[0].end = USB_HOST_BASE+USB_BAR0_MEM_SIZE-1;
8115 + break;
8116 +#endif
8117 + }
8118 +}
8119 +
8120 +int pcibios_plat_dev_init(struct pci_dev *dev)
8121 +{
8122 + return 0;
8123 +}
8124 +
8125 +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_BROADCOM, PCI_ANY_ID,
8126 + bcm96348_fixup);
8127 +
8128 +/*struct pci_fixup pcibios_fixups[] = {
8129 + { PCI_FIXUP_FINAL, PCI_ANY_ID, PCI_ANY_ID, bcm96348_fixup },
8130 + {0}
8131 +};*/
8132 diff -urN linux.old/arch/mips/pci/Makefile linux.dev/arch/mips/pci/Makefile
8133 --- linux.old/arch/mips/pci/Makefile 2006-08-25 00:43:29.000000000 +0200
8134 +++ linux.dev/arch/mips/pci/Makefile 2006-08-25 00:39:38.000000000 +0200
8135 @@ -18,6 +18,7 @@
8136 obj-$(CONFIG_MIPS_TX3927) += ops-tx3927.o
8137 obj-$(CONFIG_PCI_VR41XX) += ops-vr41xx.o pci-vr41xx.o
8138 obj-$(CONFIG_NEC_CMBVR4133) += fixup-vr4133.o
8139 +obj-$(CONFIG_BCM_PCI) += fixup-bcm96348.o pci-bcm96348.o ops-bcm96348.o
8140
8141 #
8142 # These are still pretty much in the old state, watch, go blind.
8143 diff -urN linux.old/arch/mips/pci/ops-bcm96348.c linux.dev/arch/mips/pci/ops-bcm96348.c
8144 --- linux.old/arch/mips/pci/ops-bcm96348.c 1970-01-01 01:00:00.000000000 +0100
8145 +++ linux.dev/arch/mips/pci/ops-bcm96348.c 2006-08-25 00:39:38.000000000 +0200
8146 @@ -0,0 +1,276 @@
8147 +/*
8148 +<:copyright-gpl
8149 + Copyright 2002 Broadcom Corp. All Rights Reserved.
8150 +
8151 + This program is free software; you can distribute it and/or modify it
8152 + under the terms of the GNU General Public License (Version 2) as
8153 + published by the Free Software Foundation.
8154 +
8155 + This program is distributed in the hope it will be useful, but WITHOUT
8156 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
8157 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
8158 + for more details.
8159 +
8160 + You should have received a copy of the GNU General Public License along
8161 + with this program; if not, write to the Free Software Foundation, Inc.,
8162 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
8163 +:>
8164 +*/
8165 +#include <linux/types.h>
8166 +#include <linux/pci.h>
8167 +#include <linux/kernel.h>
8168 +#include <linux/init.h>
8169 +#include <asm/addrspace.h>
8170 +
8171 +#include <bcm_intr.h>
8172 +#include <bcm_map_part.h>
8173 +#include <bcmpci.h>
8174 +
8175 +#include <linux/delay.h>
8176 +
8177 +#if defined(CONFIG_USB)
8178 +#if 0
8179 +#define DPRINT(x...) printk(x)
8180 +#else
8181 +#define DPRINT(x...)
8182 +#endif
8183 +
8184 +static int
8185 +pci63xx_int_read(unsigned int devfn, int where, u32 * value, int size);
8186 +static int
8187 +pci63xx_int_write(unsigned int devfn, int where, u32 * value, int size);
8188 +
8189 +static bool usb_mem_size_rd = FALSE;
8190 +static uint32 usb_mem_base = 0;
8191 +static uint32 usb_cfg_space_cmd_reg = 0;
8192 +#endif
8193 +static bool pci_mem_size_rd = FALSE;
8194 +
8195 +static volatile MpiRegisters * mpi = (MpiRegisters *)(MPI_BASE);
8196 +
8197 +static void mpi_SetupPciConfigAccess(uint32 addr)
8198 +{
8199 + mpi->l2pcfgctl = (DIR_CFG_SEL | DIR_CFG_USEREG | addr) & ~CONFIG_TYPE;
8200 +}
8201 +
8202 +static void mpi_ClearPciConfigAccess(void)
8203 +{
8204 + mpi->l2pcfgctl = 0x00000000;
8205 +}
8206 +
8207 +#if defined(CONFIG_USB)
8208 +/* --------------------------------------------------------------------------
8209 + Name: pci63xx_int_write
8210 +Abstract: PCI Config write on internal device(s)
8211 + -------------------------------------------------------------------------- */
8212 +static int
8213 +pci63xx_int_write(unsigned int devfn, int where, u32 * value, int size)
8214 +{
8215 + if (PCI_SLOT(devfn) != USB_HOST_SLOT) {
8216 + return PCIBIOS_SUCCESSFUL;
8217 + }
8218 +
8219 + switch (size) {
8220 + case 1:
8221 + DPRINT("W => Slot: %d Where: %2X Len: %d Data: %02X\n",
8222 + PCI_SLOT(devfn), where, size, *value);
8223 + break;
8224 + case 2:
8225 + DPRINT("W => Slot: %d Where: %2X Len: %d Data: %04X\n",
8226 + PCI_SLOT(devfn), where, size, *value);
8227 + switch (where) {
8228 + case PCI_COMMAND:
8229 + usb_cfg_space_cmd_reg = *value;
8230 + break;
8231 + default:
8232 + break;
8233 + }
8234 + break;
8235 + case 4:
8236 + DPRINT("W => Slot: %d Where: %2X Len: %d Data: %08lX\n",
8237 + PCI_SLOT(devfn), where, size, *value);
8238 + switch (where) {
8239 + case PCI_BASE_ADDRESS_0:
8240 + if (*value == 0xffffffff) {
8241 + usb_mem_size_rd = TRUE;
8242 + } else {
8243 + usb_mem_base = *value;
8244 + }
8245 + break;
8246 + default:
8247 + break;
8248 + }
8249 + break;
8250 + default:
8251 + break;
8252 + }
8253 +
8254 + return PCIBIOS_SUCCESSFUL;
8255 +}
8256 +
8257 +/* --------------------------------------------------------------------------
8258 + Name: pci63xx_int_read
8259 +Abstract: PCI Config read on internal device(s)
8260 + -------------------------------------------------------------------------- */
8261 +static int
8262 +pci63xx_int_read(unsigned int devfn, int where, u32 * value, int size)
8263 +{
8264 + uint32 retValue = 0xFFFFFFFF;
8265 +
8266 + if (PCI_SLOT(devfn) != USB_HOST_SLOT) {
8267 + return PCIBIOS_SUCCESSFUL;
8268 + }
8269 +
8270 + // For now, this is specific to the USB Host controller. We can
8271 + // make it more general if we have to...
8272 + // Emulate PCI Config accesses
8273 + switch (where) {
8274 + case PCI_VENDOR_ID:
8275 + case PCI_DEVICE_ID:
8276 + retValue = PCI_VENDOR_ID_BROADCOM | 0x63000000;
8277 + break;
8278 + case PCI_COMMAND:
8279 + case PCI_STATUS:
8280 + retValue = (0x0006 << 16) | usb_cfg_space_cmd_reg;
8281 + break;
8282 + case PCI_CLASS_REVISION:
8283 + case PCI_CLASS_DEVICE:
8284 + retValue = (PCI_CLASS_SERIAL_USB << 16) | (0x10 << 8) | 0x01;
8285 + break;
8286 + case PCI_BASE_ADDRESS_0:
8287 + if (usb_mem_size_rd) {
8288 + retValue = USB_BAR0_MEM_SIZE;
8289 + } else {
8290 + if (usb_mem_base != 0)
8291 + retValue = usb_mem_base;
8292 + else
8293 + retValue = USB_HOST_BASE;
8294 + }
8295 + usb_mem_size_rd = FALSE;
8296 + break;
8297 + case PCI_CACHE_LINE_SIZE:
8298 + case PCI_LATENCY_TIMER:
8299 + retValue = 0;
8300 + break;
8301 + case PCI_HEADER_TYPE:
8302 + retValue = PCI_HEADER_TYPE_NORMAL;
8303 + break;
8304 + case PCI_SUBSYSTEM_VENDOR_ID:
8305 + retValue = PCI_VENDOR_ID_BROADCOM;
8306 + break;
8307 + case PCI_SUBSYSTEM_ID:
8308 + retValue = 0x6300;
8309 + break;
8310 + case PCI_INTERRUPT_LINE:
8311 + retValue = INTERRUPT_ID_USBH;
8312 + break;
8313 + default:
8314 + break;
8315 + }
8316 +
8317 + switch (size) {
8318 + case 1:
8319 + *value = (retValue >> ((where & 3) << 3)) & 0xff;
8320 + DPRINT("R <= Slot: %d Where: %2X Len: %d Data: %02X\n",
8321 + PCI_SLOT(devfn), where, size, *value);
8322 + break;
8323 + case 2:
8324 + *value = (retValue >> ((where & 3) << 3)) & 0xffff;
8325 + DPRINT("R <= Slot: %d Where: %2X Len: %d Data: %04X\n",
8326 + PCI_SLOT(devfn), where, size, *value);
8327 + break;
8328 + case 4:
8329 + *value = retValue;
8330 + DPRINT("R <= Slot: %d Where: %2X Len: %d Data: %08lX\n",
8331 + PCI_SLOT(devfn), where, size, *value);
8332 + break;
8333 + default:
8334 + break;
8335 + }
8336 +
8337 + return PCIBIOS_SUCCESSFUL;
8338 +}
8339 +#endif
8340 +
8341 +static int bcm96348_pcibios_read(struct pci_bus *bus, unsigned int devfn,
8342 + int where, int size, u32 * val)
8343 +{
8344 + volatile unsigned char *ioBase = (unsigned char *)(mpi->l2piobase | KSEG1);
8345 + uint32 data;
8346 +
8347 +#if defined(CONFIG_USB)
8348 + if (PCI_SLOT(devfn) == USB_HOST_SLOT)
8349 + return pci63xx_int_read(devfn, where, val, size);
8350 +#endif
8351 +
8352 + mpi_SetupPciConfigAccess(BCM_PCI_CFG(PCI_SLOT(devfn), PCI_FUNC(devfn), where));
8353 + data = *(uint32 *)ioBase;
8354 + switch(size) {
8355 + case 1:
8356 + *val = (data >> ((where & 3) << 3)) & 0xff;
8357 + break;
8358 + case 2:
8359 + *val = (data >> ((where & 3) << 3)) & 0xffff;
8360 + break;
8361 + case 4:
8362 + *val = data;
8363 + /* Special case for reading PCI device range */
8364 + if ((where >= PCI_BASE_ADDRESS_0) && (where <= PCI_BASE_ADDRESS_5)) {
8365 + if (pci_mem_size_rd) {
8366 + /* bcm6348 PCI memory window minimum size is 64K */
8367 + *val &= PCI_SIZE_64K;
8368 + }
8369 + }
8370 + break;
8371 + default:
8372 + break;
8373 + }
8374 + pci_mem_size_rd = FALSE;
8375 + mpi_ClearPciConfigAccess();
8376 +
8377 + return PCIBIOS_SUCCESSFUL;
8378 +}
8379 +
8380 +static int bcm96348_pcibios_write(struct pci_bus *bus, unsigned int devfn,
8381 + int where, int size, u32 val)
8382 +{
8383 + volatile unsigned char *ioBase = (unsigned char *)(mpi->l2piobase | KSEG1);
8384 + uint32 data;
8385 +
8386 +#if defined(CONFIG_USB)
8387 + if (PCI_SLOT(devfn) == USB_HOST_SLOT)
8388 + return pci63xx_int_write(devfn, where, &val, size);
8389 +#endif
8390 + mpi_SetupPciConfigAccess(BCM_PCI_CFG(PCI_SLOT(devfn), PCI_FUNC(devfn), where));
8391 + data = *(uint32 *)ioBase;
8392 + switch(size) {
8393 + case 1:
8394 + data = (data & ~(0xff << ((where & 3) << 3))) |
8395 + (val << ((where & 3) << 3));
8396 + break;
8397 + case 2:
8398 + data = (data & ~(0xffff << ((where & 3) << 3))) |
8399 + (val << ((where & 3) << 3));
8400 + break;
8401 + case 4:
8402 + data = val;
8403 + /* Special case for reading PCI device range */
8404 + if ((where >= PCI_BASE_ADDRESS_0) && (where <= PCI_BASE_ADDRESS_5)) {
8405 + if (val == 0xffffffff)
8406 + pci_mem_size_rd = TRUE;
8407 + }
8408 + break;
8409 + default:
8410 + break;
8411 + }
8412 + *(uint32 *)ioBase = data;
8413 + udelay(500);
8414 + mpi_ClearPciConfigAccess();
8415 +
8416 + return PCIBIOS_SUCCESSFUL;
8417 +}
8418 +
8419 +struct pci_ops bcm96348_pci_ops = {
8420 + .read = bcm96348_pcibios_read,
8421 + .write = bcm96348_pcibios_write
8422 +};
8423 diff -urN linux-2.6.17/arch/mips/pci/pci-bcm96348.c linux-2.6.17-brcm63xx/arch/mips/pci/pci-bcm96348.c
8424 --- linux-2.6.17/arch/mips/pci/pci-bcm96348.c 1970-01-01 01:00:00.000000000 +0100
8425 +++ linux-2.6.17-brcm63xx/arch/mips/pci/pci-bcm96348.c 2006-08-29 10:25:13.000000000 +0200
8426 @@ -0,0 +1,54 @@
8427 +/*
8428 +<:copyright-gpl
8429 + Copyright 2002 Broadcom Corp. All Rights Reserved.
8430 +
8431 + This program is free software; you can distribute it and/or modify it
8432 + under the terms of the GNU General Public License (Version 2) as
8433 + published by the Free Software Foundation.
8434 +
8435 + This program is distributed in the hope it will be useful, but WITHOUT
8436 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
8437 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
8438 + for more details.
8439 +
8440 + You should have received a copy of the GNU General Public License along
8441 + with this program; if not, write to the Free Software Foundation, Inc.,
8442 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
8443 +:>
8444 +*/
8445 +#include <linux/types.h>
8446 +#include <linux/pci.h>
8447 +#include <linux/kernel.h>
8448 +#include <linux/init.h>
8449 +
8450 +//#include <asm/pci_channel.h>
8451 +#include <bcmpci.h>
8452 +
8453 +static struct resource bcm_pci_io_resource = {
8454 + .name = "bcm96348 pci IO space",
8455 + .start = BCM_PCI_IO_BASE,
8456 + .end = BCM_PCI_IO_BASE + BCM_PCI_IO_SIZE_64KB - 1,
8457 + .flags = IORESOURCE_IO
8458 +};
8459 +
8460 +static struct resource bcm_pci_mem_resource = {
8461 + .name = "bcm96348 pci memory space",
8462 + .start = BCM_PCI_MEM_BASE,
8463 + .end = BCM_PCI_MEM_BASE + BCM_PCI_MEM_SIZE_16MB - 1,
8464 + .flags = IORESOURCE_MEM
8465 +};
8466 +
8467 +extern struct pci_ops bcm96348_pci_ops;
8468 +
8469 +struct pci_controller bcm96348_controller = {
8470 + .pci_ops = &bcm96348_pci_ops,
8471 + .io_resource = &bcm_pci_io_resource,
8472 + .mem_resource = &bcm_pci_mem_resource,
8473 +};
8474 +
8475 +static void bcm96348_pci_init(void)
8476 +{
8477 + register_pci_controller(&bcm96348_controller);
8478 +}
8479 +
8480 +arch_initcall(bcm96348_pci_init);
8481 diff -urN linux.old/drivers/serial/bcm63xx_cons.c linux.dev/drivers/serial/bcm63xx_cons.c
8482 --- linux.old/drivers/serial/bcm63xx_cons.c 1970-01-01 01:00:00.000000000 +0100
8483 +++ linux.dev/drivers/serial/bcm63xx_cons.c 2006-08-25 15:37:34.000000000 +0200
8484 @@ -0,0 +1,1049 @@
8485 +/*
8486 +<:copyright-gpl
8487 + Copyright 2002 Broadcom Corp. All Rights Reserved.
8488 +
8489 + This program is free software; you can distribute it and/or modify it
8490 + under the terms of the GNU General Public License (Version 2) as
8491 + published by the Free Software Foundation.
8492 +
8493 + This program is distributed in the hope it will be useful, but WITHOUT
8494 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
8495 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
8496 + for more details.
8497 +
8498 + You should have received a copy of the GNU General Public License along
8499 + with this program; if not, write to the Free Software Foundation, Inc.,
8500 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
8501 +:>
8502 +*/
8503 +
8504 +/* Description: Serial port driver for the BCM963XX. */
8505 +
8506 +#define CARDNAME "bcm963xx_serial driver"
8507 +#define VERSION "2.0"
8508 +#define VER_STR CARDNAME " v" VERSION "\n"
8509 +
8510 +
8511 +#include <linux/kernel.h>
8512 +#include <linux/module.h>
8513 +#include <linux/version.h>
8514 +#include <linux/init.h>
8515 +#include <linux/slab.h>
8516 +#include <linux/interrupt.h>
8517 +#include <linux/spinlock.h>
8518 +
8519 +/* for definition of struct console */
8520 +#include <linux/console.h>
8521 +#include <linux/tty.h>
8522 +#include <linux/tty_flip.h>
8523 +#include <linux/serial.h>
8524 +#include <linux/serialP.h>
8525 +#include <asm/uaccess.h>
8526 +
8527 +#include <bcmtypes.h>
8528 +#include <board.h>
8529 +#include <bcm_map_part.h>
8530 +#include <bcm_intr.h>
8531 +
8532 +static DEFINE_SPINLOCK(bcm963xx_serial_lock);
8533 +
8534 +extern void _putc(char);
8535 +extern void _puts(const char *);
8536 +
8537 +typedef struct bcm_serial {
8538 + volatile Uart * port;
8539 + int type;
8540 + int flags;
8541 + int irq;
8542 + int baud_base;
8543 + int blocked_open;
8544 + unsigned short close_delay;
8545 + unsigned short closing_wait;
8546 + unsigned short line; /* port/line number */
8547 + unsigned short cflags; /* line configuration flag */
8548 + unsigned short x_char; /* xon/xoff character */
8549 + unsigned short read_status_mask; /* mask for read condition */
8550 + unsigned short ignore_status_mask; /* mask for ignore condition */
8551 + unsigned long event; /* mask used in BH */
8552 + int xmit_head; /* Position of the head */
8553 + int xmit_tail; /* Position of the tail */
8554 + int xmit_cnt; /* Count of the chars in the buffer */
8555 + int count; /* indicates how many times it has been opened */
8556 + int magic;
8557 +
8558 + struct async_icount icount; /* keep track of things ... */
8559 + struct tty_struct *tty; /* tty associated */
8560 + struct termios normal_termios;
8561 +
8562 + wait_queue_head_t open_wait;
8563 + wait_queue_head_t close_wait;
8564 +
8565 + long session; /* Session of opening process */
8566 + long pgrp; /* pgrp of opening process */
8567 +
8568 + unsigned char is_initialized;
8569 +} Context;
8570 +
8571 +
8572 +/*---------------------------------------------------------------------*/
8573 +/* Define bits in the Interrupt Enable register */
8574 +/*---------------------------------------------------------------------*/
8575 +/* Enable receive interrupt */
8576 +#define RXINT (RXFIFONE|RXOVFERR)
8577 +
8578 +/* Enable transmit interrupt */
8579 +#define TXINT (TXFIFOEMT|TXUNDERR|TXOVFERR)
8580 +
8581 +/* Enable receiver line status interrupt */
8582 +#define LSINT (RXBRK|RXPARERR|RXFRAMERR)
8583 +
8584 +#define BCM_NUM_UARTS 1
8585 +
8586 +#define BD_BCM63XX_TIMER_CLOCK_INPUT (FPERIPH)
8587 +
8588 +
8589 +static struct bcm_serial multi[BCM_NUM_UARTS];
8590 +static struct bcm_serial *lines[BCM_NUM_UARTS];
8591 +static struct tty_driver *serial_driver;
8592 +static struct termios *serial_termios[BCM_NUM_UARTS];
8593 +static struct termios *serial_termios_locked[BCM_NUM_UARTS];
8594 +
8595 +
8596 +static void bcm_stop (struct tty_struct *tty);
8597 +static void bcm_start (struct tty_struct *tty);
8598 +static inline void receive_chars (struct bcm_serial * info);
8599 +static int startup (struct bcm_serial *info);
8600 +static void shutdown (struct bcm_serial * info);
8601 +static void change_speed( volatile Uart *pUart, tcflag_t cFlag );
8602 +static void bcm63xx_cons_flush_chars (struct tty_struct *tty);
8603 +static int bcm63xx_cons_write (struct tty_struct *tty,
8604 + const unsigned char *buf, int count);
8605 +static int bcm63xx_cons_write_room (struct tty_struct *tty);
8606 +static int bcm_chars_in_buffer (struct tty_struct *tty);
8607 +static void bcm_flush_buffer (struct tty_struct *tty);
8608 +static void bcm_throttle (struct tty_struct *tty);
8609 +static void bcm_unthrottle (struct tty_struct *tty);
8610 +static void bcm_send_xchar (struct tty_struct *tty, char ch);
8611 +static int get_serial_info(struct bcm_serial *info, struct serial_struct *retinfo);
8612 +static int set_serial_info (struct bcm_serial *info, struct serial_struct *new_info);
8613 +static int get_lsr_info (struct bcm_serial *info, unsigned int *value);
8614 +static void send_break (struct bcm_serial *info, int duration);
8615 +static int bcm_ioctl (struct tty_struct * tty, struct file * file,
8616 + unsigned int cmd, unsigned long arg);
8617 +static void bcm_set_termios (struct tty_struct *tty, struct termios *old_termios);
8618 +static void bcm63xx_cons_close (struct tty_struct *tty, struct file *filp);
8619 +static void bcm_hangup (struct tty_struct *tty);
8620 +static int block_til_ready (struct tty_struct *tty, struct file *filp, struct bcm_serial *info);
8621 +static int bcm63xx_cons_open (struct tty_struct * tty, struct file * filp);
8622 +static int __init bcm63xx_serialinit(void);
8623 +
8624 +
8625 +/*
8626 + * ------------------------------------------------------------
8627 + * rs_stop () and rs_start ()
8628 + *
8629 + * These routines are called before setting or resetting
8630 + * tty->stopped. They enable or disable transmitter interrupts,
8631 + * as necessary.
8632 + * ------------------------------------------------------------
8633 + */
8634 +static void bcm_stop (struct tty_struct *tty)
8635 +{
8636 +}
8637 +
8638 +static void bcm_start (struct tty_struct *tty)
8639 +{
8640 + _puts(CARDNAME " Start\n");
8641 +}
8642 +
8643 +/*
8644 + * ------------------------------------------------------------
8645 + * receive_char ()
8646 + *
8647 + * This routine deals with inputs from any lines.
8648 + * ------------------------------------------------------------
8649 + */
8650 +static inline void receive_chars (struct bcm_serial * info)
8651 +{
8652 + struct tty_struct *tty = 0;
8653 + struct async_icount * icount;
8654 + int ignore = 0;
8655 + unsigned short status, tmp;
8656 + UCHAR ch = 0;
8657 + while ((status = info->port->intStatus) & RXINT)
8658 + {
8659 + char flag_char = TTY_NORMAL;
8660 +
8661 + if (status & RXFIFONE)
8662 + ch = info->port->Data; // Read the character
8663 + tty = info->tty; /* now tty points to the proper dev */
8664 + icount = &info->icount;
8665 + if (! tty)
8666 + break;
8667 + if (!tty_buffer_request_room(tty, 1))
8668 + break;
8669 + icount->rx++;
8670 + if (status & RXBRK)
8671 + {
8672 + flag_char = TTY_BREAK;
8673 + icount->brk++;
8674 + }
8675 + // keep track of the statistics
8676 + if (status & (RXFRAMERR | RXPARERR | RXOVFERR))
8677 + {
8678 + if (status & RXPARERR) /* parity error */
8679 + icount->parity++;
8680 + else
8681 + if (status & RXFRAMERR) /* frame error */
8682 + icount->frame++;
8683 + if (status & RXOVFERR)
8684 + {
8685 + // Overflow. Reset the RX FIFO
8686 + info->port->fifoctl |= RSTRXFIFOS;
8687 + icount->overrun++;
8688 + }
8689 + // check to see if we should ignore the character
8690 + // and mask off conditions that should be ignored
8691 + if (status & info->ignore_status_mask)
8692 + {
8693 + if (++ignore > 100 )
8694 + break;
8695 + goto ignore_char;
8696 + }
8697 + // Mask off the error conditions we want to ignore
8698 + tmp = status & info->read_status_mask;
8699 + if (tmp & RXPARERR)
8700 + {
8701 + flag_char = TTY_PARITY;
8702 + }
8703 + else
8704 + if (tmp & RXFRAMERR)
8705 + {
8706 + flag_char = TTY_FRAME;
8707 + }
8708 + if (tmp & RXOVFERR)
8709 + {
8710 + tty_insert_flip_char(tty, ch, flag_char);
8711 + ch = 0;
8712 + flag_char = TTY_OVERRUN;
8713 + if (!tty_buffer_request_room(tty, 1))
8714 + break;
8715 + }
8716 + }
8717 + tty_insert_flip_char(tty, ch, flag_char);
8718 + }
8719 +ignore_char:;
8720 + tty_flip_buffer_push(tty);
8721 + tty_schedule_flip(tty);
8722 +
8723 +}
8724 +
8725 +
8726 +/*
8727 + * ------------------------------------------------------------
8728 + * bcm_interrupt ()
8729 + *
8730 + * this is the main interrupt routine for the chip.
8731 + * It deals with the multiple ports.
8732 + * ------------------------------------------------------------
8733 + */
8734 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
8735 +static irqreturn_t bcm_interrupt (int irq, void * dev, struct pt_regs * regs)
8736 +#else
8737 +static void bcm_interrupt (int irq, void * dev, struct pt_regs * regs)
8738 +#endif
8739 +{
8740 + struct bcm_serial * info = lines[0];
8741 + UINT16 intStat;
8742 +
8743 + /* get pending interrupt flags from UART */
8744 +
8745 + /* Mask with only the serial interrupts that are enabled */
8746 + intStat = info->port->intStatus & info->port->intMask;
8747 + while (intStat)
8748 + {
8749 + if (intStat & RXINT)
8750 + receive_chars (info);
8751 + else
8752 + if (intStat & TXINT)
8753 + info->port->intStatus = TXINT;
8754 + else /* don't know what it was, so let's mask it */
8755 + info->port->intMask &= ~intStat;
8756 +
8757 + intStat = info->port->intStatus & info->port->intMask;
8758 + }
8759 +
8760 + // Clear the interrupt
8761 + BcmHalInterruptEnable (INTERRUPT_ID_UART);
8762 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
8763 + return IRQ_HANDLED;
8764 +#endif
8765 +}
8766 +
8767 +/*
8768 + * -------------------------------------------------------------------
8769 + * startup ()
8770 + *
8771 + * various initialization tasks
8772 + * -------------------------------------------------------------------
8773 + */
8774 +static int startup (struct bcm_serial *info)
8775 +{
8776 + // Port is already started...
8777 + return 0;
8778 +}
8779 +
8780 +/*
8781 + * -------------------------------------------------------------------
8782 + * shutdown ()
8783 + *
8784 + * This routine will shutdown a serial port; interrupts are disabled, and
8785 + * DTR is dropped if the hangup on close termio flag is on.
8786 + * -------------------------------------------------------------------
8787 + */
8788 +static void shutdown (struct bcm_serial * info)
8789 +{
8790 + unsigned long flags;
8791 + if (!info->is_initialized)
8792 + return;
8793 +
8794 + spin_lock_irqsave(&bcm963xx_serial_lock, flags);
8795 +
8796 + info->port->control &= ~(BRGEN|TXEN|RXEN);
8797 + if (info->tty)
8798 + set_bit (TTY_IO_ERROR, &info->tty->flags);
8799 + info->is_initialized = 0;
8800 +
8801 + spin_unlock_irqrestore(&bcm963xx_serial_lock, flags);
8802 +}
8803 +/*
8804 + * -------------------------------------------------------------------
8805 + * change_speed ()
8806 + *
8807 + * Set the baud rate, character size, parity and stop bits.
8808 + * -------------------------------------------------------------------
8809 + */
8810 +static void change_speed( volatile Uart *pUart, tcflag_t cFlag )
8811 +{
8812 + unsigned long ulFlags, ulBaud, ulClockFreqHz, ulTmp;
8813 +
8814 + spin_lock_irqsave(&bcm963xx_serial_lock, ulFlags);
8815 + switch( cFlag & (CBAUD | CBAUDEX) )
8816 + {
8817 + case B115200:
8818 + ulBaud = 115200;
8819 + break;
8820 + case B57600:
8821 + ulBaud = 57600;
8822 + break;
8823 + case B38400:
8824 + ulBaud = 38400;
8825 + break;
8826 + case B19200:
8827 + ulBaud = 19200;
8828 + break;
8829 + case B9600:
8830 + ulBaud = 9600;
8831 + break;
8832 + case B4800:
8833 + ulBaud = 4800;
8834 + break;
8835 + case B2400:
8836 + ulBaud = 2400;
8837 + break;
8838 + case B1800:
8839 + ulBaud = 1800;
8840 + break;
8841 + case B1200:
8842 + ulBaud = 1200;
8843 + break;
8844 + case B600:
8845 + ulBaud = 600;
8846 + break;
8847 + case B300:
8848 + ulBaud = 300;
8849 + break;
8850 + case B200:
8851 + ulBaud = 200;
8852 + break;
8853 + case B150:
8854 + ulBaud = 150;
8855 + break;
8856 + case B134:
8857 + ulBaud = 134;
8858 + break;
8859 + case B110:
8860 + ulBaud = 110;
8861 + break;
8862 + case B75:
8863 + ulBaud = 75;
8864 + break;
8865 + case B50:
8866 + ulBaud = 50;
8867 + break;
8868 + default:
8869 + ulBaud = 115200;
8870 + break;
8871 + }
8872 +
8873 + /* Calculate buad rate. */
8874 + ulClockFreqHz = BD_BCM63XX_TIMER_CLOCK_INPUT;
8875 + ulTmp = (ulClockFreqHz / ulBaud) / 16;
8876 + if( ulTmp & 0x01 )
8877 + ulTmp /= 2; /* Rounding up, so sub is already accounted for */
8878 + else
8879 + ulTmp = (ulTmp / 2) - 1; /* Rounding down so we must sub 1 */
8880 + pUart->baudword = ulTmp;
8881 +
8882 + /* Set character size, stop bits and parity. */
8883 + switch( cFlag & CSIZE )
8884 + {
8885 + case CS5:
8886 + ulTmp = BITS5SYM; /* select transmit 5 bit data size */
8887 + break;
8888 + case CS6:
8889 + ulTmp = BITS6SYM; /* select transmit 6 bit data size */
8890 + break;
8891 + case CS7:
8892 + ulTmp = BITS7SYM; /* select transmit 7 bit data size */
8893 + break;
8894 + default:
8895 + ulTmp = BITS8SYM; /* select transmit 8 bit data size */
8896 + break;
8897 + }
8898 + if( cFlag & CSTOPB )
8899 + ulTmp |= TWOSTOP; /* select 2 stop bits */
8900 + else
8901 + ulTmp |= ONESTOP; /* select one stop bit */
8902 +
8903 + /* Write these values into the config reg. */
8904 + pUart->config = ulTmp;
8905 + pUart->control &= ~(RXPARITYEN | TXPARITYEN | RXPARITYEVEN | TXPARITYEVEN);
8906 + switch( cFlag & (PARENB | PARODD) )
8907 + {
8908 + case PARENB|PARODD:
8909 + pUart->control |= RXPARITYEN | TXPARITYEN;
8910 + break;
8911 + case PARENB:
8912 + pUart->control |= RXPARITYEN | TXPARITYEN | RXPARITYEVEN | TXPARITYEVEN;
8913 + break;
8914 + default:
8915 + pUart->control |= 0;
8916 + break;
8917 + }
8918 +
8919 + /* Reset and flush uart */
8920 + pUart->fifoctl = RSTTXFIFOS | RSTRXFIFOS;
8921 + spin_unlock_irqrestore(&bcm963xx_serial_lock, ulFlags);
8922 +}
8923 +
8924 +
8925 +/*
8926 + * -------------------------------------------------------------------
8927 + * bcm_flush_char ()
8928 + *
8929 + * Nothing to flush. Polled I/O is used.
8930 + * -------------------------------------------------------------------
8931 + */
8932 +static void bcm63xx_cons_flush_chars (struct tty_struct *tty)
8933 +{
8934 +}
8935 +
8936 +
8937 +/*
8938 + * -------------------------------------------------------------------
8939 + * bcm63xx_cons_write ()
8940 + *
8941 + * Main output routine using polled I/O.
8942 + * -------------------------------------------------------------------
8943 + */
8944 +static int bcm63xx_cons_write (struct tty_struct *tty,
8945 + const unsigned char *buf, int count)
8946 +{
8947 + int c;
8948 +
8949 + for (c = 0; c < count; c++)
8950 + _putc(buf[c]);
8951 + return count;
8952 +}
8953 +
8954 +/*
8955 + * -------------------------------------------------------------------
8956 + * bcm63xx_cons_write_room ()
8957 + *
8958 + * Compute the amount of space available for writing.
8959 + * -------------------------------------------------------------------
8960 + */
8961 +static int bcm63xx_cons_write_room (struct tty_struct *tty)
8962 +{
8963 + /* Pick a number. Any number. Polled I/O is used. */
8964 + return 1024;
8965 +}
8966 +
8967 +/*
8968 + * -------------------------------------------------------------------
8969 + * bcm_chars_in_buffer ()
8970 + *
8971 + * compute the amount of char left to be transmitted
8972 + * -------------------------------------------------------------------
8973 + */
8974 +static int bcm_chars_in_buffer (struct tty_struct *tty)
8975 +{
8976 + return 0;
8977 +}
8978 +
8979 +/*
8980 + * -------------------------------------------------------------------
8981 + * bcm_flush_buffer ()
8982 + *
8983 + * Empty the output buffer
8984 + * -------------------------------------------------------------------
8985 + */
8986 +static void bcm_flush_buffer (struct tty_struct *tty)
8987 +{
8988 + tty_wakeup(tty);
8989 +}
8990 +
8991 +/*
8992 + * ------------------------------------------------------------
8993 + * bcm_throttle () and bcm_unthrottle ()
8994 + *
8995 + * This routine is called by the upper-layer tty layer to signal that
8996 + * incoming characters should be throttled (or not).
8997 + * ------------------------------------------------------------
8998 + */
8999 +static void bcm_throttle (struct tty_struct *tty)
9000 +{
9001 + struct bcm_serial *info = (struct bcm_serial *)tty->driver_data;
9002 + if (I_IXOFF(tty))
9003 + info->x_char = STOP_CHAR(tty);
9004 +}
9005 +
9006 +static void bcm_unthrottle (struct tty_struct *tty)
9007 +{
9008 + struct bcm_serial *info = (struct bcm_serial *)tty->driver_data;
9009 + if (I_IXOFF(tty))
9010 + {
9011 + if (info->x_char)
9012 + info->x_char = 0;
9013 + else
9014 + info->x_char = START_CHAR(tty);
9015 + }
9016 +}
9017 +
9018 +static void bcm_send_xchar (struct tty_struct *tty, char ch)
9019 +{
9020 + struct bcm_serial *info = (struct bcm_serial *)tty->driver_data;
9021 + info->x_char = ch;
9022 + if (ch)
9023 + bcm_start (info->tty);
9024 +}
9025 +
9026 +/*
9027 + * ------------------------------------------------------------
9028 + * rs_ioctl () and friends
9029 + * ------------------------------------------------------------
9030 + */
9031 +static int get_serial_info(struct bcm_serial *info, struct serial_struct *retinfo)
9032 +{
9033 + struct serial_struct tmp;
9034 +
9035 + if (!retinfo)
9036 + return -EFAULT;
9037 +
9038 + memset (&tmp, 0, sizeof(tmp));
9039 + tmp.type = info->type;
9040 + tmp.line = info->line;
9041 + tmp.port = (int) info->port;
9042 + tmp.irq = info->irq;
9043 + tmp.flags = 0;
9044 + tmp.baud_base = info->baud_base;
9045 + tmp.close_delay = info->close_delay;
9046 + tmp.closing_wait = info->closing_wait;
9047 +
9048 + return copy_to_user (retinfo, &tmp, sizeof(*retinfo));
9049 +}
9050 +
9051 +static int set_serial_info (struct bcm_serial *info, struct serial_struct *new_info)
9052 +{
9053 + struct serial_struct new_serial;
9054 + struct bcm_serial old_info;
9055 + int retval = 0;
9056 +
9057 + if (!new_info)
9058 + return -EFAULT;
9059 +
9060 + copy_from_user (&new_serial, new_info, sizeof(new_serial));
9061 + old_info = *info;
9062 +
9063 + if (!capable(CAP_SYS_ADMIN))
9064 + return -EPERM;
9065 +
9066 +
9067 + if (info->count > 1)
9068 + return -EBUSY;
9069 +
9070 + /* OK, past this point, all the error checking has been done.
9071 + * At this point, we start making changes.....
9072 + */
9073 + info->baud_base = new_serial.baud_base;
9074 + info->type = new_serial.type;
9075 + info->close_delay = new_serial.close_delay;
9076 + info->closing_wait = new_serial.closing_wait;
9077 + retval = startup (info);
9078 + return retval;
9079 +}
9080 +
9081 +/*
9082 + * get_lsr_info - get line status register info
9083 + *
9084 + * Purpose: Let user call ioctl() to get info when the UART physically
9085 + * is emptied. On bus types like RS485, the transmitter must
9086 + * release the bus after transmitting. This must be done when
9087 + * the transmit shift register is empty, not be done when the
9088 + * transmit holding register is empty. This functionality
9089 + * allows an RS485 driver to be written in user space.
9090 + */
9091 +static int get_lsr_info (struct bcm_serial *info, unsigned int *value)
9092 +{
9093 + return( 0 );
9094 +}
9095 +
9096 +/*
9097 + * This routine sends a break character out the serial port.
9098 + */
9099 +static void send_break (struct bcm_serial *info, int duration)
9100 +{
9101 + unsigned long flags;
9102 +
9103 + if (!info->port)
9104 + return;
9105 +
9106 + current->state = TASK_INTERRUPTIBLE;
9107 +
9108 + /*save_flags (flags);
9109 + cli();*/
9110 + spin_lock_irqsave(&bcm963xx_serial_lock, flags);
9111 +
9112 + info->port->control |= XMITBREAK;
9113 + schedule_timeout(duration);
9114 + info->port->control &= ~XMITBREAK;
9115 +
9116 + spin_unlock_irqrestore(&bcm963xx_serial_lock, flags);
9117 + //restore_flags (flags);
9118 +}
9119 +
9120 +static int bcm_ioctl (struct tty_struct * tty, struct file * file,
9121 + unsigned int cmd, unsigned long arg)
9122 +{
9123 + int error;
9124 + struct bcm_serial * info = (struct bcm_serial *)tty->driver_data;
9125 + int retval;
9126 +
9127 + if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
9128 + (cmd != TIOCSERCONFIG) && (cmd != TIOCSERGWILD) &&
9129 + (cmd != TIOCSERSWILD) && (cmd != TIOCSERGSTRUCT))
9130 + {
9131 + if (tty->flags & (1 << TTY_IO_ERROR))
9132 + return -EIO;
9133 + }
9134 + switch (cmd)
9135 + {
9136 +
9137 + case TCSBRK: /* SVID version: non-zero arg --> no break */
9138 + retval = tty_check_change (tty);
9139 + if (retval)
9140 + return retval;
9141 + tty_wait_until_sent (tty, 0);
9142 + if (!arg)
9143 + send_break (info, HZ/4); /* 1/4 second */
9144 + return 0;
9145 +
9146 + case TCSBRKP: /* support for POSIX tcsendbreak() */
9147 + retval = tty_check_change (tty);
9148 + if (retval)
9149 + return retval;
9150 + tty_wait_until_sent (tty, 0);
9151 + send_break (info, arg ? arg*(HZ/10) : HZ/4);
9152 + return 0;
9153 +
9154 + case TIOCGSOFTCAR:
9155 + error = access_ok (VERIFY_WRITE, (void *)arg, sizeof(long));
9156 + if (!error)
9157 + return -EFAULT;
9158 + else
9159 + {
9160 + put_user (C_CLOCAL(tty) ? 1 : 0, (unsigned long *)arg);
9161 + return 0;
9162 + }
9163 +
9164 + case TIOCSSOFTCAR:
9165 + error = get_user (arg, (unsigned long *)arg);
9166 + if (error)
9167 + return error;
9168 + tty->termios->c_cflag = ((tty->termios->c_cflag & ~CLOCAL) | (arg ? CLOCAL : 0));
9169 + return 0;
9170 +
9171 + case TIOCGSERIAL:
9172 + error = access_ok (VERIFY_WRITE, (void *)arg, sizeof(struct serial_struct));
9173 + if (!error)
9174 + return -EFAULT;
9175 + else
9176 + return get_serial_info (info, (struct serial_struct *)arg);
9177 +
9178 + case TIOCSSERIAL:
9179 + return set_serial_info (info, (struct serial_struct *) arg);
9180 +
9181 + case TIOCSERGETLSR: /* Get line status register */
9182 + error = access_ok (VERIFY_WRITE, (void *)arg, sizeof(unsigned int));
9183 + if (!error)
9184 + return -EFAULT;
9185 + else
9186 + return get_lsr_info (info, (unsigned int *)arg);
9187 +
9188 + case TIOCSERGSTRUCT:
9189 + error = access_ok (VERIFY_WRITE, (void *)arg, sizeof(struct bcm_serial));
9190 + if (!error)
9191 + return -EFAULT;
9192 + else
9193 + {
9194 + copy_to_user((struct bcm_serial *)arg, info, sizeof(struct bcm_serial));
9195 + return 0;
9196 + }
9197 +
9198 + default:
9199 + return -ENOIOCTLCMD;
9200 + }
9201 + return 0;
9202 +}
9203 +
9204 +static void bcm_set_termios (struct tty_struct *tty, struct termios *old_termios)
9205 +{
9206 + struct bcm_serial *info = (struct bcm_serial *)tty->driver_data;
9207 +
9208 + if( tty->termios->c_cflag != old_termios->c_cflag )
9209 + change_speed (info->port, tty->termios->c_cflag);
9210 +}
9211 +
9212 +/*
9213 + * ------------------------------------------------------------
9214 + * bcm63xx_cons_close()
9215 + *
9216 + * This routine is called when the serial port gets closed. First, we
9217 + * wait for the last remaining data to be sent. Then, we turn off
9218 + * the transmit enable and receive enable flags.
9219 + * ------------------------------------------------------------
9220 + */
9221 +static void bcm63xx_cons_close (struct tty_struct *tty, struct file *filp)
9222 +{
9223 + struct bcm_serial * info = (struct bcm_serial *)tty->driver_data;
9224 + unsigned long flags;
9225 +
9226 + if (!info)
9227 + return;
9228 +
9229 + /*save_flags (flags);
9230 + cli();*/
9231 + spin_lock_irqsave(&bcm963xx_serial_lock, flags);
9232 +
9233 + if (tty_hung_up_p (filp))
9234 + {
9235 + spin_unlock_irqrestore(&bcm963xx_serial_lock, flags);
9236 + //restore_flags (flags);
9237 + return;
9238 + }
9239 +
9240 + if ((tty->count == 1) && (info->count != 1))
9241 + {
9242 +
9243 + /* Uh, oh. tty->count is 1, which means that the tty
9244 + * structure will be freed. Info->count should always
9245 + * be one in these conditions. If it's greater than
9246 + * one, we've got real problems, since it means the
9247 + * serial port won't be shutdown.
9248 + */
9249 + printk("bcm63xx_cons_close: bad serial port count; tty->count is 1, "
9250 + "info->count is %d\n", info->count);
9251 + info->count = 1;
9252 + }
9253 +
9254 + if (--info->count < 0)
9255 + {
9256 + printk("ds_close: bad serial port count for ttys%d: %d\n",
9257 + info->line, info->count);
9258 + info->count = 0;
9259 + }
9260 +
9261 + if (info->count)
9262 + {
9263 + //restore_flags (flags);
9264 + spin_unlock_irqrestore(&bcm963xx_serial_lock, flags);
9265 + return;
9266 + }
9267 +
9268 + /* Now we wait for the transmit buffer to clear; and we notify
9269 + * the line discipline to only process XON/XOFF characters.
9270 + */
9271 + tty->closing = 1;
9272 +
9273 + /* At this point we stop accepting input. To do this, we
9274 + * disable the receive line status interrupts.
9275 + */
9276 + shutdown (info);
9277 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
9278 + if (tty->driver->flush_buffer)
9279 + tty->driver->flush_buffer (tty);
9280 +#else
9281 + if (tty->driver.flush_buffer)
9282 + tty->driver.flush_buffer (tty);
9283 +#endif
9284 + if (tty->ldisc.flush_buffer)
9285 + tty->ldisc.flush_buffer (tty);
9286 +
9287 + tty->closing = 0;
9288 + info->event = 0;
9289 + info->tty = 0;
9290 + if (tty->ldisc.num != tty_ldisc_get(N_TTY)->num)
9291 + {
9292 + if (tty->ldisc.close)
9293 + (tty->ldisc.close)(tty);
9294 + tty->ldisc = *tty_ldisc_get(N_TTY);
9295 + tty->termios->c_line = N_TTY;
9296 + if (tty->ldisc.open)
9297 + (tty->ldisc.open)(tty);
9298 + }
9299 + if (info->blocked_open)
9300 + {
9301 + if (info->close_delay)
9302 + {
9303 + current->state = TASK_INTERRUPTIBLE;
9304 + schedule_timeout(info->close_delay);
9305 + }
9306 + wake_up_interruptible (&info->open_wait);
9307 + }
9308 + wake_up_interruptible (&info->close_wait);
9309 +
9310 + //restore_flags (flags);
9311 + spin_unlock_irqrestore(&bcm963xx_serial_lock, flags);
9312 +}
9313 +
9314 +/*
9315 + * bcm_hangup () --- called by tty_hangup() when a hangup is signaled.
9316 + */
9317 +static void bcm_hangup (struct tty_struct *tty)
9318 +{
9319 +
9320 + struct bcm_serial *info = (struct bcm_serial *)tty->driver_data;
9321 +
9322 + shutdown (info);
9323 + info->event = 0;
9324 + info->count = 0;
9325 + info->tty = 0;
9326 + wake_up_interruptible (&info->open_wait);
9327 +}
9328 +
9329 +/*
9330 + * ------------------------------------------------------------
9331 + * rs_open() and friends
9332 + * ------------------------------------------------------------
9333 + */
9334 +static int block_til_ready (struct tty_struct *tty, struct file *filp,
9335 + struct bcm_serial *info)
9336 +{
9337 + return 0;
9338 +}
9339 +
9340 +/*
9341 + * This routine is called whenever a serial port is opened. It
9342 + * enables interrupts for a serial port. It also performs the
9343 + * serial-specific initialization for the tty structure.
9344 + */
9345 +static int bcm63xx_cons_open (struct tty_struct * tty, struct file * filp)
9346 +{
9347 + struct bcm_serial *info;
9348 + int retval, line;
9349 +
9350 + // Make sure we're only opening on of the ports we support
9351 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
9352 + line = MINOR(tty->driver->cdev.dev) - tty->driver->minor_start;
9353 +#else
9354 + line = MINOR(tty->device) - tty->driver.minor_start;
9355 +#endif
9356 +
9357 + if ((line < 0) || (line >= BCM_NUM_UARTS))
9358 + return -ENODEV;
9359 +
9360 + info = lines[line];
9361 +
9362 + tty->low_latency=1;
9363 + info->port->intMask = 0; /* Clear any pending interrupts */
9364 + info->port->intMask = RXINT; /* Enable RX */
9365 +
9366 + info->count++;
9367 + tty->driver_data = info;
9368 + info->tty = tty;
9369 + BcmHalInterruptEnable (INTERRUPT_ID_UART);
9370 +
9371 + // Start up serial port
9372 + retval = startup (info);
9373 + if (retval)
9374 + return retval;
9375 +
9376 + retval = block_til_ready (tty, filp, info);
9377 + if (retval)
9378 + return retval;
9379 +
9380 +
9381 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
9382 + info->pgrp = process_group(current);
9383 + info->session = current->signal->session;
9384 +#else
9385 + info->session = current->session;
9386 + info->pgrp = current->pgrp;
9387 +#endif
9388 +
9389 + return 0;
9390 +}
9391 +
9392 +
9393 +static struct tty_operations rs_ops = {
9394 + .open = bcm63xx_cons_open,
9395 + .close = bcm63xx_cons_close,
9396 + .write = bcm63xx_cons_write,
9397 + .flush_chars = bcm63xx_cons_flush_chars,
9398 + .write_room = bcm63xx_cons_write_room,
9399 + .chars_in_buffer = bcm_chars_in_buffer,
9400 + .flush_buffer = bcm_flush_buffer,
9401 + .ioctl = bcm_ioctl,
9402 + .throttle = bcm_throttle,
9403 + .unthrottle = bcm_unthrottle,
9404 + .send_xchar = bcm_send_xchar,
9405 + .set_termios = bcm_set_termios,
9406 + .stop = bcm_stop,
9407 + .start = bcm_start,
9408 + .hangup = bcm_hangup,
9409 +};
9410 +
9411 +/* --------------------------------------------------------------------------
9412 + Name: bcm63xx_serialinit
9413 + Purpose: Initialize our BCM63xx serial driver
9414 +-------------------------------------------------------------------------- */
9415 +static int __init bcm63xx_serialinit(void)
9416 +{
9417 + int i, flags;
9418 + struct bcm_serial * info;
9419 +
9420 + // Print the driver version information
9421 + printk(VER_STR);
9422 + serial_driver = alloc_tty_driver(BCM_NUM_UARTS);
9423 + if (!serial_driver)
9424 + return -ENOMEM;
9425 +
9426 + serial_driver->owner = THIS_MODULE;
9427 + serial_driver->devfs_name = "tts/";
9428 +// serial_driver.magic = TTY_DRIVER_MAGIC;
9429 + serial_driver->name = "ttyS";
9430 + serial_driver->major = TTY_MAJOR;
9431 + serial_driver->minor_start = 64;
9432 +// serial_driver.num = BCM_NUM_UARTS;
9433 + serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
9434 + serial_driver->subtype = SERIAL_TYPE_NORMAL;
9435 + serial_driver->init_termios = tty_std_termios;
9436 + serial_driver->init_termios.c_cflag = B115200 | CS8 | CREAD | HUPCL | CLOCAL;
9437 + serial_driver->flags = TTY_DRIVER_REAL_RAW;
9438 +
9439 + serial_driver->termios = serial_termios;
9440 + serial_driver->termios_locked = serial_termios_locked;
9441 +
9442 + tty_set_operations(serial_driver, &rs_ops);
9443 +
9444 + if (tty_register_driver (serial_driver))
9445 + panic("Couldn't register serial driver\n");
9446 +
9447 + //save_flags(flags); cli();
9448 + spin_lock_irqsave(&bcm963xx_serial_lock, flags);
9449 +
9450 + for (i = 0; i < BCM_NUM_UARTS; i++)
9451 + {
9452 + info = &multi[i];
9453 + lines[i] = info;
9454 + info->magic = SERIAL_MAGIC;
9455 + info->port = (Uart *) ((char *)UART_BASE + (i * 0x20));
9456 + info->tty = 0;
9457 + info->irq = (2 - i) + 8;
9458 + info->line = i;
9459 + info->close_delay = 50;
9460 + info->closing_wait = 3000;
9461 + info->x_char = 0;
9462 + info->event = 0;
9463 + info->count = 0;
9464 + info->blocked_open = 0;
9465 + info->normal_termios = serial_driver->init_termios;
9466 + init_waitqueue_head(&info->open_wait);
9467 + init_waitqueue_head(&info->close_wait);
9468 +
9469 + /* If we are pointing to address zero then punt - not correctly
9470 + * set up in setup.c to handle this.
9471 + */
9472 + if (! info->port)
9473 + return 0;
9474 + BcmHalMapInterrupt(bcm_interrupt, 0, INTERRUPT_ID_UART);
9475 + }
9476 +
9477 + /* order matters here... the trick is that flags
9478 + * is updated... in request_irq - to immediatedly obliterate
9479 + * it is unwise.
9480 + */
9481 + spin_unlock_irqrestore(&bcm963xx_serial_lock, flags);
9482 + return 0;
9483 +}
9484 +
9485 +module_init(bcm63xx_serialinit);
9486 +
9487 +/* --------------------------------------------------------------------------
9488 + Name: bcm_console_print
9489 + Purpose: bcm_console_print is registered for printk.
9490 + The console_lock must be held when we get here.
9491 +-------------------------------------------------------------------------- */
9492 +static void bcm_console_print (struct console * cons, const char * str,
9493 + unsigned int count)
9494 +{
9495 + unsigned int i;
9496 + //_puts(str);
9497 + for(i=0; i<count; i++, str++)
9498 + {
9499 + _putc(*str);
9500 + if (*str == 10)
9501 + {
9502 + _putc(13);
9503 + }
9504 + }
9505 +}
9506 +
9507 +static struct tty_driver * bcm_console_device(struct console * c, int *index)
9508 +{
9509 + *index = c->index;
9510 + return serial_driver;
9511 +}
9512 +
9513 +static int __init bcm_console_setup(struct console * co, char * options)
9514 +{
9515 + return 0;
9516 +}
9517 +
9518 +static struct console bcm_sercons = {
9519 + .name = "ttyS",
9520 + .write = bcm_console_print,
9521 + .device = bcm_console_device,
9522 + .setup = bcm_console_setup,
9523 + .flags = CON_PRINTBUFFER,
9524 + .index = -1,
9525 +};
9526 +
9527 +static int __init bcm63xx_console_init(void)
9528 +{
9529 + register_console(&bcm_sercons);
9530 + return 0;
9531 +}
9532 +
9533 +console_initcall(bcm63xx_console_init);
9534 diff -urN linux.old/drivers/serial/Makefile linux.dev/drivers/serial/Makefile
9535 --- linux.old/drivers/serial/Makefile 2006-06-18 03:49:35.000000000 +0200
9536 +++ linux.dev/drivers/serial/Makefile 2006-08-25 15:38:44.000000000 +0200
9537 @@ -55,3 +55,4 @@
9538 obj-$(CONFIG_SERIAL_SGI_IOC4) += ioc4_serial.o
9539 obj-$(CONFIG_SERIAL_SGI_IOC3) += ioc3_serial.o
9540 obj-$(CONFIG_SERIAL_AT91) += at91_serial.o
9541 +obj-$(CONFIG_BCM_SERIAL) += bcm63xx_cons.o
9542 diff -urN linux.old/include/asm-mips/bootinfo.h linux.dev/include/asm-mips/bootinfo.h
9543 --- linux.old/include/asm-mips/bootinfo.h 2006-08-25 00:43:22.000000000 +0200
9544 +++ linux.dev/include/asm-mips/bootinfo.h 2006-08-25 00:39:38.000000000 +0200
9545 @@ -218,6 +218,14 @@
9546 #define MACH_GROUP_TITAN 22 /* PMC-Sierra Titan */
9547 #define MACH_TITAN_YOSEMITE 1 /* PMC-Sierra Yosemite */
9548
9549 +/*
9550 + * Valid machtype for group BRCM
9551 + */
9552 +#define MACH_GROUP_BRCM 23 /* Broadcom boards */
9553 +#define MACH_BCM96338 0
9554 +#define MACH_BCM96345 1
9555 +#define MACH_BCM96348 2
9556 +
9557 #define CL_SIZE COMMAND_LINE_SIZE
9558
9559 const char *get_system_type(void);
9560 diff -urN linux.old/include/asm-mips/cpu.h linux.dev/include/asm-mips/cpu.h
9561 --- linux.old/include/asm-mips/cpu.h 2006-08-25 00:43:22.000000000 +0200
9562 +++ linux.dev/include/asm-mips/cpu.h 2006-08-25 00:39:38.000000000 +0200
9563 @@ -103,6 +103,13 @@
9564
9565 #define PRID_IMP_SR71000 0x0400
9566
9567 +/* These are the PRID's for when 23:16 == PRID_COMP_BROADCOM
9568 + */
9569 +
9570 +#define PRID_IMP_BCM6338 0x9000
9571 +#define PRID_IMP_BCM6345 0x8000
9572 +#define PRID_IMP_BCM6348 0x9100
9573 +
9574 /*
9575 * Definitions for 7:0 on legacy processors
9576 */
9577 @@ -200,7 +207,10 @@
9578 #define CPU_SB1A 62
9579 #define CPU_74K 63
9580 #define CPU_R14000 64
9581 -#define CPU_LAST 64
9582 +#define CPU_BCM6338 65
9583 +#define CPU_BCM6345 66
9584 +#define CPU_BCM6348 67
9585 +#define CPU_LAST 67
9586
9587 /*
9588 * ISA Level encodings
9589 diff -urN linux.old/include/asm-mips/mach-bcm963xx/cpu-feature-overrides.h linux.dev/include/asm-mips/mach-bcm963xx/cpu-feature-overrides.h
9590 --- linux.old/include/asm-mips/mach-bcm963xx/cpu-feature-overrides.h 1970-01-01 01:00:00.000000000 +0100
9591 +++ linux.dev/include/asm-mips/mach-bcm963xx/cpu-feature-overrides.h 2006-08-25 11:27:40.000000000 +0200
9592 @@ -0,0 +1,36 @@
9593 +#ifndef __ASM_MACH_BCM963XX_CPU_FEATURE_OVERRIDES_H
9594 +#define __ASM_MACH_BCM963XX_CPU_FEATURE_OVERRIDES_H
9595 +
9596 +#define cpu_has_tlb 1
9597 +#define cpu_has_4kex 4
9598 +#define cpu_has_4ktlb 8
9599 +#define cpu_has_fpu 0
9600 +#define cpu_has_32fpr 0
9601 +#define cpu_has_counter 0x40
9602 +#define cpu_has_watch 0
9603 +#define cpu_has_mips16 0
9604 +#define cpu_has_divec 0x200
9605 +#define cpu_has_vce 0
9606 +#define cpu_has_cache_cdex_p 0
9607 +#define cpu_has_cache_cdex_s 0
9608 +#define cpu_has_prefetch 0x40000
9609 +#define cpu_has_mcheck 0x2000
9610 +#define cpu_has_ejtag 0x4000
9611 +#define cpu_has_llsc 0x10000
9612 +#define cpu_has_vtag_icache 0
9613 +#define cpu_has_dc_aliases 0
9614 +#define cpu_has_ic_fills_f_dc 0
9615 +
9616 +#define cpu_has_nofpuex 0
9617 +#define cpu_has_64bits 0
9618 +#define cpu_has_64bit_zero_reg 0
9619 +#define cpu_has_64bit_gp_regs 0
9620 +#define cpu_has_64bit_addresses 0
9621 +
9622 +#define cpu_has_subset_pcaches 0
9623 +
9624 +#define cpu_dcache_line_size() 16
9625 +#define cpu_icache_line_size() 16
9626 +#define cpu_scache_line_size() 0
9627 +
9628 +#endif /* __ASM_MACH_BCM963XX_CPU_FEATURE_OVERRIDES_H */
9629 diff -urN linux.old/include/asm-mips/mach-generic/param.h linux.dev/include/asm-mips/mach-generic/param.h
9630 --- linux.old/include/asm-mips/mach-generic/param.h 2006-08-25 00:43:22.000000000 +0200
9631 +++ linux.dev/include/asm-mips/mach-generic/param.h 2006-08-25 00:39:38.000000000 +0200
9632 @@ -8,6 +8,6 @@
9633 #ifndef __ASM_MACH_GENERIC_PARAM_H
9634 #define __ASM_MACH_GENERIC_PARAM_H
9635
9636 -#define HZ 1000 /* Internal kernel timer frequency */
9637 +#define HZ 200 /* Internal kernel timer frequency */
9638
9639 #endif /* __ASM_MACH_GENERIC_PARAM_H */
9640 diff -urN linux.old/include/asm-mips/module.h linux.dev/include/asm-mips/module.h
9641 --- linux.old/include/asm-mips/module.h 2006-08-25 00:43:22.000000000 +0200
9642 +++ linux.dev/include/asm-mips/module.h 2006-08-25 00:39:38.000000000 +0200
9643 @@ -113,6 +113,12 @@
9644 #define MODULE_PROC_FAMILY "RM9000 "
9645 #elif defined CONFIG_CPU_SB1
9646 #define MODULE_PROC_FAMILY "SB1 "
9647 +#elif defined CONFIG_CPU_BCM6338
9648 +#define MODULE_PROC_FAMILY "BCM6338 "
9649 +#elif defined CONFIG_CPU_BCM6345
9650 +#define MODULE_PROC_FAMILY "BCM6345 "
9651 +#elif defined CONFIG_CPU_BCM6348
9652 +#define MODULE_PROC_FAMILY "BCM6348 "
9653 #else
9654 #error MODULE_PROC_FAMILY undefined for your processor configuration
9655 #endif
9656
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