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bcm963xx: board support
[openwrt.git] / target / linux / avr32 / patches / 100-git_sync.patch
1 diff -urN linux-2.6.24.3/arch/avr32/boards/atngw100/Kconfig avr32-2.6/arch/avr32/boards/atngw100/Kconfig
2 --- linux-2.6.24.3/arch/avr32/boards/atngw100/Kconfig 1970-01-01 01:00:00.000000000 +0100
3 +++ avr32-2.6/arch/avr32/boards/atngw100/Kconfig 2008-04-23 19:33:28.000000000 +0200
4 @@ -0,0 +1,12 @@
5 +# NGW100 customization
6 +
7 +config BOARD_ATNGW100_I2C_GPIO
8 + bool "Use GPIO for i2c instead of built-in TWI module"
9 + help
10 + The driver for the built-in TWI module has been plagued by
11 + various problems, while the i2c-gpio driver is based on the
12 + trusty old i2c-algo-bit bitbanging engine, making it work
13 + on pretty much any setup.
14 +
15 + Choose 'Y' here if you're having i2c-related problems and
16 + want to rule out the i2c bus driver.
17 diff -urN linux-2.6.24.3/arch/avr32/boards/atngw100/setup.c avr32-2.6/arch/avr32/boards/atngw100/setup.c
18 --- linux-2.6.24.3/arch/avr32/boards/atngw100/setup.c 2008-02-26 01:20:20.000000000 +0100
19 +++ avr32-2.6/arch/avr32/boards/atngw100/setup.c 2008-04-23 20:12:35.000000000 +0200
20 @@ -20,7 +20,7 @@
21 #include <asm/io.h>
22 #include <asm/setup.h>
23
24 -#include <asm/arch/at32ap7000.h>
25 +#include <asm/arch/at32ap700x.h>
26 #include <asm/arch/board.h>
27 #include <asm/arch/init.h>
28 #include <asm/arch/portmux.h>
29 @@ -37,11 +37,16 @@
30 static struct spi_board_info spi0_board_info[] __initdata = {
31 {
32 .modalias = "mtd_dataflash",
33 - .max_speed_hz = 10000000,
34 + .max_speed_hz = 8000000,
35 .chip_select = 0,
36 },
37 };
38
39 +static struct mci_platform_data __initdata mci0_data = {
40 + .detect_pin = GPIO_PIN_PC(25),
41 + .wp_pin = GPIO_PIN_PE(0),
42 +};
43 +
44 /*
45 * The next two functions should go away as the boot loader is
46 * supposed to initialize the macb address registers with a valid
47 @@ -124,6 +129,7 @@
48 }
49 };
50
51 +#ifdef CONFIG_BOARD_ATNGW100_I2C_GPIO
52 static struct i2c_gpio_platform_data i2c_gpio_data = {
53 .sda_pin = GPIO_PIN_PA(6),
54 .scl_pin = GPIO_PIN_PA(7),
55 @@ -139,6 +145,7 @@
56 .platform_data = &i2c_gpio_data,
57 },
58 };
59 +#endif
60
61 static int __init atngw100_init(void)
62 {
63 @@ -157,6 +164,7 @@
64 set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
65
66 at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
67 + at32_add_device_mci(0, &mci0_data);
68 at32_add_device_usba(0, NULL);
69
70 for (i = 0; i < ARRAY_SIZE(ngw_leds); i++) {
71 @@ -165,11 +173,15 @@
72 }
73 platform_device_register(&ngw_gpio_leds);
74
75 +#ifdef CONFIG_BOARD_ATNGW100_I2C_GPIO
76 at32_select_gpio(i2c_gpio_data.sda_pin,
77 AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
78 at32_select_gpio(i2c_gpio_data.scl_pin,
79 AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
80 platform_device_register(&i2c_gpio_device);
81 +#else
82 + at32_add_device_twi(0, NULL, 0);
83 +#endif
84
85 return 0;
86 }
87 diff -urN linux-2.6.24.3/arch/avr32/boards/atstk1000/atstk1000.h avr32-2.6/arch/avr32/boards/atstk1000/atstk1000.h
88 --- linux-2.6.24.3/arch/avr32/boards/atstk1000/atstk1000.h 2008-02-26 01:20:20.000000000 +0100
89 +++ avr32-2.6/arch/avr32/boards/atstk1000/atstk1000.h 2008-04-23 19:33:28.000000000 +0200
90 @@ -12,4 +12,6 @@
91
92 extern struct atmel_lcdfb_info atstk1000_lcdc_data;
93
94 +void atstk1000_setup_j2_leds(void);
95 +
96 #endif /* __ARCH_AVR32_BOARDS_ATSTK1000_ATSTK1000_H */
97 diff -urN linux-2.6.24.3/arch/avr32/boards/atstk1000/atstk1002.c avr32-2.6/arch/avr32/boards/atstk1000/atstk1002.c
98 --- linux-2.6.24.3/arch/avr32/boards/atstk1000/atstk1002.c 2008-02-26 01:20:20.000000000 +0100
99 +++ avr32-2.6/arch/avr32/boards/atstk1000/atstk1002.c 2008-04-23 20:12:35.000000000 +0200
100 @@ -11,7 +11,6 @@
101 #include <linux/etherdevice.h>
102 #include <linux/init.h>
103 #include <linux/kernel.h>
104 -#include <linux/leds.h>
105 #include <linux/platform_device.h>
106 #include <linux/string.h>
107 #include <linux/types.h>
108 @@ -22,7 +21,7 @@
109
110 #include <asm/io.h>
111 #include <asm/setup.h>
112 -#include <asm/arch/at32ap7000.h>
113 +#include <asm/arch/at32ap700x.h>
114 #include <asm/arch/board.h>
115 #include <asm/arch/init.h>
116 #include <asm/arch/portmux.h>
117 @@ -49,18 +48,16 @@
118 },
119 };
120
121 -#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
122 -#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
123 +#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
124 static struct at73c213_board_info at73c213_data = {
125 .ssc_id = 0,
126 .shortname = "AVR32 STK1000 external DAC",
127 };
128 #endif
129 -#endif
130
131 -#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
132 +#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
133 static struct spi_board_info spi0_board_info[] __initdata = {
134 -#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
135 +#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
136 {
137 /* AT73C213 */
138 .modalias = "at73c213",
139 @@ -80,12 +77,25 @@
140 };
141 #endif
142
143 -#ifdef CONFIG_BOARD_ATSTK1002_SPI1
144 +#ifdef CONFIG_BOARD_ATSTK100X_SPI1
145 static struct spi_board_info spi1_board_info[] __initdata = { {
146 /* patch in custom entries here */
147 } };
148 #endif
149
150 +static struct cf_platform_data __initdata cf0_data = {
151 +#ifdef CONFIG_BOARD_ATSTK1000_CF_HACKS
152 + .detect_pin = CONFIG_BOARD_ATSTK1000_CF_DETECT_PIN,
153 + .reset_pin = CONFIG_BOARD_ATSTK1000_CF_RESET_PIN,
154 +#else
155 + .detect_pin = GPIO_PIN_NONE,
156 + .reset_pin = GPIO_PIN_NONE,
157 +#endif
158 + .vcc_pin = GPIO_PIN_NONE,
159 + .ready_pin = GPIO_PIN_PB(27),
160 + .cs = 4,
161 +};
162 +
163 /*
164 * The next two functions should go away as the boot loader is
165 * supposed to initialize the macb address registers with a valid
166 @@ -141,68 +151,8 @@
167 clk_put(pclk);
168 }
169
170 -#ifdef CONFIG_BOARD_ATSTK1002_J2_LED
171 -
172 -static struct gpio_led stk_j2_led[] = {
173 -#ifdef CONFIG_BOARD_ATSTK1002_J2_LED8
174 -#define LEDSTRING "J2 jumpered to LED8"
175 - { .name = "led0:amber", .gpio = GPIO_PIN_PB( 8), },
176 - { .name = "led1:amber", .gpio = GPIO_PIN_PB( 9), },
177 - { .name = "led2:amber", .gpio = GPIO_PIN_PB(10), },
178 - { .name = "led3:amber", .gpio = GPIO_PIN_PB(13), },
179 - { .name = "led4:amber", .gpio = GPIO_PIN_PB(14), },
180 - { .name = "led5:amber", .gpio = GPIO_PIN_PB(15), },
181 - { .name = "led6:amber", .gpio = GPIO_PIN_PB(16), },
182 - { .name = "led7:amber", .gpio = GPIO_PIN_PB(30),
183 - .default_trigger = "heartbeat", },
184 -#else /* RGB */
185 -#define LEDSTRING "J2 jumpered to RGB LEDs"
186 - { .name = "r1:red", .gpio = GPIO_PIN_PB( 8), },
187 - { .name = "g1:green", .gpio = GPIO_PIN_PB(10), },
188 - { .name = "b1:blue", .gpio = GPIO_PIN_PB(14), },
189 -
190 - { .name = "r2:red", .gpio = GPIO_PIN_PB( 9),
191 - .default_trigger = "heartbeat", },
192 - { .name = "g2:green", .gpio = GPIO_PIN_PB(13), },
193 - { .name = "b2:blue", .gpio = GPIO_PIN_PB(15),
194 - .default_trigger = "heartbeat", },
195 - /* PB16, PB30 unused */
196 -#endif
197 -};
198 -
199 -static struct gpio_led_platform_data stk_j2_led_data = {
200 - .num_leds = ARRAY_SIZE(stk_j2_led),
201 - .leds = stk_j2_led,
202 -};
203 -
204 -static struct platform_device stk_j2_led_dev = {
205 - .name = "leds-gpio",
206 - .id = 2, /* gpio block J2 */
207 - .dev = {
208 - .platform_data = &stk_j2_led_data,
209 - },
210 -};
211 -
212 -static void setup_j2_leds(void)
213 -{
214 - unsigned i;
215 -
216 - for (i = 0; i < ARRAY_SIZE(stk_j2_led); i++)
217 - at32_select_gpio(stk_j2_led[i].gpio, AT32_GPIOF_OUTPUT);
218 -
219 - printk("STK1002: " LEDSTRING "\n");
220 - platform_device_register(&stk_j2_led_dev);
221 -}
222 -
223 -#else
224 -static void setup_j2_leds(void)
225 -{
226 -}
227 -#endif
228 -
229 -#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
230 -#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
231 -static void __init at73c213_set_clk(struct at73c213_board_info *info)
232 +#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
233 +static void __init atstk1002_setup_extdac(void)
234 {
235 struct clk *gclk;
236 struct clk *pll;
237 @@ -220,7 +170,7 @@
238 }
239
240 at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0);
241 - info->dac_clk = gclk;
242 + at73c213_data.dac_clk = gclk;
243
244 err_set_clk:
245 clk_put(pll);
246 @@ -229,12 +179,16 @@
247 err_gclk:
248 return;
249 }
250 -#endif
251 -#endif
252 +#else
253 +static void __init atstk1002_setup_extdac(void)
254 +{
255 +
256 +}
257 +#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */
258
259 void __init setup_board(void)
260 {
261 -#ifdef CONFIG_BOARD_ATSTK1002_SW2_CUSTOM
262 +#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
263 at32_map_usart(0, 1); /* USART 0/B: /dev/ttyS1, IRDA */
264 #else
265 at32_map_usart(1, 0); /* USART 1/A: /dev/ttyS0, DB9 */
266 @@ -271,7 +225,7 @@
267
268 at32_add_system_devices();
269
270 -#ifdef CONFIG_BOARD_ATSTK1002_SW2_CUSTOM
271 +#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
272 at32_add_device_usart(1);
273 #else
274 at32_add_device_usart(0);
275 @@ -281,12 +235,16 @@
276 #ifndef CONFIG_BOARD_ATSTK1002_SW6_CUSTOM
277 set_hw_addr(at32_add_device_eth(0, &eth_data[0]));
278 #endif
279 -#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
280 +#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
281 at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
282 #endif
283 -#ifdef CONFIG_BOARD_ATSTK1002_SPI1
284 +#ifdef CONFIG_BOARD_ATSTK100X_SPI1
285 at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
286 #endif
287 + at32_add_device_twi(0, NULL, 0);
288 +#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
289 + at32_add_device_mci(0, NULL);
290 +#endif
291 #ifdef CONFIG_BOARD_ATSTK1002_SW5_CUSTOM
292 set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
293 #else
294 @@ -294,18 +252,23 @@
295 fbmem_start, fbmem_size);
296 #endif
297 at32_add_device_usba(0, NULL);
298 -#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
299 - at32_add_device_ssc(0, ATMEL_SSC_TX);
300 +#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97
301 + at32_add_device_ac97c(0);
302 +#else
303 + at32_add_device_abdac(0);
304 #endif
305 -
306 - setup_j2_leds();
307 -
308 -#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
309 -#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
310 - at73c213_set_clk(&at73c213_data);
311 +#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
312 + at32_add_device_ssc(0, ATMEL_SSC_TX);
313 #endif
314 + at32_add_device_cf(0, 2, &cf0_data);
315 +#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_PSIF
316 + at32_add_device_psif(0);
317 + at32_add_device_psif(1);
318 #endif
319
320 + atstk1000_setup_j2_leds();
321 + atstk1002_setup_extdac();
322 +
323 return 0;
324 }
325 postcore_initcall(atstk1002_init);
326 diff -urN linux-2.6.24.3/arch/avr32/boards/atstk1000/atstk1003.c avr32-2.6/arch/avr32/boards/atstk1000/atstk1003.c
327 --- linux-2.6.24.3/arch/avr32/boards/atstk1000/atstk1003.c 1970-01-01 01:00:00.000000000 +0100
328 +++ avr32-2.6/arch/avr32/boards/atstk1000/atstk1003.c 2008-04-23 20:12:35.000000000 +0200
329 @@ -0,0 +1,185 @@
330 +/*
331 + * ATSTK1003 daughterboard-specific init code
332 + *
333 + * Copyright (C) 2007 Atmel Corporation
334 + *
335 + * This program is free software; you can redistribute it and/or modify
336 + * it under the terms of the GNU General Public License version 2 as
337 + * published by the Free Software Foundation.
338 + */
339 +#include <linux/clk.h>
340 +#include <linux/err.h>
341 +#include <linux/init.h>
342 +#include <linux/kernel.h>
343 +#include <linux/platform_device.h>
344 +#include <linux/string.h>
345 +#include <linux/types.h>
346 +
347 +#include <linux/spi/at73c213.h>
348 +#include <linux/spi/spi.h>
349 +
350 +#include <asm/setup.h>
351 +
352 +#include <asm/arch/at32ap700x.h>
353 +#include <asm/arch/board.h>
354 +#include <asm/arch/init.h>
355 +#include <asm/arch/portmux.h>
356 +
357 +#include "atstk1000.h"
358 +
359 +#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
360 +static struct at73c213_board_info at73c213_data = {
361 + .ssc_id = 0,
362 + .shortname = "AVR32 STK1000 external DAC",
363 +};
364 +#endif
365 +
366 +#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
367 +static struct spi_board_info spi0_board_info[] __initdata = {
368 +#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
369 + {
370 + /* AT73C213 */
371 + .modalias = "at73c213",
372 + .max_speed_hz = 200000,
373 + .chip_select = 0,
374 + .mode = SPI_MODE_1,
375 + .platform_data = &at73c213_data,
376 + },
377 +#endif
378 + /*
379 + * We can control the LTV350QV LCD panel, but it isn't much
380 + * point since we don't have an LCD controller...
381 + */
382 +};
383 +#endif
384 +
385 +#ifdef CONFIG_BOARD_ATSTK100X_SPI1
386 +static struct spi_board_info spi1_board_info[] __initdata = { {
387 + /* patch in custom entries here */
388 +} };
389 +#endif
390 +
391 +static struct cf_platform_data __initdata cf0_data = {
392 +#ifdef CONFIG_BOARD_ATSTK1000_CF_HACKS
393 + .detect_pin = CONFIG_BOARD_ATSTK1000_CF_DETECT_PIN,
394 + .reset_pin = CONFIG_BOARD_ATSTK1000_CF_RESET_PIN,
395 +#else
396 + .detect_pin = GPIO_PIN_NONE,
397 + .reset_pin = GPIO_PIN_NONE,
398 +#endif
399 + .vcc_pin = GPIO_PIN_NONE,
400 + .ready_pin = GPIO_PIN_PB(27),
401 + .cs = 4,
402 +};
403 +
404 +#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
405 +static void __init atstk1003_setup_extdac(void)
406 +{
407 + struct clk *gclk;
408 + struct clk *pll;
409 +
410 + gclk = clk_get(NULL, "gclk0");
411 + if (IS_ERR(gclk))
412 + goto err_gclk;
413 + pll = clk_get(NULL, "pll0");
414 + if (IS_ERR(pll))
415 + goto err_pll;
416 +
417 + if (clk_set_parent(gclk, pll)) {
418 + pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n");
419 + goto err_set_clk;
420 + }
421 +
422 + at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0);
423 + at73c213_data.dac_clk = gclk;
424 +
425 +err_set_clk:
426 + clk_put(pll);
427 +err_pll:
428 + clk_put(gclk);
429 +err_gclk:
430 + return;
431 +}
432 +#else
433 +static void __init atstk1003_setup_extdac(void)
434 +{
435 +
436 +}
437 +#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */
438 +
439 +void __init setup_board(void)
440 +{
441 +#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
442 + at32_map_usart(0, 1); /* USART 0/B: /dev/ttyS1, IRDA */
443 +#else
444 + at32_map_usart(1, 0); /* USART 1/A: /dev/ttyS0, DB9 */
445 +#endif
446 + /* USART 2/unused: expansion connector */
447 + at32_map_usart(3, 2); /* USART 3/C: /dev/ttyS2, DB9 */
448 +
449 + at32_setup_serial_console(0);
450 +}
451 +
452 +static int __init atstk1003_init(void)
453 +{
454 + /*
455 + * ATSTK1000 uses 32-bit SDRAM interface. Reserve the
456 + * SDRAM-specific pins so that nobody messes with them.
457 + */
458 + at32_reserve_pin(GPIO_PIN_PE(0)); /* DATA[16] */
459 + at32_reserve_pin(GPIO_PIN_PE(1)); /* DATA[17] */
460 + at32_reserve_pin(GPIO_PIN_PE(2)); /* DATA[18] */
461 + at32_reserve_pin(GPIO_PIN_PE(3)); /* DATA[19] */
462 + at32_reserve_pin(GPIO_PIN_PE(4)); /* DATA[20] */
463 + at32_reserve_pin(GPIO_PIN_PE(5)); /* DATA[21] */
464 + at32_reserve_pin(GPIO_PIN_PE(6)); /* DATA[22] */
465 + at32_reserve_pin(GPIO_PIN_PE(7)); /* DATA[23] */
466 + at32_reserve_pin(GPIO_PIN_PE(8)); /* DATA[24] */
467 + at32_reserve_pin(GPIO_PIN_PE(9)); /* DATA[25] */
468 + at32_reserve_pin(GPIO_PIN_PE(10)); /* DATA[26] */
469 + at32_reserve_pin(GPIO_PIN_PE(11)); /* DATA[27] */
470 + at32_reserve_pin(GPIO_PIN_PE(12)); /* DATA[28] */
471 + at32_reserve_pin(GPIO_PIN_PE(13)); /* DATA[29] */
472 + at32_reserve_pin(GPIO_PIN_PE(14)); /* DATA[30] */
473 + at32_reserve_pin(GPIO_PIN_PE(15)); /* DATA[31] */
474 + at32_reserve_pin(GPIO_PIN_PE(26)); /* SDCS */
475 +
476 + at32_add_system_devices();
477 +
478 +#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
479 + at32_add_device_usart(1);
480 +#else
481 + at32_add_device_usart(0);
482 +#endif
483 + at32_add_device_usart(2);
484 +
485 +#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
486 + at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
487 +#endif
488 +#ifdef CONFIG_BOARD_ATSTK100X_SPI1
489 + at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
490 +#endif
491 +#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
492 + at32_add_device_mci(0, NULL);
493 +#endif
494 + at32_add_device_usba(0, NULL);
495 +#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97
496 + at32_add_device_ac97c(0);
497 +#else
498 + at32_add_device_abdac(0);
499 +#endif
500 +#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
501 + at32_add_device_ssc(0, ATMEL_SSC_TX);
502 +#endif
503 + at32_add_device_cf(0, 2, &cf0_data);
504 +#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_PSIF
505 + at32_add_device_psif(0);
506 + at32_add_device_psif(1);
507 +#endif
508 +
509 + atstk1000_setup_j2_leds();
510 + atstk1003_setup_extdac();
511 +
512 + return 0;
513 +}
514 +postcore_initcall(atstk1003_init);
515 diff -urN linux-2.6.24.3/arch/avr32/boards/atstk1000/atstk1004.c avr32-2.6/arch/avr32/boards/atstk1000/atstk1004.c
516 --- linux-2.6.24.3/arch/avr32/boards/atstk1000/atstk1004.c 1970-01-01 01:00:00.000000000 +0100
517 +++ avr32-2.6/arch/avr32/boards/atstk1000/atstk1004.c 2008-04-23 20:12:35.000000000 +0200
518 @@ -0,0 +1,156 @@
519 +/*
520 + * ATSTK1003 daughterboard-specific init code
521 + *
522 + * Copyright (C) 2007 Atmel Corporation
523 + *
524 + * This program is free software; you can redistribute it and/or modify
525 + * it under the terms of the GNU General Public License version 2 as
526 + * published by the Free Software Foundation.
527 + */
528 +#include <linux/clk.h>
529 +#include <linux/err.h>
530 +#include <linux/init.h>
531 +#include <linux/kernel.h>
532 +#include <linux/platform_device.h>
533 +#include <linux/string.h>
534 +#include <linux/types.h>
535 +
536 +#include <linux/spi/at73c213.h>
537 +#include <linux/spi/spi.h>
538 +
539 +#include <video/atmel_lcdc.h>
540 +
541 +#include <asm/setup.h>
542 +
543 +#include <asm/arch/at32ap700x.h>
544 +#include <asm/arch/board.h>
545 +#include <asm/arch/init.h>
546 +#include <asm/arch/portmux.h>
547 +
548 +#include "atstk1000.h"
549 +
550 +#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
551 +static struct at73c213_board_info at73c213_data = {
552 + .ssc_id = 0,
553 + .shortname = "AVR32 STK1000 external DAC",
554 +};
555 +#endif
556 +
557 +#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
558 +static struct spi_board_info spi0_board_info[] __initdata = {
559 +#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
560 + {
561 + /* AT73C213 */
562 + .modalias = "at73c213",
563 + .max_speed_hz = 200000,
564 + .chip_select = 0,
565 + .mode = SPI_MODE_1,
566 + .platform_data = &at73c213_data,
567 + },
568 +#endif
569 + {
570 + /* QVGA display */
571 + .modalias = "ltv350qv",
572 + .max_speed_hz = 16000000,
573 + .chip_select = 1,
574 + .mode = SPI_MODE_3,
575 + },
576 +};
577 +#endif
578 +
579 +#ifdef CONFIG_BOARD_ATSTK100X_SPI1
580 +static struct spi_board_info spi1_board_info[] __initdata = { {
581 + /* patch in custom entries here */
582 +} };
583 +#endif
584 +
585 +#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
586 +static void __init atstk1004_setup_extdac(void)
587 +{
588 + struct clk *gclk;
589 + struct clk *pll;
590 +
591 + gclk = clk_get(NULL, "gclk0");
592 + if (IS_ERR(gclk))
593 + goto err_gclk;
594 + pll = clk_get(NULL, "pll0");
595 + if (IS_ERR(pll))
596 + goto err_pll;
597 +
598 + if (clk_set_parent(gclk, pll)) {
599 + pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n");
600 + goto err_set_clk;
601 + }
602 +
603 + at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0);
604 + at73c213_data.dac_clk = gclk;
605 +
606 +err_set_clk:
607 + clk_put(pll);
608 +err_pll:
609 + clk_put(gclk);
610 +err_gclk:
611 + return;
612 +}
613 +#else
614 +static void __init atstk1004_setup_extdac(void)
615 +{
616 +
617 +}
618 +#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */
619 +
620 +void __init setup_board(void)
621 +{
622 +#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
623 + at32_map_usart(0, 1); /* USART 0/B: /dev/ttyS1, IRDA */
624 +#else
625 + at32_map_usart(1, 0); /* USART 1/A: /dev/ttyS0, DB9 */
626 +#endif
627 + /* USART 2/unused: expansion connector */
628 + at32_map_usart(3, 2); /* USART 3/C: /dev/ttyS2, DB9 */
629 +
630 + at32_setup_serial_console(0);
631 +}
632 +
633 +static int __init atstk1004_init(void)
634 +{
635 + at32_add_system_devices();
636 +
637 +#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
638 + at32_add_device_usart(1);
639 +#else
640 + at32_add_device_usart(0);
641 +#endif
642 + at32_add_device_usart(2);
643 +
644 +#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
645 + at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
646 +#endif
647 +#ifdef CONFIG_BOARD_ATSTK100X_SPI1
648 + at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
649 +#endif
650 +#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
651 + at32_add_device_mci(0, NULL);
652 +#endif
653 + at32_add_device_lcdc(0, &atstk1000_lcdc_data,
654 + fbmem_start, fbmem_size);
655 + at32_add_device_usba(0, NULL);
656 +#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97
657 + at32_add_device_ac97c(0);
658 +#else
659 + at32_add_device_abdac(0);
660 +#endif
661 +#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
662 + at32_add_device_ssc(0, ATMEL_SSC_TX);
663 +#endif
664 +#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_PSIF
665 + at32_add_device_psif(0);
666 + at32_add_device_psif(1);
667 +#endif
668 +
669 + atstk1000_setup_j2_leds();
670 + atstk1004_setup_extdac();
671 +
672 + return 0;
673 +}
674 +postcore_initcall(atstk1004_init);
675 diff -urN linux-2.6.24.3/arch/avr32/boards/atstk1000/Kconfig avr32-2.6/arch/avr32/boards/atstk1000/Kconfig
676 --- linux-2.6.24.3/arch/avr32/boards/atstk1000/Kconfig 2008-02-26 01:20:20.000000000 +0100
677 +++ avr32-2.6/arch/avr32/boards/atstk1000/Kconfig 2008-04-23 20:12:35.000000000 +0200
678 @@ -1,34 +1,53 @@
679 # STK1000 customization
680
681 -if BOARD_ATSTK1002
682 +if BOARD_ATSTK1000
683
684 -config BOARD_ATSTK1002_CUSTOM
685 - bool "Non-default STK-1002 jumper settings"
686 +choice
687 + prompt "ATSTK1000 CPU daughterboard type"
688 + default BOARD_ATSTK1002
689 +
690 +config BOARD_ATSTK1002
691 + bool "ATSTK1002"
692 + select CPU_AT32AP7000
693 +
694 +config BOARD_ATSTK1003
695 + bool "ATSTK1003"
696 + select CPU_AT32AP7001
697 +
698 +config BOARD_ATSTK1004
699 + bool "ATSTK1004"
700 + select CPU_AT32AP7002
701 +
702 +endchoice
703 +
704 +
705 +config BOARD_ATSTK100X_CUSTOM
706 + bool "Non-default STK1002/STK1003/STK1004 jumper settings"
707 help
708 You will normally leave the jumpers on the CPU card at their
709 default settings. If you need to use certain peripherals,
710 you will need to change some of those jumpers.
711
712 -if BOARD_ATSTK1002_CUSTOM
713 +if BOARD_ATSTK100X_CUSTOM
714
715 -config BOARD_ATSTK1002_SW1_CUSTOM
716 +config BOARD_ATSTK100X_SW1_CUSTOM
717 bool "SW1: use SSC1 (not SPI0)"
718 help
719 This also prevents using the external DAC as an audio interface,
720 and means you can't initialize the on-board QVGA display.
721
722 -config BOARD_ATSTK1002_SW2_CUSTOM
723 +config BOARD_ATSTK100X_SW2_CUSTOM
724 bool "SW2: use IRDA or TIMER0 (not UART-A, MMC/SD, and PS2-A)"
725 help
726 If you change this you'll want an updated boot loader putting
727 the console on UART-C not UART-A.
728
729 -config BOARD_ATSTK1002_SW3_CUSTOM
730 +config BOARD_ATSTK100X_SW3_CUSTOM
731 bool "SW3: use TIMER1 (not SSC0 and GCLK)"
732 help
733 This also prevents using the external DAC as an audio interface.
734
735 -config BOARD_ATSTK1002_SW4_CUSTOM
736 +config BOARD_ATSTK100X_SW4_CUSTOM
737 bool "SW4: use ISI/Camera (not GPIOs, SPI1, and PS2-B)"
738 help
739 To use the camera interface you'll need a custom card (on the
740 @@ -36,27 +55,29 @@
741
742 config BOARD_ATSTK1002_SW5_CUSTOM
743 bool "SW5: use MACB1 (not LCDC)"
744 + depends on BOARD_ATSTK1002
745
746 config BOARD_ATSTK1002_SW6_CUSTOM
747 bool "SW6: more GPIOs (not MACB0)"
748 + depends on BOARD_ATSTK1002
749
750 endif # custom
751
752 -config BOARD_ATSTK1002_SPI1
753 +config BOARD_ATSTK100X_SPI1
754 bool "Configure SPI1 controller"
755 - depends on !BOARD_ATSTK1002_SW4_CUSTOM
756 + depends on !BOARD_ATSTK100X_SW4_CUSTOM
757 help
758 All the signals for the second SPI controller are available on
759 GPIO lines and accessed through the J1 jumper block. Say "y"
760 here to configure that SPI controller.
761
762 -config BOARD_ATSTK1002_J2_LED
763 +config BOARD_ATSTK1000_J2_LED
764 bool
765 - default BOARD_ATSTK1002_J2_LED8 || BOARD_ATSTK1002_J2_RGB
766 + default BOARD_ATSTK1000_J2_LED8 || BOARD_ATSTK1000_J2_RGB
767
768 choice
769 prompt "LEDs connected to J2:"
770 - depends on LEDS_GPIO && !BOARD_ATSTK1002_SW4_CUSTOM
771 + depends on LEDS_GPIO && !BOARD_ATSTK100X_SW4_CUSTOM
772 optional
773 help
774 Select this if you have jumpered the J2 jumper block to the
775 @@ -64,16 +85,77 @@
776 IDC cable. A default "heartbeat" trigger is provided, but
777 you can of course override this.
778
779 -config BOARD_ATSTK1002_J2_LED8
780 +config BOARD_ATSTK1000_J2_LED8
781 bool "LED0..LED7"
782 help
783 Select this if J2 is jumpered to LED0..LED7 amber leds.
784
785 -config BOARD_ATSTK1002_J2_RGB
786 +config BOARD_ATSTK1000_J2_RGB
787 bool "RGB leds"
788 help
789 Select this if J2 is jumpered to the RGB leds.
790
791 endchoice
792
793 -endif # stk 1002
794 +config BOARD_ATSTK1000_EXTDAC
795 + bool
796 + depends on !BOARD_ATSTK100X_SW1_CUSTOM && !BOARD_ATSTK100X_SW3_CUSTOM
797 + default y
798 +
799 +config BOARD_ATSTK100X_ENABLE_AC97
800 + bool "Use AC97C instead of ABDAC"
801 + help
802 + Select this if you want to use the built-in AC97 controller
803 + instead of the built-in Audio Bitstream DAC. These share
804 + the same I/O pins on the AP7000, so both can't be enabled
805 + at the same time.
806 +
807 + Note that the STK1000 kit doesn't ship with an AC97 codec on
808 + board, so say N unless you've got an expansion board with an
809 + AC97 codec on it that you want to use.
810 +
811 +config BOARD_ATSTK1000_CF_HACKS
812 + bool "ATSTK1000 CompactFlash hacks"
813 + depends on !BOARD_ATSTK100X_SW4_CUSTOM
814 + help
815 + Select this if you have re-routed the CompactFlash RESET and
816 + CD signals to GPIOs on your STK1000. This is necessary for
817 + reset and card detection to work properly, although some CF
818 + cards may be able to cope without reset.
819 +
820 +config BOARD_ATSTK1000_CF_RESET_PIN
821 + hex "CompactFlash RESET pin"
822 + default 0x30
823 + depends on BOARD_ATSTK1000_CF_HACKS
824 + help
825 + Select which GPIO pin to use for the CompactFlash RESET
826 + signal. This is specified as a hexadecimal number and should
827 + be defined as 0x20 * gpio_port + pin.
828 +
829 + The default is 0x30, which is pin 16 on PIOB, aka GPIO14.
830 +
831 +config BOARD_ATSTK1000_CF_DETECT_PIN
832 + hex "CompactFlash DETECT pin"
833 + default 0x3e
834 + depends on BOARD_ATSTK1000_CF_HACKS
835 + help
836 + Select which GPIO pin to use for the CompactFlash CD
837 + signal. This is specified as a hexadecimal number and should
838 + be defined as 0x20 * gpio_port + pin.
839 +
840 + The default is 0x3e, which is pin 30 on PIOB, aka GPIO15.
841 +
842 +config BOARD_ATSTK100X_ENABLE_PSIF
843 + bool "Enable PSIF peripheral (PS/2 support)"
844 + default n
845 + help
846 + Select this if you want to use the PSIF peripheral to hook up PS/2
847 + devices to your STK1000. This will require a hardware modification to
848 + work correctly, since PS/2 devices require 5 volt power and signals,
849 + while the STK1000 only provides 3.3 volt.
850 +
851 + Say N if you have not modified the hardware to boost the voltage, say
852 + Y if you have level convertion hardware or a PS/2 device capable of
853 + operating on 3.3 volt.
854 +
855 +endif # stk 1000
856 diff -urN linux-2.6.24.3/arch/avr32/boards/atstk1000/Makefile avr32-2.6/arch/avr32/boards/atstk1000/Makefile
857 --- linux-2.6.24.3/arch/avr32/boards/atstk1000/Makefile 2008-02-26 01:20:20.000000000 +0100
858 +++ avr32-2.6/arch/avr32/boards/atstk1000/Makefile 2008-04-23 19:33:28.000000000 +0200
859 @@ -1,2 +1,4 @@
860 obj-y += setup.o flash.o
861 obj-$(CONFIG_BOARD_ATSTK1002) += atstk1002.o
862 +obj-$(CONFIG_BOARD_ATSTK1003) += atstk1003.o
863 +obj-$(CONFIG_BOARD_ATSTK1004) += atstk1004.o
864 diff -urN linux-2.6.24.3/arch/avr32/boards/atstk1000/setup.c avr32-2.6/arch/avr32/boards/atstk1000/setup.c
865 --- linux-2.6.24.3/arch/avr32/boards/atstk1000/setup.c 2008-02-26 01:20:20.000000000 +0100
866 +++ avr32-2.6/arch/avr32/boards/atstk1000/setup.c 2008-04-23 19:33:28.000000000 +0200
867 @@ -10,13 +10,17 @@
868 #include <linux/bootmem.h>
869 #include <linux/fb.h>
870 #include <linux/init.h>
871 +#include <linux/platform_device.h>
872 #include <linux/types.h>
873 #include <linux/linkage.h>
874
875 #include <video/atmel_lcdc.h>
876
877 #include <asm/setup.h>
878 +
879 +#include <asm/arch/at32ap700x.h>
880 #include <asm/arch/board.h>
881 +#include <asm/arch/portmux.h>
882
883 #include "atstk1000.h"
884
885 @@ -61,3 +65,63 @@
886 .default_monspecs = &atstk1000_default_monspecs,
887 .guard_time = 2,
888 };
889 +
890 +#ifdef CONFIG_BOARD_ATSTK1000_J2_LED
891 +#include <linux/leds.h>
892 +
893 +static struct gpio_led stk1000_j2_led[] = {
894 +#ifdef CONFIG_BOARD_ATSTK1000_J2_LED8
895 +#define LEDSTRING "J2 jumpered to LED8"
896 + { .name = "led0:amber", .gpio = GPIO_PIN_PB( 8), },
897 + { .name = "led1:amber", .gpio = GPIO_PIN_PB( 9), },
898 + { .name = "led2:amber", .gpio = GPIO_PIN_PB(10), },
899 + { .name = "led3:amber", .gpio = GPIO_PIN_PB(13), },
900 + { .name = "led4:amber", .gpio = GPIO_PIN_PB(14), },
901 + { .name = "led5:amber", .gpio = GPIO_PIN_PB(15), },
902 + { .name = "led6:amber", .gpio = GPIO_PIN_PB(16), },
903 + { .name = "led7:amber", .gpio = GPIO_PIN_PB(30),
904 + .default_trigger = "heartbeat", },
905 +#else /* RGB */
906 +#define LEDSTRING "J2 jumpered to RGB LEDs"
907 + { .name = "r1:red", .gpio = GPIO_PIN_PB( 8), },
908 + { .name = "g1:green", .gpio = GPIO_PIN_PB(10), },
909 + { .name = "b1:blue", .gpio = GPIO_PIN_PB(14), },
910 +
911 + { .name = "r2:red", .gpio = GPIO_PIN_PB( 9),
912 + .default_trigger = "heartbeat", },
913 + { .name = "g2:green", .gpio = GPIO_PIN_PB(13), },
914 + { .name = "b2:blue", .gpio = GPIO_PIN_PB(15),
915 + .default_trigger = "heartbeat", },
916 + /* PB16, PB30 unused */
917 +#endif
918 +};
919 +
920 +static struct gpio_led_platform_data stk1000_j2_led_data = {
921 + .num_leds = ARRAY_SIZE(stk1000_j2_led),
922 + .leds = stk1000_j2_led,
923 +};
924 +
925 +static struct platform_device stk1000_j2_led_dev = {
926 + .name = "leds-gpio",
927 + .id = 2, /* gpio block J2 */
928 + .dev = {
929 + .platform_data = &stk1000_j2_led_data,
930 + },
931 +};
932 +
933 +void __init atstk1000_setup_j2_leds(void)
934 +{
935 + unsigned i;
936 +
937 + for (i = 0; i < ARRAY_SIZE(stk1000_j2_led); i++)
938 + at32_select_gpio(stk1000_j2_led[i].gpio, AT32_GPIOF_OUTPUT);
939 +
940 + printk("STK1000: " LEDSTRING "\n");
941 + platform_device_register(&stk1000_j2_led_dev);
942 +}
943 +#else /* CONFIG_BOARD_ATSTK1000_J2_LED */
944 +void __init atstk1000_setup_j2_leds(void)
945 +{
946 +
947 +}
948 +#endif /* CONFIG_BOARD_ATSTK1000_J2_LED */
949 diff -urN linux-2.6.24.3/arch/avr32/configs/atngw100_defconfig avr32-2.6/arch/avr32/configs/atngw100_defconfig
950 --- linux-2.6.24.3/arch/avr32/configs/atngw100_defconfig 2008-02-26 01:20:20.000000000 +0100
951 +++ avr32-2.6/arch/avr32/configs/atngw100_defconfig 2008-04-23 20:12:35.000000000 +0200
952 @@ -1,46 +1,52 @@
953 #
954 # Automatically generated make config: don't edit
955 -# Linux kernel version: 2.6.22-rc5
956 -# Sat Jun 23 15:40:05 2007
957 +# Linux kernel version: 2.6.24
958 +# Thu Mar 6 12:49:54 2008
959 #
960 CONFIG_AVR32=y
961 CONFIG_GENERIC_GPIO=y
962 CONFIG_GENERIC_HARDIRQS=y
963 +CONFIG_STACKTRACE_SUPPORT=y
964 +CONFIG_LOCKDEP_SUPPORT=y
965 +CONFIG_TRACE_IRQFLAGS_SUPPORT=y
966 CONFIG_HARDIRQS_SW_RESEND=y
967 CONFIG_GENERIC_IRQ_PROBE=y
968 CONFIG_RWSEM_GENERIC_SPINLOCK=y
969 CONFIG_GENERIC_TIME=y
970 +CONFIG_GENERIC_CLOCKEVENTS=y
971 +# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
972 # CONFIG_ARCH_HAS_ILOG2_U32 is not set
973 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
974 +CONFIG_ARCH_SUPPORTS_OPROFILE=y
975 CONFIG_GENERIC_HWEIGHT=y
976 CONFIG_GENERIC_CALIBRATE_DELAY=y
977 CONFIG_GENERIC_BUG=y
978 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
979
980 #
981 -# Code maturity level options
982 +# General setup
983 #
984 CONFIG_EXPERIMENTAL=y
985 CONFIG_BROKEN_ON_SMP=y
986 CONFIG_INIT_ENV_ARG_LIMIT=32
987 -
988 -#
989 -# General setup
990 -#
991 CONFIG_LOCALVERSION=""
992 # CONFIG_LOCALVERSION_AUTO is not set
993 CONFIG_SWAP=y
994 CONFIG_SYSVIPC=y
995 -# CONFIG_IPC_NS is not set
996 CONFIG_SYSVIPC_SYSCTL=y
997 CONFIG_POSIX_MQUEUE=y
998 CONFIG_BSD_PROCESS_ACCT=y
999 CONFIG_BSD_PROCESS_ACCT_V3=y
1000 # CONFIG_TASKSTATS is not set
1001 -# CONFIG_UTS_NS is not set
1002 +# CONFIG_USER_NS is not set
1003 +# CONFIG_PID_NS is not set
1004 # CONFIG_AUDIT is not set
1005 # CONFIG_IKCONFIG is not set
1006 CONFIG_LOG_BUF_SHIFT=14
1007 +# CONFIG_CGROUPS is not set
1008 +CONFIG_FAIR_GROUP_SCHED=y
1009 +CONFIG_FAIR_USER_SCHED=y
1010 +# CONFIG_FAIR_CGROUP_SCHED is not set
1011 CONFIG_SYSFS_DEPRECATED=y
1012 # CONFIG_RELAY is not set
1013 CONFIG_BLK_DEV_INITRD=y
1014 @@ -61,35 +67,28 @@
1015 CONFIG_ANON_INODES=y
1016 CONFIG_EPOLL=y
1017 CONFIG_SIGNALFD=y
1018 -CONFIG_TIMERFD=y
1019 CONFIG_EVENTFD=y
1020 CONFIG_SHMEM=y
1021 CONFIG_VM_EVENT_COUNTERS=y
1022 -# CONFIG_SLUB_DEBUG is not set
1023 +CONFIG_SLUB_DEBUG=y
1024 # CONFIG_SLAB is not set
1025 CONFIG_SLUB=y
1026 # CONFIG_SLOB is not set
1027 +CONFIG_SLABINFO=y
1028 CONFIG_RT_MUTEXES=y
1029 # CONFIG_TINY_SHMEM is not set
1030 CONFIG_BASE_SMALL=1
1031 -
1032 -#
1033 -# Loadable module support
1034 -#
1035 CONFIG_MODULES=y
1036 CONFIG_MODULE_UNLOAD=y
1037 CONFIG_MODULE_FORCE_UNLOAD=y
1038 # CONFIG_MODVERSIONS is not set
1039 # CONFIG_MODULE_SRCVERSION_ALL is not set
1040 CONFIG_KMOD=y
1041 -
1042 -#
1043 -# Block layer
1044 -#
1045 CONFIG_BLOCK=y
1046 # CONFIG_LBD is not set
1047 # CONFIG_BLK_DEV_IO_TRACE is not set
1048 # CONFIG_LSF is not set
1049 +# CONFIG_BLK_DEV_BSG is not set
1050
1051 #
1052 # IO Schedulers
1053 @@ -107,21 +106,28 @@
1054 #
1055 # System Type and features
1056 #
1057 +CONFIG_TICK_ONESHOT=y
1058 +CONFIG_NO_HZ=y
1059 +CONFIG_HIGH_RES_TIMERS=y
1060 +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
1061 CONFIG_SUBARCH_AVR32B=y
1062 CONFIG_MMU=y
1063 CONFIG_PERFORMANCE_COUNTERS=y
1064 CONFIG_PLATFORM_AT32AP=y
1065 +CONFIG_CPU_AT32AP700X=y
1066 CONFIG_CPU_AT32AP7000=y
1067 # CONFIG_BOARD_ATSTK1000 is not set
1068 CONFIG_BOARD_ATNGW100=y
1069 +CONFIG_BOARD_ATNGW100_I2C_GPIO=y
1070 CONFIG_LOADER_U_BOOT=y
1071
1072 #
1073 # Atmel AVR32 AP options
1074 #
1075 -# CONFIG_AP7000_32_BIT_SMC is not set
1076 -CONFIG_AP7000_16_BIT_SMC=y
1077 -# CONFIG_AP7000_8_BIT_SMC is not set
1078 +# CONFIG_AP700X_32_BIT_SMC is not set
1079 +CONFIG_AP700X_16_BIT_SMC=y
1080 +# CONFIG_AP700X_8_BIT_SMC is not set
1081 +CONFIG_GPIO_DEV=y
1082 CONFIG_LOAD_ADDRESS=0x10000000
1083 CONFIG_ENTRY_ADDRESS=0x90000000
1084 CONFIG_PHYS_OFFSET=0x10000000
1085 @@ -141,10 +147,14 @@
1086 CONFIG_FLATMEM=y
1087 CONFIG_FLAT_NODE_MEM_MAP=y
1088 # CONFIG_SPARSEMEM_STATIC is not set
1089 +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
1090 CONFIG_SPLIT_PTLOCK_CPUS=4
1091 # CONFIG_RESOURCES_64BIT is not set
1092 CONFIG_ZONE_DMA_FLAG=0
1093 +CONFIG_VIRT_TO_BUS=y
1094 # CONFIG_OWNERSHIP_TRACE is not set
1095 +# CONFIG_NMI_DEBUGGING is not set
1096 +CONFIG_DW_DMAC=y
1097 # CONFIG_HZ_100 is not set
1098 CONFIG_HZ_250=y
1099 # CONFIG_HZ_300 is not set
1100 @@ -153,13 +163,31 @@
1101 CONFIG_CMDLINE=""
1102
1103 #
1104 -# Bus options
1105 +# Power management options
1106 #
1107 -# CONFIG_ARCH_SUPPORTS_MSI is not set
1108
1109 #
1110 -# PCCARD (PCMCIA/CardBus) support
1111 +# CPU Frequency scaling
1112 +#
1113 +CONFIG_CPU_FREQ=y
1114 +CONFIG_CPU_FREQ_TABLE=y
1115 +# CONFIG_CPU_FREQ_DEBUG is not set
1116 +# CONFIG_CPU_FREQ_STAT is not set
1117 +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
1118 +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
1119 +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
1120 +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
1121 +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
1122 +# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
1123 +CONFIG_CPU_FREQ_GOV_USERSPACE=y
1124 +CONFIG_CPU_FREQ_GOV_ONDEMAND=y
1125 +# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
1126 +CONFIG_CPU_FREQ_AT32AP=y
1127 +
1128 +#
1129 +# Bus options
1130 #
1131 +# CONFIG_ARCH_SUPPORTS_MSI is not set
1132 # CONFIG_PCCARD is not set
1133
1134 #
1135 @@ -213,6 +241,7 @@
1136 CONFIG_INET_XFRM_MODE_TRANSPORT=y
1137 CONFIG_INET_XFRM_MODE_TUNNEL=y
1138 CONFIG_INET_XFRM_MODE_BEET=y
1139 +# CONFIG_INET_LRO is not set
1140 CONFIG_INET_DIAG=y
1141 CONFIG_INET_TCP_DIAG=y
1142 # CONFIG_TCP_CONG_ADVANCED is not set
1143 @@ -240,6 +269,7 @@
1144 # CONFIG_NETWORK_SECMARK is not set
1145 CONFIG_NETFILTER=y
1146 # CONFIG_NETFILTER_DEBUG is not set
1147 +CONFIG_BRIDGE_NETFILTER=y
1148
1149 #
1150 # Core Netfilter Configuration
1151 @@ -252,6 +282,7 @@
1152 # CONFIG_NF_CONNTRACK_EVENTS is not set
1153 CONFIG_NF_CT_PROTO_GRE=m
1154 # CONFIG_NF_CT_PROTO_SCTP is not set
1155 +# CONFIG_NF_CT_PROTO_UDPLITE is not set
1156 CONFIG_NF_CONNTRACK_AMANDA=m
1157 CONFIG_NF_CONNTRACK_FTP=m
1158 CONFIG_NF_CONNTRACK_H323=m
1159 @@ -269,9 +300,11 @@
1160 CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
1161 CONFIG_NETFILTER_XT_TARGET_NFLOG=m
1162 # CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set
1163 +# CONFIG_NETFILTER_XT_TARGET_TRACE is not set
1164 CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
1165 CONFIG_NETFILTER_XT_MATCH_COMMENT=m
1166 CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
1167 +# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set
1168 CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
1169 CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
1170 # CONFIG_NETFILTER_XT_MATCH_DCCP is not set
1171 @@ -284,6 +317,7 @@
1172 CONFIG_NETFILTER_XT_MATCH_MARK=m
1173 CONFIG_NETFILTER_XT_MATCH_POLICY=m
1174 CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
1175 +# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set
1176 CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
1177 CONFIG_NETFILTER_XT_MATCH_QUOTA=m
1178 CONFIG_NETFILTER_XT_MATCH_REALM=m
1179 @@ -292,6 +326,8 @@
1180 CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
1181 CONFIG_NETFILTER_XT_MATCH_STRING=m
1182 CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
1183 +# CONFIG_NETFILTER_XT_MATCH_TIME is not set
1184 +# CONFIG_NETFILTER_XT_MATCH_U32 is not set
1185 CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
1186
1187 #
1188 @@ -359,13 +395,19 @@
1189 CONFIG_IP6_NF_MANGLE=m
1190 CONFIG_IP6_NF_TARGET_HL=m
1191 CONFIG_IP6_NF_RAW=m
1192 +
1193 +#
1194 +# Bridge: Netfilter Configuration
1195 +#
1196 +# CONFIG_BRIDGE_NF_EBTABLES is not set
1197 # CONFIG_IP_DCCP is not set
1198 # CONFIG_IP_SCTP is not set
1199 # CONFIG_TIPC is not set
1200 # CONFIG_ATM is not set
1201 -# CONFIG_BRIDGE is not set
1202 +CONFIG_BRIDGE=m
1203 CONFIG_VLAN_8021Q=m
1204 # CONFIG_DECNET is not set
1205 +CONFIG_LLC=m
1206 # CONFIG_LLC2 is not set
1207 # CONFIG_IPX is not set
1208 # CONFIG_ATALK is not set
1209 @@ -373,10 +415,6 @@
1210 # CONFIG_LAPB is not set
1211 # CONFIG_ECONET is not set
1212 # CONFIG_WAN_ROUTER is not set
1213 -
1214 -#
1215 -# QoS and/or fair queueing
1216 -#
1217 # CONFIG_NET_SCHED is not set
1218 CONFIG_NET_CLS_ROUTE=y
1219
1220 @@ -384,6 +422,7 @@
1221 # Network testing
1222 #
1223 # CONFIG_NET_PKTGEN is not set
1224 +# CONFIG_NET_TCPPROBE is not set
1225 # CONFIG_HAMRADIO is not set
1226 # CONFIG_IRDA is not set
1227 # CONFIG_BT is not set
1228 @@ -397,6 +436,7 @@
1229 # CONFIG_MAC80211 is not set
1230 # CONFIG_IEEE80211 is not set
1231 # CONFIG_RFKILL is not set
1232 +# CONFIG_NET_9P is not set
1233
1234 #
1235 # Device Drivers
1236 @@ -405,16 +445,13 @@
1237 #
1238 # Generic Driver Options
1239 #
1240 +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
1241 CONFIG_STANDALONE=y
1242 # CONFIG_PREVENT_FIRMWARE_BUILD is not set
1243 # CONFIG_FW_LOADER is not set
1244 # CONFIG_DEBUG_DRIVER is not set
1245 # CONFIG_DEBUG_DEVRES is not set
1246 # CONFIG_SYS_HYPERVISOR is not set
1247 -
1248 -#
1249 -# Connector - unified userspace <-> kernelspace linker
1250 -#
1251 # CONFIG_CONNECTOR is not set
1252 CONFIG_MTD=y
1253 # CONFIG_MTD_DEBUG is not set
1254 @@ -434,6 +471,7 @@
1255 # CONFIG_INFTL is not set
1256 # CONFIG_RFD_FTL is not set
1257 # CONFIG_SSFDC is not set
1258 +# CONFIG_MTD_OOPS is not set
1259
1260 #
1261 # RAM/ROM/Flash chip drivers
1262 @@ -493,20 +531,8 @@
1263 # UBI - Unsorted block images
1264 #
1265 # CONFIG_MTD_UBI is not set
1266 -
1267 -#
1268 -# Parallel port support
1269 -#
1270 # CONFIG_PARPORT is not set
1271 -
1272 -#
1273 -# Plug and Play support
1274 -#
1275 -# CONFIG_PNPACPI is not set
1276 -
1277 -#
1278 -# Block devices
1279 -#
1280 +CONFIG_BLK_DEV=y
1281 # CONFIG_BLK_DEV_COW_COMMON is not set
1282 CONFIG_BLK_DEV_LOOP=m
1283 # CONFIG_BLK_DEV_CRYPTOLOOP is not set
1284 @@ -517,11 +543,13 @@
1285 CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
1286 # CONFIG_CDROM_PKTCDVD is not set
1287 # CONFIG_ATA_OVER_ETH is not set
1288 -
1289 -#
1290 -# Misc devices
1291 -#
1292 -# CONFIG_BLINK is not set
1293 +CONFIG_MISC_DEVICES=y
1294 +# CONFIG_ATMEL_PWM is not set
1295 +CONFIG_ATMEL_TCLIB=y
1296 +CONFIG_ATMEL_TCB_CLKSRC=y
1297 +CONFIG_ATMEL_TCB_CLKSRC_BLOCK=0
1298 +# CONFIG_EEPROM_93CX6 is not set
1299 +# CONFIG_ATMEL_SSC is not set
1300 # CONFIG_IDE is not set
1301
1302 #
1303 @@ -529,30 +557,42 @@
1304 #
1305 # CONFIG_RAID_ATTRS is not set
1306 # CONFIG_SCSI is not set
1307 +# CONFIG_SCSI_DMA is not set
1308 # CONFIG_SCSI_NETLINK is not set
1309 # CONFIG_ATA is not set
1310 -
1311 -#
1312 -# Multi-device support (RAID and LVM)
1313 -#
1314 # CONFIG_MD is not set
1315 -
1316 -#
1317 -# Network device support
1318 -#
1319 CONFIG_NETDEVICES=y
1320 +# CONFIG_NETDEVICES_MULTIQUEUE is not set
1321 # CONFIG_DUMMY is not set
1322 # CONFIG_BONDING is not set
1323 +# CONFIG_MACVLAN is not set
1324 # CONFIG_EQUALIZER is not set
1325 CONFIG_TUN=m
1326 -# CONFIG_PHYLIB is not set
1327 +# CONFIG_VETH is not set
1328 +CONFIG_PHYLIB=y
1329
1330 #
1331 -# Ethernet (10 or 100Mbit)
1332 +# MII PHY device drivers
1333 #
1334 +# CONFIG_MARVELL_PHY is not set
1335 +# CONFIG_DAVICOM_PHY is not set
1336 +# CONFIG_QSEMI_PHY is not set
1337 +# CONFIG_LXT_PHY is not set
1338 +# CONFIG_CICADA_PHY is not set
1339 +# CONFIG_VITESSE_PHY is not set
1340 +# CONFIG_SMSC_PHY is not set
1341 +# CONFIG_BROADCOM_PHY is not set
1342 +# CONFIG_ICPLUS_PHY is not set
1343 +# CONFIG_FIXED_PHY is not set
1344 +# CONFIG_MDIO_BITBANG is not set
1345 CONFIG_NET_ETHERNET=y
1346 -CONFIG_MII=y
1347 +# CONFIG_MII is not set
1348 CONFIG_MACB=y
1349 +# CONFIG_IBM_NEW_EMAC_ZMII is not set
1350 +# CONFIG_IBM_NEW_EMAC_RGMII is not set
1351 +# CONFIG_IBM_NEW_EMAC_TAH is not set
1352 +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
1353 +# CONFIG_B44 is not set
1354 # CONFIG_NETDEV_1000 is not set
1355 # CONFIG_NETDEV_10000 is not set
1356
1357 @@ -571,21 +611,14 @@
1358 CONFIG_PPP_BSDCOMP=m
1359 CONFIG_PPP_MPPE=m
1360 CONFIG_PPPOE=m
1361 +# CONFIG_PPPOL2TP is not set
1362 # CONFIG_SLIP is not set
1363 CONFIG_SLHC=m
1364 # CONFIG_SHAPER is not set
1365 # CONFIG_NETCONSOLE is not set
1366 # CONFIG_NETPOLL is not set
1367 # CONFIG_NET_POLL_CONTROLLER is not set
1368 -
1369 -#
1370 -# ISDN subsystem
1371 -#
1372 # CONFIG_ISDN is not set
1373 -
1374 -#
1375 -# Telephony Support
1376 -#
1377 # CONFIG_PHONE is not set
1378
1379 #
1380 @@ -615,28 +648,57 @@
1381 #
1382 CONFIG_SERIAL_ATMEL=y
1383 CONFIG_SERIAL_ATMEL_CONSOLE=y
1384 +CONFIG_SERIAL_ATMEL_PDC=y
1385 # CONFIG_SERIAL_ATMEL_TTYAT is not set
1386 CONFIG_SERIAL_CORE=y
1387 CONFIG_SERIAL_CORE_CONSOLE=y
1388 CONFIG_UNIX98_PTYS=y
1389 # CONFIG_LEGACY_PTYS is not set
1390 -
1391 -#
1392 -# IPMI
1393 -#
1394 # CONFIG_IPMI_HANDLER is not set
1395 -# CONFIG_WATCHDOG is not set
1396 # CONFIG_HW_RANDOM is not set
1397 # CONFIG_RTC is not set
1398 # CONFIG_GEN_RTC is not set
1399 # CONFIG_R3964 is not set
1400 # CONFIG_RAW_DRIVER is not set
1401 -
1402 -#
1403 -# TPM devices
1404 -#
1405 # CONFIG_TCG_TPM is not set
1406 -# CONFIG_I2C is not set
1407 +CONFIG_I2C=m
1408 +CONFIG_I2C_BOARDINFO=y
1409 +CONFIG_I2C_CHARDEV=m
1410 +
1411 +#
1412 +# I2C Algorithms
1413 +#
1414 +CONFIG_I2C_ALGOBIT=m
1415 +# CONFIG_I2C_ALGOPCF is not set
1416 +# CONFIG_I2C_ALGOPCA is not set
1417 +
1418 +#
1419 +# I2C Hardware Bus support
1420 +#
1421 +CONFIG_I2C_ATMELTWI=m
1422 +CONFIG_I2C_GPIO=m
1423 +# CONFIG_I2C_OCORES is not set
1424 +# CONFIG_I2C_PARPORT_LIGHT is not set
1425 +# CONFIG_I2C_SIMTEC is not set
1426 +# CONFIG_I2C_TAOS_EVM is not set
1427 +# CONFIG_I2C_STUB is not set
1428 +
1429 +#
1430 +# Miscellaneous I2C Chip support
1431 +#
1432 +# CONFIG_SENSORS_DS1337 is not set
1433 +# CONFIG_SENSORS_DS1374 is not set
1434 +# CONFIG_DS1682 is not set
1435 +# CONFIG_SENSORS_EEPROM is not set
1436 +# CONFIG_SENSORS_PCF8574 is not set
1437 +# CONFIG_SENSORS_PCA9539 is not set
1438 +# CONFIG_SENSORS_PCF8591 is not set
1439 +# CONFIG_SENSORS_MAX6875 is not set
1440 +# CONFIG_SENSORS_TSL2550 is not set
1441 +# CONFIG_I2C_DEBUG_CORE is not set
1442 +# CONFIG_I2C_DEBUG_ALGO is not set
1443 +# CONFIG_I2C_DEBUG_BUS is not set
1444 +# CONFIG_I2C_DEBUG_CHIP is not set
1445
1446 #
1447 # SPI support
1448 @@ -655,13 +717,25 @@
1449 # SPI Protocol Masters
1450 #
1451 # CONFIG_SPI_AT25 is not set
1452 -# CONFIG_SPI_SPIDEV is not set
1453 +CONFIG_SPI_SPIDEV=m
1454 +# CONFIG_SPI_TLE62X0 is not set
1455 +# CONFIG_W1 is not set
1456 +# CONFIG_POWER_SUPPLY is not set
1457 +# CONFIG_HWMON is not set
1458 +CONFIG_WATCHDOG=y
1459 +# CONFIG_WATCHDOG_NOWAYOUT is not set
1460
1461 #
1462 -# Dallas's 1-wire bus
1463 +# Watchdog Device Drivers
1464 #
1465 -# CONFIG_W1 is not set
1466 -# CONFIG_HWMON is not set
1467 +# CONFIG_SOFT_WATCHDOG is not set
1468 +CONFIG_AT32AP700X_WDT=y
1469 +
1470 +#
1471 +# Sonics Silicon Backplane
1472 +#
1473 +CONFIG_SSB_POSSIBLE=y
1474 +# CONFIG_SSB is not set
1475
1476 #
1477 # Multifunction device drivers
1478 @@ -678,23 +752,21 @@
1479 #
1480 # Graphics support
1481 #
1482 +# CONFIG_VGASTATE is not set
1483 +# CONFIG_VIDEO_OUTPUT_CONTROL is not set
1484 +# CONFIG_FB is not set
1485 # CONFIG_BACKLIGHT_LCD_SUPPORT is not set
1486
1487 #
1488 # Display device support
1489 #
1490 # CONFIG_DISPLAY_SUPPORT is not set
1491 -# CONFIG_VGASTATE is not set
1492 -# CONFIG_FB is not set
1493
1494 #
1495 # Sound
1496 #
1497 # CONFIG_SOUND is not set
1498 -
1499 -#
1500 -# USB support
1501 -#
1502 +CONFIG_USB_SUPPORT=y
1503 # CONFIG_USB_ARCH_HAS_HCD is not set
1504 # CONFIG_USB_ARCH_HAS_OHCI is not set
1505 # CONFIG_USB_ARCH_HAS_EHCI is not set
1506 @@ -706,12 +778,48 @@
1507 #
1508 # USB Gadget Support
1509 #
1510 -# CONFIG_USB_GADGET is not set
1511 -# CONFIG_MMC is not set
1512 +CONFIG_USB_GADGET=y
1513 +# CONFIG_USB_GADGET_DEBUG is not set
1514 +# CONFIG_USB_GADGET_DEBUG_FILES is not set
1515 +CONFIG_USB_GADGET_SELECTED=y
1516 +# CONFIG_USB_GADGET_AMD5536UDC is not set
1517 +CONFIG_USB_GADGET_ATMEL_USBA=y
1518 +CONFIG_USB_ATMEL_USBA=y
1519 +# CONFIG_USB_GADGET_FSL_USB2 is not set
1520 +# CONFIG_USB_GADGET_NET2280 is not set
1521 +# CONFIG_USB_GADGET_PXA2XX is not set
1522 +# CONFIG_USB_GADGET_M66592 is not set
1523 +# CONFIG_USB_GADGET_GOKU is not set
1524 +# CONFIG_USB_GADGET_LH7A40X is not set
1525 +# CONFIG_USB_GADGET_OMAP is not set
1526 +# CONFIG_USB_GADGET_S3C2410 is not set
1527 +# CONFIG_USB_GADGET_AT91 is not set
1528 +# CONFIG_USB_GADGET_DUMMY_HCD is not set
1529 +CONFIG_USB_GADGET_DUALSPEED=y
1530 +CONFIG_USB_ZERO=m
1531 +CONFIG_USB_ETH=m
1532 +CONFIG_USB_ETH_RNDIS=y
1533 +CONFIG_USB_GADGETFS=m
1534 +CONFIG_USB_FILE_STORAGE=m
1535 +# CONFIG_USB_FILE_STORAGE_TEST is not set
1536 +CONFIG_USB_G_SERIAL=m
1537 +# CONFIG_USB_MIDI_GADGET is not set
1538 +CONFIG_MMC=y
1539 +# CONFIG_MMC_DEBUG is not set
1540 +# CONFIG_MMC_UNSAFE_RESUME is not set
1541 +
1542 +#
1543 +# MMC/SD Card Drivers
1544 +#
1545 +CONFIG_MMC_BLOCK=y
1546 +# CONFIG_MMC_BLOCK_BOUNCE is not set
1547 +# CONFIG_SDIO_UART is not set
1548
1549 #
1550 -# LED devices
1551 +# MMC/SD Host Controller Drivers
1552 #
1553 +CONFIG_MMC_ATMELMCI=y
1554 +CONFIG_MMC_SPI=m
1555 CONFIG_NEW_LEDS=y
1556 CONFIG_LEDS_CLASS=y
1557
1558 @@ -726,53 +834,71 @@
1559 CONFIG_LEDS_TRIGGERS=y
1560 CONFIG_LEDS_TRIGGER_TIMER=y
1561 CONFIG_LEDS_TRIGGER_HEARTBEAT=y
1562 -
1563 +CONFIG_RTC_LIB=y
1564 +CONFIG_RTC_CLASS=y
1565 +CONFIG_RTC_HCTOSYS=y
1566 +CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
1567 +# CONFIG_RTC_DEBUG is not set
1568
1569 #
1570 -# LED drivers
1571 -#
1572 -
1573 -#
1574 -# LED Triggers
1575 -#
1576 -
1577 -#
1578 -# InfiniBand support
1579 +# RTC interfaces
1580 #
1581 +CONFIG_RTC_INTF_SYSFS=y
1582 +CONFIG_RTC_INTF_PROC=y
1583 +CONFIG_RTC_INTF_DEV=y
1584 +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
1585 +# CONFIG_RTC_DRV_TEST is not set
1586
1587 #
1588 -# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
1589 +# I2C RTC drivers
1590 #
1591 +# CONFIG_RTC_DRV_DS1307 is not set
1592 +# CONFIG_RTC_DRV_DS1374 is not set
1593 +# CONFIG_RTC_DRV_DS1672 is not set
1594 +# CONFIG_RTC_DRV_MAX6900 is not set
1595 +# CONFIG_RTC_DRV_RS5C372 is not set
1596 +# CONFIG_RTC_DRV_ISL1208 is not set
1597 +# CONFIG_RTC_DRV_X1205 is not set
1598 +# CONFIG_RTC_DRV_PCF8563 is not set
1599 +# CONFIG_RTC_DRV_PCF8583 is not set
1600 +# CONFIG_RTC_DRV_M41T80 is not set
1601
1602 #
1603 -# Real Time Clock
1604 +# SPI RTC drivers
1605 #
1606 -# CONFIG_RTC_CLASS is not set
1607 +# CONFIG_RTC_DRV_RS5C348 is not set
1608 +# CONFIG_RTC_DRV_MAX6902 is not set
1609
1610 #
1611 -# DMA Engine support
1612 +# Platform RTC drivers
1613 #
1614 -# CONFIG_DMA_ENGINE is not set
1615 +# CONFIG_RTC_DRV_DS1553 is not set
1616 +# CONFIG_RTC_DRV_STK17TA8 is not set
1617 +# CONFIG_RTC_DRV_DS1742 is not set
1618 +# CONFIG_RTC_DRV_M48T86 is not set
1619 +# CONFIG_RTC_DRV_M48T59 is not set
1620 +# CONFIG_RTC_DRV_V3020 is not set
1621
1622 #
1623 -# DMA Clients
1624 +# on-CPU RTC drivers
1625 #
1626 +CONFIG_RTC_DRV_AT32AP700X=y
1627
1628 #
1629 -# DMA Devices
1630 +# Userspace I/O
1631 #
1632 +# CONFIG_UIO is not set
1633
1634 #
1635 # File systems
1636 #
1637 -CONFIG_EXT2_FS=y
1638 +CONFIG_EXT2_FS=m
1639 # CONFIG_EXT2_FS_XATTR is not set
1640 # CONFIG_EXT2_FS_XIP is not set
1641 -CONFIG_EXT3_FS=y
1642 +CONFIG_EXT3_FS=m
1643 # CONFIG_EXT3_FS_XATTR is not set
1644 # CONFIG_EXT4DEV_FS is not set
1645 -CONFIG_JBD=y
1646 -# CONFIG_JBD_DEBUG is not set
1647 +CONFIG_JBD=m
1648 # CONFIG_REISERFS_FS is not set
1649 # CONFIG_JFS_FS is not set
1650 # CONFIG_FS_POSIX_ACL is not set
1651 @@ -781,7 +907,8 @@
1652 # CONFIG_OCFS2_FS is not set
1653 # CONFIG_MINIX_FS is not set
1654 # CONFIG_ROMFS_FS is not set
1655 -# CONFIG_INOTIFY is not set
1656 +CONFIG_INOTIFY=y
1657 +CONFIG_INOTIFY_USER=y
1658 # CONFIG_QUOTA is not set
1659 # CONFIG_DNOTIFY is not set
1660 # CONFIG_AUTOFS_FS is not set
1661 @@ -814,7 +941,6 @@
1662 CONFIG_TMPFS=y
1663 # CONFIG_TMPFS_POSIX_ACL is not set
1664 # CONFIG_HUGETLB_PAGE is not set
1665 -CONFIG_RAMFS=y
1666 CONFIG_CONFIGFS_FS=y
1667
1668 #
1669 @@ -830,10 +956,12 @@
1670 CONFIG_JFFS2_FS=y
1671 CONFIG_JFFS2_FS_DEBUG=0
1672 CONFIG_JFFS2_FS_WRITEBUFFER=y
1673 +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
1674 # CONFIG_JFFS2_SUMMARY is not set
1675 # CONFIG_JFFS2_FS_XATTR is not set
1676 # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
1677 CONFIG_JFFS2_ZLIB=y
1678 +# CONFIG_JFFS2_LZO is not set
1679 CONFIG_JFFS2_RTIME=y
1680 # CONFIG_JFFS2_RUBIN is not set
1681 # CONFIG_CRAMFS is not set
1682 @@ -842,19 +970,21 @@
1683 # CONFIG_QNX4FS_FS is not set
1684 # CONFIG_SYSV_FS is not set
1685 # CONFIG_UFS_FS is not set
1686 -
1687 -#
1688 -# Network File Systems
1689 -#
1690 +CONFIG_NETWORK_FILESYSTEMS=y
1691 CONFIG_NFS_FS=y
1692 CONFIG_NFS_V3=y
1693 # CONFIG_NFS_V3_ACL is not set
1694 # CONFIG_NFS_V4 is not set
1695 # CONFIG_NFS_DIRECTIO is not set
1696 -# CONFIG_NFSD is not set
1697 +CONFIG_NFSD=m
1698 +CONFIG_NFSD_V3=y
1699 +# CONFIG_NFSD_V3_ACL is not set
1700 +# CONFIG_NFSD_V4 is not set
1701 +CONFIG_NFSD_TCP=y
1702 CONFIG_ROOT_NFS=y
1703 CONFIG_LOCKD=y
1704 CONFIG_LOCKD_V4=y
1705 +CONFIG_EXPORTFS=m
1706 CONFIG_NFS_COMMON=y
1707 CONFIG_SUNRPC=y
1708 # CONFIG_SUNRPC_BIND34 is not set
1709 @@ -871,23 +1001,18 @@
1710 # CONFIG_NCP_FS is not set
1711 # CONFIG_CODA_FS is not set
1712 # CONFIG_AFS_FS is not set
1713 -# CONFIG_9P_FS is not set
1714
1715 #
1716 # Partition Types
1717 #
1718 # CONFIG_PARTITION_ADVANCED is not set
1719 CONFIG_MSDOS_PARTITION=y
1720 -
1721 -#
1722 -# Native Language Support
1723 -#
1724 -CONFIG_NLS=y
1725 +CONFIG_NLS=m
1726 CONFIG_NLS_DEFAULT="iso8859-1"
1727 -# CONFIG_NLS_CODEPAGE_437 is not set
1728 +CONFIG_NLS_CODEPAGE_437=m
1729 # CONFIG_NLS_CODEPAGE_737 is not set
1730 # CONFIG_NLS_CODEPAGE_775 is not set
1731 -CONFIG_NLS_CODEPAGE_850=y
1732 +CONFIG_NLS_CODEPAGE_850=m
1733 # CONFIG_NLS_CODEPAGE_852 is not set
1734 # CONFIG_NLS_CODEPAGE_855 is not set
1735 # CONFIG_NLS_CODEPAGE_857 is not set
1736 @@ -908,7 +1033,7 @@
1737 # CONFIG_NLS_CODEPAGE_1250 is not set
1738 # CONFIG_NLS_CODEPAGE_1251 is not set
1739 # CONFIG_NLS_ASCII is not set
1740 -CONFIG_NLS_ISO8859_1=y
1741 +CONFIG_NLS_ISO8859_1=m
1742 # CONFIG_NLS_ISO8859_2 is not set
1743 # CONFIG_NLS_ISO8859_3 is not set
1744 # CONFIG_NLS_ISO8859_4 is not set
1745 @@ -921,18 +1046,19 @@
1746 # CONFIG_NLS_ISO8859_15 is not set
1747 # CONFIG_NLS_KOI8_R is not set
1748 # CONFIG_NLS_KOI8_U is not set
1749 -CONFIG_NLS_UTF8=y
1750 -
1751 -#
1752 -# Distributed Lock Manager
1753 -#
1754 +CONFIG_NLS_UTF8=m
1755 # CONFIG_DLM is not set
1756 +CONFIG_INSTRUMENTATION=y
1757 +CONFIG_PROFILING=y
1758 +CONFIG_OPROFILE=m
1759 +CONFIG_KPROBES=y
1760 +# CONFIG_MARKERS is not set
1761
1762 #
1763 # Kernel hacking
1764 #
1765 -CONFIG_TRACE_IRQFLAGS_SUPPORT=y
1766 # CONFIG_PRINTK_TIME is not set
1767 +CONFIG_ENABLE_WARN_DEPRECATED=y
1768 CONFIG_ENABLE_MUST_CHECK=y
1769 CONFIG_MAGIC_SYSRQ=y
1770 # CONFIG_UNUSED_SYMBOLS is not set
1771 @@ -941,12 +1067,17 @@
1772 CONFIG_DEBUG_KERNEL=y
1773 # CONFIG_DEBUG_SHIRQ is not set
1774 CONFIG_DETECT_SOFTLOCKUP=y
1775 +CONFIG_SCHED_DEBUG=y
1776 # CONFIG_SCHEDSTATS is not set
1777 # CONFIG_TIMER_STATS is not set
1778 +# CONFIG_SLUB_DEBUG_ON is not set
1779 # CONFIG_DEBUG_RT_MUTEXES is not set
1780 # CONFIG_RT_MUTEX_TESTER is not set
1781 # CONFIG_DEBUG_SPINLOCK is not set
1782 # CONFIG_DEBUG_MUTEXES is not set
1783 +# CONFIG_DEBUG_LOCK_ALLOC is not set
1784 +# CONFIG_PROVE_LOCKING is not set
1785 +# CONFIG_LOCK_STAT is not set
1786 # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1787 # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1788 # CONFIG_DEBUG_KOBJECT is not set
1789 @@ -954,21 +1085,21 @@
1790 # CONFIG_DEBUG_INFO is not set
1791 # CONFIG_DEBUG_VM is not set
1792 # CONFIG_DEBUG_LIST is not set
1793 +# CONFIG_DEBUG_SG is not set
1794 CONFIG_FRAME_POINTER=y
1795 # CONFIG_FORCED_INLINING is not set
1796 +# CONFIG_BOOT_PRINTK_DELAY is not set
1797 # CONFIG_RCU_TORTURE_TEST is not set
1798 +# CONFIG_LKDTM is not set
1799 # CONFIG_FAULT_INJECTION is not set
1800 -# CONFIG_KPROBES is not set
1801 +# CONFIG_SAMPLES is not set
1802
1803 #
1804 # Security options
1805 #
1806 # CONFIG_KEYS is not set
1807 # CONFIG_SECURITY is not set
1808 -
1809 -#
1810 -# Cryptographic options
1811 -#
1812 +# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1813 CONFIG_CRYPTO=y
1814 CONFIG_CRYPTO_ALGAPI=y
1815 CONFIG_CRYPTO_BLKCIPHER=y
1816 @@ -989,6 +1120,7 @@
1817 CONFIG_CRYPTO_CBC=y
1818 CONFIG_CRYPTO_PCBC=m
1819 # CONFIG_CRYPTO_LRW is not set
1820 +# CONFIG_CRYPTO_XTS is not set
1821 # CONFIG_CRYPTO_CRYPTD is not set
1822 CONFIG_CRYPTO_DES=y
1823 # CONFIG_CRYPTO_FCRYPT is not set
1824 @@ -1002,15 +1134,14 @@
1825 CONFIG_CRYPTO_ARC4=m
1826 # CONFIG_CRYPTO_KHAZAD is not set
1827 # CONFIG_CRYPTO_ANUBIS is not set
1828 +# CONFIG_CRYPTO_SEED is not set
1829 CONFIG_CRYPTO_DEFLATE=y
1830 # CONFIG_CRYPTO_MICHAEL_MIC is not set
1831 # CONFIG_CRYPTO_CRC32C is not set
1832 # CONFIG_CRYPTO_CAMELLIA is not set
1833 # CONFIG_CRYPTO_TEST is not set
1834 -
1835 -#
1836 -# Hardware crypto devices
1837 -#
1838 +# CONFIG_CRYPTO_AUTHENC is not set
1839 +CONFIG_CRYPTO_HW=y
1840
1841 #
1842 # Library routines
1843 @@ -1018,8 +1149,9 @@
1844 CONFIG_BITREVERSE=y
1845 CONFIG_CRC_CCITT=m
1846 # CONFIG_CRC16 is not set
1847 -# CONFIG_CRC_ITU_T is not set
1848 +CONFIG_CRC_ITU_T=m
1849 CONFIG_CRC32=y
1850 +CONFIG_CRC7=m
1851 # CONFIG_LIBCRC32C is not set
1852 CONFIG_ZLIB_INFLATE=y
1853 CONFIG_ZLIB_DEFLATE=y
1854 diff -urN linux-2.6.24.3/arch/avr32/configs/atstk1002_defconfig avr32-2.6/arch/avr32/configs/atstk1002_defconfig
1855 --- linux-2.6.24.3/arch/avr32/configs/atstk1002_defconfig 2008-02-26 01:20:20.000000000 +0100
1856 +++ avr32-2.6/arch/avr32/configs/atstk1002_defconfig 2008-04-23 20:12:35.000000000 +0200
1857 @@ -1,48 +1,49 @@
1858 #
1859 # Automatically generated make config: don't edit
1860 -# Linux kernel version: 2.6.22-rc5
1861 -# Sat Jun 23 15:32:08 2007
1862 +# Linux kernel version: 2.6.24
1863 +# Thu Mar 6 12:49:17 2008
1864 #
1865 CONFIG_AVR32=y
1866 CONFIG_GENERIC_GPIO=y
1867 CONFIG_GENERIC_HARDIRQS=y
1868 +CONFIG_STACKTRACE_SUPPORT=y
1869 +CONFIG_LOCKDEP_SUPPORT=y
1870 +CONFIG_TRACE_IRQFLAGS_SUPPORT=y
1871 CONFIG_HARDIRQS_SW_RESEND=y
1872 CONFIG_GENERIC_IRQ_PROBE=y
1873 CONFIG_RWSEM_GENERIC_SPINLOCK=y
1874 CONFIG_GENERIC_TIME=y
1875 +CONFIG_GENERIC_CLOCKEVENTS=y
1876 +# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
1877 # CONFIG_ARCH_HAS_ILOG2_U32 is not set
1878 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
1879 +CONFIG_ARCH_SUPPORTS_OPROFILE=y
1880 CONFIG_GENERIC_HWEIGHT=y
1881 CONFIG_GENERIC_CALIBRATE_DELAY=y
1882 CONFIG_GENERIC_BUG=y
1883 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
1884
1885 #
1886 -# Code maturity level options
1887 +# General setup
1888 #
1889 CONFIG_EXPERIMENTAL=y
1890 CONFIG_BROKEN_ON_SMP=y
1891 CONFIG_INIT_ENV_ARG_LIMIT=32
1892 -
1893 -#
1894 -# General setup
1895 -#
1896 CONFIG_LOCALVERSION=""
1897 # CONFIG_LOCALVERSION_AUTO is not set
1898 CONFIG_SWAP=y
1899 CONFIG_SYSVIPC=y
1900 -# CONFIG_IPC_NS is not set
1901 CONFIG_SYSVIPC_SYSCTL=y
1902 CONFIG_POSIX_MQUEUE=y
1903 -CONFIG_BSD_PROCESS_ACCT=y
1904 -CONFIG_BSD_PROCESS_ACCT_V3=y
1905 -CONFIG_TASKSTATS=y
1906 -CONFIG_TASK_DELAY_ACCT=y
1907 -# CONFIG_TASK_XACCT is not set
1908 -# CONFIG_UTS_NS is not set
1909 -CONFIG_AUDIT=y
1910 +# CONFIG_BSD_PROCESS_ACCT is not set
1911 +# CONFIG_TASKSTATS is not set
1912 +# CONFIG_USER_NS is not set
1913 +# CONFIG_PID_NS is not set
1914 +# CONFIG_AUDIT is not set
1915 # CONFIG_IKCONFIG is not set
1916 CONFIG_LOG_BUF_SHIFT=14
1917 +# CONFIG_CGROUPS is not set
1918 +# CONFIG_FAIR_GROUP_SCHED is not set
1919 CONFIG_SYSFS_DEPRECATED=y
1920 CONFIG_RELAY=y
1921 CONFIG_BLK_DEV_INITRD=y
1922 @@ -63,35 +64,28 @@
1923 CONFIG_ANON_INODES=y
1924 CONFIG_EPOLL=y
1925 CONFIG_SIGNALFD=y
1926 -CONFIG_TIMERFD=y
1927 CONFIG_EVENTFD=y
1928 CONFIG_SHMEM=y
1929 CONFIG_VM_EVENT_COUNTERS=y
1930 -# CONFIG_SLUB_DEBUG is not set
1931 +CONFIG_SLUB_DEBUG=y
1932 # CONFIG_SLAB is not set
1933 CONFIG_SLUB=y
1934 # CONFIG_SLOB is not set
1935 +CONFIG_SLABINFO=y
1936 CONFIG_RT_MUTEXES=y
1937 # CONFIG_TINY_SHMEM is not set
1938 CONFIG_BASE_SMALL=1
1939 -
1940 -#
1941 -# Loadable module support
1942 -#
1943 CONFIG_MODULES=y
1944 CONFIG_MODULE_UNLOAD=y
1945 # CONFIG_MODULE_FORCE_UNLOAD is not set
1946 # CONFIG_MODVERSIONS is not set
1947 # CONFIG_MODULE_SRCVERSION_ALL is not set
1948 # CONFIG_KMOD is not set
1949 -
1950 -#
1951 -# Block layer
1952 -#
1953 CONFIG_BLOCK=y
1954 # CONFIG_LBD is not set
1955 # CONFIG_BLK_DEV_IO_TRACE is not set
1956 # CONFIG_LSF is not set
1957 +# CONFIG_BLK_DEV_BSG is not set
1958
1959 #
1960 # IO Schedulers
1961 @@ -99,32 +93,49 @@
1962 CONFIG_IOSCHED_NOOP=y
1963 # CONFIG_IOSCHED_AS is not set
1964 # CONFIG_IOSCHED_DEADLINE is not set
1965 -# CONFIG_IOSCHED_CFQ is not set
1966 +CONFIG_IOSCHED_CFQ=y
1967 # CONFIG_DEFAULT_AS is not set
1968 # CONFIG_DEFAULT_DEADLINE is not set
1969 -# CONFIG_DEFAULT_CFQ is not set
1970 -CONFIG_DEFAULT_NOOP=y
1971 -CONFIG_DEFAULT_IOSCHED="noop"
1972 +CONFIG_DEFAULT_CFQ=y
1973 +# CONFIG_DEFAULT_NOOP is not set
1974 +CONFIG_DEFAULT_IOSCHED="cfq"
1975
1976 #
1977 # System Type and features
1978 #
1979 +CONFIG_TICK_ONESHOT=y
1980 +CONFIG_NO_HZ=y
1981 +CONFIG_HIGH_RES_TIMERS=y
1982 +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
1983 CONFIG_SUBARCH_AVR32B=y
1984 CONFIG_MMU=y
1985 CONFIG_PERFORMANCE_COUNTERS=y
1986 CONFIG_PLATFORM_AT32AP=y
1987 +CONFIG_CPU_AT32AP700X=y
1988 CONFIG_CPU_AT32AP7000=y
1989 -CONFIG_BOARD_ATSTK1002=y
1990 CONFIG_BOARD_ATSTK1000=y
1991 # CONFIG_BOARD_ATNGW100 is not set
1992 +CONFIG_BOARD_ATSTK1002=y
1993 +# CONFIG_BOARD_ATSTK1003 is not set
1994 +# CONFIG_BOARD_ATSTK1004 is not set
1995 +# CONFIG_BOARD_ATSTK100X_CUSTOM is not set
1996 +# CONFIG_BOARD_ATSTK100X_SPI1 is not set
1997 +# CONFIG_BOARD_ATSTK1000_J2_LED is not set
1998 +# CONFIG_BOARD_ATSTK1000_J2_LED8 is not set
1999 +# CONFIG_BOARD_ATSTK1000_J2_RGB is not set
2000 +CONFIG_BOARD_ATSTK1000_EXTDAC=y
2001 +# CONFIG_BOARD_ATSTK100X_ENABLE_AC97 is not set
2002 +# CONFIG_BOARD_ATSTK1000_CF_HACKS is not set
2003 +# CONFIG_BOARD_ATSTK100X_ENABLE_PSIF is not set
2004 CONFIG_LOADER_U_BOOT=y
2005
2006 #
2007 # Atmel AVR32 AP options
2008 #
2009 -# CONFIG_AP7000_32_BIT_SMC is not set
2010 -CONFIG_AP7000_16_BIT_SMC=y
2011 -# CONFIG_AP7000_8_BIT_SMC is not set
2012 +# CONFIG_AP700X_32_BIT_SMC is not set
2013 +CONFIG_AP700X_16_BIT_SMC=y
2014 +# CONFIG_AP700X_8_BIT_SMC is not set
2015 +CONFIG_GPIO_DEV=y
2016 CONFIG_LOAD_ADDRESS=0x10000000
2017 CONFIG_ENTRY_ADDRESS=0x90000000
2018 CONFIG_PHYS_OFFSET=0x10000000
2019 @@ -144,10 +155,14 @@
2020 CONFIG_FLATMEM=y
2021 CONFIG_FLAT_NODE_MEM_MAP=y
2022 # CONFIG_SPARSEMEM_STATIC is not set
2023 +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
2024 CONFIG_SPLIT_PTLOCK_CPUS=4
2025 # CONFIG_RESOURCES_64BIT is not set
2026 CONFIG_ZONE_DMA_FLAG=0
2027 +CONFIG_VIRT_TO_BUS=y
2028 # CONFIG_OWNERSHIP_TRACE is not set
2029 +CONFIG_NMI_DEBUGGING=y
2030 +CONFIG_DW_DMAC=y
2031 # CONFIG_HZ_100 is not set
2032 CONFIG_HZ_250=y
2033 # CONFIG_HZ_300 is not set
2034 @@ -156,13 +171,31 @@
2035 CONFIG_CMDLINE=""
2036
2037 #
2038 -# Bus options
2039 +# Power management options
2040 #
2041 -# CONFIG_ARCH_SUPPORTS_MSI is not set
2042
2043 #
2044 -# PCCARD (PCMCIA/CardBus) support
2045 +# CPU Frequency scaling
2046 +#
2047 +CONFIG_CPU_FREQ=y
2048 +CONFIG_CPU_FREQ_TABLE=y
2049 +# CONFIG_CPU_FREQ_DEBUG is not set
2050 +# CONFIG_CPU_FREQ_STAT is not set
2051 +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
2052 +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
2053 +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
2054 +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
2055 +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
2056 +# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
2057 +CONFIG_CPU_FREQ_GOV_USERSPACE=y
2058 +CONFIG_CPU_FREQ_GOV_ONDEMAND=y
2059 +# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
2060 +CONFIG_CPU_FREQ_AT32AP=y
2061 +
2062 +#
2063 +# Bus options
2064 #
2065 +# CONFIG_ARCH_SUPPORTS_MSI is not set
2066 # CONFIG_PCCARD is not set
2067
2068 #
2069 @@ -182,7 +215,12 @@
2070 CONFIG_PACKET=y
2071 CONFIG_PACKET_MMAP=y
2072 CONFIG_UNIX=y
2073 -# CONFIG_NET_KEY is not set
2074 +CONFIG_XFRM=y
2075 +CONFIG_XFRM_USER=m
2076 +# CONFIG_XFRM_SUB_POLICY is not set
2077 +# CONFIG_XFRM_MIGRATE is not set
2078 +CONFIG_NET_KEY=m
2079 +# CONFIG_NET_KEY_MIGRATE is not set
2080 CONFIG_INET=y
2081 # CONFIG_IP_MULTICAST is not set
2082 # CONFIG_IP_ADVANCED_ROUTER is not set
2083 @@ -191,36 +229,52 @@
2084 CONFIG_IP_PNP_DHCP=y
2085 # CONFIG_IP_PNP_BOOTP is not set
2086 # CONFIG_IP_PNP_RARP is not set
2087 -# CONFIG_NET_IPIP is not set
2088 -# CONFIG_NET_IPGRE is not set
2089 +CONFIG_NET_IPIP=m
2090 +CONFIG_NET_IPGRE=m
2091 # CONFIG_ARPD is not set
2092 # CONFIG_SYN_COOKIES is not set
2093 -# CONFIG_INET_AH is not set
2094 -# CONFIG_INET_ESP is not set
2095 +CONFIG_INET_AH=m
2096 +CONFIG_INET_ESP=m
2097 # CONFIG_INET_IPCOMP is not set
2098 # CONFIG_INET_XFRM_TUNNEL is not set
2099 -# CONFIG_INET_TUNNEL is not set
2100 -# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
2101 -# CONFIG_INET_XFRM_MODE_TUNNEL is not set
2102 -# CONFIG_INET_XFRM_MODE_BEET is not set
2103 +CONFIG_INET_TUNNEL=m
2104 +CONFIG_INET_XFRM_MODE_TRANSPORT=m
2105 +CONFIG_INET_XFRM_MODE_TUNNEL=m
2106 +CONFIG_INET_XFRM_MODE_BEET=m
2107 +# CONFIG_INET_LRO is not set
2108 CONFIG_INET_DIAG=y
2109 CONFIG_INET_TCP_DIAG=y
2110 # CONFIG_TCP_CONG_ADVANCED is not set
2111 CONFIG_TCP_CONG_CUBIC=y
2112 CONFIG_DEFAULT_TCP_CONG="cubic"
2113 # CONFIG_TCP_MD5SIG is not set
2114 -# CONFIG_IPV6 is not set
2115 -# CONFIG_INET6_XFRM_TUNNEL is not set
2116 -# CONFIG_INET6_TUNNEL is not set
2117 +CONFIG_IPV6=m
2118 +# CONFIG_IPV6_PRIVACY is not set
2119 +# CONFIG_IPV6_ROUTER_PREF is not set
2120 +# CONFIG_IPV6_OPTIMISTIC_DAD is not set
2121 +CONFIG_INET6_AH=m
2122 +CONFIG_INET6_ESP=m
2123 +CONFIG_INET6_IPCOMP=m
2124 +# CONFIG_IPV6_MIP6 is not set
2125 +CONFIG_INET6_XFRM_TUNNEL=m
2126 +CONFIG_INET6_TUNNEL=m
2127 +CONFIG_INET6_XFRM_MODE_TRANSPORT=m
2128 +CONFIG_INET6_XFRM_MODE_TUNNEL=m
2129 +CONFIG_INET6_XFRM_MODE_BEET=m
2130 +# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
2131 +CONFIG_IPV6_SIT=m
2132 +CONFIG_IPV6_TUNNEL=m
2133 +# CONFIG_IPV6_MULTIPLE_TABLES is not set
2134 # CONFIG_NETWORK_SECMARK is not set
2135 # CONFIG_NETFILTER is not set
2136 # CONFIG_IP_DCCP is not set
2137 # CONFIG_IP_SCTP is not set
2138 # CONFIG_TIPC is not set
2139 # CONFIG_ATM is not set
2140 -# CONFIG_BRIDGE is not set
2141 +CONFIG_BRIDGE=m
2142 # CONFIG_VLAN_8021Q is not set
2143 # CONFIG_DECNET is not set
2144 +CONFIG_LLC=m
2145 # CONFIG_LLC2 is not set
2146 # CONFIG_IPX is not set
2147 # CONFIG_ATALK is not set
2148 @@ -228,16 +282,13 @@
2149 # CONFIG_LAPB is not set
2150 # CONFIG_ECONET is not set
2151 # CONFIG_WAN_ROUTER is not set
2152 -
2153 -#
2154 -# QoS and/or fair queueing
2155 -#
2156 # CONFIG_NET_SCHED is not set
2157
2158 #
2159 # Network testing
2160 #
2161 # CONFIG_NET_PKTGEN is not set
2162 +# CONFIG_NET_TCPPROBE is not set
2163 # CONFIG_HAMRADIO is not set
2164 # CONFIG_IRDA is not set
2165 # CONFIG_BT is not set
2166 @@ -251,6 +302,7 @@
2167 # CONFIG_MAC80211 is not set
2168 # CONFIG_IEEE80211 is not set
2169 # CONFIG_RFKILL is not set
2170 +# CONFIG_NET_9P is not set
2171
2172 #
2173 # Device Drivers
2174 @@ -259,16 +311,13 @@
2175 #
2176 # Generic Driver Options
2177 #
2178 +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
2179 CONFIG_STANDALONE=y
2180 # CONFIG_PREVENT_FIRMWARE_BUILD is not set
2181 # CONFIG_FW_LOADER is not set
2182 # CONFIG_DEBUG_DRIVER is not set
2183 # CONFIG_DEBUG_DEVRES is not set
2184 # CONFIG_SYS_HYPERVISOR is not set
2185 -
2186 -#
2187 -# Connector - unified userspace <-> kernelspace linker
2188 -#
2189 # CONFIG_CONNECTOR is not set
2190 CONFIG_MTD=y
2191 # CONFIG_MTD_DEBUG is not set
2192 @@ -288,6 +337,7 @@
2193 # CONFIG_INFTL is not set
2194 # CONFIG_RFD_FTL is not set
2195 # CONFIG_SSFDC is not set
2196 +# CONFIG_MTD_OOPS is not set
2197
2198 #
2199 # RAM/ROM/Flash chip drivers
2200 @@ -327,6 +377,8 @@
2201 #
2202 # Self-contained MTD device drivers
2203 #
2204 +CONFIG_MTD_DATAFLASH=m
2205 +CONFIG_MTD_M25P80=m
2206 # CONFIG_MTD_SLRAM is not set
2207 # CONFIG_MTD_PHRAM is not set
2208 # CONFIG_MTD_MTDRAM is not set
2209 @@ -345,20 +397,8 @@
2210 # UBI - Unsorted block images
2211 #
2212 # CONFIG_MTD_UBI is not set
2213 -
2214 -#
2215 -# Parallel port support
2216 -#
2217 # CONFIG_PARPORT is not set
2218 -
2219 -#
2220 -# Plug and Play support
2221 -#
2222 -# CONFIG_PNPACPI is not set
2223 -
2224 -#
2225 -# Block devices
2226 -#
2227 +CONFIG_BLK_DEV=y
2228 # CONFIG_BLK_DEV_COW_COMMON is not set
2229 CONFIG_BLK_DEV_LOOP=m
2230 # CONFIG_BLK_DEV_CRYPTOLOOP is not set
2231 @@ -369,42 +409,91 @@
2232 CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
2233 # CONFIG_CDROM_PKTCDVD is not set
2234 # CONFIG_ATA_OVER_ETH is not set
2235 -
2236 -#
2237 -# Misc devices
2238 -#
2239 -# CONFIG_BLINK is not set
2240 +CONFIG_MISC_DEVICES=y
2241 +CONFIG_ATMEL_PWM=m
2242 +CONFIG_ATMEL_TCLIB=y
2243 +CONFIG_ATMEL_TCB_CLKSRC=y
2244 +CONFIG_ATMEL_TCB_CLKSRC_BLOCK=0
2245 +# CONFIG_EEPROM_93CX6 is not set
2246 +CONFIG_ATMEL_SSC=m
2247 # CONFIG_IDE is not set
2248
2249 #
2250 # SCSI device support
2251 #
2252 # CONFIG_RAID_ATTRS is not set
2253 -# CONFIG_SCSI is not set
2254 +CONFIG_SCSI=m
2255 +CONFIG_SCSI_DMA=y
2256 +# CONFIG_SCSI_TGT is not set
2257 # CONFIG_SCSI_NETLINK is not set
2258 -# CONFIG_ATA is not set
2259 +# CONFIG_SCSI_PROC_FS is not set
2260
2261 #
2262 -# Multi-device support (RAID and LVM)
2263 +# SCSI support type (disk, tape, CD-ROM)
2264 #
2265 -# CONFIG_MD is not set
2266 +CONFIG_BLK_DEV_SD=m
2267 +# CONFIG_CHR_DEV_ST is not set
2268 +# CONFIG_CHR_DEV_OSST is not set
2269 +CONFIG_BLK_DEV_SR=m
2270 +# CONFIG_BLK_DEV_SR_VENDOR is not set
2271 +# CONFIG_CHR_DEV_SG is not set
2272 +# CONFIG_CHR_DEV_SCH is not set
2273 +
2274 +#
2275 +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
2276 +#
2277 +# CONFIG_SCSI_MULTI_LUN is not set
2278 +# CONFIG_SCSI_CONSTANTS is not set
2279 +# CONFIG_SCSI_LOGGING is not set
2280 +# CONFIG_SCSI_SCAN_ASYNC is not set
2281 +CONFIG_SCSI_WAIT_SCAN=m
2282
2283 #
2284 -# Network device support
2285 +# SCSI Transports
2286 #
2287 +# CONFIG_SCSI_SPI_ATTRS is not set
2288 +# CONFIG_SCSI_FC_ATTRS is not set
2289 +# CONFIG_SCSI_ISCSI_ATTRS is not set
2290 +# CONFIG_SCSI_SAS_LIBSAS is not set
2291 +# CONFIG_SCSI_SRP_ATTRS is not set
2292 +# CONFIG_SCSI_LOWLEVEL is not set
2293 +CONFIG_ATA=m
2294 +# CONFIG_ATA_NONSTANDARD is not set
2295 +CONFIG_PATA_AT32=m
2296 +# CONFIG_PATA_PLATFORM is not set
2297 +# CONFIG_MD is not set
2298 CONFIG_NETDEVICES=y
2299 -CONFIG_DUMMY=y
2300 +# CONFIG_NETDEVICES_MULTIQUEUE is not set
2301 +# CONFIG_DUMMY is not set
2302 # CONFIG_BONDING is not set
2303 +# CONFIG_MACVLAN is not set
2304 # CONFIG_EQUALIZER is not set
2305 CONFIG_TUN=m
2306 -# CONFIG_PHYLIB is not set
2307 +# CONFIG_VETH is not set
2308 +CONFIG_PHYLIB=y
2309
2310 #
2311 -# Ethernet (10 or 100Mbit)
2312 +# MII PHY device drivers
2313 #
2314 +# CONFIG_MARVELL_PHY is not set
2315 +# CONFIG_DAVICOM_PHY is not set
2316 +# CONFIG_QSEMI_PHY is not set
2317 +# CONFIG_LXT_PHY is not set
2318 +# CONFIG_CICADA_PHY is not set
2319 +# CONFIG_VITESSE_PHY is not set
2320 +# CONFIG_SMSC_PHY is not set
2321 +# CONFIG_BROADCOM_PHY is not set
2322 +# CONFIG_ICPLUS_PHY is not set
2323 +# CONFIG_FIXED_PHY is not set
2324 +# CONFIG_MDIO_BITBANG is not set
2325 CONFIG_NET_ETHERNET=y
2326 -CONFIG_MII=y
2327 +# CONFIG_MII is not set
2328 CONFIG_MACB=y
2329 +# CONFIG_IBM_NEW_EMAC_ZMII is not set
2330 +# CONFIG_IBM_NEW_EMAC_RGMII is not set
2331 +# CONFIG_IBM_NEW_EMAC_TAH is not set
2332 +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
2333 +# CONFIG_B44 is not set
2334 # CONFIG_NETDEV_1000 is not set
2335 # CONFIG_NETDEV_10000 is not set
2336
2337 @@ -423,27 +512,54 @@
2338 CONFIG_PPP_BSDCOMP=m
2339 # CONFIG_PPP_MPPE is not set
2340 # CONFIG_PPPOE is not set
2341 +# CONFIG_PPPOL2TP is not set
2342 # CONFIG_SLIP is not set
2343 CONFIG_SLHC=m
2344 # CONFIG_SHAPER is not set
2345 # CONFIG_NETCONSOLE is not set
2346 # CONFIG_NETPOLL is not set
2347 # CONFIG_NET_POLL_CONTROLLER is not set
2348 -
2349 -#
2350 -# ISDN subsystem
2351 -#
2352 # CONFIG_ISDN is not set
2353 -
2354 -#
2355 -# Telephony Support
2356 -#
2357 # CONFIG_PHONE is not set
2358
2359 #
2360 # Input device support
2361 #
2362 -# CONFIG_INPUT is not set
2363 +CONFIG_INPUT=m
2364 +# CONFIG_INPUT_FF_MEMLESS is not set
2365 +CONFIG_INPUT_POLLDEV=m
2366 +
2367 +#
2368 +# Userland interfaces
2369 +#
2370 +CONFIG_INPUT_MOUSEDEV=m
2371 +CONFIG_INPUT_MOUSEDEV_PSAUX=y
2372 +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
2373 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
2374 +# CONFIG_INPUT_JOYDEV is not set
2375 +CONFIG_INPUT_EVDEV=m
2376 +# CONFIG_INPUT_EVBUG is not set
2377 +
2378 +#
2379 +# Input Device Drivers
2380 +#
2381 +CONFIG_INPUT_KEYBOARD=y
2382 +# CONFIG_KEYBOARD_ATKBD is not set
2383 +# CONFIG_KEYBOARD_SUNKBD is not set
2384 +# CONFIG_KEYBOARD_LKKBD is not set
2385 +# CONFIG_KEYBOARD_XTKBD is not set
2386 +# CONFIG_KEYBOARD_NEWTON is not set
2387 +# CONFIG_KEYBOARD_STOWAWAY is not set
2388 +CONFIG_KEYBOARD_GPIO=m
2389 +CONFIG_INPUT_MOUSE=y
2390 +# CONFIG_MOUSE_PS2 is not set
2391 +# CONFIG_MOUSE_SERIAL is not set
2392 +# CONFIG_MOUSE_VSXXXAA is not set
2393 +CONFIG_MOUSE_GPIO=m
2394 +# CONFIG_INPUT_JOYSTICK is not set
2395 +# CONFIG_INPUT_TABLET is not set
2396 +# CONFIG_INPUT_TOUCHSCREEN is not set
2397 +# CONFIG_INPUT_MISC is not set
2398
2399 #
2400 # Hardware I/O ports
2401 @@ -467,40 +583,94 @@
2402 #
2403 CONFIG_SERIAL_ATMEL=y
2404 CONFIG_SERIAL_ATMEL_CONSOLE=y
2405 +CONFIG_SERIAL_ATMEL_PDC=y
2406 # CONFIG_SERIAL_ATMEL_TTYAT is not set
2407 CONFIG_SERIAL_CORE=y
2408 CONFIG_SERIAL_CORE_CONSOLE=y
2409 CONFIG_UNIX98_PTYS=y
2410 # CONFIG_LEGACY_PTYS is not set
2411 -
2412 -#
2413 -# IPMI
2414 -#
2415 # CONFIG_IPMI_HANDLER is not set
2416 -# CONFIG_WATCHDOG is not set
2417 # CONFIG_HW_RANDOM is not set
2418 # CONFIG_RTC is not set
2419 # CONFIG_GEN_RTC is not set
2420 # CONFIG_R3964 is not set
2421 # CONFIG_RAW_DRIVER is not set
2422 +# CONFIG_TCG_TPM is not set
2423 +CONFIG_I2C=m
2424 +CONFIG_I2C_BOARDINFO=y
2425 +CONFIG_I2C_CHARDEV=m
2426 +
2427 +#
2428 +# I2C Algorithms
2429 +#
2430 +CONFIG_I2C_ALGOBIT=m
2431 +# CONFIG_I2C_ALGOPCF is not set
2432 +# CONFIG_I2C_ALGOPCA is not set
2433 +
2434 +#
2435 +# I2C Hardware Bus support
2436 +#
2437 +CONFIG_I2C_ATMELTWI=m
2438 +CONFIG_I2C_GPIO=m
2439 +# CONFIG_I2C_OCORES is not set
2440 +# CONFIG_I2C_PARPORT_LIGHT is not set
2441 +# CONFIG_I2C_SIMTEC is not set
2442 +# CONFIG_I2C_TAOS_EVM is not set
2443 +# CONFIG_I2C_STUB is not set
2444 +
2445 +#
2446 +# Miscellaneous I2C Chip support
2447 +#
2448 +# CONFIG_SENSORS_DS1337 is not set
2449 +# CONFIG_SENSORS_DS1374 is not set
2450 +# CONFIG_DS1682 is not set
2451 +# CONFIG_SENSORS_EEPROM is not set
2452 +# CONFIG_SENSORS_PCF8574 is not set
2453 +# CONFIG_SENSORS_PCA9539 is not set
2454 +# CONFIG_SENSORS_PCF8591 is not set
2455 +# CONFIG_SENSORS_MAX6875 is not set
2456 +# CONFIG_SENSORS_TSL2550 is not set
2457 +# CONFIG_I2C_DEBUG_CORE is not set
2458 +# CONFIG_I2C_DEBUG_ALGO is not set
2459 +# CONFIG_I2C_DEBUG_BUS is not set
2460 +# CONFIG_I2C_DEBUG_CHIP is not set
2461
2462 #
2463 -# TPM devices
2464 +# SPI support
2465 #
2466 -# CONFIG_TCG_TPM is not set
2467 -# CONFIG_I2C is not set
2468 +CONFIG_SPI=y
2469 +# CONFIG_SPI_DEBUG is not set
2470 +CONFIG_SPI_MASTER=y
2471
2472 #
2473 -# SPI support
2474 +# SPI Master Controller Drivers
2475 #
2476 -# CONFIG_SPI is not set
2477 -# CONFIG_SPI_MASTER is not set
2478 +CONFIG_SPI_ATMEL=y
2479 +# CONFIG_SPI_BITBANG is not set
2480
2481 #
2482 -# Dallas's 1-wire bus
2483 +# SPI Protocol Masters
2484 #
2485 +# CONFIG_SPI_AT25 is not set
2486 +CONFIG_SPI_SPIDEV=m
2487 +# CONFIG_SPI_TLE62X0 is not set
2488 # CONFIG_W1 is not set
2489 +# CONFIG_POWER_SUPPLY is not set
2490 # CONFIG_HWMON is not set
2491 +CONFIG_WATCHDOG=y
2492 +# CONFIG_WATCHDOG_NOWAYOUT is not set
2493 +
2494 +#
2495 +# Watchdog Device Drivers
2496 +#
2497 +# CONFIG_SOFT_WATCHDOG is not set
2498 +CONFIG_AT32AP700X_WDT=y
2499 +
2500 +#
2501 +# Sonics Silicon Backplane
2502 +#
2503 +CONFIG_SSB_POSSIBLE=y
2504 +# CONFIG_SSB is not set
2505
2506 #
2507 # Multifunction device drivers
2508 @@ -517,23 +687,104 @@
2509 #
2510 # Graphics support
2511 #
2512 -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
2513 +# CONFIG_VGASTATE is not set
2514 +# CONFIG_VIDEO_OUTPUT_CONTROL is not set
2515 +CONFIG_FB=y
2516 +# CONFIG_FIRMWARE_EDID is not set
2517 +# CONFIG_FB_DDC is not set
2518 +CONFIG_FB_CFB_FILLRECT=y
2519 +CONFIG_FB_CFB_COPYAREA=y
2520 +CONFIG_FB_CFB_IMAGEBLIT=y
2521 +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
2522 +# CONFIG_FB_SYS_FILLRECT is not set
2523 +# CONFIG_FB_SYS_COPYAREA is not set
2524 +# CONFIG_FB_SYS_IMAGEBLIT is not set
2525 +# CONFIG_FB_SYS_FOPS is not set
2526 +CONFIG_FB_DEFERRED_IO=y
2527 +# CONFIG_FB_SVGALIB is not set
2528 +# CONFIG_FB_MACMODES is not set
2529 +# CONFIG_FB_BACKLIGHT is not set
2530 +# CONFIG_FB_MODE_HELPERS is not set
2531 +# CONFIG_FB_TILEBLITTING is not set
2532 +
2533 +#
2534 +# Frame buffer hardware drivers
2535 +#
2536 +# CONFIG_FB_S1D13XXX is not set
2537 +CONFIG_FB_ATMEL=y
2538 +# CONFIG_FB_VIRTUAL is not set
2539 +CONFIG_BACKLIGHT_LCD_SUPPORT=y
2540 +CONFIG_LCD_CLASS_DEVICE=y
2541 +CONFIG_LCD_LTV350QV=y
2542 +# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
2543
2544 #
2545 # Display device support
2546 #
2547 # CONFIG_DISPLAY_SUPPORT is not set
2548 -# CONFIG_VGASTATE is not set
2549 -# CONFIG_FB is not set
2550 +# CONFIG_LOGO is not set
2551
2552 #
2553 # Sound
2554 #
2555 -# CONFIG_SOUND is not set
2556 +CONFIG_SOUND=m
2557 +
2558 +#
2559 +# Advanced Linux Sound Architecture
2560 +#
2561 +CONFIG_SND=m
2562 +CONFIG_SND_TIMER=m
2563 +CONFIG_SND_PCM=m
2564 +# CONFIG_SND_SEQUENCER is not set
2565 +CONFIG_SND_OSSEMUL=y
2566 +CONFIG_SND_MIXER_OSS=m
2567 +CONFIG_SND_PCM_OSS=m
2568 +CONFIG_SND_PCM_OSS_PLUGINS=y
2569 +# CONFIG_SND_DYNAMIC_MINORS is not set
2570 +# CONFIG_SND_SUPPORT_OLD_API is not set
2571 +# CONFIG_SND_VERBOSE_PROCFS is not set
2572 +# CONFIG_SND_VERBOSE_PRINTK is not set
2573 +# CONFIG_SND_DEBUG is not set
2574 +
2575 +#
2576 +# Generic devices
2577 +#
2578 +CONFIG_SND_AC97_CODEC=m
2579 +# CONFIG_SND_DUMMY is not set
2580 +# CONFIG_SND_MTPAV is not set
2581 +# CONFIG_SND_SERIAL_U16550 is not set
2582 +# CONFIG_SND_MPU401 is not set
2583 +
2584 +#
2585 +# AVR32 devices
2586 +#
2587 +CONFIG_SND_ATMEL_AC97=m
2588
2589 #
2590 -# USB support
2591 +# SPI devices
2592 #
2593 +CONFIG_SND_AT73C213=m
2594 +CONFIG_SND_AT73C213_TARGET_BITRATE=48000
2595 +
2596 +#
2597 +# System on Chip audio support
2598 +#
2599 +# CONFIG_SND_SOC is not set
2600 +
2601 +#
2602 +# SoC Audio support for SuperH
2603 +#
2604 +
2605 +#
2606 +# Open Sound System
2607 +#
2608 +CONFIG_SOUND_PRIME=m
2609 +# CONFIG_SOUND_MSNDCLAS is not set
2610 +# CONFIG_SOUND_MSNDPIN is not set
2611 +CONFIG_SOUND_AT32_ABDAC=m
2612 +CONFIG_AC97_BUS=m
2613 +# CONFIG_HID_SUPPORT is not set
2614 +CONFIG_USB_SUPPORT=y
2615 # CONFIG_USB_ARCH_HAS_HCD is not set
2616 # CONFIG_USB_ARCH_HAS_OHCI is not set
2617 # CONFIG_USB_ARCH_HAS_EHCI is not set
2618 @@ -545,63 +796,137 @@
2619 #
2620 # USB Gadget Support
2621 #
2622 -# CONFIG_USB_GADGET is not set
2623 -# CONFIG_MMC is not set
2624 -
2625 -#
2626 -# LED devices
2627 -#
2628 -# CONFIG_NEW_LEDS is not set
2629 +CONFIG_USB_GADGET=y
2630 +# CONFIG_USB_GADGET_DEBUG is not set
2631 +# CONFIG_USB_GADGET_DEBUG_FILES is not set
2632 +# CONFIG_USB_GADGET_DEBUG_FS is not set
2633 +CONFIG_USB_GADGET_SELECTED=y
2634 +# CONFIG_USB_GADGET_AMD5536UDC is not set
2635 +CONFIG_USB_GADGET_ATMEL_USBA=y
2636 +CONFIG_USB_ATMEL_USBA=y
2637 +# CONFIG_USB_GADGET_FSL_USB2 is not set
2638 +# CONFIG_USB_GADGET_NET2280 is not set
2639 +# CONFIG_USB_GADGET_PXA2XX is not set
2640 +# CONFIG_USB_GADGET_M66592 is not set
2641 +# CONFIG_USB_GADGET_GOKU is not set
2642 +# CONFIG_USB_GADGET_LH7A40X is not set
2643 +# CONFIG_USB_GADGET_OMAP is not set
2644 +# CONFIG_USB_GADGET_S3C2410 is not set
2645 +# CONFIG_USB_GADGET_AT91 is not set
2646 +# CONFIG_USB_GADGET_DUMMY_HCD is not set
2647 +CONFIG_USB_GADGET_DUALSPEED=y
2648 +CONFIG_USB_ZERO=m
2649 +CONFIG_USB_ETH=m
2650 +CONFIG_USB_ETH_RNDIS=y
2651 +CONFIG_USB_GADGETFS=m
2652 +CONFIG_USB_FILE_STORAGE=m
2653 +# CONFIG_USB_FILE_STORAGE_TEST is not set
2654 +CONFIG_USB_G_SERIAL=m
2655 +# CONFIG_USB_MIDI_GADGET is not set
2656 +CONFIG_MMC=y
2657 +# CONFIG_MMC_DEBUG is not set
2658 +# CONFIG_MMC_UNSAFE_RESUME is not set
2659 +
2660 +#
2661 +# MMC/SD Card Drivers
2662 +#
2663 +CONFIG_MMC_BLOCK=y
2664 +# CONFIG_MMC_BLOCK_BOUNCE is not set
2665 +# CONFIG_SDIO_UART is not set
2666 +
2667 +#
2668 +# MMC/SD Host Controller Drivers
2669 +#
2670 +CONFIG_MMC_ATMELMCI=y
2671 +CONFIG_MMC_SPI=m
2672 +CONFIG_NEW_LEDS=y
2673 +CONFIG_LEDS_CLASS=m
2674
2675 #
2676 # LED drivers
2677 #
2678 +CONFIG_LEDS_ATMEL_PWM=m
2679 +CONFIG_LEDS_GPIO=m
2680
2681 #
2682 # LED Triggers
2683 #
2684 +CONFIG_LEDS_TRIGGERS=y
2685 +CONFIG_LEDS_TRIGGER_TIMER=m
2686 +CONFIG_LEDS_TRIGGER_HEARTBEAT=m
2687 +CONFIG_RTC_LIB=y
2688 +CONFIG_RTC_CLASS=y
2689 +CONFIG_RTC_HCTOSYS=y
2690 +CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
2691 +# CONFIG_RTC_DEBUG is not set
2692
2693 #
2694 -# InfiniBand support
2695 +# RTC interfaces
2696 #
2697 +CONFIG_RTC_INTF_SYSFS=y
2698 +CONFIG_RTC_INTF_PROC=y
2699 +CONFIG_RTC_INTF_DEV=y
2700 +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
2701 +# CONFIG_RTC_DRV_TEST is not set
2702
2703 #
2704 -# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
2705 +# I2C RTC drivers
2706 #
2707 +# CONFIG_RTC_DRV_DS1307 is not set
2708 +# CONFIG_RTC_DRV_DS1374 is not set
2709 +# CONFIG_RTC_DRV_DS1672 is not set
2710 +# CONFIG_RTC_DRV_MAX6900 is not set
2711 +# CONFIG_RTC_DRV_RS5C372 is not set
2712 +# CONFIG_RTC_DRV_ISL1208 is not set
2713 +# CONFIG_RTC_DRV_X1205 is not set
2714 +# CONFIG_RTC_DRV_PCF8563 is not set
2715 +# CONFIG_RTC_DRV_PCF8583 is not set
2716 +# CONFIG_RTC_DRV_M41T80 is not set
2717
2718 #
2719 -# Real Time Clock
2720 +# SPI RTC drivers
2721 #
2722 -# CONFIG_RTC_CLASS is not set
2723 +# CONFIG_RTC_DRV_RS5C348 is not set
2724 +# CONFIG_RTC_DRV_MAX6902 is not set
2725
2726 #
2727 -# DMA Engine support
2728 +# Platform RTC drivers
2729 #
2730 -# CONFIG_DMA_ENGINE is not set
2731 +# CONFIG_RTC_DRV_DS1553 is not set
2732 +# CONFIG_RTC_DRV_STK17TA8 is not set
2733 +# CONFIG_RTC_DRV_DS1742 is not set
2734 +# CONFIG_RTC_DRV_M48T86 is not set
2735 +# CONFIG_RTC_DRV_M48T59 is not set
2736 +# CONFIG_RTC_DRV_V3020 is not set
2737
2738 #
2739 -# DMA Clients
2740 +# on-CPU RTC drivers
2741 #
2742 +CONFIG_RTC_DRV_AT32AP700X=y
2743
2744 #
2745 -# DMA Devices
2746 +# Userspace I/O
2747 #
2748 +# CONFIG_UIO is not set
2749
2750 #
2751 # File systems
2752 #
2753 -CONFIG_EXT2_FS=m
2754 +CONFIG_EXT2_FS=y
2755 # CONFIG_EXT2_FS_XATTR is not set
2756 # CONFIG_EXT2_FS_XIP is not set
2757 -# CONFIG_EXT3_FS is not set
2758 +CONFIG_EXT3_FS=y
2759 +# CONFIG_EXT3_FS_XATTR is not set
2760 # CONFIG_EXT4DEV_FS is not set
2761 +CONFIG_JBD=y
2762 +# CONFIG_JBD_DEBUG is not set
2763 # CONFIG_REISERFS_FS is not set
2764 # CONFIG_JFS_FS is not set
2765 # CONFIG_FS_POSIX_ACL is not set
2766 # CONFIG_XFS_FS is not set
2767 # CONFIG_GFS2_FS is not set
2768 # CONFIG_OCFS2_FS is not set
2769 -CONFIG_MINIX_FS=m
2770 +# CONFIG_MINIX_FS is not set
2771 # CONFIG_ROMFS_FS is not set
2772 CONFIG_INOTIFY=y
2773 CONFIG_INOTIFY_USER=y
2774 @@ -609,7 +934,7 @@
2775 # CONFIG_DNOTIFY is not set
2776 # CONFIG_AUTOFS_FS is not set
2777 # CONFIG_AUTOFS4_FS is not set
2778 -# CONFIG_FUSE_FS is not set
2779 +CONFIG_FUSE_FS=m
2780
2781 #
2782 # CD-ROM/DVD Filesystems
2783 @@ -637,8 +962,7 @@
2784 CONFIG_TMPFS=y
2785 # CONFIG_TMPFS_POSIX_ACL is not set
2786 # CONFIG_HUGETLB_PAGE is not set
2787 -CONFIG_RAMFS=y
2788 -CONFIG_CONFIGFS_FS=m
2789 +CONFIG_CONFIGFS_FS=y
2790
2791 #
2792 # Miscellaneous filesystems
2793 @@ -652,11 +976,12 @@
2794 # CONFIG_EFS_FS is not set
2795 CONFIG_JFFS2_FS=y
2796 CONFIG_JFFS2_FS_DEBUG=0
2797 -CONFIG_JFFS2_FS_WRITEBUFFER=y
2798 +# CONFIG_JFFS2_FS_WRITEBUFFER is not set
2799 # CONFIG_JFFS2_SUMMARY is not set
2800 # CONFIG_JFFS2_FS_XATTR is not set
2801 # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
2802 CONFIG_JFFS2_ZLIB=y
2803 +# CONFIG_JFFS2_LZO is not set
2804 CONFIG_JFFS2_RTIME=y
2805 # CONFIG_JFFS2_RUBIN is not set
2806 # CONFIG_CRAMFS is not set
2807 @@ -665,10 +990,7 @@
2808 # CONFIG_QNX4FS_FS is not set
2809 # CONFIG_SYSV_FS is not set
2810 # CONFIG_UFS_FS is not set
2811 -
2812 -#
2813 -# Network File Systems
2814 -#
2815 +CONFIG_NETWORK_FILESYSTEMS=y
2816 CONFIG_NFS_FS=y
2817 CONFIG_NFS_V3=y
2818 # CONFIG_NFS_V3_ACL is not set
2819 @@ -688,17 +1010,12 @@
2820 # CONFIG_NCP_FS is not set
2821 # CONFIG_CODA_FS is not set
2822 # CONFIG_AFS_FS is not set
2823 -# CONFIG_9P_FS is not set
2824
2825 #
2826 # Partition Types
2827 #
2828 # CONFIG_PARTITION_ADVANCED is not set
2829 CONFIG_MSDOS_PARTITION=y
2830 -
2831 -#
2832 -# Native Language Support
2833 -#
2834 CONFIG_NLS=m
2835 CONFIG_NLS_DEFAULT="iso8859-1"
2836 CONFIG_NLS_CODEPAGE_437=m
2837 @@ -739,17 +1056,18 @@
2838 # CONFIG_NLS_KOI8_R is not set
2839 # CONFIG_NLS_KOI8_U is not set
2840 CONFIG_NLS_UTF8=m
2841 -
2842 -#
2843 -# Distributed Lock Manager
2844 -#
2845 # CONFIG_DLM is not set
2846 +CONFIG_INSTRUMENTATION=y
2847 +CONFIG_PROFILING=y
2848 +CONFIG_OPROFILE=m
2849 +CONFIG_KPROBES=y
2850 +# CONFIG_MARKERS is not set
2851
2852 #
2853 # Kernel hacking
2854 #
2855 -CONFIG_TRACE_IRQFLAGS_SUPPORT=y
2856 # CONFIG_PRINTK_TIME is not set
2857 +CONFIG_ENABLE_WARN_DEPRECATED=y
2858 CONFIG_ENABLE_MUST_CHECK=y
2859 CONFIG_MAGIC_SYSRQ=y
2860 # CONFIG_UNUSED_SYMBOLS is not set
2861 @@ -758,12 +1076,17 @@
2862 CONFIG_DEBUG_KERNEL=y
2863 # CONFIG_DEBUG_SHIRQ is not set
2864 CONFIG_DETECT_SOFTLOCKUP=y
2865 +CONFIG_SCHED_DEBUG=y
2866 # CONFIG_SCHEDSTATS is not set
2867 # CONFIG_TIMER_STATS is not set
2868 +# CONFIG_SLUB_DEBUG_ON is not set
2869 # CONFIG_DEBUG_RT_MUTEXES is not set
2870 # CONFIG_RT_MUTEX_TESTER is not set
2871 # CONFIG_DEBUG_SPINLOCK is not set
2872 # CONFIG_DEBUG_MUTEXES is not set
2873 +# CONFIG_DEBUG_LOCK_ALLOC is not set
2874 +# CONFIG_PROVE_LOCKING is not set
2875 +# CONFIG_LOCK_STAT is not set
2876 # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
2877 # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
2878 # CONFIG_DEBUG_KOBJECT is not set
2879 @@ -771,22 +1094,63 @@
2880 # CONFIG_DEBUG_INFO is not set
2881 # CONFIG_DEBUG_VM is not set
2882 # CONFIG_DEBUG_LIST is not set
2883 +# CONFIG_DEBUG_SG is not set
2884 CONFIG_FRAME_POINTER=y
2885 CONFIG_FORCED_INLINING=y
2886 +# CONFIG_BOOT_PRINTK_DELAY is not set
2887 # CONFIG_RCU_TORTURE_TEST is not set
2888 +# CONFIG_LKDTM is not set
2889 # CONFIG_FAULT_INJECTION is not set
2890 -# CONFIG_KPROBES is not set
2891 +# CONFIG_SAMPLES is not set
2892
2893 #
2894 # Security options
2895 #
2896 # CONFIG_KEYS is not set
2897 # CONFIG_SECURITY is not set
2898 -
2899 -#
2900 -# Cryptographic options
2901 -#
2902 -# CONFIG_CRYPTO is not set
2903 +# CONFIG_SECURITY_FILE_CAPABILITIES is not set
2904 +CONFIG_CRYPTO=y
2905 +CONFIG_CRYPTO_ALGAPI=m
2906 +CONFIG_CRYPTO_BLKCIPHER=m
2907 +CONFIG_CRYPTO_HASH=m
2908 +CONFIG_CRYPTO_MANAGER=m
2909 +CONFIG_CRYPTO_HMAC=m
2910 +# CONFIG_CRYPTO_XCBC is not set
2911 +# CONFIG_CRYPTO_NULL is not set
2912 +# CONFIG_CRYPTO_MD4 is not set
2913 +CONFIG_CRYPTO_MD5=m
2914 +CONFIG_CRYPTO_SHA1=m
2915 +# CONFIG_CRYPTO_SHA256 is not set
2916 +# CONFIG_CRYPTO_SHA512 is not set
2917 +# CONFIG_CRYPTO_WP512 is not set
2918 +# CONFIG_CRYPTO_TGR192 is not set
2919 +# CONFIG_CRYPTO_GF128MUL is not set
2920 +# CONFIG_CRYPTO_ECB is not set
2921 +CONFIG_CRYPTO_CBC=m
2922 +# CONFIG_CRYPTO_PCBC is not set
2923 +# CONFIG_CRYPTO_LRW is not set
2924 +# CONFIG_CRYPTO_XTS is not set
2925 +# CONFIG_CRYPTO_CRYPTD is not set
2926 +CONFIG_CRYPTO_DES=m
2927 +# CONFIG_CRYPTO_FCRYPT is not set
2928 +# CONFIG_CRYPTO_BLOWFISH is not set
2929 +# CONFIG_CRYPTO_TWOFISH is not set
2930 +# CONFIG_CRYPTO_SERPENT is not set
2931 +# CONFIG_CRYPTO_AES is not set
2932 +# CONFIG_CRYPTO_CAST5 is not set
2933 +# CONFIG_CRYPTO_CAST6 is not set
2934 +# CONFIG_CRYPTO_TEA is not set
2935 +# CONFIG_CRYPTO_ARC4 is not set
2936 +# CONFIG_CRYPTO_KHAZAD is not set
2937 +# CONFIG_CRYPTO_ANUBIS is not set
2938 +# CONFIG_CRYPTO_SEED is not set
2939 +CONFIG_CRYPTO_DEFLATE=m
2940 +# CONFIG_CRYPTO_MICHAEL_MIC is not set
2941 +# CONFIG_CRYPTO_CRC32C is not set
2942 +# CONFIG_CRYPTO_CAMELLIA is not set
2943 +# CONFIG_CRYPTO_TEST is not set
2944 +# CONFIG_CRYPTO_AUTHENC is not set
2945 +# CONFIG_CRYPTO_HW is not set
2946
2947 #
2948 # Library routines
2949 @@ -794,10 +1158,10 @@
2950 CONFIG_BITREVERSE=y
2951 CONFIG_CRC_CCITT=m
2952 # CONFIG_CRC16 is not set
2953 -# CONFIG_CRC_ITU_T is not set
2954 +CONFIG_CRC_ITU_T=m
2955 CONFIG_CRC32=y
2956 +CONFIG_CRC7=m
2957 # CONFIG_LIBCRC32C is not set
2958 -CONFIG_AUDIT_GENERIC=y
2959 CONFIG_ZLIB_INFLATE=y
2960 CONFIG_ZLIB_DEFLATE=y
2961 CONFIG_PLIST=y
2962 diff -urN linux-2.6.24.3/arch/avr32/configs/atstk1003_defconfig avr32-2.6/arch/avr32/configs/atstk1003_defconfig
2963 --- linux-2.6.24.3/arch/avr32/configs/atstk1003_defconfig 1970-01-01 01:00:00.000000000 +0100
2964 +++ avr32-2.6/arch/avr32/configs/atstk1003_defconfig 2008-04-23 20:12:35.000000000 +0200
2965 @@ -0,0 +1,1041 @@
2966 +#
2967 +# Automatically generated make config: don't edit
2968 +# Linux kernel version: 2.6.24
2969 +# Thu Mar 6 12:50:27 2008
2970 +#
2971 +CONFIG_AVR32=y
2972 +CONFIG_GENERIC_GPIO=y
2973 +CONFIG_GENERIC_HARDIRQS=y
2974 +CONFIG_STACKTRACE_SUPPORT=y
2975 +CONFIG_LOCKDEP_SUPPORT=y
2976 +CONFIG_TRACE_IRQFLAGS_SUPPORT=y
2977 +CONFIG_HARDIRQS_SW_RESEND=y
2978 +CONFIG_GENERIC_IRQ_PROBE=y
2979 +CONFIG_RWSEM_GENERIC_SPINLOCK=y
2980 +CONFIG_GENERIC_TIME=y
2981 +CONFIG_GENERIC_CLOCKEVENTS=y
2982 +# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
2983 +# CONFIG_ARCH_HAS_ILOG2_U32 is not set
2984 +# CONFIG_ARCH_HAS_ILOG2_U64 is not set
2985 +CONFIG_ARCH_SUPPORTS_OPROFILE=y
2986 +CONFIG_GENERIC_HWEIGHT=y
2987 +CONFIG_GENERIC_CALIBRATE_DELAY=y
2988 +CONFIG_GENERIC_BUG=y
2989 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
2990 +
2991 +#
2992 +# General setup
2993 +#
2994 +CONFIG_EXPERIMENTAL=y
2995 +CONFIG_BROKEN_ON_SMP=y
2996 +CONFIG_INIT_ENV_ARG_LIMIT=32
2997 +CONFIG_LOCALVERSION=""
2998 +# CONFIG_LOCALVERSION_AUTO is not set
2999 +CONFIG_SWAP=y
3000 +CONFIG_SYSVIPC=y
3001 +CONFIG_SYSVIPC_SYSCTL=y
3002 +CONFIG_POSIX_MQUEUE=y
3003 +CONFIG_BSD_PROCESS_ACCT=y
3004 +CONFIG_BSD_PROCESS_ACCT_V3=y
3005 +CONFIG_TASKSTATS=y
3006 +CONFIG_TASK_DELAY_ACCT=y
3007 +# CONFIG_TASK_XACCT is not set
3008 +# CONFIG_USER_NS is not set
3009 +# CONFIG_PID_NS is not set
3010 +CONFIG_AUDIT=y
3011 +# CONFIG_IKCONFIG is not set
3012 +CONFIG_LOG_BUF_SHIFT=14
3013 +# CONFIG_CGROUPS is not set
3014 +CONFIG_FAIR_GROUP_SCHED=y
3015 +CONFIG_FAIR_USER_SCHED=y
3016 +# CONFIG_FAIR_CGROUP_SCHED is not set
3017 +CONFIG_SYSFS_DEPRECATED=y
3018 +CONFIG_RELAY=y
3019 +CONFIG_BLK_DEV_INITRD=y
3020 +CONFIG_INITRAMFS_SOURCE=""
3021 +CONFIG_CC_OPTIMIZE_FOR_SIZE=y
3022 +CONFIG_SYSCTL=y
3023 +CONFIG_EMBEDDED=y
3024 +# CONFIG_SYSCTL_SYSCALL is not set
3025 +CONFIG_KALLSYMS=y
3026 +# CONFIG_KALLSYMS_ALL is not set
3027 +# CONFIG_KALLSYMS_EXTRA_PASS is not set
3028 +CONFIG_HOTPLUG=y
3029 +CONFIG_PRINTK=y
3030 +CONFIG_BUG=y
3031 +CONFIG_ELF_CORE=y
3032 +# CONFIG_BASE_FULL is not set
3033 +CONFIG_FUTEX=y
3034 +CONFIG_ANON_INODES=y
3035 +CONFIG_EPOLL=y
3036 +CONFIG_SIGNALFD=y
3037 +CONFIG_EVENTFD=y
3038 +CONFIG_SHMEM=y
3039 +CONFIG_VM_EVENT_COUNTERS=y
3040 +# CONFIG_SLUB_DEBUG is not set
3041 +# CONFIG_SLAB is not set
3042 +CONFIG_SLUB=y
3043 +# CONFIG_SLOB is not set
3044 +CONFIG_SLABINFO=y
3045 +CONFIG_RT_MUTEXES=y
3046 +# CONFIG_TINY_SHMEM is not set
3047 +CONFIG_BASE_SMALL=1
3048 +CONFIG_MODULES=y
3049 +CONFIG_MODULE_UNLOAD=y
3050 +# CONFIG_MODULE_FORCE_UNLOAD is not set
3051 +# CONFIG_MODVERSIONS is not set
3052 +# CONFIG_MODULE_SRCVERSION_ALL is not set
3053 +# CONFIG_KMOD is not set
3054 +CONFIG_BLOCK=y
3055 +# CONFIG_LBD is not set
3056 +# CONFIG_BLK_DEV_IO_TRACE is not set
3057 +# CONFIG_LSF is not set
3058 +# CONFIG_BLK_DEV_BSG is not set
3059 +
3060 +#
3061 +# IO Schedulers
3062 +#
3063 +CONFIG_IOSCHED_NOOP=y
3064 +# CONFIG_IOSCHED_AS is not set
3065 +# CONFIG_IOSCHED_DEADLINE is not set
3066 +CONFIG_IOSCHED_CFQ=y
3067 +# CONFIG_DEFAULT_AS is not set
3068 +# CONFIG_DEFAULT_DEADLINE is not set
3069 +CONFIG_DEFAULT_CFQ=y
3070 +# CONFIG_DEFAULT_NOOP is not set
3071 +CONFIG_DEFAULT_IOSCHED="cfq"
3072 +
3073 +#
3074 +# System Type and features
3075 +#
3076 +CONFIG_TICK_ONESHOT=y
3077 +CONFIG_NO_HZ=y
3078 +CONFIG_HIGH_RES_TIMERS=y
3079 +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
3080 +CONFIG_SUBARCH_AVR32B=y
3081 +CONFIG_MMU=y
3082 +CONFIG_PERFORMANCE_COUNTERS=y
3083 +CONFIG_PLATFORM_AT32AP=y
3084 +CONFIG_CPU_AT32AP700X=y
3085 +CONFIG_CPU_AT32AP7001=y
3086 +CONFIG_BOARD_ATSTK1000=y
3087 +# CONFIG_BOARD_ATNGW100 is not set
3088 +# CONFIG_BOARD_ATSTK1002 is not set
3089 +CONFIG_BOARD_ATSTK1003=y
3090 +# CONFIG_BOARD_ATSTK1004 is not set
3091 +# CONFIG_BOARD_ATSTK100X_CUSTOM is not set
3092 +# CONFIG_BOARD_ATSTK100X_SPI1 is not set
3093 +# CONFIG_BOARD_ATSTK1000_J2_LED is not set
3094 +# CONFIG_BOARD_ATSTK1000_J2_LED8 is not set
3095 +# CONFIG_BOARD_ATSTK1000_J2_RGB is not set
3096 +CONFIG_BOARD_ATSTK1000_EXTDAC=y
3097 +# CONFIG_BOARD_ATSTK100X_ENABLE_AC97 is not set
3098 +# CONFIG_BOARD_ATSTK1000_CF_HACKS is not set
3099 +# CONFIG_BOARD_ATSTK100X_ENABLE_PSIF is not set
3100 +CONFIG_LOADER_U_BOOT=y
3101 +
3102 +#
3103 +# Atmel AVR32 AP options
3104 +#
3105 +# CONFIG_AP700X_32_BIT_SMC is not set
3106 +CONFIG_AP700X_16_BIT_SMC=y
3107 +# CONFIG_AP700X_8_BIT_SMC is not set
3108 +CONFIG_GPIO_DEV=y
3109 +CONFIG_LOAD_ADDRESS=0x10000000
3110 +CONFIG_ENTRY_ADDRESS=0x90000000
3111 +CONFIG_PHYS_OFFSET=0x10000000
3112 +CONFIG_PREEMPT_NONE=y
3113 +# CONFIG_PREEMPT_VOLUNTARY is not set
3114 +# CONFIG_PREEMPT is not set
3115 +# CONFIG_HAVE_ARCH_BOOTMEM_NODE is not set
3116 +# CONFIG_ARCH_HAVE_MEMORY_PRESENT is not set
3117 +# CONFIG_NEED_NODE_MEMMAP_SIZE is not set
3118 +CONFIG_ARCH_FLATMEM_ENABLE=y
3119 +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
3120 +# CONFIG_ARCH_SPARSEMEM_ENABLE is not set
3121 +CONFIG_SELECT_MEMORY_MODEL=y
3122 +CONFIG_FLATMEM_MANUAL=y
3123 +# CONFIG_DISCONTIGMEM_MANUAL is not set
3124 +# CONFIG_SPARSEMEM_MANUAL is not set
3125 +CONFIG_FLATMEM=y
3126 +CONFIG_FLAT_NODE_MEM_MAP=y
3127 +# CONFIG_SPARSEMEM_STATIC is not set
3128 +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
3129 +CONFIG_SPLIT_PTLOCK_CPUS=4
3130 +# CONFIG_RESOURCES_64BIT is not set
3131 +CONFIG_ZONE_DMA_FLAG=0
3132 +CONFIG_VIRT_TO_BUS=y
3133 +# CONFIG_OWNERSHIP_TRACE is not set
3134 +CONFIG_NMI_DEBUGGING=y
3135 +CONFIG_DW_DMAC=y
3136 +# CONFIG_HZ_100 is not set
3137 +CONFIG_HZ_250=y
3138 +# CONFIG_HZ_300 is not set
3139 +# CONFIG_HZ_1000 is not set
3140 +CONFIG_HZ=250
3141 +CONFIG_CMDLINE=""
3142 +
3143 +#
3144 +# Power management options
3145 +#
3146 +
3147 +#
3148 +# CPU Frequency scaling
3149 +#
3150 +CONFIG_CPU_FREQ=y
3151 +CONFIG_CPU_FREQ_TABLE=y
3152 +# CONFIG_CPU_FREQ_DEBUG is not set
3153 +# CONFIG_CPU_FREQ_STAT is not set
3154 +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
3155 +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
3156 +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
3157 +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
3158 +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
3159 +# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
3160 +CONFIG_CPU_FREQ_GOV_USERSPACE=y
3161 +CONFIG_CPU_FREQ_GOV_ONDEMAND=y
3162 +# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
3163 +CONFIG_CPU_FREQ_AT32AP=y
3164 +
3165 +#
3166 +# Bus options
3167 +#
3168 +# CONFIG_ARCH_SUPPORTS_MSI is not set
3169 +# CONFIG_PCCARD is not set
3170 +
3171 +#
3172 +# Executable file formats
3173 +#
3174 +CONFIG_BINFMT_ELF=y
3175 +# CONFIG_BINFMT_MISC is not set
3176 +
3177 +#
3178 +# Networking
3179 +#
3180 +CONFIG_NET=y
3181 +
3182 +#
3183 +# Networking options
3184 +#
3185 +CONFIG_PACKET=y
3186 +CONFIG_PACKET_MMAP=y
3187 +CONFIG_UNIX=y
3188 +# CONFIG_NET_KEY is not set
3189 +CONFIG_INET=y
3190 +# CONFIG_IP_MULTICAST is not set
3191 +# CONFIG_IP_ADVANCED_ROUTER is not set
3192 +CONFIG_IP_FIB_HASH=y
3193 +# CONFIG_IP_PNP is not set
3194 +# CONFIG_NET_IPIP is not set
3195 +# CONFIG_NET_IPGRE is not set
3196 +# CONFIG_ARPD is not set
3197 +# CONFIG_SYN_COOKIES is not set
3198 +# CONFIG_INET_AH is not set
3199 +# CONFIG_INET_ESP is not set
3200 +# CONFIG_INET_IPCOMP is not set
3201 +# CONFIG_INET_XFRM_TUNNEL is not set
3202 +# CONFIG_INET_TUNNEL is not set
3203 +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
3204 +# CONFIG_INET_XFRM_MODE_TUNNEL is not set
3205 +# CONFIG_INET_XFRM_MODE_BEET is not set
3206 +# CONFIG_INET_LRO is not set
3207 +# CONFIG_INET_DIAG is not set
3208 +# CONFIG_TCP_CONG_ADVANCED is not set
3209 +CONFIG_TCP_CONG_CUBIC=y
3210 +CONFIG_DEFAULT_TCP_CONG="cubic"
3211 +# CONFIG_TCP_MD5SIG is not set
3212 +# CONFIG_IPV6 is not set
3213 +# CONFIG_INET6_XFRM_TUNNEL is not set
3214 +# CONFIG_INET6_TUNNEL is not set
3215 +# CONFIG_NETWORK_SECMARK is not set
3216 +# CONFIG_NETFILTER is not set
3217 +# CONFIG_IP_DCCP is not set
3218 +# CONFIG_IP_SCTP is not set
3219 +# CONFIG_TIPC is not set
3220 +# CONFIG_ATM is not set
3221 +# CONFIG_BRIDGE is not set
3222 +# CONFIG_VLAN_8021Q is not set
3223 +# CONFIG_DECNET is not set
3224 +# CONFIG_LLC2 is not set
3225 +# CONFIG_IPX is not set
3226 +# CONFIG_ATALK is not set
3227 +# CONFIG_X25 is not set
3228 +# CONFIG_LAPB is not set
3229 +# CONFIG_ECONET is not set
3230 +# CONFIG_WAN_ROUTER is not set
3231 +# CONFIG_NET_SCHED is not set
3232 +
3233 +#
3234 +# Network testing
3235 +#
3236 +# CONFIG_NET_PKTGEN is not set
3237 +# CONFIG_NET_TCPPROBE is not set
3238 +# CONFIG_HAMRADIO is not set
3239 +# CONFIG_IRDA is not set
3240 +# CONFIG_BT is not set
3241 +# CONFIG_AF_RXRPC is not set
3242 +
3243 +#
3244 +# Wireless
3245 +#
3246 +# CONFIG_CFG80211 is not set
3247 +# CONFIG_WIRELESS_EXT is not set
3248 +# CONFIG_MAC80211 is not set
3249 +# CONFIG_IEEE80211 is not set
3250 +# CONFIG_RFKILL is not set
3251 +# CONFIG_NET_9P is not set
3252 +
3253 +#
3254 +# Device Drivers
3255 +#
3256 +
3257 +#
3258 +# Generic Driver Options
3259 +#
3260 +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
3261 +CONFIG_STANDALONE=y
3262 +# CONFIG_PREVENT_FIRMWARE_BUILD is not set
3263 +# CONFIG_FW_LOADER is not set
3264 +# CONFIG_DEBUG_DRIVER is not set
3265 +# CONFIG_DEBUG_DEVRES is not set
3266 +# CONFIG_SYS_HYPERVISOR is not set
3267 +# CONFIG_CONNECTOR is not set
3268 +CONFIG_MTD=y
3269 +# CONFIG_MTD_DEBUG is not set
3270 +# CONFIG_MTD_CONCAT is not set
3271 +CONFIG_MTD_PARTITIONS=y
3272 +# CONFIG_MTD_REDBOOT_PARTS is not set
3273 +CONFIG_MTD_CMDLINE_PARTS=y
3274 +
3275 +#
3276 +# User Modules And Translation Layers
3277 +#
3278 +CONFIG_MTD_CHAR=y
3279 +CONFIG_MTD_BLKDEVS=y
3280 +CONFIG_MTD_BLOCK=y
3281 +# CONFIG_FTL is not set
3282 +# CONFIG_NFTL is not set
3283 +# CONFIG_INFTL is not set
3284 +# CONFIG_RFD_FTL is not set
3285 +# CONFIG_SSFDC is not set
3286 +# CONFIG_MTD_OOPS is not set
3287 +
3288 +#
3289 +# RAM/ROM/Flash chip drivers
3290 +#
3291 +CONFIG_MTD_CFI=y
3292 +# CONFIG_MTD_JEDECPROBE is not set
3293 +CONFIG_MTD_GEN_PROBE=y
3294 +# CONFIG_MTD_CFI_ADV_OPTIONS is not set
3295 +CONFIG_MTD_MAP_BANK_WIDTH_1=y
3296 +CONFIG_MTD_MAP_BANK_WIDTH_2=y
3297 +CONFIG_MTD_MAP_BANK_WIDTH_4=y
3298 +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
3299 +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
3300 +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
3301 +CONFIG_MTD_CFI_I1=y
3302 +CONFIG_MTD_CFI_I2=y
3303 +# CONFIG_MTD_CFI_I4 is not set
3304 +# CONFIG_MTD_CFI_I8 is not set
3305 +# CONFIG_MTD_CFI_INTELEXT is not set
3306 +CONFIG_MTD_CFI_AMDSTD=y
3307 +# CONFIG_MTD_CFI_STAA is not set
3308 +CONFIG_MTD_CFI_UTIL=y
3309 +# CONFIG_MTD_RAM is not set
3310 +# CONFIG_MTD_ROM is not set
3311 +# CONFIG_MTD_ABSENT is not set
3312 +
3313 +#
3314 +# Mapping drivers for chip access
3315 +#
3316 +# CONFIG_MTD_COMPLEX_MAPPINGS is not set
3317 +CONFIG_MTD_PHYSMAP=y
3318 +CONFIG_MTD_PHYSMAP_START=0x8000000
3319 +CONFIG_MTD_PHYSMAP_LEN=0x0
3320 +CONFIG_MTD_PHYSMAP_BANKWIDTH=2
3321 +# CONFIG_MTD_PLATRAM is not set
3322 +
3323 +#
3324 +# Self-contained MTD device drivers
3325 +#
3326 +CONFIG_MTD_DATAFLASH=m
3327 +CONFIG_MTD_M25P80=m
3328 +# CONFIG_MTD_SLRAM is not set
3329 +# CONFIG_MTD_PHRAM is not set
3330 +# CONFIG_MTD_MTDRAM is not set
3331 +# CONFIG_MTD_BLOCK2MTD is not set
3332 +
3333 +#
3334 +# Disk-On-Chip Device Drivers
3335 +#
3336 +# CONFIG_MTD_DOC2000 is not set
3337 +# CONFIG_MTD_DOC2001 is not set
3338 +# CONFIG_MTD_DOC2001PLUS is not set
3339 +# CONFIG_MTD_NAND is not set
3340 +# CONFIG_MTD_ONENAND is not set
3341 +
3342 +#
3343 +# UBI - Unsorted block images
3344 +#
3345 +# CONFIG_MTD_UBI is not set
3346 +# CONFIG_PARPORT is not set
3347 +CONFIG_BLK_DEV=y
3348 +# CONFIG_BLK_DEV_COW_COMMON is not set
3349 +CONFIG_BLK_DEV_LOOP=m
3350 +# CONFIG_BLK_DEV_CRYPTOLOOP is not set
3351 +CONFIG_BLK_DEV_NBD=m
3352 +CONFIG_BLK_DEV_RAM=m
3353 +CONFIG_BLK_DEV_RAM_COUNT=16
3354 +CONFIG_BLK_DEV_RAM_SIZE=4096
3355 +CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
3356 +# CONFIG_CDROM_PKTCDVD is not set
3357 +# CONFIG_ATA_OVER_ETH is not set
3358 +CONFIG_MISC_DEVICES=y
3359 +CONFIG_ATMEL_PWM=m
3360 +CONFIG_ATMEL_TCLIB=y
3361 +CONFIG_ATMEL_TCB_CLKSRC=y
3362 +CONFIG_ATMEL_TCB_CLKSRC_BLOCK=0
3363 +# CONFIG_EEPROM_93CX6 is not set
3364 +CONFIG_ATMEL_SSC=m
3365 +# CONFIG_IDE is not set
3366 +
3367 +#
3368 +# SCSI device support
3369 +#
3370 +# CONFIG_RAID_ATTRS is not set
3371 +CONFIG_SCSI=m
3372 +CONFIG_SCSI_DMA=y
3373 +# CONFIG_SCSI_TGT is not set
3374 +# CONFIG_SCSI_NETLINK is not set
3375 +# CONFIG_SCSI_PROC_FS is not set
3376 +
3377 +#
3378 +# SCSI support type (disk, tape, CD-ROM)
3379 +#
3380 +CONFIG_BLK_DEV_SD=m
3381 +# CONFIG_CHR_DEV_ST is not set
3382 +# CONFIG_CHR_DEV_OSST is not set
3383 +CONFIG_BLK_DEV_SR=m
3384 +# CONFIG_BLK_DEV_SR_VENDOR is not set
3385 +# CONFIG_CHR_DEV_SG is not set
3386 +# CONFIG_CHR_DEV_SCH is not set
3387 +
3388 +#
3389 +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
3390 +#
3391 +# CONFIG_SCSI_MULTI_LUN is not set
3392 +# CONFIG_SCSI_CONSTANTS is not set
3393 +# CONFIG_SCSI_LOGGING is not set
3394 +# CONFIG_SCSI_SCAN_ASYNC is not set
3395 +CONFIG_SCSI_WAIT_SCAN=m
3396 +
3397 +#
3398 +# SCSI Transports
3399 +#
3400 +# CONFIG_SCSI_SPI_ATTRS is not set
3401 +# CONFIG_SCSI_FC_ATTRS is not set
3402 +# CONFIG_SCSI_ISCSI_ATTRS is not set
3403 +# CONFIG_SCSI_SAS_LIBSAS is not set
3404 +# CONFIG_SCSI_SRP_ATTRS is not set
3405 +CONFIG_SCSI_LOWLEVEL=y
3406 +# CONFIG_ISCSI_TCP is not set
3407 +# CONFIG_SCSI_DEBUG is not set
3408 +CONFIG_ATA=m
3409 +# CONFIG_ATA_NONSTANDARD is not set
3410 +CONFIG_PATA_AT32=m
3411 +# CONFIG_PATA_PLATFORM is not set
3412 +# CONFIG_MD is not set
3413 +CONFIG_NETDEVICES=y
3414 +# CONFIG_NETDEVICES_MULTIQUEUE is not set
3415 +# CONFIG_DUMMY is not set
3416 +# CONFIG_BONDING is not set
3417 +# CONFIG_MACVLAN is not set
3418 +# CONFIG_EQUALIZER is not set
3419 +# CONFIG_TUN is not set
3420 +# CONFIG_VETH is not set
3421 +# CONFIG_NET_ETHERNET is not set
3422 +# CONFIG_NETDEV_1000 is not set
3423 +# CONFIG_NETDEV_10000 is not set
3424 +
3425 +#
3426 +# Wireless LAN
3427 +#
3428 +# CONFIG_WLAN_PRE80211 is not set
3429 +# CONFIG_WLAN_80211 is not set
3430 +# CONFIG_WAN is not set
3431 +CONFIG_PPP=m
3432 +# CONFIG_PPP_MULTILINK is not set
3433 +# CONFIG_PPP_FILTER is not set
3434 +CONFIG_PPP_ASYNC=m
3435 +# CONFIG_PPP_SYNC_TTY is not set
3436 +CONFIG_PPP_DEFLATE=m
3437 +CONFIG_PPP_BSDCOMP=m
3438 +# CONFIG_PPP_MPPE is not set
3439 +# CONFIG_PPPOE is not set
3440 +# CONFIG_PPPOL2TP is not set
3441 +# CONFIG_SLIP is not set
3442 +CONFIG_SLHC=m
3443 +# CONFIG_SHAPER is not set
3444 +# CONFIG_NETCONSOLE is not set
3445 +# CONFIG_NETPOLL is not set
3446 +# CONFIG_NET_POLL_CONTROLLER is not set
3447 +# CONFIG_ISDN is not set
3448 +# CONFIG_PHONE is not set
3449 +
3450 +#
3451 +# Input device support
3452 +#
3453 +CONFIG_INPUT=m
3454 +# CONFIG_INPUT_FF_MEMLESS is not set
3455 +CONFIG_INPUT_POLLDEV=m
3456 +
3457 +#
3458 +# Userland interfaces
3459 +#
3460 +CONFIG_INPUT_MOUSEDEV=m
3461 +CONFIG_INPUT_MOUSEDEV_PSAUX=y
3462 +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
3463 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
3464 +# CONFIG_INPUT_JOYDEV is not set
3465 +# CONFIG_INPUT_EVDEV is not set
3466 +# CONFIG_INPUT_EVBUG is not set
3467 +
3468 +#
3469 +# Input Device Drivers
3470 +#
3471 +CONFIG_INPUT_KEYBOARD=y
3472 +# CONFIG_KEYBOARD_ATKBD is not set
3473 +# CONFIG_KEYBOARD_SUNKBD is not set
3474 +# CONFIG_KEYBOARD_LKKBD is not set
3475 +# CONFIG_KEYBOARD_XTKBD is not set
3476 +# CONFIG_KEYBOARD_NEWTON is not set
3477 +# CONFIG_KEYBOARD_STOWAWAY is not set
3478 +CONFIG_KEYBOARD_GPIO=m
3479 +CONFIG_INPUT_MOUSE=y
3480 +# CONFIG_MOUSE_PS2 is not set
3481 +# CONFIG_MOUSE_SERIAL is not set
3482 +# CONFIG_MOUSE_VSXXXAA is not set
3483 +CONFIG_MOUSE_GPIO=m
3484 +# CONFIG_INPUT_JOYSTICK is not set
3485 +# CONFIG_INPUT_TABLET is not set
3486 +# CONFIG_INPUT_TOUCHSCREEN is not set
3487 +# CONFIG_INPUT_MISC is not set
3488 +
3489 +#
3490 +# Hardware I/O ports
3491 +#
3492 +# CONFIG_SERIO is not set
3493 +# CONFIG_GAMEPORT is not set
3494 +
3495 +#
3496 +# Character devices
3497 +#
3498 +# CONFIG_VT is not set
3499 +# CONFIG_SERIAL_NONSTANDARD is not set
3500 +
3501 +#
3502 +# Serial drivers
3503 +#
3504 +# CONFIG_SERIAL_8250 is not set
3505 +
3506 +#
3507 +# Non-8250 serial port support
3508 +#
3509 +CONFIG_SERIAL_ATMEL=y
3510 +CONFIG_SERIAL_ATMEL_CONSOLE=y
3511 +CONFIG_SERIAL_ATMEL_PDC=y
3512 +# CONFIG_SERIAL_ATMEL_TTYAT is not set
3513 +CONFIG_SERIAL_CORE=y
3514 +CONFIG_SERIAL_CORE_CONSOLE=y
3515 +CONFIG_UNIX98_PTYS=y
3516 +# CONFIG_LEGACY_PTYS is not set
3517 +# CONFIG_IPMI_HANDLER is not set
3518 +# CONFIG_HW_RANDOM is not set
3519 +# CONFIG_RTC is not set
3520 +# CONFIG_GEN_RTC is not set
3521 +# CONFIG_R3964 is not set
3522 +# CONFIG_RAW_DRIVER is not set
3523 +# CONFIG_TCG_TPM is not set
3524 +CONFIG_I2C=m
3525 +CONFIG_I2C_BOARDINFO=y
3526 +CONFIG_I2C_CHARDEV=m
3527 +
3528 +#
3529 +# I2C Algorithms
3530 +#
3531 +CONFIG_I2C_ALGOBIT=m
3532 +# CONFIG_I2C_ALGOPCF is not set
3533 +# CONFIG_I2C_ALGOPCA is not set
3534 +
3535 +#
3536 +# I2C Hardware Bus support
3537 +#
3538 +CONFIG_I2C_ATMELTWI=m
3539 +CONFIG_I2C_GPIO=m
3540 +# CONFIG_I2C_OCORES is not set
3541 +# CONFIG_I2C_PARPORT_LIGHT is not set
3542 +# CONFIG_I2C_SIMTEC is not set
3543 +# CONFIG_I2C_TAOS_EVM is not set
3544 +# CONFIG_I2C_STUB is not set
3545 +
3546 +#
3547 +# Miscellaneous I2C Chip support
3548 +#
3549 +# CONFIG_SENSORS_DS1337 is not set
3550 +# CONFIG_SENSORS_DS1374 is not set
3551 +# CONFIG_DS1682 is not set
3552 +# CONFIG_SENSORS_EEPROM is not set
3553 +# CONFIG_SENSORS_PCF8574 is not set
3554 +# CONFIG_SENSORS_PCA9539 is not set
3555 +# CONFIG_SENSORS_PCF8591 is not set
3556 +# CONFIG_SENSORS_MAX6875 is not set
3557 +# CONFIG_SENSORS_TSL2550 is not set
3558 +# CONFIG_I2C_DEBUG_CORE is not set
3559 +# CONFIG_I2C_DEBUG_ALGO is not set
3560 +# CONFIG_I2C_DEBUG_BUS is not set
3561 +# CONFIG_I2C_DEBUG_CHIP is not set
3562 +
3563 +#
3564 +# SPI support
3565 +#
3566 +CONFIG_SPI=y
3567 +# CONFIG_SPI_DEBUG is not set
3568 +CONFIG_SPI_MASTER=y
3569 +
3570 +#
3571 +# SPI Master Controller Drivers
3572 +#
3573 +CONFIG_SPI_ATMEL=y
3574 +# CONFIG_SPI_BITBANG is not set
3575 +
3576 +#
3577 +# SPI Protocol Masters
3578 +#
3579 +# CONFIG_SPI_AT25 is not set
3580 +CONFIG_SPI_SPIDEV=m
3581 +# CONFIG_SPI_TLE62X0 is not set
3582 +# CONFIG_W1 is not set
3583 +# CONFIG_POWER_SUPPLY is not set
3584 +# CONFIG_HWMON is not set
3585 +CONFIG_WATCHDOG=y
3586 +# CONFIG_WATCHDOG_NOWAYOUT is not set
3587 +
3588 +#
3589 +# Watchdog Device Drivers
3590 +#
3591 +# CONFIG_SOFT_WATCHDOG is not set
3592 +CONFIG_AT32AP700X_WDT=y
3593 +
3594 +#
3595 +# Sonics Silicon Backplane
3596 +#
3597 +CONFIG_SSB_POSSIBLE=y
3598 +# CONFIG_SSB is not set
3599 +
3600 +#
3601 +# Multifunction device drivers
3602 +#
3603 +# CONFIG_MFD_SM501 is not set
3604 +
3605 +#
3606 +# Multimedia devices
3607 +#
3608 +# CONFIG_VIDEO_DEV is not set
3609 +# CONFIG_DVB_CORE is not set
3610 +# CONFIG_DAB is not set
3611 +
3612 +#
3613 +# Graphics support
3614 +#
3615 +# CONFIG_VGASTATE is not set
3616 +# CONFIG_VIDEO_OUTPUT_CONTROL is not set
3617 +# CONFIG_FB is not set
3618 +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
3619 +
3620 +#
3621 +# Display device support
3622 +#
3623 +# CONFIG_DISPLAY_SUPPORT is not set
3624 +
3625 +#
3626 +# Sound
3627 +#
3628 +CONFIG_SOUND=m
3629 +
3630 +#
3631 +# Advanced Linux Sound Architecture
3632 +#
3633 +CONFIG_SND=m
3634 +CONFIG_SND_TIMER=m
3635 +CONFIG_SND_PCM=m
3636 +# CONFIG_SND_SEQUENCER is not set
3637 +CONFIG_SND_OSSEMUL=y
3638 +CONFIG_SND_MIXER_OSS=m
3639 +CONFIG_SND_PCM_OSS=m
3640 +CONFIG_SND_PCM_OSS_PLUGINS=y
3641 +# CONFIG_SND_DYNAMIC_MINORS is not set
3642 +CONFIG_SND_SUPPORT_OLD_API=y
3643 +CONFIG_SND_VERBOSE_PROCFS=y
3644 +# CONFIG_SND_VERBOSE_PRINTK is not set
3645 +# CONFIG_SND_DEBUG is not set
3646 +
3647 +#
3648 +# Generic devices
3649 +#
3650 +CONFIG_SND_AC97_CODEC=m
3651 +# CONFIG_SND_DUMMY is not set
3652 +# CONFIG_SND_MTPAV is not set
3653 +# CONFIG_SND_SERIAL_U16550 is not set
3654 +# CONFIG_SND_MPU401 is not set
3655 +
3656 +#
3657 +# AVR32 devices
3658 +#
3659 +CONFIG_SND_ATMEL_AC97=m
3660 +
3661 +#
3662 +# SPI devices
3663 +#
3664 +CONFIG_SND_AT73C213=m
3665 +CONFIG_SND_AT73C213_TARGET_BITRATE=48000
3666 +
3667 +#
3668 +# System on Chip audio support
3669 +#
3670 +# CONFIG_SND_SOC is not set
3671 +
3672 +#
3673 +# SoC Audio support for SuperH
3674 +#
3675 +
3676 +#
3677 +# Open Sound System
3678 +#
3679 +# CONFIG_SOUND_PRIME is not set
3680 +CONFIG_AC97_BUS=m
3681 +# CONFIG_HID_SUPPORT is not set
3682 +CONFIG_USB_SUPPORT=y
3683 +# CONFIG_USB_ARCH_HAS_HCD is not set
3684 +# CONFIG_USB_ARCH_HAS_OHCI is not set
3685 +# CONFIG_USB_ARCH_HAS_EHCI is not set
3686 +
3687 +#
3688 +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
3689 +#
3690 +
3691 +#
3692 +# USB Gadget Support
3693 +#
3694 +CONFIG_USB_GADGET=y
3695 +# CONFIG_USB_GADGET_DEBUG is not set
3696 +# CONFIG_USB_GADGET_DEBUG_FILES is not set
3697 +CONFIG_USB_GADGET_DEBUG_FS=y
3698 +CONFIG_USB_GADGET_SELECTED=y
3699 +# CONFIG_USB_GADGET_AMD5536UDC is not set
3700 +CONFIG_USB_GADGET_ATMEL_USBA=y
3701 +CONFIG_USB_ATMEL_USBA=y
3702 +# CONFIG_USB_GADGET_FSL_USB2 is not set
3703 +# CONFIG_USB_GADGET_NET2280 is not set
3704 +# CONFIG_USB_GADGET_PXA2XX is not set
3705 +# CONFIG_USB_GADGET_M66592 is not set
3706 +# CONFIG_USB_GADGET_GOKU is not set
3707 +# CONFIG_USB_GADGET_LH7A40X is not set
3708 +# CONFIG_USB_GADGET_OMAP is not set
3709 +# CONFIG_USB_GADGET_S3C2410 is not set
3710 +# CONFIG_USB_GADGET_AT91 is not set
3711 +# CONFIG_USB_GADGET_DUMMY_HCD is not set
3712 +CONFIG_USB_GADGET_DUALSPEED=y
3713 +CONFIG_USB_ZERO=m
3714 +CONFIG_USB_ETH=m
3715 +CONFIG_USB_ETH_RNDIS=y
3716 +CONFIG_USB_GADGETFS=m
3717 +CONFIG_USB_FILE_STORAGE=m
3718 +# CONFIG_USB_FILE_STORAGE_TEST is not set
3719 +CONFIG_USB_G_SERIAL=m
3720 +# CONFIG_USB_MIDI_GADGET is not set
3721 +CONFIG_MMC=y
3722 +# CONFIG_MMC_DEBUG is not set
3723 +# CONFIG_MMC_UNSAFE_RESUME is not set
3724 +
3725 +#
3726 +# MMC/SD Card Drivers
3727 +#
3728 +CONFIG_MMC_BLOCK=y
3729 +# CONFIG_MMC_BLOCK_BOUNCE is not set
3730 +# CONFIG_SDIO_UART is not set
3731 +
3732 +#
3733 +# MMC/SD Host Controller Drivers
3734 +#
3735 +CONFIG_MMC_ATMELMCI=y
3736 +CONFIG_MMC_SPI=m
3737 +CONFIG_NEW_LEDS=y
3738 +CONFIG_LEDS_CLASS=y
3739 +
3740 +#
3741 +# LED drivers
3742 +#
3743 +CONFIG_LEDS_ATMEL_PWM=m
3744 +CONFIG_LEDS_GPIO=y
3745 +
3746 +#
3747 +# LED Triggers
3748 +#
3749 +CONFIG_LEDS_TRIGGERS=y
3750 +CONFIG_LEDS_TRIGGER_TIMER=y
3751 +CONFIG_LEDS_TRIGGER_HEARTBEAT=y
3752 +CONFIG_RTC_LIB=y
3753 +CONFIG_RTC_CLASS=y
3754 +CONFIG_RTC_HCTOSYS=y
3755 +CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
3756 +# CONFIG_RTC_DEBUG is not set
3757 +
3758 +#
3759 +# RTC interfaces
3760 +#
3761 +CONFIG_RTC_INTF_SYSFS=y
3762 +CONFIG_RTC_INTF_PROC=y
3763 +CONFIG_RTC_INTF_DEV=y
3764 +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
3765 +# CONFIG_RTC_DRV_TEST is not set
3766 +
3767 +#
3768 +# I2C RTC drivers
3769 +#
3770 +# CONFIG_RTC_DRV_DS1307 is not set
3771 +# CONFIG_RTC_DRV_DS1374 is not set
3772 +# CONFIG_RTC_DRV_DS1672 is not set
3773 +# CONFIG_RTC_DRV_MAX6900 is not set
3774 +# CONFIG_RTC_DRV_RS5C372 is not set
3775 +# CONFIG_RTC_DRV_ISL1208 is not set
3776 +# CONFIG_RTC_DRV_X1205 is not set
3777 +# CONFIG_RTC_DRV_PCF8563 is not set
3778 +# CONFIG_RTC_DRV_PCF8583 is not set
3779 +# CONFIG_RTC_DRV_M41T80 is not set
3780 +
3781 +#
3782 +# SPI RTC drivers
3783 +#
3784 +# CONFIG_RTC_DRV_RS5C348 is not set
3785 +# CONFIG_RTC_DRV_MAX6902 is not set
3786 +
3787 +#
3788 +# Platform RTC drivers
3789 +#
3790 +# CONFIG_RTC_DRV_DS1553 is not set
3791 +# CONFIG_RTC_DRV_STK17TA8 is not set
3792 +# CONFIG_RTC_DRV_DS1742 is not set
3793 +# CONFIG_RTC_DRV_M48T86 is not set
3794 +# CONFIG_RTC_DRV_M48T59 is not set
3795 +# CONFIG_RTC_DRV_V3020 is not set
3796 +
3797 +#
3798 +# on-CPU RTC drivers
3799 +#
3800 +CONFIG_RTC_DRV_AT32AP700X=y
3801 +
3802 +#
3803 +# Userspace I/O
3804 +#
3805 +CONFIG_UIO=m
3806 +
3807 +#
3808 +# File systems
3809 +#
3810 +CONFIG_EXT2_FS=m
3811 +# CONFIG_EXT2_FS_XATTR is not set
3812 +# CONFIG_EXT2_FS_XIP is not set
3813 +CONFIG_EXT3_FS=m
3814 +# CONFIG_EXT3_FS_XATTR is not set
3815 +# CONFIG_EXT4DEV_FS is not set
3816 +CONFIG_JBD=m
3817 +# CONFIG_JBD_DEBUG is not set
3818 +# CONFIG_REISERFS_FS is not set
3819 +# CONFIG_JFS_FS is not set
3820 +# CONFIG_FS_POSIX_ACL is not set
3821 +# CONFIG_XFS_FS is not set
3822 +# CONFIG_GFS2_FS is not set
3823 +# CONFIG_OCFS2_FS is not set
3824 +# CONFIG_MINIX_FS is not set
3825 +# CONFIG_ROMFS_FS is not set
3826 +CONFIG_INOTIFY=y
3827 +CONFIG_INOTIFY_USER=y
3828 +# CONFIG_QUOTA is not set
3829 +# CONFIG_DNOTIFY is not set
3830 +# CONFIG_AUTOFS_FS is not set
3831 +# CONFIG_AUTOFS4_FS is not set
3832 +CONFIG_FUSE_FS=m
3833 +
3834 +#
3835 +# CD-ROM/DVD Filesystems
3836 +#
3837 +# CONFIG_ISO9660_FS is not set
3838 +# CONFIG_UDF_FS is not set
3839 +
3840 +#
3841 +# DOS/FAT/NT Filesystems
3842 +#
3843 +CONFIG_FAT_FS=m
3844 +CONFIG_MSDOS_FS=m
3845 +CONFIG_VFAT_FS=m
3846 +CONFIG_FAT_DEFAULT_CODEPAGE=437
3847 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
3848 +# CONFIG_NTFS_FS is not set
3849 +
3850 +#
3851 +# Pseudo filesystems
3852 +#
3853 +CONFIG_PROC_FS=y
3854 +CONFIG_PROC_KCORE=y
3855 +CONFIG_PROC_SYSCTL=y
3856 +CONFIG_SYSFS=y
3857 +CONFIG_TMPFS=y
3858 +# CONFIG_TMPFS_POSIX_ACL is not set
3859 +# CONFIG_HUGETLB_PAGE is not set
3860 +CONFIG_CONFIGFS_FS=y
3861 +
3862 +#
3863 +# Miscellaneous filesystems
3864 +#
3865 +# CONFIG_ADFS_FS is not set
3866 +# CONFIG_AFFS_FS is not set
3867 +# CONFIG_HFS_FS is not set
3868 +# CONFIG_HFSPLUS_FS is not set
3869 +# CONFIG_BEFS_FS is not set
3870 +# CONFIG_BFS_FS is not set
3871 +# CONFIG_EFS_FS is not set
3872 +CONFIG_JFFS2_FS=y
3873 +CONFIG_JFFS2_FS_DEBUG=0
3874 +CONFIG_JFFS2_FS_WRITEBUFFER=y
3875 +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
3876 +# CONFIG_JFFS2_SUMMARY is not set
3877 +# CONFIG_JFFS2_FS_XATTR is not set
3878 +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
3879 +CONFIG_JFFS2_ZLIB=y
3880 +# CONFIG_JFFS2_LZO is not set
3881 +CONFIG_JFFS2_RTIME=y
3882 +# CONFIG_JFFS2_RUBIN is not set
3883 +# CONFIG_CRAMFS is not set
3884 +# CONFIG_VXFS_FS is not set
3885 +# CONFIG_HPFS_FS is not set
3886 +# CONFIG_QNX4FS_FS is not set
3887 +# CONFIG_SYSV_FS is not set
3888 +# CONFIG_UFS_FS is not set
3889 +# CONFIG_NETWORK_FILESYSTEMS is not set
3890 +
3891 +#
3892 +# Partition Types
3893 +#
3894 +# CONFIG_PARTITION_ADVANCED is not set
3895 +CONFIG_MSDOS_PARTITION=y
3896 +CONFIG_NLS=m
3897 +CONFIG_NLS_DEFAULT="iso8859-1"
3898 +CONFIG_NLS_CODEPAGE_437=m
3899 +# CONFIG_NLS_CODEPAGE_737 is not set
3900 +# CONFIG_NLS_CODEPAGE_775 is not set
3901 +# CONFIG_NLS_CODEPAGE_850 is not set
3902 +# CONFIG_NLS_CODEPAGE_852 is not set
3903 +# CONFIG_NLS_CODEPAGE_855 is not set
3904 +# CONFIG_NLS_CODEPAGE_857 is not set
3905 +# CONFIG_NLS_CODEPAGE_860 is not set
3906 +# CONFIG_NLS_CODEPAGE_861 is not set
3907 +# CONFIG_NLS_CODEPAGE_862 is not set
3908 +# CONFIG_NLS_CODEPAGE_863 is not set
3909 +# CONFIG_NLS_CODEPAGE_864 is not set
3910 +# CONFIG_NLS_CODEPAGE_865 is not set
3911 +# CONFIG_NLS_CODEPAGE_866 is not set
3912 +# CONFIG_NLS_CODEPAGE_869 is not set
3913 +# CONFIG_NLS_CODEPAGE_936 is not set
3914 +# CONFIG_NLS_CODEPAGE_950 is not set
3915 +# CONFIG_NLS_CODEPAGE_932 is not set
3916 +# CONFIG_NLS_CODEPAGE_949 is not set
3917 +# CONFIG_NLS_CODEPAGE_874 is not set
3918 +# CONFIG_NLS_ISO8859_8 is not set
3919 +# CONFIG_NLS_CODEPAGE_1250 is not set
3920 +# CONFIG_NLS_CODEPAGE_1251 is not set
3921 +# CONFIG_NLS_ASCII is not set
3922 +CONFIG_NLS_ISO8859_1=m
3923 +# CONFIG_NLS_ISO8859_2 is not set
3924 +# CONFIG_NLS_ISO8859_3 is not set
3925 +# CONFIG_NLS_ISO8859_4 is not set
3926 +# CONFIG_NLS_ISO8859_5 is not set
3927 +# CONFIG_NLS_ISO8859_6 is not set
3928 +# CONFIG_NLS_ISO8859_7 is not set
3929 +# CONFIG_NLS_ISO8859_9 is not set
3930 +# CONFIG_NLS_ISO8859_13 is not set
3931 +# CONFIG_NLS_ISO8859_14 is not set
3932 +# CONFIG_NLS_ISO8859_15 is not set
3933 +# CONFIG_NLS_KOI8_R is not set
3934 +# CONFIG_NLS_KOI8_U is not set
3935 +CONFIG_NLS_UTF8=m
3936 +# CONFIG_DLM is not set
3937 +CONFIG_INSTRUMENTATION=y
3938 +CONFIG_PROFILING=y
3939 +CONFIG_OPROFILE=m
3940 +CONFIG_KPROBES=y
3941 +# CONFIG_MARKERS is not set
3942 +
3943 +#
3944 +# Kernel hacking
3945 +#
3946 +# CONFIG_PRINTK_TIME is not set
3947 +CONFIG_ENABLE_WARN_DEPRECATED=y
3948 +CONFIG_ENABLE_MUST_CHECK=y
3949 +CONFIG_MAGIC_SYSRQ=y
3950 +# CONFIG_UNUSED_SYMBOLS is not set
3951 +CONFIG_DEBUG_FS=y
3952 +# CONFIG_HEADERS_CHECK is not set
3953 +CONFIG_DEBUG_KERNEL=y
3954 +# CONFIG_DEBUG_SHIRQ is not set
3955 +CONFIG_DETECT_SOFTLOCKUP=y
3956 +CONFIG_SCHED_DEBUG=y
3957 +# CONFIG_SCHEDSTATS is not set
3958 +# CONFIG_TIMER_STATS is not set
3959 +# CONFIG_DEBUG_RT_MUTEXES is not set
3960 +# CONFIG_RT_MUTEX_TESTER is not set
3961 +# CONFIG_DEBUG_SPINLOCK is not set
3962 +# CONFIG_DEBUG_MUTEXES is not set
3963 +# CONFIG_DEBUG_LOCK_ALLOC is not set
3964 +# CONFIG_PROVE_LOCKING is not set
3965 +# CONFIG_LOCK_STAT is not set
3966 +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
3967 +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
3968 +# CONFIG_DEBUG_KOBJECT is not set
3969 +CONFIG_DEBUG_BUGVERBOSE=y
3970 +# CONFIG_DEBUG_INFO is not set
3971 +# CONFIG_DEBUG_VM is not set
3972 +# CONFIG_DEBUG_LIST is not set
3973 +# CONFIG_DEBUG_SG is not set
3974 +CONFIG_FRAME_POINTER=y
3975 +CONFIG_FORCED_INLINING=y
3976 +# CONFIG_BOOT_PRINTK_DELAY is not set
3977 +# CONFIG_RCU_TORTURE_TEST is not set
3978 +# CONFIG_LKDTM is not set
3979 +# CONFIG_FAULT_INJECTION is not set
3980 +# CONFIG_SAMPLES is not set
3981 +
3982 +#
3983 +# Security options
3984 +#
3985 +# CONFIG_KEYS is not set
3986 +# CONFIG_SECURITY is not set
3987 +# CONFIG_SECURITY_FILE_CAPABILITIES is not set
3988 +# CONFIG_CRYPTO is not set
3989 +
3990 +#
3991 +# Library routines
3992 +#
3993 +CONFIG_BITREVERSE=y
3994 +CONFIG_CRC_CCITT=m
3995 +# CONFIG_CRC16 is not set
3996 +CONFIG_CRC_ITU_T=m
3997 +CONFIG_CRC32=y
3998 +CONFIG_CRC7=m
3999 +# CONFIG_LIBCRC32C is not set
4000 +CONFIG_AUDIT_GENERIC=y
4001 +CONFIG_ZLIB_INFLATE=y
4002 +CONFIG_ZLIB_DEFLATE=y
4003 +CONFIG_PLIST=y
4004 +CONFIG_HAS_IOMEM=y
4005 +CONFIG_HAS_IOPORT=y
4006 +CONFIG_HAS_DMA=y
4007 diff -urN linux-2.6.24.3/arch/avr32/configs/atstk1004_defconfig avr32-2.6/arch/avr32/configs/atstk1004_defconfig
4008 --- linux-2.6.24.3/arch/avr32/configs/atstk1004_defconfig 1970-01-01 01:00:00.000000000 +0100
4009 +++ avr32-2.6/arch/avr32/configs/atstk1004_defconfig 2008-04-23 20:12:35.000000000 +0200
4010 @@ -0,0 +1,639 @@
4011 +#
4012 +# Automatically generated make config: don't edit
4013 +# Linux kernel version: 2.6.24
4014 +# Thu Mar 6 12:51:05 2008
4015 +#
4016 +CONFIG_AVR32=y
4017 +CONFIG_GENERIC_GPIO=y
4018 +CONFIG_GENERIC_HARDIRQS=y
4019 +CONFIG_STACKTRACE_SUPPORT=y
4020 +CONFIG_LOCKDEP_SUPPORT=y
4021 +CONFIG_TRACE_IRQFLAGS_SUPPORT=y
4022 +CONFIG_HARDIRQS_SW_RESEND=y
4023 +CONFIG_GENERIC_IRQ_PROBE=y
4024 +CONFIG_RWSEM_GENERIC_SPINLOCK=y
4025 +CONFIG_GENERIC_TIME=y
4026 +CONFIG_GENERIC_CLOCKEVENTS=y
4027 +# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
4028 +# CONFIG_ARCH_HAS_ILOG2_U32 is not set
4029 +# CONFIG_ARCH_HAS_ILOG2_U64 is not set
4030 +CONFIG_ARCH_SUPPORTS_OPROFILE=y
4031 +CONFIG_GENERIC_HWEIGHT=y
4032 +CONFIG_GENERIC_CALIBRATE_DELAY=y
4033 +CONFIG_GENERIC_BUG=y
4034 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
4035 +
4036 +#
4037 +# General setup
4038 +#
4039 +CONFIG_EXPERIMENTAL=y
4040 +CONFIG_BROKEN_ON_SMP=y
4041 +CONFIG_INIT_ENV_ARG_LIMIT=32
4042 +CONFIG_LOCALVERSION=""
4043 +# CONFIG_LOCALVERSION_AUTO is not set
4044 +# CONFIG_SYSVIPC is not set
4045 +# CONFIG_POSIX_MQUEUE is not set
4046 +# CONFIG_BSD_PROCESS_ACCT is not set
4047 +# CONFIG_TASKSTATS is not set
4048 +# CONFIG_USER_NS is not set
4049 +# CONFIG_PID_NS is not set
4050 +# CONFIG_AUDIT is not set
4051 +# CONFIG_IKCONFIG is not set
4052 +CONFIG_LOG_BUF_SHIFT=14
4053 +# CONFIG_CGROUPS is not set
4054 +# CONFIG_FAIR_GROUP_SCHED is not set
4055 +CONFIG_SYSFS_DEPRECATED=y
4056 +# CONFIG_RELAY is not set
4057 +# CONFIG_BLK_DEV_INITRD is not set
4058 +CONFIG_CC_OPTIMIZE_FOR_SIZE=y
4059 +CONFIG_SYSCTL=y
4060 +CONFIG_EMBEDDED=y
4061 +# CONFIG_SYSCTL_SYSCALL is not set
4062 +CONFIG_KALLSYMS=y
4063 +# CONFIG_KALLSYMS_EXTRA_PASS is not set
4064 +CONFIG_HOTPLUG=y
4065 +CONFIG_PRINTK=y
4066 +CONFIG_BUG=y
4067 +CONFIG_ELF_CORE=y
4068 +# CONFIG_BASE_FULL is not set
4069 +# CONFIG_FUTEX is not set
4070 +# CONFIG_EPOLL is not set
4071 +# CONFIG_SIGNALFD is not set
4072 +# CONFIG_EVENTFD is not set
4073 +CONFIG_SHMEM=y
4074 +CONFIG_VM_EVENT_COUNTERS=y
4075 +# CONFIG_SLAB is not set
4076 +# CONFIG_SLUB is not set
4077 +CONFIG_SLOB=y
4078 +# CONFIG_TINY_SHMEM is not set
4079 +CONFIG_BASE_SMALL=1
4080 +# CONFIG_MODULES is not set
4081 +# CONFIG_BLOCK is not set
4082 +
4083 +#
4084 +# System Type and features
4085 +#
4086 +CONFIG_TICK_ONESHOT=y
4087 +CONFIG_NO_HZ=y
4088 +CONFIG_HIGH_RES_TIMERS=y
4089 +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
4090 +CONFIG_SUBARCH_AVR32B=y
4091 +CONFIG_MMU=y
4092 +CONFIG_PERFORMANCE_COUNTERS=y
4093 +CONFIG_PLATFORM_AT32AP=y
4094 +CONFIG_CPU_AT32AP700X=y
4095 +CONFIG_CPU_AT32AP7002=y
4096 +CONFIG_BOARD_ATSTK1000=y
4097 +# CONFIG_BOARD_ATNGW100 is not set
4098 +# CONFIG_BOARD_ATSTK1002 is not set
4099 +# CONFIG_BOARD_ATSTK1003 is not set
4100 +CONFIG_BOARD_ATSTK1004=y
4101 +# CONFIG_BOARD_ATSTK100X_CUSTOM is not set
4102 +# CONFIG_BOARD_ATSTK100X_SPI1 is not set
4103 +# CONFIG_BOARD_ATSTK1000_J2_LED is not set
4104 +CONFIG_BOARD_ATSTK1000_EXTDAC=y
4105 +# CONFIG_BOARD_ATSTK100X_ENABLE_AC97 is not set
4106 +# CONFIG_BOARD_ATSTK1000_CF_HACKS is not set
4107 +# CONFIG_BOARD_ATSTK100X_ENABLE_PSIF is not set
4108 +CONFIG_LOADER_U_BOOT=y
4109 +
4110 +#
4111 +# Atmel AVR32 AP options
4112 +#
4113 +# CONFIG_AP700X_32_BIT_SMC is not set
4114 +CONFIG_AP700X_16_BIT_SMC=y
4115 +# CONFIG_AP700X_8_BIT_SMC is not set
4116 +# CONFIG_GPIO_DEV is not set
4117 +CONFIG_LOAD_ADDRESS=0x10000000
4118 +CONFIG_ENTRY_ADDRESS=0x90000000
4119 +CONFIG_PHYS_OFFSET=0x10000000
4120 +CONFIG_PREEMPT_NONE=y
4121 +# CONFIG_PREEMPT_VOLUNTARY is not set
4122 +# CONFIG_PREEMPT is not set
4123 +# CONFIG_HAVE_ARCH_BOOTMEM_NODE is not set
4124 +# CONFIG_ARCH_HAVE_MEMORY_PRESENT is not set
4125 +# CONFIG_NEED_NODE_MEMMAP_SIZE is not set
4126 +CONFIG_ARCH_FLATMEM_ENABLE=y
4127 +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
4128 +# CONFIG_ARCH_SPARSEMEM_ENABLE is not set
4129 +CONFIG_SELECT_MEMORY_MODEL=y
4130 +CONFIG_FLATMEM_MANUAL=y
4131 +# CONFIG_DISCONTIGMEM_MANUAL is not set
4132 +# CONFIG_SPARSEMEM_MANUAL is not set
4133 +CONFIG_FLATMEM=y
4134 +CONFIG_FLAT_NODE_MEM_MAP=y
4135 +# CONFIG_SPARSEMEM_STATIC is not set
4136 +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
4137 +CONFIG_SPLIT_PTLOCK_CPUS=4
4138 +# CONFIG_RESOURCES_64BIT is not set
4139 +CONFIG_ZONE_DMA_FLAG=0
4140 +CONFIG_VIRT_TO_BUS=y
4141 +# CONFIG_OWNERSHIP_TRACE is not set
4142 +# CONFIG_NMI_DEBUGGING is not set
4143 +# CONFIG_DW_DMAC is not set
4144 +# CONFIG_HZ_100 is not set
4145 +CONFIG_HZ_250=y
4146 +# CONFIG_HZ_300 is not set
4147 +# CONFIG_HZ_1000 is not set
4148 +CONFIG_HZ=250
4149 +CONFIG_CMDLINE=""
4150 +
4151 +#
4152 +# Power management options
4153 +#
4154 +
4155 +#
4156 +# CPU Frequency scaling
4157 +#
4158 +CONFIG_CPU_FREQ=y
4159 +CONFIG_CPU_FREQ_TABLE=y
4160 +# CONFIG_CPU_FREQ_DEBUG is not set
4161 +# CONFIG_CPU_FREQ_STAT is not set
4162 +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
4163 +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
4164 +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
4165 +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
4166 +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
4167 +# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
4168 +CONFIG_CPU_FREQ_GOV_USERSPACE=y
4169 +CONFIG_CPU_FREQ_GOV_ONDEMAND=y
4170 +# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
4171 +CONFIG_CPU_FREQ_AT32AP=y
4172 +
4173 +#
4174 +# Bus options
4175 +#
4176 +# CONFIG_ARCH_SUPPORTS_MSI is not set
4177 +# CONFIG_PCCARD is not set
4178 +
4179 +#
4180 +# Executable file formats
4181 +#
4182 +CONFIG_BINFMT_ELF=y
4183 +# CONFIG_BINFMT_MISC is not set
4184 +
4185 +#
4186 +# Networking
4187 +#
4188 +CONFIG_NET=y
4189 +
4190 +#
4191 +# Networking options
4192 +#
4193 +CONFIG_PACKET=y
4194 +CONFIG_PACKET_MMAP=y
4195 +CONFIG_UNIX=y
4196 +# CONFIG_NET_KEY is not set
4197 +CONFIG_INET=y
4198 +# CONFIG_IP_MULTICAST is not set
4199 +# CONFIG_IP_ADVANCED_ROUTER is not set
4200 +CONFIG_IP_FIB_HASH=y
4201 +# CONFIG_IP_PNP is not set
4202 +# CONFIG_NET_IPIP is not set
4203 +# CONFIG_NET_IPGRE is not set
4204 +# CONFIG_ARPD is not set
4205 +# CONFIG_SYN_COOKIES is not set
4206 +# CONFIG_INET_AH is not set
4207 +# CONFIG_INET_ESP is not set
4208 +# CONFIG_INET_IPCOMP is not set
4209 +# CONFIG_INET_XFRM_TUNNEL is not set
4210 +# CONFIG_INET_TUNNEL is not set
4211 +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
4212 +# CONFIG_INET_XFRM_MODE_TUNNEL is not set
4213 +# CONFIG_INET_XFRM_MODE_BEET is not set
4214 +# CONFIG_INET_LRO is not set
4215 +# CONFIG_INET_DIAG is not set
4216 +# CONFIG_TCP_CONG_ADVANCED is not set
4217 +CONFIG_TCP_CONG_CUBIC=y
4218 +CONFIG_DEFAULT_TCP_CONG="cubic"
4219 +# CONFIG_TCP_MD5SIG is not set
4220 +# CONFIG_IPV6 is not set
4221 +# CONFIG_INET6_XFRM_TUNNEL is not set
4222 +# CONFIG_INET6_TUNNEL is not set
4223 +# CONFIG_NETWORK_SECMARK is not set
4224 +# CONFIG_NETFILTER is not set
4225 +# CONFIG_IP_DCCP is not set
4226 +# CONFIG_IP_SCTP is not set
4227 +# CONFIG_TIPC is not set
4228 +# CONFIG_ATM is not set
4229 +# CONFIG_BRIDGE is not set
4230 +# CONFIG_VLAN_8021Q is not set
4231 +# CONFIG_DECNET is not set
4232 +# CONFIG_LLC2 is not set
4233 +# CONFIG_IPX is not set
4234 +# CONFIG_ATALK is not set
4235 +# CONFIG_X25 is not set
4236 +# CONFIG_LAPB is not set
4237 +# CONFIG_ECONET is not set
4238 +# CONFIG_WAN_ROUTER is not set
4239 +# CONFIG_NET_SCHED is not set
4240 +
4241 +#
4242 +# Network testing
4243 +#
4244 +# CONFIG_NET_PKTGEN is not set
4245 +# CONFIG_HAMRADIO is not set
4246 +# CONFIG_IRDA is not set
4247 +# CONFIG_BT is not set
4248 +# CONFIG_AF_RXRPC is not set
4249 +
4250 +#
4251 +# Wireless
4252 +#
4253 +# CONFIG_CFG80211 is not set
4254 +# CONFIG_WIRELESS_EXT is not set
4255 +# CONFIG_MAC80211 is not set
4256 +# CONFIG_IEEE80211 is not set
4257 +# CONFIG_RFKILL is not set
4258 +# CONFIG_NET_9P is not set
4259 +
4260 +#
4261 +# Device Drivers
4262 +#
4263 +
4264 +#
4265 +# Generic Driver Options
4266 +#
4267 +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
4268 +CONFIG_STANDALONE=y
4269 +# CONFIG_PREVENT_FIRMWARE_BUILD is not set
4270 +# CONFIG_FW_LOADER is not set
4271 +# CONFIG_SYS_HYPERVISOR is not set
4272 +# CONFIG_CONNECTOR is not set
4273 +CONFIG_MTD=y
4274 +# CONFIG_MTD_DEBUG is not set
4275 +# CONFIG_MTD_CONCAT is not set
4276 +CONFIG_MTD_PARTITIONS=y
4277 +# CONFIG_MTD_REDBOOT_PARTS is not set
4278 +CONFIG_MTD_CMDLINE_PARTS=y
4279 +
4280 +#
4281 +# User Modules And Translation Layers
4282 +#
4283 +CONFIG_MTD_CHAR=y
4284 +# CONFIG_MTD_OOPS is not set
4285 +
4286 +#
4287 +# RAM/ROM/Flash chip drivers
4288 +#
4289 +CONFIG_MTD_CFI=y
4290 +# CONFIG_MTD_JEDECPROBE is not set
4291 +CONFIG_MTD_GEN_PROBE=y
4292 +# CONFIG_MTD_CFI_ADV_OPTIONS is not set
4293 +CONFIG_MTD_MAP_BANK_WIDTH_1=y
4294 +CONFIG_MTD_MAP_BANK_WIDTH_2=y
4295 +CONFIG_MTD_MAP_BANK_WIDTH_4=y
4296 +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
4297 +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
4298 +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
4299 +CONFIG_MTD_CFI_I1=y
4300 +CONFIG_MTD_CFI_I2=y
4301 +# CONFIG_MTD_CFI_I4 is not set
4302 +# CONFIG_MTD_CFI_I8 is not set
4303 +# CONFIG_MTD_CFI_INTELEXT is not set
4304 +CONFIG_MTD_CFI_AMDSTD=y
4305 +# CONFIG_MTD_CFI_STAA is not set
4306 +CONFIG_MTD_CFI_UTIL=y
4307 +# CONFIG_MTD_RAM is not set
4308 +# CONFIG_MTD_ROM is not set
4309 +# CONFIG_MTD_ABSENT is not set
4310 +
4311 +#
4312 +# Mapping drivers for chip access
4313 +#
4314 +# CONFIG_MTD_COMPLEX_MAPPINGS is not set
4315 +CONFIG_MTD_PHYSMAP=y
4316 +CONFIG_MTD_PHYSMAP_START=0x8000000
4317 +CONFIG_MTD_PHYSMAP_LEN=0x0
4318 +CONFIG_MTD_PHYSMAP_BANKWIDTH=2
4319 +# CONFIG_MTD_PLATRAM is not set
4320 +
4321 +#
4322 +# Self-contained MTD device drivers
4323 +#
4324 +# CONFIG_MTD_DATAFLASH is not set
4325 +# CONFIG_MTD_M25P80 is not set
4326 +# CONFIG_MTD_SLRAM is not set
4327 +# CONFIG_MTD_PHRAM is not set
4328 +# CONFIG_MTD_MTDRAM is not set
4329 +
4330 +#
4331 +# Disk-On-Chip Device Drivers
4332 +#
4333 +# CONFIG_MTD_DOC2000 is not set
4334 +# CONFIG_MTD_DOC2001 is not set
4335 +# CONFIG_MTD_DOC2001PLUS is not set
4336 +# CONFIG_MTD_NAND is not set
4337 +# CONFIG_MTD_ONENAND is not set
4338 +
4339 +#
4340 +# UBI - Unsorted block images
4341 +#
4342 +# CONFIG_MTD_UBI is not set
4343 +# CONFIG_PARPORT is not set
4344 +CONFIG_MISC_DEVICES=y
4345 +# CONFIG_ATMEL_PWM is not set
4346 +CONFIG_ATMEL_TCLIB=y
4347 +CONFIG_ATMEL_TCB_CLKSRC=y
4348 +CONFIG_ATMEL_TCB_CLKSRC_BLOCK=0
4349 +# CONFIG_EEPROM_93CX6 is not set
4350 +# CONFIG_ATMEL_SSC is not set
4351 +
4352 +#
4353 +# SCSI device support
4354 +#
4355 +# CONFIG_SCSI_DMA is not set
4356 +# CONFIG_SCSI_NETLINK is not set
4357 +# CONFIG_NETDEVICES is not set
4358 +# CONFIG_ISDN is not set
4359 +# CONFIG_PHONE is not set
4360 +
4361 +#
4362 +# Input device support
4363 +#
4364 +# CONFIG_INPUT is not set
4365 +
4366 +#
4367 +# Hardware I/O ports
4368 +#
4369 +# CONFIG_SERIO is not set
4370 +# CONFIG_GAMEPORT is not set
4371 +
4372 +#
4373 +# Character devices
4374 +#
4375 +# CONFIG_VT is not set
4376 +# CONFIG_SERIAL_NONSTANDARD is not set
4377 +
4378 +#
4379 +# Serial drivers
4380 +#
4381 +# CONFIG_SERIAL_8250 is not set
4382 +
4383 +#
4384 +# Non-8250 serial port support
4385 +#
4386 +CONFIG_SERIAL_ATMEL=y
4387 +CONFIG_SERIAL_ATMEL_CONSOLE=y
4388 +# CONFIG_SERIAL_ATMEL_PDC is not set
4389 +# CONFIG_SERIAL_ATMEL_TTYAT is not set
4390 +CONFIG_SERIAL_CORE=y
4391 +CONFIG_SERIAL_CORE_CONSOLE=y
4392 +CONFIG_UNIX98_PTYS=y
4393 +# CONFIG_LEGACY_PTYS is not set
4394 +# CONFIG_IPMI_HANDLER is not set
4395 +# CONFIG_HW_RANDOM is not set
4396 +# CONFIG_RTC is not set
4397 +# CONFIG_GEN_RTC is not set
4398 +# CONFIG_R3964 is not set
4399 +# CONFIG_TCG_TPM is not set
4400 +# CONFIG_I2C is not set
4401 +
4402 +#
4403 +# SPI support
4404 +#
4405 +CONFIG_SPI=y
4406 +CONFIG_SPI_MASTER=y
4407 +
4408 +#
4409 +# SPI Master Controller Drivers
4410 +#
4411 +CONFIG_SPI_ATMEL=y
4412 +# CONFIG_SPI_BITBANG is not set
4413 +
4414 +#
4415 +# SPI Protocol Masters
4416 +#
4417 +# CONFIG_SPI_AT25 is not set
4418 +# CONFIG_SPI_SPIDEV is not set
4419 +# CONFIG_SPI_TLE62X0 is not set
4420 +# CONFIG_W1 is not set
4421 +# CONFIG_POWER_SUPPLY is not set
4422 +# CONFIG_HWMON is not set
4423 +CONFIG_WATCHDOG=y
4424 +# CONFIG_WATCHDOG_NOWAYOUT is not set
4425 +
4426 +#
4427 +# Watchdog Device Drivers
4428 +#
4429 +# CONFIG_SOFT_WATCHDOG is not set
4430 +CONFIG_AT32AP700X_WDT=y
4431 +
4432 +#
4433 +# Sonics Silicon Backplane
4434 +#
4435 +CONFIG_SSB_POSSIBLE=y
4436 +# CONFIG_SSB is not set
4437 +
4438 +#
4439 +# Multifunction device drivers
4440 +#
4441 +# CONFIG_MFD_SM501 is not set
4442 +
4443 +#
4444 +# Multimedia devices
4445 +#
4446 +# CONFIG_VIDEO_DEV is not set
4447 +# CONFIG_DVB_CORE is not set
4448 +# CONFIG_DAB is not set
4449 +
4450 +#
4451 +# Graphics support
4452 +#
4453 +# CONFIG_VGASTATE is not set
4454 +# CONFIG_VIDEO_OUTPUT_CONTROL is not set
4455 +CONFIG_FB=y
4456 +# CONFIG_FIRMWARE_EDID is not set
4457 +# CONFIG_FB_DDC is not set
4458 +CONFIG_FB_CFB_FILLRECT=y
4459 +CONFIG_FB_CFB_COPYAREA=y
4460 +CONFIG_FB_CFB_IMAGEBLIT=y
4461 +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
4462 +# CONFIG_FB_SYS_FILLRECT is not set
4463 +# CONFIG_FB_SYS_COPYAREA is not set
4464 +# CONFIG_FB_SYS_IMAGEBLIT is not set
4465 +# CONFIG_FB_SYS_FOPS is not set
4466 +CONFIG_FB_DEFERRED_IO=y
4467 +# CONFIG_FB_SVGALIB is not set
4468 +# CONFIG_FB_MACMODES is not set
4469 +# CONFIG_FB_BACKLIGHT is not set
4470 +# CONFIG_FB_MODE_HELPERS is not set
4471 +# CONFIG_FB_TILEBLITTING is not set
4472 +
4473 +#
4474 +# Frame buffer hardware drivers
4475 +#
4476 +# CONFIG_FB_S1D13XXX is not set
4477 +CONFIG_FB_ATMEL=y
4478 +# CONFIG_FB_VIRTUAL is not set
4479 +CONFIG_BACKLIGHT_LCD_SUPPORT=y
4480 +CONFIG_LCD_CLASS_DEVICE=y
4481 +CONFIG_LCD_LTV350QV=y
4482 +# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
4483 +
4484 +#
4485 +# Display device support
4486 +#
4487 +# CONFIG_DISPLAY_SUPPORT is not set
4488 +# CONFIG_LOGO is not set
4489 +
4490 +#
4491 +# Sound
4492 +#
4493 +# CONFIG_SOUND is not set
4494 +CONFIG_USB_SUPPORT=y
4495 +# CONFIG_USB_ARCH_HAS_HCD is not set
4496 +# CONFIG_USB_ARCH_HAS_OHCI is not set
4497 +# CONFIG_USB_ARCH_HAS_EHCI is not set
4498 +
4499 +#
4500 +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
4501 +#
4502 +
4503 +#
4504 +# USB Gadget Support
4505 +#
4506 +CONFIG_USB_GADGET=y
4507 +# CONFIG_USB_GADGET_DEBUG_FILES is not set
4508 +CONFIG_USB_GADGET_SELECTED=y
4509 +# CONFIG_USB_GADGET_AMD5536UDC is not set
4510 +CONFIG_USB_GADGET_ATMEL_USBA=y
4511 +CONFIG_USB_ATMEL_USBA=y
4512 +# CONFIG_USB_GADGET_FSL_USB2 is not set
4513 +# CONFIG_USB_GADGET_NET2280 is not set
4514 +# CONFIG_USB_GADGET_PXA2XX is not set
4515 +# CONFIG_USB_GADGET_M66592 is not set
4516 +# CONFIG_USB_GADGET_GOKU is not set
4517 +# CONFIG_USB_GADGET_LH7A40X is not set
4518 +# CONFIG_USB_GADGET_OMAP is not set
4519 +# CONFIG_USB_GADGET_S3C2410 is not set
4520 +# CONFIG_USB_GADGET_AT91 is not set
4521 +# CONFIG_USB_GADGET_DUMMY_HCD is not set
4522 +CONFIG_USB_GADGET_DUALSPEED=y
4523 +# CONFIG_USB_ZERO is not set
4524 +CONFIG_USB_ETH=y
4525 +# CONFIG_USB_ETH_RNDIS is not set
4526 +# CONFIG_USB_GADGETFS is not set
4527 +# CONFIG_USB_FILE_STORAGE is not set
4528 +# CONFIG_USB_G_SERIAL is not set
4529 +# CONFIG_USB_MIDI_GADGET is not set
4530 +# CONFIG_MMC is not set
4531 +# CONFIG_NEW_LEDS is not set
4532 +CONFIG_RTC_LIB=y
4533 +CONFIG_RTC_CLASS=y
4534 +CONFIG_RTC_HCTOSYS=y
4535 +CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
4536 +# CONFIG_RTC_DEBUG is not set
4537 +
4538 +#
4539 +# RTC interfaces
4540 +#
4541 +CONFIG_RTC_INTF_SYSFS=y
4542 +# CONFIG_RTC_INTF_PROC is not set
4543 +CONFIG_RTC_INTF_DEV=y
4544 +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
4545 +# CONFIG_RTC_DRV_TEST is not set
4546 +
4547 +#
4548 +# SPI RTC drivers
4549 +#
4550 +# CONFIG_RTC_DRV_RS5C348 is not set
4551 +# CONFIG_RTC_DRV_MAX6902 is not set
4552 +
4553 +#
4554 +# Platform RTC drivers
4555 +#
4556 +# CONFIG_RTC_DRV_DS1553 is not set
4557 +# CONFIG_RTC_DRV_STK17TA8 is not set
4558 +# CONFIG_RTC_DRV_DS1742 is not set
4559 +# CONFIG_RTC_DRV_M48T86 is not set
4560 +# CONFIG_RTC_DRV_M48T59 is not set
4561 +# CONFIG_RTC_DRV_V3020 is not set
4562 +
4563 +#
4564 +# on-CPU RTC drivers
4565 +#
4566 +CONFIG_RTC_DRV_AT32AP700X=y
4567 +
4568 +#
4569 +# Userspace I/O
4570 +#
4571 +# CONFIG_UIO is not set
4572 +
4573 +#
4574 +# File systems
4575 +#
4576 +# CONFIG_INOTIFY is not set
4577 +# CONFIG_QUOTA is not set
4578 +# CONFIG_DNOTIFY is not set
4579 +# CONFIG_AUTOFS_FS is not set
4580 +# CONFIG_AUTOFS4_FS is not set
4581 +# CONFIG_FUSE_FS is not set
4582 +
4583 +#
4584 +# Pseudo filesystems
4585 +#
4586 +CONFIG_PROC_FS=y
4587 +CONFIG_PROC_KCORE=y
4588 +CONFIG_PROC_SYSCTL=y
4589 +CONFIG_SYSFS=y
4590 +CONFIG_TMPFS=y
4591 +# CONFIG_TMPFS_POSIX_ACL is not set
4592 +# CONFIG_HUGETLB_PAGE is not set
4593 +# CONFIG_CONFIGFS_FS is not set
4594 +
4595 +#
4596 +# Miscellaneous filesystems
4597 +#
4598 +CONFIG_JFFS2_FS=y
4599 +CONFIG_JFFS2_FS_DEBUG=0
4600 +# CONFIG_JFFS2_FS_WRITEBUFFER is not set
4601 +# CONFIG_JFFS2_SUMMARY is not set
4602 +# CONFIG_JFFS2_FS_XATTR is not set
4603 +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
4604 +CONFIG_JFFS2_ZLIB=y
4605 +# CONFIG_JFFS2_LZO is not set
4606 +CONFIG_JFFS2_RTIME=y
4607 +# CONFIG_JFFS2_RUBIN is not set
4608 +# CONFIG_NETWORK_FILESYSTEMS is not set
4609 +# CONFIG_NLS is not set
4610 +# CONFIG_DLM is not set
4611 +# CONFIG_INSTRUMENTATION is not set
4612 +
4613 +#
4614 +# Kernel hacking
4615 +#
4616 +# CONFIG_PRINTK_TIME is not set
4617 +CONFIG_ENABLE_WARN_DEPRECATED=y
4618 +CONFIG_ENABLE_MUST_CHECK=y
4619 +CONFIG_MAGIC_SYSRQ=y
4620 +# CONFIG_UNUSED_SYMBOLS is not set
4621 +# CONFIG_DEBUG_FS is not set
4622 +# CONFIG_HEADERS_CHECK is not set
4623 +# CONFIG_DEBUG_KERNEL is not set
4624 +# CONFIG_DEBUG_BUGVERBOSE is not set
4625 +# CONFIG_SAMPLES is not set
4626 +
4627 +#
4628 +# Security options
4629 +#
4630 +# CONFIG_KEYS is not set
4631 +# CONFIG_SECURITY is not set
4632 +# CONFIG_SECURITY_FILE_CAPABILITIES is not set
4633 +# CONFIG_CRYPTO is not set
4634 +
4635 +#
4636 +# Library routines
4637 +#
4638 +CONFIG_BITREVERSE=y
4639 +# CONFIG_CRC_CCITT is not set
4640 +# CONFIG_CRC16 is not set
4641 +# CONFIG_CRC_ITU_T is not set
4642 +CONFIG_CRC32=y
4643 +# CONFIG_CRC7 is not set
4644 +# CONFIG_LIBCRC32C is not set
4645 +CONFIG_ZLIB_INFLATE=y
4646 +CONFIG_ZLIB_DEFLATE=y
4647 +CONFIG_HAS_IOMEM=y
4648 +CONFIG_HAS_IOPORT=y
4649 +CONFIG_HAS_DMA=y
4650 diff -urN linux-2.6.24.3/arch/avr32/drivers/dw-dmac.c avr32-2.6/arch/avr32/drivers/dw-dmac.c
4651 --- linux-2.6.24.3/arch/avr32/drivers/dw-dmac.c 1970-01-01 01:00:00.000000000 +0100
4652 +++ avr32-2.6/arch/avr32/drivers/dw-dmac.c 2008-04-23 19:33:28.000000000 +0200
4653 @@ -0,0 +1,761 @@
4654 +/*
4655 + * Driver for the Synopsys DesignWare DMA Controller
4656 + *
4657 + * Copyright (C) 2005-2006 Atmel Corporation
4658 + *
4659 + * This program is free software; you can redistribute it and/or modify
4660 + * it under the terms of the GNU General Public License version 2 as
4661 + * published by the Free Software Foundation.
4662 + */
4663 +#include <linux/clk.h>
4664 +#include <linux/device.h>
4665 +#include <linux/dma-mapping.h>
4666 +#include <linux/dmapool.h>
4667 +#include <linux/init.h>
4668 +#include <linux/interrupt.h>
4669 +#include <linux/module.h>
4670 +#include <linux/platform_device.h>
4671 +
4672 +#include <asm/dma-controller.h>
4673 +#include <asm/io.h>
4674 +
4675 +#include "dw-dmac.h"
4676 +
4677 +#define DMAC_NR_CHANNELS 3
4678 +#define DMAC_MAX_BLOCKSIZE 4095
4679 +
4680 +enum {
4681 + CH_STATE_FREE = 0,
4682 + CH_STATE_ALLOCATED,
4683 + CH_STATE_BUSY,
4684 +};
4685 +
4686 +struct dw_dma_lli {
4687 + dma_addr_t sar;
4688 + dma_addr_t dar;
4689 + dma_addr_t llp;
4690 + u32 ctllo;
4691 + u32 ctlhi;
4692 + u32 sstat;
4693 + u32 dstat;
4694 +};
4695 +
4696 +struct dw_dma_block {
4697 + struct dw_dma_lli *lli_vaddr;
4698 + dma_addr_t lli_dma_addr;
4699 +};
4700 +
4701 +struct dw_dma_channel {
4702 + unsigned int state;
4703 + int is_cyclic;
4704 + struct dma_request_sg *req_sg;
4705 + struct dma_request_cyclic *req_cyclic;
4706 + unsigned int nr_blocks;
4707 + int direction;
4708 + struct dw_dma_block *block;
4709 +};
4710 +
4711 +struct dw_dma_controller {
4712 + spinlock_t lock;
4713 + void * __iomem regs;
4714 + struct dma_pool *lli_pool;
4715 + struct clk *hclk;
4716 + struct dma_controller dma;
4717 + struct dw_dma_channel channel[DMAC_NR_CHANNELS];
4718 +};
4719 +#define to_dw_dmac(dmac) container_of(dmac, struct dw_dma_controller, dma)
4720 +
4721 +#define dmac_writel_hi(dmac, reg, value) \
4722 + __raw_writel((value), (dmac)->regs + DW_DMAC_##reg + 4)
4723 +#define dmac_readl_hi(dmac, reg) \
4724 + __raw_readl((dmac)->regs + DW_DMAC_##reg + 4)
4725 +#define dmac_writel_lo(dmac, reg, value) \
4726 + __raw_writel((value), (dmac)->regs + DW_DMAC_##reg)
4727 +#define dmac_readl_lo(dmac, reg) \
4728 + __raw_readl((dmac)->regs + DW_DMAC_##reg)
4729 +#define dmac_chan_writel_hi(dmac, chan, reg, value) \
4730 + __raw_writel((value), ((dmac)->regs + 0x58 * (chan) \
4731 + + DW_DMAC_CHAN_##reg + 4))
4732 +#define dmac_chan_readl_hi(dmac, chan, reg) \
4733 + __raw_readl((dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg + 4)
4734 +#define dmac_chan_writel_lo(dmac, chan, reg, value) \
4735 + __raw_writel((value), (dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg)
4736 +#define dmac_chan_readl_lo(dmac, chan, reg) \
4737 + __raw_readl((dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg)
4738 +#define set_channel_bit(dmac, reg, chan) \
4739 + dmac_writel_lo(dmac, reg, (1 << (chan)) | (1 << ((chan) + 8)))
4740 +#define clear_channel_bit(dmac, reg, chan) \
4741 + dmac_writel_lo(dmac, reg, (0 << (chan)) | (1 << ((chan) + 8)))
4742 +
4743 +static int dmac_alloc_channel(struct dma_controller *_dmac)
4744 +{
4745 + struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
4746 + struct dw_dma_channel *chan;
4747 + unsigned long flags;
4748 + int i;
4749 +
4750 + spin_lock_irqsave(&dmac->lock, flags);
4751 + for (i = 0; i < DMAC_NR_CHANNELS; i++)
4752 + if (dmac->channel[i].state == CH_STATE_FREE)
4753 + break;
4754 +
4755 + if (i < DMAC_NR_CHANNELS) {
4756 + chan = &dmac->channel[i];
4757 + chan->state = CH_STATE_ALLOCATED;
4758 + } else {
4759 + i = -EBUSY;
4760 + }
4761 +
4762 + spin_unlock_irqrestore(&dmac->lock, flags);
4763 +
4764 + return i;
4765 +}
4766 +
4767 +static void dmac_release_channel(struct dma_controller *_dmac, int channel)
4768 +{
4769 + struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
4770 +
4771 + BUG_ON(channel >= DMAC_NR_CHANNELS
4772 + || dmac->channel[channel].state != CH_STATE_ALLOCATED);
4773 +
4774 + dmac->channel[channel].state = CH_STATE_FREE;
4775 +}
4776 +
4777 +static struct dw_dma_block *allocate_blocks(struct dw_dma_controller *dmac,
4778 + unsigned int nr_blocks)
4779 +{
4780 + struct dw_dma_block *block;
4781 + void *p;
4782 + unsigned int i;
4783 +
4784 + block = kmalloc(nr_blocks * sizeof(*block),
4785 + GFP_KERNEL);
4786 + if (unlikely(!block))
4787 + return NULL;
4788 +
4789 + for (i = 0; i < nr_blocks; i++) {
4790 + p = dma_pool_alloc(dmac->lli_pool, GFP_KERNEL,
4791 + &block[i].lli_dma_addr);
4792 + block[i].lli_vaddr = p;
4793 + if (unlikely(!p))
4794 + goto fail;
4795 + }
4796 +
4797 + return block;
4798 +
4799 +fail:
4800 + for (i = 0; i < nr_blocks; i++) {
4801 + if (!block[i].lli_vaddr)
4802 + break;
4803 + dma_pool_free(dmac->lli_pool, block[i].lli_vaddr,
4804 + block[i].lli_dma_addr);
4805 + }
4806 + kfree(block);
4807 + return NULL;
4808 +}
4809 +
4810 +static void cleanup_channel(struct dw_dma_controller *dmac,
4811 + struct dw_dma_channel *chan)
4812 +{
4813 + unsigned int i;
4814 +
4815 + if (chan->nr_blocks > 1) {
4816 + for (i = 0; i < chan->nr_blocks; i++)
4817 + dma_pool_free(dmac->lli_pool, chan->block[i].lli_vaddr,
4818 + chan->block[i].lli_dma_addr);
4819 + kfree(chan->block);
4820 + }
4821 +
4822 + chan->state = CH_STATE_ALLOCATED;
4823 +}
4824 +
4825 +static int dmac_prepare_request_sg(struct dma_controller *_dmac,
4826 + struct dma_request_sg *req)
4827 +{
4828 + struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
4829 + struct dw_dma_channel *chan;
4830 + unsigned long ctlhi, ctllo, cfghi, cfglo;
4831 + unsigned long block_size;
4832 + unsigned int nr_blocks;
4833 + int ret, i, direction;
4834 + unsigned long flags;
4835 +
4836 + spin_lock_irqsave(&dmac->lock, flags);
4837 +
4838 + ret = -EINVAL;
4839 + if (req->req.channel >= DMAC_NR_CHANNELS
4840 + || dmac->channel[req->req.channel].state != CH_STATE_ALLOCATED
4841 + || req->block_size > DMAC_MAX_BLOCKSIZE) {
4842 + spin_unlock_irqrestore(&dmac->lock, flags);
4843 + return -EINVAL;
4844 + }
4845 +
4846 + chan = &dmac->channel[req->req.channel];
4847 + chan->state = CH_STATE_BUSY;
4848 + chan->req_sg = req;
4849 + chan->is_cyclic = 0;
4850 +
4851 + /*
4852 + * We have marked the channel as busy, so no need to keep the
4853 + * lock as long as we only touch the channel-specific
4854 + * registers
4855 + */
4856 + spin_unlock_irqrestore(&dmac->lock, flags);
4857 +
4858 + /*
4859 + * There may be limitations in the driver and/or the DMA
4860 + * controller that prevents us from sending a whole
4861 + * scatterlist item in one go. Taking this into account,
4862 + * calculate the number of block transfers we need to set up.
4863 + *
4864 + * FIXME: Let the peripheral driver know about the maximum
4865 + * block size we support. We really don't want to use a
4866 + * different block size than what was suggested by the
4867 + * peripheral.
4868 + *
4869 + * Each block will get its own Linked List Item (LLI) below.
4870 + */
4871 + block_size = req->block_size;
4872 + nr_blocks = req->nr_blocks;
4873 + pr_debug("block_size %lu, nr_blocks %u nr_sg = %u\n",
4874 + block_size, nr_blocks, req->nr_sg);
4875 +
4876 + BUG_ON(nr_blocks == 0);
4877 + chan->nr_blocks = nr_blocks;
4878 +
4879 + ret = -EINVAL;
4880 + cfglo = cfghi = 0;
4881 + switch (req->direction) {
4882 + case DMA_DIR_MEM_TO_PERIPH:
4883 + direction = DMA_TO_DEVICE;
4884 + cfghi = req->periph_id << (43 - 32);
4885 + break;
4886 +
4887 + case DMA_DIR_PERIPH_TO_MEM:
4888 + direction = DMA_FROM_DEVICE;
4889 + cfghi = req->periph_id << (39 - 32);
4890 + break;
4891 + default:
4892 + goto out_unclaim_channel;
4893 + }
4894 +
4895 + chan->direction = direction;
4896 +
4897 + dmac_chan_writel_hi(dmac, req->req.channel, CFG, cfghi);
4898 + dmac_chan_writel_lo(dmac, req->req.channel, CFG, cfglo);
4899 +
4900 + ctlhi = block_size >> req->width;
4901 + ctllo = ((req->direction << 20)
4902 + // | (1 << 14) | (1 << 11) // source/dest burst trans len
4903 + | (req->width << 4) | (req->width << 1)
4904 + | (1 << 0)); // interrupt enable
4905 +
4906 + if (nr_blocks == 1) {
4907 + /* Only one block: No need to use block chaining */
4908 + if (direction == DMA_TO_DEVICE) {
4909 + dmac_chan_writel_lo(dmac, req->req.channel, SAR,
4910 + req->sg->dma_address);
4911 + dmac_chan_writel_lo(dmac, req->req.channel, DAR,
4912 + req->data_reg);
4913 + ctllo |= 2 << 7; // no dst increment
4914 + } else {
4915 + dmac_chan_writel_lo(dmac, req->req.channel, SAR,
4916 + req->data_reg);
4917 + dmac_chan_writel_lo(dmac, req->req.channel, DAR,
4918 + req->sg->dma_address);
4919 + ctllo |= 2 << 9; // no src increment
4920 + }
4921 + dmac_chan_writel_lo(dmac, req->req.channel, CTL, ctllo);
4922 + dmac_chan_writel_hi(dmac, req->req.channel, CTL, ctlhi);
4923 + pr_debug("ctl hi:lo 0x%lx:%lx\n", ctlhi, ctllo);
4924 + } else {
4925 + struct dw_dma_lli *lli, *lli_prev = NULL;
4926 + int j = 0, offset = 0;
4927 +
4928 + ret = -ENOMEM;
4929 + chan->block = allocate_blocks(dmac, nr_blocks);
4930 + if (!chan->block)
4931 + goto out_unclaim_channel;
4932 +
4933 + if (direction == DMA_TO_DEVICE)
4934 + ctllo |= 1 << 28 | 1 << 27 | 2 << 7;
4935 + else
4936 + ctllo |= 1 << 28 | 1 << 27 | 2 << 9;
4937 +
4938 + /*
4939 + * Map scatterlist items to blocks. One scatterlist
4940 + * item may need more than one block for the reasons
4941 + * mentioned above.
4942 + */
4943 + for (i = 0; i < nr_blocks; i++) {
4944 + lli = chan->block[i].lli_vaddr;
4945 + if (lli_prev) {
4946 + lli_prev->llp = chan->block[i].lli_dma_addr;
4947 + pr_debug("lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
4948 + i - 1, chan->block[i - 1].lli_vaddr,
4949 + chan->block[i - 1].lli_dma_addr,
4950 + lli_prev->sar, lli_prev->dar, lli_prev->llp,
4951 + lli_prev->ctllo, lli_prev->ctlhi);
4952 + }
4953 + lli->llp = 0;
4954 + lli->ctllo = ctllo;
4955 + lli->ctlhi = ctlhi;
4956 + if (direction == DMA_TO_DEVICE) {
4957 + lli->sar = req->sg[j].dma_address + offset;
4958 + lli->dar = req->data_reg;
4959 + } else {
4960 + lli->sar = req->data_reg;
4961 + lli->dar = req->sg[j].dma_address + offset;
4962 + }
4963 + lli_prev = lli;
4964 +
4965 + offset += block_size;
4966 + if (offset > req->sg[j].length) {
4967 + j++;
4968 + offset = 0;
4969 + }
4970 + }
4971 +
4972 + pr_debug("lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
4973 + i - 1, chan->block[i - 1].lli_vaddr,
4974 + chan->block[i - 1].lli_dma_addr, lli_prev->sar,
4975 + lli_prev->dar, lli_prev->llp,
4976 + lli_prev->ctllo, lli_prev->ctlhi);
4977 +
4978 + /*
4979 + * SAR, DAR and CTL are initialized from the LLI. We
4980 + * only have to enable the LLI bits in CTL.
4981 + */
4982 + dmac_chan_writel_hi(dmac, req->req.channel, CTL, 0);
4983 + dmac_chan_writel_lo(dmac, req->req.channel, LLP,
4984 + chan->block[0].lli_dma_addr);
4985 + dmac_chan_writel_lo(dmac, req->req.channel, CTL, 1 << 28 | 1 << 27);
4986 + }
4987 +
4988 + set_channel_bit(dmac, MASK_XFER, req->req.channel);
4989 + set_channel_bit(dmac, MASK_ERROR, req->req.channel);
4990 + if (req->req.block_complete)
4991 + set_channel_bit(dmac, MASK_BLOCK, req->req.channel);
4992 + else
4993 + clear_channel_bit(dmac, MASK_BLOCK, req->req.channel);
4994 +
4995 + return 0;
4996 +
4997 +out_unclaim_channel:
4998 + chan->state = CH_STATE_ALLOCATED;
4999 + return ret;
5000 +}
5001 +
5002 +static int dmac_prepare_request_cyclic(struct dma_controller *_dmac,
5003 + struct dma_request_cyclic *req)
5004 +{
5005 + struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
5006 + struct dw_dma_channel *chan;
5007 + unsigned long ctlhi, ctllo, cfghi, cfglo;
5008 + unsigned long block_size;
5009 + int ret, i, direction;
5010 + unsigned long flags;
5011 +
5012 + spin_lock_irqsave(&dmac->lock, flags);
5013 +
5014 + block_size = (req->buffer_size/req->periods) >> req->width;
5015 +
5016 + ret = -EINVAL;
5017 + if (req->req.channel >= DMAC_NR_CHANNELS
5018 + || dmac->channel[req->req.channel].state != CH_STATE_ALLOCATED
5019 + || (req->periods == 0)
5020 + || block_size > DMAC_MAX_BLOCKSIZE) {
5021 + spin_unlock_irqrestore(&dmac->lock, flags);
5022 + return -EINVAL;
5023 + }
5024 +
5025 + chan = &dmac->channel[req->req.channel];
5026 + chan->state = CH_STATE_BUSY;
5027 + chan->is_cyclic = 1;
5028 + chan->req_cyclic = req;
5029 +
5030 + /*
5031 + * We have marked the channel as busy, so no need to keep the
5032 + * lock as long as we only touch the channel-specific
5033 + * registers
5034 + */
5035 + spin_unlock_irqrestore(&dmac->lock, flags);
5036 +
5037 + /*
5038 + Setup
5039 + */
5040 + BUG_ON(req->buffer_size % req->periods);
5041 + /* printk(KERN_INFO "block_size = %lu, periods = %u\n", block_size, req->periods); */
5042 +
5043 + chan->nr_blocks = req->periods;
5044 +
5045 + ret = -EINVAL;
5046 + cfglo = cfghi = 0;
5047 + switch (req->direction) {
5048 + case DMA_DIR_MEM_TO_PERIPH:
5049 + direction = DMA_TO_DEVICE;
5050 + cfghi = req->periph_id << (43 - 32);
5051 + break;
5052 +
5053 + case DMA_DIR_PERIPH_TO_MEM:
5054 + direction = DMA_FROM_DEVICE;
5055 + cfghi = req->periph_id << (39 - 32);
5056 + break;
5057 + default:
5058 + goto out_unclaim_channel;
5059 + }
5060 +
5061 + chan->direction = direction;
5062 +
5063 + dmac_chan_writel_hi(dmac, req->req.channel, CFG, cfghi);
5064 + dmac_chan_writel_lo(dmac, req->req.channel, CFG, cfglo);
5065 +
5066 + ctlhi = block_size;
5067 + ctllo = ((req->direction << 20)
5068 + | (req->width << 4) | (req->width << 1)
5069 + | (1 << 0)); // interrupt enable
5070 +
5071 + {
5072 + struct dw_dma_lli *lli = NULL, *lli_prev = NULL;
5073 +
5074 + ret = -ENOMEM;
5075 + chan->block = allocate_blocks(dmac, req->periods);
5076 + if (!chan->block)
5077 + goto out_unclaim_channel;
5078 +
5079 + if (direction == DMA_TO_DEVICE)
5080 + ctllo |= 1 << 28 | 1 << 27 | 2 << 7;
5081 + else
5082 + ctllo |= 1 << 28 | 1 << 27 | 2 << 9;
5083 +
5084 + /*
5085 + * Set up a linked list items where each period gets
5086 + * an item. The linked list item for the last period
5087 + * points back to the star of the buffer making a
5088 + * cyclic buffer.
5089 + */
5090 + for (i = 0; i < req->periods; i++) {
5091 + lli = chan->block[i].lli_vaddr;
5092 + if (lli_prev) {
5093 + lli_prev->llp = chan->block[i].lli_dma_addr;
5094 + /* printk(KERN_INFO "lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
5095 + i - 1, chan->block[i - 1].lli_vaddr,
5096 + chan->block[i - 1].lli_dma_addr,
5097 + lli_prev->sar, lli_prev->dar, lli_prev->llp,
5098 + lli_prev->ctllo, lli_prev->ctlhi);*/
5099 + }
5100 + lli->llp = 0;
5101 + lli->ctllo = ctllo;
5102 + lli->ctlhi = ctlhi;
5103 + if (direction == DMA_TO_DEVICE) {
5104 + lli->sar = req->buffer_start + i*(block_size << req->width);
5105 + lli->dar = req->data_reg;
5106 + } else {
5107 + lli->sar = req->data_reg;
5108 + lli->dar = req->buffer_start + i*(block_size << req->width);
5109 + }
5110 + lli_prev = lli;
5111 + }
5112 + lli->llp = chan->block[0].lli_dma_addr;
5113 +
5114 + /*printk(KERN_INFO "lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
5115 + i - 1, chan->block[i - 1].lli_vaddr,
5116 + chan->block[i - 1].lli_dma_addr, lli_prev->sar,
5117 + lli_prev->dar, lli_prev->llp,
5118 + lli_prev->ctllo, lli_prev->ctlhi); */
5119 +
5120 + /*
5121 + * SAR, DAR and CTL are initialized from the LLI. We
5122 + * only have to enable the LLI bits in CTL.
5123 + */
5124 + dmac_chan_writel_lo(dmac, req->req.channel, LLP,
5125 + chan->block[0].lli_dma_addr);
5126 + dmac_chan_writel_lo(dmac, req->req.channel, CTL, 1 << 28 | 1 << 27);
5127 + }
5128 +
5129 + clear_channel_bit(dmac, MASK_XFER, req->req.channel);
5130 + set_channel_bit(dmac, MASK_ERROR, req->req.channel);
5131 + if (req->req.block_complete)
5132 + set_channel_bit(dmac, MASK_BLOCK, req->req.channel);
5133 + else
5134 + clear_channel_bit(dmac, MASK_BLOCK, req->req.channel);
5135 +
5136 + return 0;
5137 +
5138 +out_unclaim_channel:
5139 + chan->state = CH_STATE_ALLOCATED;
5140 + return ret;
5141 +}
5142 +
5143 +static int dmac_start_request(struct dma_controller *_dmac,
5144 + unsigned int channel)
5145 +{
5146 + struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
5147 +
5148 + BUG_ON(channel >= DMAC_NR_CHANNELS);
5149 +
5150 + set_channel_bit(dmac, CH_EN, channel);
5151 +
5152 + return 0;
5153 +}
5154 +
5155 +static dma_addr_t dmac_get_current_pos(struct dma_controller *_dmac,
5156 + unsigned int channel)
5157 +{
5158 + struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
5159 + struct dw_dma_channel *chan;
5160 + dma_addr_t current_pos;
5161 +
5162 + BUG_ON(channel >= DMAC_NR_CHANNELS);
5163 +
5164 + chan = &dmac->channel[channel];
5165 +
5166 + switch (chan->direction) {
5167 + case DMA_TO_DEVICE:
5168 + current_pos = dmac_chan_readl_lo(dmac, channel, SAR);
5169 + break;
5170 + case DMA_FROM_DEVICE:
5171 + current_pos = dmac_chan_readl_lo(dmac, channel, DAR);
5172 + break;
5173 + default:
5174 + return 0;
5175 + }
5176 +
5177 +
5178 + if (!current_pos) {
5179 + if (chan->is_cyclic) {
5180 + current_pos = chan->req_cyclic->buffer_start;
5181 + } else {
5182 + current_pos = chan->req_sg->sg->dma_address;
5183 + }
5184 + }
5185 +
5186 + return current_pos;
5187 +}
5188 +
5189 +
5190 +static int dmac_stop_request(struct dma_controller *_dmac,
5191 + unsigned int channel)
5192 +{
5193 + struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
5194 + struct dw_dma_channel *chan;
5195 +
5196 + BUG_ON(channel >= DMAC_NR_CHANNELS);
5197 +
5198 + chan = &dmac->channel[channel];
5199 + pr_debug("stop: st%u s%08x d%08x l%08x ctl0x%08x:0x%08x\n",
5200 + chan->state, dmac_chan_readl_lo(dmac, channel, SAR),
5201 + dmac_chan_readl_lo(dmac, channel, DAR),
5202 + dmac_chan_readl_lo(dmac, channel, LLP),
5203 + dmac_chan_readl_hi(dmac, channel, CTL),
5204 + dmac_chan_readl_lo(dmac, channel, CTL));
5205 +
5206 + if (chan->state == CH_STATE_BUSY) {
5207 + clear_channel_bit(dmac, CH_EN, channel);
5208 + cleanup_channel(dmac, &dmac->channel[channel]);
5209 + }
5210 +
5211 + return 0;
5212 +}
5213 +
5214 +
5215 +static void dmac_block_complete(struct dw_dma_controller *dmac)
5216 +{
5217 + struct dw_dma_channel *chan;
5218 + unsigned long status, chanid;
5219 +
5220 + status = dmac_readl_lo(dmac, STATUS_BLOCK);
5221 +
5222 + while (status) {
5223 + struct dma_request *req;
5224 + chanid = __ffs(status);
5225 + chan = &dmac->channel[chanid];
5226 +
5227 + if (chan->is_cyclic) {
5228 + BUG_ON(!chan->req_cyclic
5229 + || !chan->req_cyclic->req.block_complete);
5230 + req = &chan->req_cyclic->req;
5231 + } else {
5232 + BUG_ON(!chan->req_sg || !chan->req_sg->req.block_complete);
5233 + req = &chan->req_sg->req;
5234 + }
5235 + dmac_writel_lo(dmac, CLEAR_BLOCK, 1 << chanid);
5236 + req->block_complete(req);
5237 + status = dmac_readl_lo(dmac, STATUS_BLOCK);
5238 + }
5239 +}
5240 +
5241 +static void dmac_xfer_complete(struct dw_dma_controller *dmac)
5242 +{
5243 + struct dw_dma_channel *chan;
5244 + struct dma_request *req;
5245 + unsigned long status, chanid;
5246 +
5247 + status = dmac_readl_lo(dmac, STATUS_XFER);
5248 +
5249 + while (status) {
5250 + chanid = __ffs(status);
5251 + chan = &dmac->channel[chanid];
5252 +
5253 + dmac_writel_lo(dmac, CLEAR_XFER, 1 << chanid);
5254 +
5255 + req = &chan->req_sg->req;
5256 + BUG_ON(!req);
5257 + cleanup_channel(dmac, chan);
5258 + if (req->xfer_complete)
5259 + req->xfer_complete(req);
5260 +
5261 + status = dmac_readl_lo(dmac, STATUS_XFER);
5262 + }
5263 +}
5264 +
5265 +static void dmac_error(struct dw_dma_controller *dmac)
5266 +{
5267 + struct dw_dma_channel *chan;
5268 + unsigned long status, chanid;
5269 +
5270 + status = dmac_readl_lo(dmac, STATUS_ERROR);
5271 +
5272 + while (status) {
5273 + struct dma_request *req;
5274 +
5275 + chanid = __ffs(status);
5276 + chan = &dmac->channel[chanid];
5277 +
5278 + dmac_writel_lo(dmac, CLEAR_ERROR, 1 << chanid);
5279 + clear_channel_bit(dmac, CH_EN, chanid);
5280 +
5281 + if (chan->is_cyclic) {
5282 + BUG_ON(!chan->req_cyclic);
5283 + req = &chan->req_cyclic->req;
5284 + } else {
5285 + BUG_ON(!chan->req_sg);
5286 + req = &chan->req_sg->req;
5287 + }
5288 +
5289 + cleanup_channel(dmac, chan);
5290 + if (req->error)
5291 + req->error(req);
5292 +
5293 + status = dmac_readl_lo(dmac, STATUS_XFER);
5294 + }
5295 +}
5296 +
5297 +static irqreturn_t dmac_interrupt(int irq, void *dev_id)
5298 +{
5299 + struct dw_dma_controller *dmac = dev_id;
5300 + unsigned long status;
5301 + int ret = IRQ_NONE;
5302 +
5303 + spin_lock(&dmac->lock);
5304 +
5305 + status = dmac_readl_lo(dmac, STATUS_INT);
5306 +
5307 + while (status) {
5308 + ret = IRQ_HANDLED;
5309 + if (status & 0x10)
5310 + dmac_error(dmac);
5311 + if (status & 0x02)
5312 + dmac_block_complete(dmac);
5313 + if (status & 0x01)
5314 + dmac_xfer_complete(dmac);
5315 +
5316 + status = dmac_readl_lo(dmac, STATUS_INT);
5317 + }
5318 +
5319 + spin_unlock(&dmac->lock);
5320 + return ret;
5321 +}
5322 +
5323 +static int __devinit dmac_probe(struct platform_device *pdev)
5324 +{
5325 + struct dw_dma_controller *dmac;
5326 + struct resource *regs;
5327 + int ret;
5328 +
5329 + regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
5330 + if (!regs)
5331 + return -ENXIO;
5332 +
5333 + dmac = kmalloc(sizeof(*dmac), GFP_KERNEL);
5334 + if (!dmac)
5335 + return -ENOMEM;
5336 + memset(dmac, 0, sizeof(*dmac));
5337 +
5338 + dmac->hclk = clk_get(&pdev->dev, "hclk");
5339 + if (IS_ERR(dmac->hclk)) {
5340 + ret = PTR_ERR(dmac->hclk);
5341 + goto out_free_dmac;
5342 + }
5343 + clk_enable(dmac->hclk);
5344 +
5345 + ret = -ENOMEM;
5346 + dmac->lli_pool = dma_pool_create("dmac", &pdev->dev,
5347 + sizeof(struct dw_dma_lli), 4, 0);
5348 + if (!dmac->lli_pool)
5349 + goto out_disable_clk;
5350 +
5351 + spin_lock_init(&dmac->lock);
5352 + dmac->dma.dev = &pdev->dev;
5353 + dmac->dma.alloc_channel = dmac_alloc_channel;
5354 + dmac->dma.release_channel = dmac_release_channel;
5355 + dmac->dma.prepare_request_sg = dmac_prepare_request_sg;
5356 + dmac->dma.prepare_request_cyclic = dmac_prepare_request_cyclic;
5357 + dmac->dma.start_request = dmac_start_request;
5358 + dmac->dma.stop_request = dmac_stop_request;
5359 + dmac->dma.get_current_pos = dmac_get_current_pos;
5360 +
5361 + dmac->regs = ioremap(regs->start, regs->end - regs->start + 1);
5362 + if (!dmac->regs)
5363 + goto out_free_pool;
5364 +
5365 + ret = request_irq(platform_get_irq(pdev, 0), dmac_interrupt,
5366 + IRQF_SAMPLE_RANDOM, pdev->name, dmac);
5367 + if (ret)
5368 + goto out_unmap_regs;
5369 +
5370 + /* Enable the DMA controller */
5371 + dmac_writel_lo(dmac, CFG, 1);
5372 +
5373 + register_dma_controller(&dmac->dma);
5374 +
5375 + printk(KERN_INFO
5376 + "dmac%d: DesignWare DMA controller at 0x%p irq %d\n",
5377 + dmac->dma.id, dmac->regs, platform_get_irq(pdev, 0));
5378 +
5379 + return 0;
5380 +
5381 +out_unmap_regs:
5382 + iounmap(dmac->regs);
5383 +out_free_pool:
5384 + dma_pool_destroy(dmac->lli_pool);
5385 +out_disable_clk:
5386 + clk_disable(dmac->hclk);
5387 + clk_put(dmac->hclk);
5388 +out_free_dmac:
5389 + kfree(dmac);
5390 + return ret;
5391 +}
5392 +
5393 +static struct platform_driver dmac_driver = {
5394 + .probe = dmac_probe,
5395 + .driver = {
5396 + .name = "dmaca",
5397 + },
5398 +};
5399 +
5400 +static int __init dmac_init(void)
5401 +{
5402 + return platform_driver_register(&dmac_driver);
5403 +}
5404 +subsys_initcall(dmac_init);
5405 +
5406 +static void __exit dmac_exit(void)
5407 +{
5408 + platform_driver_unregister(&dmac_driver);
5409 +}
5410 +module_exit(dmac_exit);
5411 +
5412 +MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller driver");
5413 +MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
5414 +MODULE_LICENSE("GPL");
5415 diff -urN linux-2.6.24.3/arch/avr32/drivers/dw-dmac.h avr32-2.6/arch/avr32/drivers/dw-dmac.h
5416 --- linux-2.6.24.3/arch/avr32/drivers/dw-dmac.h 1970-01-01 01:00:00.000000000 +0100
5417 +++ avr32-2.6/arch/avr32/drivers/dw-dmac.h 2008-04-23 19:33:28.000000000 +0200
5418 @@ -0,0 +1,42 @@
5419 +/*
5420 + * Driver for the Synopsys DesignWare DMA Controller
5421 + *
5422 + * Copyright (C) 2005-2006 Atmel Corporation
5423 + *
5424 + * This program is free software; you can redistribute it and/or modify
5425 + * it under the terms of the GNU General Public License version 2 as
5426 + * published by the Free Software Foundation.
5427 + */
5428 +#ifndef __AVR32_DW_DMAC_H__
5429 +#define __AVR32_DW_DMAC_H__
5430 +
5431 +#define DW_DMAC_CFG 0x398
5432 +#define DW_DMAC_CH_EN 0x3a0
5433 +
5434 +#define DW_DMAC_STATUS_XFER 0x2e8
5435 +#define DW_DMAC_STATUS_BLOCK 0x2f0
5436 +#define DW_DMAC_STATUS_ERROR 0x308
5437 +
5438 +#define DW_DMAC_MASK_XFER 0x310
5439 +#define DW_DMAC_MASK_BLOCK 0x318
5440 +#define DW_DMAC_MASK_ERROR 0x330
5441 +
5442 +#define DW_DMAC_CLEAR_XFER 0x338
5443 +#define DW_DMAC_CLEAR_BLOCK 0x340
5444 +#define DW_DMAC_CLEAR_ERROR 0x358
5445 +
5446 +#define DW_DMAC_STATUS_INT 0x360
5447 +
5448 +#define DW_DMAC_CHAN_SAR 0x000
5449 +#define DW_DMAC_CHAN_DAR 0x008
5450 +#define DW_DMAC_CHAN_LLP 0x010
5451 +#define DW_DMAC_CHAN_CTL 0x018
5452 +#define DW_DMAC_CHAN_SSTAT 0x020
5453 +#define DW_DMAC_CHAN_DSTAT 0x028
5454 +#define DW_DMAC_CHAN_SSTATAR 0x030
5455 +#define DW_DMAC_CHAN_DSTATAR 0x038
5456 +#define DW_DMAC_CHAN_CFG 0x040
5457 +#define DW_DMAC_CHAN_SGR 0x048
5458 +#define DW_DMAC_CHAN_DSR 0x050
5459 +
5460 +#endif /* __AVR32_DW_DMAC_H__ */
5461 diff -urN linux-2.6.24.3/arch/avr32/drivers/Makefile avr32-2.6/arch/avr32/drivers/Makefile
5462 --- linux-2.6.24.3/arch/avr32/drivers/Makefile 1970-01-01 01:00:00.000000000 +0100
5463 +++ avr32-2.6/arch/avr32/drivers/Makefile 2008-04-23 19:33:28.000000000 +0200
5464 @@ -0,0 +1 @@
5465 +obj-$(CONFIG_DW_DMAC) += dw-dmac.o
5466 diff -urN linux-2.6.24.3/arch/avr32/Kconfig avr32-2.6/arch/avr32/Kconfig
5467 --- linux-2.6.24.3/arch/avr32/Kconfig 2008-02-26 01:20:20.000000000 +0100
5468 +++ avr32-2.6/arch/avr32/Kconfig 2008-04-23 20:12:35.000000000 +0200
5469 @@ -45,6 +45,9 @@
5470 config GENERIC_TIME
5471 def_bool y
5472
5473 +config GENERIC_CLOCKEVENTS
5474 + def_bool y
5475 +
5476 config RWSEM_XCHGADD_ALGORITHM
5477 def_bool n
5478
5479 @@ -54,6 +57,9 @@
5480 config ARCH_HAS_ILOG2_U64
5481 def_bool n
5482
5483 +config ARCH_SUPPORTS_OPROFILE
5484 + def_bool y
5485 +
5486 config GENERIC_HWEIGHT
5487 def_bool y
5488
5489 @@ -68,6 +74,8 @@
5490
5491 menu "System Type and features"
5492
5493 +source "kernel/time/Kconfig"
5494 +
5495 config SUBARCH_AVR32B
5496 bool
5497 config MMU
5498 @@ -81,19 +89,23 @@
5499 select MMU
5500 select PERFORMANCE_COUNTERS
5501
5502 -choice
5503 - prompt "AVR32 CPU type"
5504 - default CPU_AT32AP7000
5505 +#
5506 +# CPU types
5507 +#
5508
5509 -config CPU_AT32AP7000
5510 - bool "AT32AP7000"
5511 +# AP7000 derivatives
5512 +config CPU_AT32AP700X
5513 + bool
5514 select PLATFORM_AT32AP
5515 -endchoice
5516 -
5517 -#
5518 -# CPU Daughterboards for ATSTK1000
5519 -config BOARD_ATSTK1002
5520 +config CPU_AT32AP7000
5521 + bool
5522 + select CPU_AT32AP700X
5523 +config CPU_AT32AP7001
5524 + bool
5525 + select CPU_AT32AP700X
5526 +config CPU_AT32AP7002
5527 bool
5528 + select CPU_AT32AP700X
5529
5530 choice
5531 prompt "AVR32 board type"
5532 @@ -101,15 +113,18 @@
5533
5534 config BOARD_ATSTK1000
5535 bool "ATSTK1000 evaluation board"
5536 - select BOARD_ATSTK1002 if CPU_AT32AP7000
5537
5538 config BOARD_ATNGW100
5539 bool "ATNGW100 Network Gateway"
5540 + select CPU_AT32AP7000
5541 endchoice
5542
5543 if BOARD_ATSTK1000
5544 source "arch/avr32/boards/atstk1000/Kconfig"
5545 endif
5546 +if BOARD_ATNGW100
5547 +source "arch/avr32/boards/atngw100/Kconfig"
5548 +endif
5549
5550 choice
5551 prompt "Boot loader type"
5552 @@ -123,15 +138,15 @@
5553
5554 config LOAD_ADDRESS
5555 hex
5556 - default 0x10000000 if LOADER_U_BOOT=y && CPU_AT32AP7000=y
5557 + default 0x10000000 if LOADER_U_BOOT=y && CPU_AT32AP700X=y
5558
5559 config ENTRY_ADDRESS
5560 hex
5561 - default 0x90000000 if LOADER_U_BOOT=y && CPU_AT32AP7000=y
5562 + default 0x90000000 if LOADER_U_BOOT=y && CPU_AT32AP700X=y
5563
5564 config PHYS_OFFSET
5565 hex
5566 - default 0x10000000 if CPU_AT32AP7000=y
5567 + default 0x10000000 if CPU_AT32AP700X=y
5568
5569 source "kernel/Kconfig.preempt"
5570
5571 @@ -163,6 +178,20 @@
5572 enabling Nexus-compliant debuggers to keep track of the PID of the
5573 currently executing task.
5574
5575 +config NMI_DEBUGGING
5576 + bool "NMI Debugging"
5577 + default n
5578 + help
5579 + Say Y here and pass the nmi_debug command-line parameter to
5580 + the kernel to turn on NMI debugging. Depending on the value
5581 + of the nmi_debug option, various pieces of information will
5582 + be dumped to the console when a Non-Maskable Interrupt
5583 + happens.
5584 +
5585 +config DW_DMAC
5586 + tristate "Synopsys DesignWare DMA Controller support"
5587 + default y if CPU_AT32AP7000
5588 +
5589 # FPU emulation goes here
5590
5591 source "kernel/Kconfig.hz"
5592 @@ -219,6 +248,8 @@
5593
5594 source "fs/Kconfig"
5595
5596 +source "kernel/Kconfig.instrumentation"
5597 +
5598 source "arch/avr32/Kconfig.debug"
5599
5600 source "security/Kconfig"
5601 diff -urN linux-2.6.24.3/arch/avr32/Kconfig.debug avr32-2.6/arch/avr32/Kconfig.debug
5602 --- linux-2.6.24.3/arch/avr32/Kconfig.debug 2008-02-26 01:20:20.000000000 +0100
5603 +++ avr32-2.6/arch/avr32/Kconfig.debug 2008-04-23 19:33:28.000000000 +0200
5604 @@ -6,14 +6,4 @@
5605
5606 source "lib/Kconfig.debug"
5607
5608 -config KPROBES
5609 - bool "Kprobes"
5610 - depends on DEBUG_KERNEL
5611 - help
5612 - Kprobes allows you to trap at almost any kernel address and
5613 - execute a callback function. register_kprobe() establishes
5614 - a probepoint and specifies the callback. Kprobes is useful
5615 - for kernel debugging, non-intrusive instrumentation and testing.
5616 - If in doubt, say "N".
5617 -
5618 endmenu
5619 diff -urN linux-2.6.24.3/arch/avr32/kernel/cpu.c avr32-2.6/arch/avr32/kernel/cpu.c
5620 --- linux-2.6.24.3/arch/avr32/kernel/cpu.c 2008-02-26 01:20:20.000000000 +0100
5621 +++ avr32-2.6/arch/avr32/kernel/cpu.c 2008-04-23 19:33:28.000000000 +0200
5622 @@ -13,6 +13,7 @@
5623 #include <linux/percpu.h>
5624 #include <linux/param.h>
5625 #include <linux/errno.h>
5626 +#include <linux/clk.h>
5627
5628 #include <asm/setup.h>
5629 #include <asm/sysreg.h>
5630 @@ -187,9 +188,20 @@
5631
5632 subsys_initcall(topology_init);
5633
5634 +struct chip_id_map {
5635 + u16 mid;
5636 + u16 pn;
5637 + const char *name;
5638 +};
5639 +
5640 +static const struct chip_id_map chip_names[] = {
5641 + { .mid = 0x1f, .pn = 0x1e82, .name = "AT32AP700x" },
5642 +};
5643 +#define NR_CHIP_NAMES ARRAY_SIZE(chip_names)
5644 +
5645 static const char *cpu_names[] = {
5646 "Morgan",
5647 - "AP7000",
5648 + "AP7",
5649 };
5650 #define NR_CPU_NAMES ARRAY_SIZE(cpu_names)
5651
5652 @@ -206,12 +218,32 @@
5653 "MPU"
5654 };
5655
5656 +static const char *cpu_feature_flags[] = {
5657 + "rmw", "dsp", "simd", "ocd", "perfctr", "java", "fpu",
5658 +};
5659 +
5660 +static const char *get_chip_name(struct avr32_cpuinfo *cpu)
5661 +{
5662 + unsigned int i;
5663 + unsigned int mid = avr32_get_manufacturer_id(cpu);
5664 + unsigned int pn = avr32_get_product_number(cpu);
5665 +
5666 + for (i = 0; i < NR_CHIP_NAMES; i++) {
5667 + if (chip_names[i].mid == mid && chip_names[i].pn == pn)
5668 + return chip_names[i].name;
5669 + }
5670 +
5671 + return "(unknown)";
5672 +}
5673 +
5674 void __init setup_processor(void)
5675 {
5676 unsigned long config0, config1;
5677 unsigned long features;
5678 unsigned cpu_id, cpu_rev, arch_id, arch_rev, mmu_type;
5679 + unsigned device_id;
5680 unsigned tmp;
5681 + unsigned i;
5682
5683 config0 = sysreg_read(CONFIG0);
5684 config1 = sysreg_read(CONFIG1);
5685 @@ -221,11 +253,14 @@
5686 arch_rev = SYSREG_BFEXT(AR, config0);
5687 mmu_type = SYSREG_BFEXT(MMUT, config0);
5688
5689 + device_id = ocd_read(DID);
5690 +
5691 boot_cpu_data.arch_type = arch_id;
5692 boot_cpu_data.cpu_type = cpu_id;
5693 boot_cpu_data.arch_revision = arch_rev;
5694 boot_cpu_data.cpu_revision = cpu_rev;
5695 boot_cpu_data.tlb_config = mmu_type;
5696 + boot_cpu_data.device_id = device_id;
5697
5698 tmp = SYSREG_BFEXT(ILSZ, config1);
5699 if (tmp) {
5700 @@ -247,41 +282,34 @@
5701 return;
5702 }
5703
5704 - printk ("CPU: %s [%02x] revision %d (%s revision %d)\n",
5705 + printk ("CPU: %s chip revision %c\n", get_chip_name(&boot_cpu_data),
5706 + avr32_get_chip_revision(&boot_cpu_data) + 'A');
5707 + printk ("CPU: %s [%02x] core revision %d (%s arch revision %d)\n",
5708 cpu_names[cpu_id], cpu_id, cpu_rev,
5709 arch_names[arch_id], arch_rev);
5710 printk ("CPU: MMU configuration: %s\n", mmu_types[mmu_type]);
5711
5712 printk ("CPU: features:");
5713 features = 0;
5714 - if (config0 & SYSREG_BIT(CONFIG0_R)) {
5715 + if (config0 & SYSREG_BIT(CONFIG0_R))
5716 features |= AVR32_FEATURE_RMW;
5717 - printk(" rmw");
5718 - }
5719 - if (config0 & SYSREG_BIT(CONFIG0_D)) {
5720 + if (config0 & SYSREG_BIT(CONFIG0_D))
5721 features |= AVR32_FEATURE_DSP;
5722 - printk(" dsp");
5723 - }
5724 - if (config0 & SYSREG_BIT(CONFIG0_S)) {
5725 + if (config0 & SYSREG_BIT(CONFIG0_S))
5726 features |= AVR32_FEATURE_SIMD;
5727 - printk(" simd");
5728 - }
5729 - if (config0 & SYSREG_BIT(CONFIG0_O)) {
5730 + if (config0 & SYSREG_BIT(CONFIG0_O))
5731 features |= AVR32_FEATURE_OCD;
5732 - printk(" ocd");
5733 - }
5734 - if (config0 & SYSREG_BIT(CONFIG0_P)) {
5735 + if (config0 & SYSREG_BIT(CONFIG0_P))
5736 features |= AVR32_FEATURE_PCTR;
5737 - printk(" perfctr");
5738 - }
5739 - if (config0 & SYSREG_BIT(CONFIG0_J)) {
5740 + if (config0 & SYSREG_BIT(CONFIG0_J))
5741 features |= AVR32_FEATURE_JAVA;
5742 - printk(" java");
5743 - }
5744 - if (config0 & SYSREG_BIT(CONFIG0_F)) {
5745 + if (config0 & SYSREG_BIT(CONFIG0_F))
5746 features |= AVR32_FEATURE_FPU;
5747 - printk(" fpu");
5748 - }
5749 +
5750 + for (i = 0; i < ARRAY_SIZE(cpu_feature_flags); i++)
5751 + if (features & (1 << i))
5752 + printk(" %s", cpu_feature_flags[i]);
5753 +
5754 printk("\n");
5755 boot_cpu_data.features = features;
5756 }
5757 @@ -291,6 +319,8 @@
5758 {
5759 unsigned int icache_size, dcache_size;
5760 unsigned int cpu = smp_processor_id();
5761 + unsigned int freq;
5762 + unsigned int i;
5763
5764 icache_size = boot_cpu_data.icache.ways *
5765 boot_cpu_data.icache.sets *
5766 @@ -301,15 +331,21 @@
5767
5768 seq_printf(m, "processor\t: %d\n", cpu);
5769
5770 + seq_printf(m, "chip type\t: %s revision %c\n",
5771 + get_chip_name(&boot_cpu_data),
5772 + avr32_get_chip_revision(&boot_cpu_data) + 'A');
5773 if (boot_cpu_data.arch_type < NR_ARCH_NAMES)
5774 - seq_printf(m, "cpu family\t: %s revision %d\n",
5775 + seq_printf(m, "cpu arch\t: %s revision %d\n",
5776 arch_names[boot_cpu_data.arch_type],
5777 boot_cpu_data.arch_revision);
5778 if (boot_cpu_data.cpu_type < NR_CPU_NAMES)
5779 - seq_printf(m, "cpu type\t: %s revision %d\n",
5780 + seq_printf(m, "cpu core\t: %s revision %d\n",
5781 cpu_names[boot_cpu_data.cpu_type],
5782 boot_cpu_data.cpu_revision);
5783
5784 + freq = (clk_get_rate(boot_cpu_data.clk) + 500) / 1000;
5785 + seq_printf(m, "cpu MHz\t\t: %u.%03u\n", freq / 1000, freq % 1000);
5786 +
5787 seq_printf(m, "i-cache\t\t: %dK (%u ways x %u sets x %u)\n",
5788 icache_size >> 10,
5789 boot_cpu_data.icache.ways,
5790 @@ -320,7 +356,13 @@
5791 boot_cpu_data.dcache.ways,
5792 boot_cpu_data.dcache.sets,
5793 boot_cpu_data.dcache.linesz);
5794 - seq_printf(m, "bogomips\t: %lu.%02lu\n",
5795 +
5796 + seq_printf(m, "features\t:");
5797 + for (i = 0; i < ARRAY_SIZE(cpu_feature_flags); i++)
5798 + if (boot_cpu_data.features & (1 << i))
5799 + seq_printf(m, " %s", cpu_feature_flags[i]);
5800 +
5801 + seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
5802 boot_cpu_data.loops_per_jiffy / (500000/HZ),
5803 (boot_cpu_data.loops_per_jiffy / (5000/HZ)) % 100);
5804
5805 @@ -343,7 +385,7 @@
5806
5807 }
5808
5809 -struct seq_operations cpuinfo_op = {
5810 +const struct seq_operations cpuinfo_op = {
5811 .start = c_start,
5812 .next = c_next,
5813 .stop = c_stop,
5814 diff -urN linux-2.6.24.3/arch/avr32/kernel/dma-controller.c avr32-2.6/arch/avr32/kernel/dma-controller.c
5815 --- linux-2.6.24.3/arch/avr32/kernel/dma-controller.c 1970-01-01 01:00:00.000000000 +0100
5816 +++ avr32-2.6/arch/avr32/kernel/dma-controller.c 2008-04-23 19:33:28.000000000 +0200
5817 @@ -0,0 +1,34 @@
5818 +/*
5819 + * Preliminary DMA controller framework for AVR32
5820 + *
5821 + * Copyright (C) 2005-2006 Atmel Corporation
5822 + *
5823 + * This program is free software; you can redistribute it and/or modify
5824 + * it under the terms of the GNU General Public License version 2 as
5825 + * published by the Free Software Foundation.
5826 + */
5827 +#include <asm/dma-controller.h>
5828 +
5829 +static LIST_HEAD(controllers);
5830 +
5831 +int register_dma_controller(struct dma_controller *dmac)
5832 +{
5833 + static int next_id;
5834 +
5835 + dmac->id = next_id++;
5836 + list_add_tail(&dmac->list, &controllers);
5837 +
5838 + return 0;
5839 +}
5840 +EXPORT_SYMBOL(register_dma_controller);
5841 +
5842 +struct dma_controller *find_dma_controller(int id)
5843 +{
5844 + struct dma_controller *dmac;
5845 +
5846 + list_for_each_entry(dmac, &controllers, list)
5847 + if (dmac->id == id)
5848 + return dmac;
5849 + return NULL;
5850 +}
5851 +EXPORT_SYMBOL(find_dma_controller);
5852 diff -urN linux-2.6.24.3/arch/avr32/kernel/entry-avr32b.S avr32-2.6/arch/avr32/kernel/entry-avr32b.S
5853 --- linux-2.6.24.3/arch/avr32/kernel/entry-avr32b.S 2008-02-26 01:20:20.000000000 +0100
5854 +++ avr32-2.6/arch/avr32/kernel/entry-avr32b.S 2008-04-23 20:12:35.000000000 +0200
5855 @@ -741,26 +741,6 @@
5856
5857 .section .irq.text,"ax",@progbits
5858
5859 -.global cpu_idle_sleep
5860 -cpu_idle_sleep:
5861 - mask_interrupts
5862 - get_thread_info r8
5863 - ld.w r9, r8[TI_flags]
5864 - bld r9, TIF_NEED_RESCHED
5865 - brcs cpu_idle_enable_int_and_exit
5866 - sbr r9, TIF_CPU_GOING_TO_SLEEP
5867 - st.w r8[TI_flags], r9
5868 - unmask_interrupts
5869 - sleep 0
5870 -cpu_idle_skip_sleep:
5871 - mask_interrupts
5872 - ld.w r9, r8[TI_flags]
5873 - cbr r9, TIF_CPU_GOING_TO_SLEEP
5874 - st.w r8[TI_flags], r9
5875 -cpu_idle_enable_int_and_exit:
5876 - unmask_interrupts
5877 - retal r12
5878 -
5879 .global irq_level0
5880 .global irq_level1
5881 .global irq_level2
5882 diff -urN linux-2.6.24.3/arch/avr32/kernel/irq.c avr32-2.6/arch/avr32/kernel/irq.c
5883 --- linux-2.6.24.3/arch/avr32/kernel/irq.c 2008-02-26 01:20:20.000000000 +0100
5884 +++ avr32-2.6/arch/avr32/kernel/irq.c 2008-04-23 19:33:28.000000000 +0200
5885 @@ -25,6 +25,17 @@
5886 printk("unexpected IRQ %u\n", irq);
5887 }
5888
5889 +/* May be overridden by platform code */
5890 +int __weak nmi_enable(void)
5891 +{
5892 + return -ENOSYS;
5893 +}
5894 +
5895 +void __weak nmi_disable(void)
5896 +{
5897 +
5898 +}
5899 +
5900 #ifdef CONFIG_PROC_FS
5901 int show_interrupts(struct seq_file *p, void *v)
5902 {
5903 diff -urN linux-2.6.24.3/arch/avr32/kernel/kprobes.c avr32-2.6/arch/avr32/kernel/kprobes.c
5904 --- linux-2.6.24.3/arch/avr32/kernel/kprobes.c 2008-02-26 01:20:20.000000000 +0100
5905 +++ avr32-2.6/arch/avr32/kernel/kprobes.c 2008-04-23 19:33:28.000000000 +0200
5906 @@ -48,6 +48,7 @@
5907 void __kprobes arch_arm_kprobe(struct kprobe *p)
5908 {
5909 pr_debug("arming kprobe at %p\n", p->addr);
5910 + ocd_enable(NULL);
5911 *p->addr = BREAKPOINT_INSTRUCTION;
5912 flush_icache_range((unsigned long)p->addr,
5913 (unsigned long)p->addr + sizeof(kprobe_opcode_t));
5914 @@ -56,6 +57,7 @@
5915 void __kprobes arch_disarm_kprobe(struct kprobe *p)
5916 {
5917 pr_debug("disarming kprobe at %p\n", p->addr);
5918 + ocd_disable(NULL);
5919 *p->addr = p->opcode;
5920 flush_icache_range((unsigned long)p->addr,
5921 (unsigned long)p->addr + sizeof(kprobe_opcode_t));
5922 @@ -260,9 +262,6 @@
5923
5924 int __init arch_init_kprobes(void)
5925 {
5926 - printk("KPROBES: Enabling monitor mode (MM|DBE)...\n");
5927 - ocd_write(DC, (1 << OCD_DC_MM_BIT) | (1 << OCD_DC_DBE_BIT));
5928 -
5929 /* TODO: Register kretprobe trampoline */
5930 return 0;
5931 }
5932 diff -urN linux-2.6.24.3/arch/avr32/kernel/Makefile avr32-2.6/arch/avr32/kernel/Makefile
5933 --- linux-2.6.24.3/arch/avr32/kernel/Makefile 2008-02-26 01:20:20.000000000 +0100
5934 +++ avr32-2.6/arch/avr32/kernel/Makefile 2008-04-23 19:33:28.000000000 +0200
5935 @@ -6,9 +6,11 @@
5936
5937 obj-$(CONFIG_SUBARCH_AVR32B) += entry-avr32b.o
5938 obj-y += syscall_table.o syscall-stubs.o irq.o
5939 -obj-y += setup.o traps.o semaphore.o ptrace.o
5940 +obj-y += setup.o traps.o semaphore.o ocd.o ptrace.o
5941 obj-y += signal.o sys_avr32.o process.o time.o
5942 obj-y += init_task.o switch_to.o cpu.o
5943 +obj-y += dma-controller.o
5944 obj-$(CONFIG_MODULES) += module.o avr32_ksyms.o
5945 obj-$(CONFIG_KPROBES) += kprobes.o
5946 obj-$(CONFIG_STACKTRACE) += stacktrace.o
5947 +obj-$(CONFIG_NMI_DEBUGGING) += nmi_debug.o
5948 diff -urN linux-2.6.24.3/arch/avr32/kernel/nmi_debug.c avr32-2.6/arch/avr32/kernel/nmi_debug.c
5949 --- linux-2.6.24.3/arch/avr32/kernel/nmi_debug.c 1970-01-01 01:00:00.000000000 +0100
5950 +++ avr32-2.6/arch/avr32/kernel/nmi_debug.c 2008-04-23 19:33:28.000000000 +0200
5951 @@ -0,0 +1,82 @@
5952 +/*
5953 + * Copyright (C) 2007 Atmel Corporation
5954 + *
5955 + * This program is free software; you can redistribute it and/or modify
5956 + * it under the terms of the GNU General Public License version 2 as
5957 + * published by the Free Software Foundation.
5958 + */
5959 +#include <linux/delay.h>
5960 +#include <linux/kdebug.h>
5961 +#include <linux/notifier.h>
5962 +#include <linux/sched.h>
5963 +
5964 +#include <asm/irq.h>
5965 +
5966 +enum nmi_action {
5967 + NMI_SHOW_STATE = 1 << 0,
5968 + NMI_SHOW_REGS = 1 << 1,
5969 + NMI_DIE = 1 << 2,
5970 + NMI_DEBOUNCE = 1 << 3,
5971 +};
5972 +
5973 +static unsigned long nmi_actions;
5974 +
5975 +static int nmi_debug_notify(struct notifier_block *self,
5976 + unsigned long val, void *data)
5977 +{
5978 + struct die_args *args = data;
5979 +
5980 + if (likely(val != DIE_NMI))
5981 + return NOTIFY_DONE;
5982 +
5983 + if (nmi_actions & NMI_SHOW_STATE)
5984 + show_state();
5985 + if (nmi_actions & NMI_SHOW_REGS)
5986 + show_regs(args->regs);
5987 + if (nmi_actions & NMI_DEBOUNCE)
5988 + mdelay(10);
5989 + if (nmi_actions & NMI_DIE)
5990 + return NOTIFY_BAD;
5991 +
5992 + return NOTIFY_OK;
5993 +}
5994 +
5995 +static struct notifier_block nmi_debug_nb = {
5996 + .notifier_call = nmi_debug_notify,
5997 +};
5998 +
5999 +static int __init nmi_debug_setup(char *str)
6000 +{
6001 + char *p, *sep;
6002 +
6003 + register_die_notifier(&nmi_debug_nb);
6004 + if (nmi_enable()) {
6005 + printk(KERN_WARNING "Unable to enable NMI.\n");
6006 + return 0;
6007 + }
6008 +
6009 + if (*str != '=')
6010 + return 0;
6011 +
6012 + for (p = str + 1; *p; p = sep + 1) {
6013 + sep = strchr(p, ',');
6014 + if (sep)
6015 + *sep = 0;
6016 + if (strcmp(p, "state") == 0)
6017 + nmi_actions |= NMI_SHOW_STATE;
6018 + else if (strcmp(p, "regs") == 0)
6019 + nmi_actions |= NMI_SHOW_REGS;
6020 + else if (strcmp(p, "debounce") == 0)
6021 + nmi_actions |= NMI_DEBOUNCE;
6022 + else if (strcmp(p, "die") == 0)
6023 + nmi_actions |= NMI_DIE;
6024 + else
6025 + printk(KERN_WARNING "NMI: Unrecognized action `%s'\n",
6026 + p);
6027 + if (!sep)
6028 + break;
6029 + }
6030 +
6031 + return 0;
6032 +}
6033 +__setup("nmi_debug", nmi_debug_setup);
6034 diff -urN linux-2.6.24.3/arch/avr32/kernel/ocd.c avr32-2.6/arch/avr32/kernel/ocd.c
6035 --- linux-2.6.24.3/arch/avr32/kernel/ocd.c 1970-01-01 01:00:00.000000000 +0100
6036 +++ avr32-2.6/arch/avr32/kernel/ocd.c 2008-04-23 19:33:28.000000000 +0200
6037 @@ -0,0 +1,163 @@
6038 +/*
6039 + * Copyright (C) 2007 Atmel Corporation
6040 + *
6041 + * This program is free software; you can redistribute it and/or modify
6042 + * it under the terms of the GNU General Public License version 2 as
6043 + * published by the Free Software Foundation.
6044 + */
6045 +#include <linux/init.h>
6046 +#include <linux/sched.h>
6047 +#include <linux/spinlock.h>
6048 +
6049 +#include <asm/ocd.h>
6050 +
6051 +static long ocd_count;
6052 +static spinlock_t ocd_lock;
6053 +
6054 +/**
6055 + * ocd_enable - enable on-chip debugging
6056 + * @child: task to be debugged
6057 + *
6058 + * If @child is non-NULL, ocd_enable() first checks if debugging has
6059 + * already been enabled for @child, and if it has, does nothing.
6060 + *
6061 + * If @child is NULL (e.g. when debugging the kernel), or debugging
6062 + * has not already been enabled for it, ocd_enable() increments the
6063 + * reference count and enables the debugging hardware.
6064 + */
6065 +void ocd_enable(struct task_struct *child)
6066 +{
6067 + u32 dc;
6068 +
6069 + if (child)
6070 + pr_debug("ocd_enable: child=%s [%u]\n",
6071 + child->comm, child->pid);
6072 + else
6073 + pr_debug("ocd_enable (no child)\n");
6074 +
6075 + if (!child || !test_and_set_tsk_thread_flag(child, TIF_DEBUG)) {
6076 + spin_lock(&ocd_lock);
6077 + ocd_count++;
6078 + dc = ocd_read(DC);
6079 + dc |= (1 << OCD_DC_MM_BIT) | (1 << OCD_DC_DBE_BIT);
6080 + ocd_write(DC, dc);
6081 + spin_unlock(&ocd_lock);
6082 + }
6083 +}
6084 +
6085 +/**
6086 + * ocd_disable - disable on-chip debugging
6087 + * @child: task that was being debugged, but isn't anymore
6088 + *
6089 + * If @child is non-NULL, ocd_disable() checks if debugging is enabled
6090 + * for @child, and if it isn't, does nothing.
6091 + *
6092 + * If @child is NULL (e.g. when debugging the kernel), or debugging is
6093 + * enabled, ocd_disable() decrements the reference count, and if it
6094 + * reaches zero, disables the debugging hardware.
6095 + */
6096 +void ocd_disable(struct task_struct *child)
6097 +{
6098 + u32 dc;
6099 +
6100 + if (!child)
6101 + pr_debug("ocd_disable (no child)\n");
6102 + else if (test_tsk_thread_flag(child, TIF_DEBUG))
6103 + pr_debug("ocd_disable: child=%s [%u]\n",
6104 + child->comm, child->pid);
6105 +
6106 + if (!child || test_and_clear_tsk_thread_flag(child, TIF_DEBUG)) {
6107 + spin_lock(&ocd_lock);
6108 + ocd_count--;
6109 +
6110 + WARN_ON(ocd_count < 0);
6111 +
6112 + if (ocd_count <= 0) {
6113 + dc = ocd_read(DC);
6114 + dc &= ~((1 << OCD_DC_MM_BIT) | (1 << OCD_DC_DBE_BIT));
6115 + ocd_write(DC, dc);
6116 + }
6117 + spin_unlock(&ocd_lock);
6118 + }
6119 +}
6120 +
6121 +#ifdef CONFIG_DEBUG_FS
6122 +#include <linux/debugfs.h>
6123 +#include <linux/module.h>
6124 +
6125 +static struct dentry *ocd_debugfs_root;
6126 +static struct dentry *ocd_debugfs_DC;
6127 +static struct dentry *ocd_debugfs_DS;
6128 +static struct dentry *ocd_debugfs_count;
6129 +
6130 +static u64 ocd_DC_get(void *data)
6131 +{
6132 + return ocd_read(DC);
6133 +}
6134 +static void ocd_DC_set(void *data, u64 val)
6135 +{
6136 + ocd_write(DC, val);
6137 +}
6138 +DEFINE_SIMPLE_ATTRIBUTE(fops_DC, ocd_DC_get, ocd_DC_set, "0x%08llx\n");
6139 +
6140 +static u64 ocd_DS_get(void *data)
6141 +{
6142 + return ocd_read(DS);
6143 +}
6144 +DEFINE_SIMPLE_ATTRIBUTE(fops_DS, ocd_DS_get, NULL, "0x%08llx\n");
6145 +
6146 +static u64 ocd_count_get(void *data)
6147 +{
6148 + return ocd_count;
6149 +}
6150 +DEFINE_SIMPLE_ATTRIBUTE(fops_count, ocd_count_get, NULL, "%lld\n");
6151 +
6152 +static void ocd_debugfs_init(void)
6153 +{
6154 + struct dentry *root;
6155 +
6156 + root = debugfs_create_dir("ocd", NULL);
6157 + if (IS_ERR(root) || !root)
6158 + goto err_root;
6159 + ocd_debugfs_root = root;
6160 +
6161 + ocd_debugfs_DC = debugfs_create_file("DC", S_IRUSR | S_IWUSR,
6162 + root, NULL, &fops_DC);
6163 + if (!ocd_debugfs_DC)
6164 + goto err_DC;
6165 +
6166 + ocd_debugfs_DS = debugfs_create_file("DS", S_IRUSR, root,
6167 + NULL, &fops_DS);
6168 + if (!ocd_debugfs_DS)
6169 + goto err_DS;
6170 +
6171 + ocd_debugfs_count = debugfs_create_file("count", S_IRUSR, root,
6172 + NULL, &fops_count);
6173 + if (!ocd_debugfs_count)
6174 + goto err_count;
6175 +
6176 + return;
6177 +
6178 +err_count:
6179 + debugfs_remove(ocd_debugfs_DS);
6180 +err_DS:
6181 + debugfs_remove(ocd_debugfs_DC);
6182 +err_DC:
6183 + debugfs_remove(ocd_debugfs_root);
6184 +err_root:
6185 + printk(KERN_WARNING "OCD: Failed to create debugfs entries\n");
6186 +}
6187 +#else
6188 +static inline void ocd_debugfs_init(void)
6189 +{
6190 +
6191 +}
6192 +#endif
6193 +
6194 +static int __init ocd_init(void)
6195 +{
6196 + spin_lock_init(&ocd_lock);
6197 + ocd_debugfs_init();
6198 + return 0;
6199 +}
6200 +arch_initcall(ocd_init);
6201 diff -urN linux-2.6.24.3/arch/avr32/kernel/process.c avr32-2.6/arch/avr32/kernel/process.c
6202 --- linux-2.6.24.3/arch/avr32/kernel/process.c 2008-02-26 01:20:20.000000000 +0100
6203 +++ avr32-2.6/arch/avr32/kernel/process.c 2008-04-23 20:12:35.000000000 +0200
6204 @@ -11,17 +11,18 @@
6205 #include <linux/fs.h>
6206 #include <linux/ptrace.h>
6207 #include <linux/reboot.h>
6208 +#include <linux/tick.h>
6209 #include <linux/uaccess.h>
6210 #include <linux/unistd.h>
6211
6212 #include <asm/sysreg.h>
6213 #include <asm/ocd.h>
6214
6215 +#include <asm/arch/pm.h>
6216 +
6217 void (*pm_power_off)(void) = NULL;
6218 EXPORT_SYMBOL(pm_power_off);
6219
6220 -extern void cpu_idle_sleep(void);
6221 -
6222 /*
6223 * This file handles the architecture-dependent parts of process handling..
6224 */
6225 @@ -30,8 +31,10 @@
6226 {
6227 /* endless idle loop with no priority at all */
6228 while (1) {
6229 + tick_nohz_stop_sched_tick();
6230 while (!need_resched())
6231 cpu_idle_sleep();
6232 + tick_nohz_restart_sched_tick();
6233 preempt_enable_no_resched();
6234 schedule();
6235 preempt_disable();
6236 @@ -103,7 +106,7 @@
6237 */
6238 void exit_thread(void)
6239 {
6240 - /* nothing to do */
6241 + ocd_disable(current);
6242 }
6243
6244 void flush_thread(void)
6245 @@ -345,6 +348,10 @@
6246 p->thread.cpu_context.ksp = (unsigned long)childregs;
6247 p->thread.cpu_context.pc = (unsigned long)ret_from_fork;
6248
6249 + clear_tsk_thread_flag(p, TIF_DEBUG);
6250 + if ((clone_flags & CLONE_PTRACE) && test_thread_flag(TIF_DEBUG))
6251 + ocd_enable(p);
6252 +
6253 return 0;
6254 }
6255
6256 diff -urN linux-2.6.24.3/arch/avr32/kernel/ptrace.c avr32-2.6/arch/avr32/kernel/ptrace.c
6257 --- linux-2.6.24.3/arch/avr32/kernel/ptrace.c 2008-02-26 01:20:20.000000000 +0100
6258 +++ avr32-2.6/arch/avr32/kernel/ptrace.c 2008-04-23 19:33:28.000000000 +0200
6259 @@ -58,6 +58,7 @@
6260 {
6261 clear_tsk_thread_flag(child, TIF_SINGLE_STEP);
6262 clear_tsk_thread_flag(child, TIF_BREAKPOINT);
6263 + ocd_disable(child);
6264 }
6265
6266 /*
6267 @@ -144,10 +145,6 @@
6268 {
6269 int ret;
6270
6271 - pr_debug("ptrace: Enabling monitor mode...\n");
6272 - ocd_write(DC, ocd_read(DC) | (1 << OCD_DC_MM_BIT)
6273 - | (1 << OCD_DC_DBE_BIT));
6274 -
6275 switch (request) {
6276 /* Read the word at location addr in the child process */
6277 case PTRACE_PEEKTEXT:
6278 diff -urN linux-2.6.24.3/arch/avr32/kernel/setup.c avr32-2.6/arch/avr32/kernel/setup.c
6279 --- linux-2.6.24.3/arch/avr32/kernel/setup.c 2008-02-26 01:20:20.000000000 +0100
6280 +++ avr32-2.6/arch/avr32/kernel/setup.c 2008-04-23 20:12:35.000000000 +0200
6281 @@ -273,6 +273,8 @@
6282 printk(KERN_WARNING
6283 "Failed to allocate framebuffer memory\n");
6284 fbmem_size = 0;
6285 + } else {
6286 + memset(__va(fbmem_start), 0, fbmem_size);
6287 }
6288 }
6289
6290 diff -urN linux-2.6.24.3/arch/avr32/kernel/signal.c avr32-2.6/arch/avr32/kernel/signal.c
6291 --- linux-2.6.24.3/arch/avr32/kernel/signal.c 2008-02-26 01:20:20.000000000 +0100
6292 +++ avr32-2.6/arch/avr32/kernel/signal.c 2008-04-23 19:33:28.000000000 +0200
6293 @@ -270,19 +270,12 @@
6294 if (!user_mode(regs))
6295 return 0;
6296
6297 - if (try_to_freeze()) {
6298 - signr = 0;
6299 - if (!signal_pending(current))
6300 - goto no_signal;
6301 - }
6302 -
6303 if (test_thread_flag(TIF_RESTORE_SIGMASK))
6304 oldset = &current->saved_sigmask;
6305 else if (!oldset)
6306 oldset = &current->blocked;
6307
6308 signr = get_signal_to_deliver(&info, &ka, regs, NULL);
6309 -no_signal:
6310 if (syscall) {
6311 switch (regs->r12) {
6312 case -ERESTART_RESTARTBLOCK:
6313 diff -urN linux-2.6.24.3/arch/avr32/kernel/time.c avr32-2.6/arch/avr32/kernel/time.c
6314 --- linux-2.6.24.3/arch/avr32/kernel/time.c 2008-02-26 01:20:20.000000000 +0100
6315 +++ avr32-2.6/arch/avr32/kernel/time.c 2008-04-23 20:12:35.000000000 +0200
6316 @@ -1,16 +1,12 @@
6317 /*
6318 * Copyright (C) 2004-2007 Atmel Corporation
6319 *
6320 - * Based on MIPS implementation arch/mips/kernel/time.c
6321 - * Copyright 2001 MontaVista Software Inc.
6322 - *
6323 * This program is free software; you can redistribute it and/or modify
6324 * it under the terms of the GNU General Public License version 2 as
6325 * published by the Free Software Foundation.
6326 */
6327 -
6328 #include <linux/clk.h>
6329 -#include <linux/clocksource.h>
6330 +#include <linux/clockchips.h>
6331 #include <linux/time.h>
6332 #include <linux/module.h>
6333 #include <linux/interrupt.h>
6334 @@ -27,207 +23,133 @@
6335 #include <asm/io.h>
6336 #include <asm/sections.h>
6337
6338 -/* how many counter cycles in a jiffy? */
6339 -static u32 cycles_per_jiffy;
6340 +#include <asm/arch/pm.h>
6341
6342 -/* the count value for the next timer interrupt */
6343 -static u32 expirelo;
6344
6345 -cycle_t __weak read_cycle_count(void)
6346 +static cycle_t read_cycle_count(void)
6347 {
6348 return (cycle_t)sysreg_read(COUNT);
6349 }
6350
6351 -struct clocksource __weak clocksource_avr32 = {
6352 - .name = "avr32",
6353 - .rating = 350,
6354 +/*
6355 + * The architectural cycle count registers are a fine clocksource unless
6356 + * the system idle loop use sleep states like "idle": the CPU cycles
6357 + * measured by COUNT (and COMPARE) don't happen during sleep states.
6358 + * Their duration also changes if cpufreq changes the CPU clock rate.
6359 + * So we rate the clocksource using COUNT as very low quality.
6360 + */
6361 +static struct clocksource counter = {
6362 + .name = "avr32_counter",
6363 + .rating = 50,
6364 .read = read_cycle_count,
6365 .mask = CLOCKSOURCE_MASK(32),
6366 .shift = 16,
6367 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
6368 };
6369
6370 -irqreturn_t __weak timer_interrupt(int irq, void *dev_id);
6371 -
6372 -struct irqaction timer_irqaction = {
6373 - .handler = timer_interrupt,
6374 - .flags = IRQF_DISABLED,
6375 - .name = "timer",
6376 -};
6377 -
6378 -/*
6379 - * By default we provide the null RTC ops
6380 - */
6381 -static unsigned long null_rtc_get_time(void)
6382 +static irqreturn_t timer_interrupt(int irq, void *dev_id)
6383 {
6384 - return mktime(2007, 1, 1, 0, 0, 0);
6385 -}
6386 -
6387 -static int null_rtc_set_time(unsigned long sec)
6388 -{
6389 - return 0;
6390 -}
6391 + struct clock_event_device *evdev = dev_id;
6392
6393 -static unsigned long (*rtc_get_time)(void) = null_rtc_get_time;
6394 -static int (*rtc_set_time)(unsigned long) = null_rtc_set_time;
6395 -
6396 -static void avr32_timer_ack(void)
6397 -{
6398 - u32 count;
6399 -
6400 - /* Ack this timer interrupt and set the next one */
6401 - expirelo += cycles_per_jiffy;
6402 - /* setting COMPARE to 0 stops the COUNT-COMPARE */
6403 - if (expirelo == 0) {
6404 - sysreg_write(COMPARE, expirelo + 1);
6405 - } else {
6406 - sysreg_write(COMPARE, expirelo);
6407 - }
6408 + /*
6409 + * Disable the interrupt until the clockevent subsystem
6410 + * reprograms it.
6411 + */
6412 + sysreg_write(COMPARE, 0);
6413
6414 - /* Check to see if we have missed any timer interrupts */
6415 - count = sysreg_read(COUNT);
6416 - if ((count - expirelo) < 0x7fffffff) {
6417 - expirelo = count + cycles_per_jiffy;
6418 - sysreg_write(COMPARE, expirelo);
6419 - }
6420 + evdev->event_handler(evdev);
6421 + return IRQ_HANDLED;
6422 }
6423
6424 -int __weak avr32_hpt_init(void)
6425 -{
6426 - int ret;
6427 - unsigned long mult, shift, count_hz;
6428 -
6429 - count_hz = clk_get_rate(boot_cpu_data.clk);
6430 - shift = clocksource_avr32.shift;
6431 - mult = clocksource_hz2mult(count_hz, shift);
6432 - clocksource_avr32.mult = mult;
6433 -
6434 - {
6435 - u64 tmp;
6436 -
6437 - tmp = TICK_NSEC;
6438 - tmp <<= shift;
6439 - tmp += mult / 2;
6440 - do_div(tmp, mult);
6441 -
6442 - cycles_per_jiffy = tmp;
6443 - }
6444 +static struct irqaction timer_irqaction = {
6445 + .handler = timer_interrupt,
6446 + .flags = IRQF_TIMER | IRQF_DISABLED,
6447 + .name = "avr32_comparator",
6448 +};
6449
6450 - ret = setup_irq(0, &timer_irqaction);
6451 - if (ret) {
6452 - pr_debug("timer: could not request IRQ 0: %d\n", ret);
6453 - return -ENODEV;
6454 - }
6455 +static int comparator_next_event(unsigned long delta,
6456 + struct clock_event_device *evdev)
6457 +{
6458 + unsigned long flags;
6459
6460 - printk(KERN_INFO "timer: AT32AP COUNT-COMPARE at irq 0, "
6461 - "%lu.%03lu MHz\n",
6462 - ((count_hz + 500) / 1000) / 1000,
6463 - ((count_hz + 500) / 1000) % 1000);
6464 + raw_local_irq_save(flags);
6465
6466 - return 0;
6467 -}
6468 + /* The time to read COUNT then update COMPARE must be less
6469 + * than the min_delta_ns value for this clockevent source.
6470 + */
6471 + sysreg_write(COMPARE, (sysreg_read(COUNT) + delta) ? : 1);
6472
6473 -/*
6474 - * Taken from MIPS c0_hpt_timer_init().
6475 - *
6476 - * The reason COUNT is written twice is probably to make sure we don't get any
6477 - * timer interrupts while we are messing with the counter.
6478 - */
6479 -int __weak avr32_hpt_start(void)
6480 -{
6481 - u32 count = sysreg_read(COUNT);
6482 - expirelo = (count / cycles_per_jiffy + 1) * cycles_per_jiffy;
6483 - sysreg_write(COUNT, expirelo - cycles_per_jiffy);
6484 - sysreg_write(COMPARE, expirelo);
6485 - sysreg_write(COUNT, count);
6486 + raw_local_irq_restore(flags);
6487
6488 return 0;
6489 }
6490
6491 -/*
6492 - * local_timer_interrupt() does profiling and process accounting on a
6493 - * per-CPU basis.
6494 - *
6495 - * In UP mode, it is invoked from the (global) timer_interrupt.
6496 - */
6497 -void local_timer_interrupt(int irq, void *dev_id)
6498 +static void comparator_mode(enum clock_event_mode mode,
6499 + struct clock_event_device *evdev)
6500 {
6501 - if (current->pid)
6502 - profile_tick(CPU_PROFILING);
6503 - update_process_times(user_mode(get_irq_regs()));
6504 + switch (mode) {
6505 + case CLOCK_EVT_MODE_ONESHOT:
6506 + pr_debug("%s: start\n", evdev->name);
6507 + /* FALLTHROUGH */
6508 + case CLOCK_EVT_MODE_RESUME:
6509 + cpu_disable_idle_sleep();
6510 + break;
6511 + case CLOCK_EVT_MODE_UNUSED:
6512 + case CLOCK_EVT_MODE_SHUTDOWN:
6513 + sysreg_write(COMPARE, 0);
6514 + pr_debug("%s: stop\n", evdev->name);
6515 + cpu_enable_idle_sleep();
6516 + break;
6517 + default:
6518 + BUG();
6519 + }
6520 }
6521
6522 -irqreturn_t __weak timer_interrupt(int irq, void *dev_id)
6523 -{
6524 - /* ack timer interrupt and try to set next interrupt */
6525 - avr32_timer_ack();
6526 -
6527 - /*
6528 - * Call the generic timer interrupt handler
6529 - */
6530 - write_seqlock(&xtime_lock);
6531 - do_timer(1);
6532 - write_sequnlock(&xtime_lock);
6533 -
6534 - /*
6535 - * In UP mode, we call local_timer_interrupt() to do profiling
6536 - * and process accounting.
6537 - *
6538 - * SMP is not supported yet.
6539 - */
6540 - local_timer_interrupt(irq, dev_id);
6541 -
6542 - return IRQ_HANDLED;
6543 -}
6544 +static struct clock_event_device comparator = {
6545 + .name = "avr32_comparator",
6546 + .features = CLOCK_EVT_FEAT_ONESHOT,
6547 + .shift = 16,
6548 + .rating = 50,
6549 + .cpumask = CPU_MASK_CPU0,
6550 + .set_next_event = comparator_next_event,
6551 + .set_mode = comparator_mode,
6552 +};
6553
6554 void __init time_init(void)
6555 {
6556 + unsigned long counter_hz;
6557 int ret;
6558
6559 - /*
6560 - * Make sure we don't get any COMPARE interrupts before we can
6561 - * handle them.
6562 - */
6563 - sysreg_write(COMPARE, 0);
6564 -
6565 - xtime.tv_sec = rtc_get_time();
6566 + xtime.tv_sec = mktime(2007, 1, 1, 0, 0, 0);
6567 xtime.tv_nsec = 0;
6568
6569 set_normalized_timespec(&wall_to_monotonic,
6570 -xtime.tv_sec, -xtime.tv_nsec);
6571
6572 - ret = avr32_hpt_init();
6573 - if (ret) {
6574 - pr_debug("timer: failed setup: %d\n", ret);
6575 - return;
6576 - }
6577 + /* figure rate for counter */
6578 + counter_hz = clk_get_rate(boot_cpu_data.clk);
6579 + counter.mult = clocksource_hz2mult(counter_hz, counter.shift);
6580
6581 - ret = clocksource_register(&clocksource_avr32);
6582 + ret = clocksource_register(&counter);
6583 if (ret)
6584 pr_debug("timer: could not register clocksource: %d\n", ret);
6585
6586 - ret = avr32_hpt_start();
6587 - if (ret) {
6588 - pr_debug("timer: failed starting: %d\n", ret);
6589 - return;
6590 - }
6591 -}
6592 + /* setup COMPARE clockevent */
6593 + comparator.mult = div_sc(counter_hz, NSEC_PER_SEC, comparator.shift);
6594 + comparator.max_delta_ns = clockevent_delta2ns((u32)~0, &comparator);
6595 + comparator.min_delta_ns = clockevent_delta2ns(50, &comparator) + 1;
6596
6597 -static struct sysdev_class timer_class = {
6598 - set_kset_name("timer"),
6599 -};
6600 + sysreg_write(COMPARE, 0);
6601 + timer_irqaction.dev_id = &comparator;
6602
6603 -static struct sys_device timer_device = {
6604 - .id = 0,
6605 - .cls = &timer_class,
6606 -};
6607 + ret = setup_irq(0, &timer_irqaction);
6608 + if (ret)
6609 + pr_debug("timer: could not request IRQ 0: %d\n", ret);
6610 + else {
6611 + clockevents_register_device(&comparator);
6612
6613 -static int __init init_timer_sysfs(void)
6614 -{
6615 - int err = sysdev_class_register(&timer_class);
6616 - if (!err)
6617 - err = sysdev_register(&timer_device);
6618 - return err;
6619 + pr_info("%s: irq 0, %lu.%03lu MHz\n", comparator.name,
6620 + ((counter_hz + 500) / 1000) / 1000,
6621 + ((counter_hz + 500) / 1000) % 1000);
6622 + }
6623 }
6624 -
6625 -device_initcall(init_timer_sysfs);
6626 diff -urN linux-2.6.24.3/arch/avr32/kernel/traps.c avr32-2.6/arch/avr32/kernel/traps.c
6627 --- linux-2.6.24.3/arch/avr32/kernel/traps.c 2008-02-26 01:20:20.000000000 +0100
6628 +++ avr32-2.6/arch/avr32/kernel/traps.c 2008-04-23 19:33:28.000000000 +0200
6629 @@ -9,6 +9,7 @@
6630 #include <linux/bug.h>
6631 #include <linux/init.h>
6632 #include <linux/kallsyms.h>
6633 +#include <linux/kdebug.h>
6634 #include <linux/module.h>
6635 #include <linux/notifier.h>
6636 #include <linux/sched.h>
6637 @@ -107,9 +108,23 @@
6638
6639 asmlinkage void do_nmi(unsigned long ecr, struct pt_regs *regs)
6640 {
6641 - printk(KERN_ALERT "Got Non-Maskable Interrupt, dumping regs\n");
6642 - show_regs_log_lvl(regs, KERN_ALERT);
6643 - show_stack_log_lvl(current, regs->sp, regs, KERN_ALERT);
6644 + int ret;
6645 +
6646 + nmi_enter();
6647 +
6648 + ret = notify_die(DIE_NMI, "NMI", regs, 0, ecr, SIGINT);
6649 + switch (ret) {
6650 + case NOTIFY_OK:
6651 + case NOTIFY_STOP:
6652 + return;
6653 + case NOTIFY_BAD:
6654 + die("Fatal Non-Maskable Interrupt", regs, SIGINT);
6655 + default:
6656 + break;
6657 + }
6658 +
6659 + printk(KERN_ALERT "Got NMI, but nobody cared. Disabling...\n");
6660 + nmi_disable();
6661 }
6662
6663 asmlinkage void do_critical_exception(unsigned long ecr, struct pt_regs *regs)
6664 diff -urN linux-2.6.24.3/arch/avr32/mach-at32ap/at32ap7000.c avr32-2.6/arch/avr32/mach-at32ap/at32ap7000.c
6665 --- linux-2.6.24.3/arch/avr32/mach-at32ap/at32ap7000.c 2008-02-26 01:20:20.000000000 +0100
6666 +++ avr32-2.6/arch/avr32/mach-at32ap/at32ap7000.c 1970-01-01 01:00:00.000000000 +0100
6667 @@ -1,1730 +0,0 @@
6668 -/*
6669 - * Copyright (C) 2005-2006 Atmel Corporation
6670 - *
6671 - * This program is free software; you can redistribute it and/or modify
6672 - * it under the terms of the GNU General Public License version 2 as
6673 - * published by the Free Software Foundation.
6674 - */
6675 -#include <linux/clk.h>
6676 -#include <linux/fb.h>
6677 -#include <linux/init.h>
6678 -#include <linux/platform_device.h>
6679 -#include <linux/dma-mapping.h>
6680 -#include <linux/spi/spi.h>
6681 -
6682 -#include <asm/io.h>
6683 -
6684 -#include <asm/arch/at32ap7000.h>
6685 -#include <asm/arch/board.h>
6686 -#include <asm/arch/portmux.h>
6687 -
6688 -#include <video/atmel_lcdc.h>
6689 -
6690 -#include "clock.h"
6691 -#include "hmatrix.h"
6692 -#include "pio.h"
6693 -#include "pm.h"
6694 -
6695 -
6696 -#define PBMEM(base) \
6697 - { \
6698 - .start = base, \
6699 - .end = base + 0x3ff, \
6700 - .flags = IORESOURCE_MEM, \
6701 - }
6702 -#define IRQ(num) \
6703 - { \
6704 - .start = num, \
6705 - .end = num, \
6706 - .flags = IORESOURCE_IRQ, \
6707 - }
6708 -#define NAMED_IRQ(num, _name) \
6709 - { \
6710 - .start = num, \
6711 - .end = num, \
6712 - .name = _name, \
6713 - .flags = IORESOURCE_IRQ, \
6714 - }
6715 -
6716 -/* REVISIT these assume *every* device supports DMA, but several
6717 - * don't ... tc, smc, pio, rtc, watchdog, pwm, ps2, and more.
6718 - */
6719 -#define DEFINE_DEV(_name, _id) \
6720 -static u64 _name##_id##_dma_mask = DMA_32BIT_MASK; \
6721 -static struct platform_device _name##_id##_device = { \
6722 - .name = #_name, \
6723 - .id = _id, \
6724 - .dev = { \
6725 - .dma_mask = &_name##_id##_dma_mask, \
6726 - .coherent_dma_mask = DMA_32BIT_MASK, \
6727 - }, \
6728 - .resource = _name##_id##_resource, \
6729 - .num_resources = ARRAY_SIZE(_name##_id##_resource), \
6730 -}
6731 -#define DEFINE_DEV_DATA(_name, _id) \
6732 -static u64 _name##_id##_dma_mask = DMA_32BIT_MASK; \
6733 -static struct platform_device _name##_id##_device = { \
6734 - .name = #_name, \
6735 - .id = _id, \
6736 - .dev = { \
6737 - .dma_mask = &_name##_id##_dma_mask, \
6738 - .platform_data = &_name##_id##_data, \
6739 - .coherent_dma_mask = DMA_32BIT_MASK, \
6740 - }, \
6741 - .resource = _name##_id##_resource, \
6742 - .num_resources = ARRAY_SIZE(_name##_id##_resource), \
6743 -}
6744 -
6745 -#define select_peripheral(pin, periph, flags) \
6746 - at32_select_periph(GPIO_PIN_##pin, GPIO_##periph, flags)
6747 -
6748 -#define DEV_CLK(_name, devname, bus, _index) \
6749 -static struct clk devname##_##_name = { \
6750 - .name = #_name, \
6751 - .dev = &devname##_device.dev, \
6752 - .parent = &bus##_clk, \
6753 - .mode = bus##_clk_mode, \
6754 - .get_rate = bus##_clk_get_rate, \
6755 - .index = _index, \
6756 -}
6757 -
6758 -static DEFINE_SPINLOCK(pm_lock);
6759 -
6760 -unsigned long at32ap7000_osc_rates[3] = {
6761 - [0] = 32768,
6762 - /* FIXME: these are ATSTK1002-specific */
6763 - [1] = 20000000,
6764 - [2] = 12000000,
6765 -};
6766 -
6767 -static unsigned long osc_get_rate(struct clk *clk)
6768 -{
6769 - return at32ap7000_osc_rates[clk->index];
6770 -}
6771 -
6772 -static unsigned long pll_get_rate(struct clk *clk, unsigned long control)
6773 -{
6774 - unsigned long div, mul, rate;
6775 -
6776 - if (!(control & PM_BIT(PLLEN)))
6777 - return 0;
6778 -
6779 - div = PM_BFEXT(PLLDIV, control) + 1;
6780 - mul = PM_BFEXT(PLLMUL, control) + 1;
6781 -
6782 - rate = clk->parent->get_rate(clk->parent);
6783 - rate = (rate + div / 2) / div;
6784 - rate *= mul;
6785 -
6786 - return rate;
6787 -}
6788 -
6789 -static unsigned long pll0_get_rate(struct clk *clk)
6790 -{
6791 - u32 control;
6792 -
6793 - control = pm_readl(PLL0);
6794 -
6795 - return pll_get_rate(clk, control);
6796 -}
6797 -
6798 -static unsigned long pll1_get_rate(struct clk *clk)
6799 -{
6800 - u32 control;
6801 -
6802 - control = pm_readl(PLL1);
6803 -
6804 - return pll_get_rate(clk, control);
6805 -}
6806 -
6807 -/*
6808 - * The AT32AP7000 has five primary clock sources: One 32kHz
6809 - * oscillator, two crystal oscillators and two PLLs.
6810 - */
6811 -static struct clk osc32k = {
6812 - .name = "osc32k",
6813 - .get_rate = osc_get_rate,
6814 - .users = 1,
6815 - .index = 0,
6816 -};
6817 -static struct clk osc0 = {
6818 - .name = "osc0",
6819 - .get_rate = osc_get_rate,
6820 - .users = 1,
6821 - .index = 1,
6822 -};
6823 -static struct clk osc1 = {
6824 - .name = "osc1",
6825 - .get_rate = osc_get_rate,
6826 - .index = 2,
6827 -};
6828 -static struct clk pll0 = {
6829 - .name = "pll0",
6830 - .get_rate = pll0_get_rate,
6831 - .parent = &osc0,
6832 -};
6833 -static struct clk pll1 = {
6834 - .name = "pll1",
6835 - .get_rate = pll1_get_rate,
6836 - .parent = &osc0,
6837 -};
6838 -
6839 -/*
6840 - * The main clock can be either osc0 or pll0. The boot loader may
6841 - * have chosen one for us, so we don't really know which one until we
6842 - * have a look at the SM.
6843 - */
6844 -static struct clk *main_clock;
6845 -
6846 -/*
6847 - * Synchronous clocks are generated from the main clock. The clocks
6848 - * must satisfy the constraint
6849 - * fCPU >= fHSB >= fPB
6850 - * i.e. each clock must not be faster than its parent.
6851 - */
6852 -static unsigned long bus_clk_get_rate(struct clk *clk, unsigned int shift)
6853 -{
6854 - return main_clock->get_rate(main_clock) >> shift;
6855 -};
6856 -
6857 -static void cpu_clk_mode(struct clk *clk, int enabled)
6858 -{
6859 - unsigned long flags;
6860 - u32 mask;
6861 -
6862 - spin_lock_irqsave(&pm_lock, flags);
6863 - mask = pm_readl(CPU_MASK);
6864 - if (enabled)
6865 - mask |= 1 << clk->index;
6866 - else
6867 - mask &= ~(1 << clk->index);
6868 - pm_writel(CPU_MASK, mask);
6869 - spin_unlock_irqrestore(&pm_lock, flags);
6870 -}
6871 -
6872 -static unsigned long cpu_clk_get_rate(struct clk *clk)
6873 -{
6874 - unsigned long cksel, shift = 0;
6875 -
6876 - cksel = pm_readl(CKSEL);
6877 - if (cksel & PM_BIT(CPUDIV))
6878 - shift = PM_BFEXT(CPUSEL, cksel) + 1;
6879 -
6880 - return bus_clk_get_rate(clk, shift);
6881 -}
6882 -
6883 -static long cpu_clk_set_rate(struct clk *clk, unsigned long rate, int apply)
6884 -{
6885 - u32 control;
6886 - unsigned long parent_rate, child_div, actual_rate, div;
6887 -
6888 - parent_rate = clk->parent->get_rate(clk->parent);
6889 - control = pm_readl(CKSEL);
6890 -
6891 - if (control & PM_BIT(HSBDIV))
6892 - child_div = 1 << (PM_BFEXT(HSBSEL, control) + 1);
6893 - else
6894 - child_div = 1;
6895 -
6896 - if (rate > 3 * (parent_rate / 4) || child_div == 1) {
6897 - actual_rate = parent_rate;
6898 - control &= ~PM_BIT(CPUDIV);
6899 - } else {
6900 - unsigned int cpusel;
6901 - div = (parent_rate + rate / 2) / rate;
6902 - if (div > child_div)
6903 - div = child_div;
6904 - cpusel = (div > 1) ? (fls(div) - 2) : 0;
6905 - control = PM_BIT(CPUDIV) | PM_BFINS(CPUSEL, cpusel, control);
6906 - actual_rate = parent_rate / (1 << (cpusel + 1));
6907 - }
6908 -
6909 - pr_debug("clk %s: new rate %lu (actual rate %lu)\n",
6910 - clk->name, rate, actual_rate);
6911 -
6912 - if (apply)
6913 - pm_writel(CKSEL, control);
6914 -
6915 - return actual_rate;
6916 -}
6917 -
6918 -static void hsb_clk_mode(struct clk *clk, int enabled)
6919 -{
6920 - unsigned long flags;
6921 - u32 mask;
6922 -
6923 - spin_lock_irqsave(&pm_lock, flags);
6924 - mask = pm_readl(HSB_MASK);
6925 - if (enabled)
6926 - mask |= 1 << clk->index;
6927 - else
6928 - mask &= ~(1 << clk->index);
6929 - pm_writel(HSB_MASK, mask);
6930 - spin_unlock_irqrestore(&pm_lock, flags);
6931 -}
6932 -
6933 -static unsigned long hsb_clk_get_rate(struct clk *clk)
6934 -{
6935 - unsigned long cksel, shift = 0;
6936 -
6937 - cksel = pm_readl(CKSEL);
6938 - if (cksel & PM_BIT(HSBDIV))
6939 - shift = PM_BFEXT(HSBSEL, cksel) + 1;
6940 -
6941 - return bus_clk_get_rate(clk, shift);
6942 -}
6943 -
6944 -static void pba_clk_mode(struct clk *clk, int enabled)
6945 -{
6946 - unsigned long flags;
6947 - u32 mask;
6948 -
6949 - spin_lock_irqsave(&pm_lock, flags);
6950 - mask = pm_readl(PBA_MASK);
6951 - if (enabled)
6952 - mask |= 1 << clk->index;
6953 - else
6954 - mask &= ~(1 << clk->index);
6955 - pm_writel(PBA_MASK, mask);
6956 - spin_unlock_irqrestore(&pm_lock, flags);
6957 -}
6958 -
6959 -static unsigned long pba_clk_get_rate(struct clk *clk)
6960 -{
6961 - unsigned long cksel, shift = 0;
6962 -
6963 - cksel = pm_readl(CKSEL);
6964 - if (cksel & PM_BIT(PBADIV))
6965 - shift = PM_BFEXT(PBASEL, cksel) + 1;
6966 -
6967 - return bus_clk_get_rate(clk, shift);
6968 -}
6969 -
6970 -static void pbb_clk_mode(struct clk *clk, int enabled)
6971 -{
6972 - unsigned long flags;
6973 - u32 mask;
6974 -
6975 - spin_lock_irqsave(&pm_lock, flags);
6976 - mask = pm_readl(PBB_MASK);
6977 - if (enabled)
6978 - mask |= 1 << clk->index;
6979 - else
6980 - mask &= ~(1 << clk->index);
6981 - pm_writel(PBB_MASK, mask);
6982 - spin_unlock_irqrestore(&pm_lock, flags);
6983 -}
6984 -
6985 -static unsigned long pbb_clk_get_rate(struct clk *clk)
6986 -{
6987 - unsigned long cksel, shift = 0;
6988 -
6989 - cksel = pm_readl(CKSEL);
6990 - if (cksel & PM_BIT(PBBDIV))
6991 - shift = PM_BFEXT(PBBSEL, cksel) + 1;
6992 -
6993 - return bus_clk_get_rate(clk, shift);
6994 -}
6995 -
6996 -static struct clk cpu_clk = {
6997 - .name = "cpu",
6998 - .get_rate = cpu_clk_get_rate,
6999 - .set_rate = cpu_clk_set_rate,
7000 - .users = 1,
7001 -};
7002 -static struct clk hsb_clk = {
7003 - .name = "hsb",
7004 - .parent = &cpu_clk,
7005 - .get_rate = hsb_clk_get_rate,
7006 -};
7007 -static struct clk pba_clk = {
7008 - .name = "pba",
7009 - .parent = &hsb_clk,
7010 - .mode = hsb_clk_mode,
7011 - .get_rate = pba_clk_get_rate,
7012 - .index = 1,
7013 -};
7014 -static struct clk pbb_clk = {
7015 - .name = "pbb",
7016 - .parent = &hsb_clk,
7017 - .mode = hsb_clk_mode,
7018 - .get_rate = pbb_clk_get_rate,
7019 - .users = 1,
7020 - .index = 2,
7021 -};
7022 -
7023 -/* --------------------------------------------------------------------
7024 - * Generic Clock operations
7025 - * -------------------------------------------------------------------- */
7026 -
7027 -static void genclk_mode(struct clk *clk, int enabled)
7028 -{
7029 - u32 control;
7030 -
7031 - control = pm_readl(GCCTRL(clk->index));
7032 - if (enabled)
7033 - control |= PM_BIT(CEN);
7034 - else
7035 - control &= ~PM_BIT(CEN);
7036 - pm_writel(GCCTRL(clk->index), control);
7037 -}
7038 -
7039 -static unsigned long genclk_get_rate(struct clk *clk)
7040 -{
7041 - u32 control;
7042 - unsigned long div = 1;
7043 -
7044 - control = pm_readl(GCCTRL(clk->index));
7045 - if (control & PM_BIT(DIVEN))
7046 - div = 2 * (PM_BFEXT(DIV, control) + 1);
7047 -
7048 - return clk->parent->get_rate(clk->parent) / div;
7049 -}
7050 -
7051 -static long genclk_set_rate(struct clk *clk, unsigned long rate, int apply)
7052 -{
7053 - u32 control;
7054 - unsigned long parent_rate, actual_rate, div;
7055 -
7056 - parent_rate = clk->parent->get_rate(clk->parent);
7057 - control = pm_readl(GCCTRL(clk->index));
7058 -
7059 - if (rate > 3 * parent_rate / 4) {
7060 - actual_rate = parent_rate;
7061 - control &= ~PM_BIT(DIVEN);
7062 - } else {
7063 - div = (parent_rate + rate) / (2 * rate) - 1;
7064 - control = PM_BFINS(DIV, div, control) | PM_BIT(DIVEN);
7065 - actual_rate = parent_rate / (2 * (div + 1));
7066 - }
7067 -
7068 - dev_dbg(clk->dev, "clk %s: new rate %lu (actual rate %lu)\n",
7069 - clk->name, rate, actual_rate);
7070 -
7071 - if (apply)
7072 - pm_writel(GCCTRL(clk->index), control);
7073 -
7074 - return actual_rate;
7075 -}
7076 -
7077 -int genclk_set_parent(struct clk *clk, struct clk *parent)
7078 -{
7079 - u32 control;
7080 -
7081 - dev_dbg(clk->dev, "clk %s: new parent %s (was %s)\n",
7082 - clk->name, parent->name, clk->parent->name);
7083 -
7084 - control = pm_readl(GCCTRL(clk->index));
7085 -
7086 - if (parent == &osc1 || parent == &pll1)
7087 - control |= PM_BIT(OSCSEL);
7088 - else if (parent == &osc0 || parent == &pll0)
7089 - control &= ~PM_BIT(OSCSEL);
7090 - else
7091 - return -EINVAL;
7092 -
7093 - if (parent == &pll0 || parent == &pll1)
7094 - control |= PM_BIT(PLLSEL);
7095 - else
7096 - control &= ~PM_BIT(PLLSEL);
7097 -
7098 - pm_writel(GCCTRL(clk->index), control);
7099 - clk->parent = parent;
7100 -
7101 - return 0;
7102 -}
7103 -
7104 -static void __init genclk_init_parent(struct clk *clk)
7105 -{
7106 - u32 control;
7107 - struct clk *parent;
7108 -
7109 - BUG_ON(clk->index > 7);
7110 -
7111 - control = pm_readl(GCCTRL(clk->index));
7112 - if (control & PM_BIT(OSCSEL))
7113 - parent = (control & PM_BIT(PLLSEL)) ? &pll1 : &osc1;
7114 - else
7115 - parent = (control & PM_BIT(PLLSEL)) ? &pll0 : &osc0;
7116 -
7117 - clk->parent = parent;
7118 -}
7119 -
7120 -/* --------------------------------------------------------------------
7121 - * System peripherals
7122 - * -------------------------------------------------------------------- */
7123 -static struct resource at32_pm0_resource[] = {
7124 - {
7125 - .start = 0xfff00000,
7126 - .end = 0xfff0007f,
7127 - .flags = IORESOURCE_MEM,
7128 - },
7129 - IRQ(20),
7130 -};
7131 -
7132 -static struct resource at32ap700x_rtc0_resource[] = {
7133 - {
7134 - .start = 0xfff00080,
7135 - .end = 0xfff000af,
7136 - .flags = IORESOURCE_MEM,
7137 - },
7138 - IRQ(21),
7139 -};
7140 -
7141 -static struct resource at32_wdt0_resource[] = {
7142 - {
7143 - .start = 0xfff000b0,
7144 - .end = 0xfff000cf,
7145 - .flags = IORESOURCE_MEM,
7146 - },
7147 -};
7148 -
7149 -static struct resource at32_eic0_resource[] = {
7150 - {
7151 - .start = 0xfff00100,
7152 - .end = 0xfff0013f,
7153 - .flags = IORESOURCE_MEM,
7154 - },
7155 - IRQ(19),
7156 -};
7157 -
7158 -DEFINE_DEV(at32_pm, 0);
7159 -DEFINE_DEV(at32ap700x_rtc, 0);
7160 -DEFINE_DEV(at32_wdt, 0);
7161 -DEFINE_DEV(at32_eic, 0);
7162 -
7163 -/*
7164 - * Peripheral clock for PM, RTC, WDT and EIC. PM will ensure that this
7165 - * is always running.
7166 - */
7167 -static struct clk at32_pm_pclk = {
7168 - .name = "pclk",
7169 - .dev = &at32_pm0_device.dev,
7170 - .parent = &pbb_clk,
7171 - .mode = pbb_clk_mode,
7172 - .get_rate = pbb_clk_get_rate,
7173 - .users = 1,
7174 - .index = 0,
7175 -};
7176 -
7177 -static struct resource intc0_resource[] = {
7178 - PBMEM(0xfff00400),
7179 -};
7180 -struct platform_device at32_intc0_device = {
7181 - .name = "intc",
7182 - .id = 0,
7183 - .resource = intc0_resource,
7184 - .num_resources = ARRAY_SIZE(intc0_resource),
7185 -};
7186 -DEV_CLK(pclk, at32_intc0, pbb, 1);
7187 -
7188 -static struct clk ebi_clk = {
7189 - .name = "ebi",
7190 - .parent = &hsb_clk,
7191 - .mode = hsb_clk_mode,
7192 - .get_rate = hsb_clk_get_rate,
7193 - .users = 1,
7194 -};
7195 -static struct clk hramc_clk = {
7196 - .name = "hramc",
7197 - .parent = &hsb_clk,
7198 - .mode = hsb_clk_mode,
7199 - .get_rate = hsb_clk_get_rate,
7200 - .users = 1,
7201 - .index = 3,
7202 -};
7203 -
7204 -static struct resource smc0_resource[] = {
7205 - PBMEM(0xfff03400),
7206 -};
7207 -DEFINE_DEV(smc, 0);
7208 -DEV_CLK(pclk, smc0, pbb, 13);
7209 -DEV_CLK(mck, smc0, hsb, 0);
7210 -
7211 -static struct platform_device pdc_device = {
7212 - .name = "pdc",
7213 - .id = 0,
7214 -};
7215 -DEV_CLK(hclk, pdc, hsb, 4);
7216 -DEV_CLK(pclk, pdc, pba, 16);
7217 -
7218 -static struct clk pico_clk = {
7219 - .name = "pico",
7220 - .parent = &cpu_clk,
7221 - .mode = cpu_clk_mode,
7222 - .get_rate = cpu_clk_get_rate,
7223 - .users = 1,
7224 -};
7225 -
7226 -static struct resource dmaca0_resource[] = {
7227 - {
7228 - .start = 0xff200000,
7229 - .end = 0xff20ffff,
7230 - .flags = IORESOURCE_MEM,
7231 - },
7232 - IRQ(2),
7233 -};
7234 -DEFINE_DEV(dmaca, 0);
7235 -DEV_CLK(hclk, dmaca0, hsb, 10);
7236 -
7237 -/* --------------------------------------------------------------------
7238 - * HMATRIX
7239 - * -------------------------------------------------------------------- */
7240 -
7241 -static struct clk hmatrix_clk = {
7242 - .name = "hmatrix_clk",
7243 - .parent = &pbb_clk,
7244 - .mode = pbb_clk_mode,
7245 - .get_rate = pbb_clk_get_rate,
7246 - .index = 2,
7247 - .users = 1,
7248 -};
7249 -#define HMATRIX_BASE ((void __iomem *)0xfff00800)
7250 -
7251 -#define hmatrix_readl(reg) \
7252 - __raw_readl((HMATRIX_BASE) + HMATRIX_##reg)
7253 -#define hmatrix_writel(reg,value) \
7254 - __raw_writel((value), (HMATRIX_BASE) + HMATRIX_##reg)
7255 -
7256 -/*
7257 - * Set bits in the HMATRIX Special Function Register (SFR) used by the
7258 - * External Bus Interface (EBI). This can be used to enable special
7259 - * features like CompactFlash support, NAND Flash support, etc. on
7260 - * certain chipselects.
7261 - */
7262 -static inline void set_ebi_sfr_bits(u32 mask)
7263 -{
7264 - u32 sfr;
7265 -
7266 - clk_enable(&hmatrix_clk);
7267 - sfr = hmatrix_readl(SFR4);
7268 - sfr |= mask;
7269 - hmatrix_writel(SFR4, sfr);
7270 - clk_disable(&hmatrix_clk);
7271 -}
7272 -
7273 -/* --------------------------------------------------------------------
7274 - * System Timer/Counter (TC)
7275 - * -------------------------------------------------------------------- */
7276 -static struct resource at32_systc0_resource[] = {
7277 - PBMEM(0xfff00c00),
7278 - IRQ(22),
7279 -};
7280 -struct platform_device at32_systc0_device = {
7281 - .name = "systc",
7282 - .id = 0,
7283 - .resource = at32_systc0_resource,
7284 - .num_resources = ARRAY_SIZE(at32_systc0_resource),
7285 -};
7286 -DEV_CLK(pclk, at32_systc0, pbb, 3);
7287 -
7288 -/* --------------------------------------------------------------------
7289 - * PIO
7290 - * -------------------------------------------------------------------- */
7291 -
7292 -static struct resource pio0_resource[] = {
7293 - PBMEM(0xffe02800),
7294 - IRQ(13),
7295 -};
7296 -DEFINE_DEV(pio, 0);
7297 -DEV_CLK(mck, pio0, pba, 10);
7298 -
7299 -static struct resource pio1_resource[] = {
7300 - PBMEM(0xffe02c00),
7301 - IRQ(14),
7302 -};
7303 -DEFINE_DEV(pio, 1);
7304 -DEV_CLK(mck, pio1, pba, 11);
7305 -
7306 -static struct resource pio2_resource[] = {
7307 - PBMEM(0xffe03000),
7308 - IRQ(15),
7309 -};
7310 -DEFINE_DEV(pio, 2);
7311 -DEV_CLK(mck, pio2, pba, 12);
7312 -
7313 -static struct resource pio3_resource[] = {
7314 - PBMEM(0xffe03400),
7315 - IRQ(16),
7316 -};
7317 -DEFINE_DEV(pio, 3);
7318 -DEV_CLK(mck, pio3, pba, 13);
7319 -
7320 -static struct resource pio4_resource[] = {
7321 - PBMEM(0xffe03800),
7322 - IRQ(17),
7323 -};
7324 -DEFINE_DEV(pio, 4);
7325 -DEV_CLK(mck, pio4, pba, 14);
7326 -
7327 -void __init at32_add_system_devices(void)
7328 -{
7329 - platform_device_register(&at32_pm0_device);
7330 - platform_device_register(&at32_intc0_device);
7331 - platform_device_register(&at32ap700x_rtc0_device);
7332 - platform_device_register(&at32_wdt0_device);
7333 - platform_device_register(&at32_eic0_device);
7334 - platform_device_register(&smc0_device);
7335 - platform_device_register(&pdc_device);
7336 - platform_device_register(&dmaca0_device);
7337 -
7338 - platform_device_register(&at32_systc0_device);
7339 -
7340 - platform_device_register(&pio0_device);
7341 - platform_device_register(&pio1_device);
7342 - platform_device_register(&pio2_device);
7343 - platform_device_register(&pio3_device);
7344 - platform_device_register(&pio4_device);
7345 -}
7346 -
7347 -/* --------------------------------------------------------------------
7348 - * USART
7349 - * -------------------------------------------------------------------- */
7350 -
7351 -static struct atmel_uart_data atmel_usart0_data = {
7352 - .use_dma_tx = 1,
7353 - .use_dma_rx = 1,
7354 -};
7355 -static struct resource atmel_usart0_resource[] = {
7356 - PBMEM(0xffe00c00),
7357 - IRQ(6),
7358 -};
7359 -DEFINE_DEV_DATA(atmel_usart, 0);
7360 -DEV_CLK(usart, atmel_usart0, pba, 3);
7361 -
7362 -static struct atmel_uart_data atmel_usart1_data = {
7363 - .use_dma_tx = 1,
7364 - .use_dma_rx = 1,
7365 -};
7366 -static struct resource atmel_usart1_resource[] = {
7367 - PBMEM(0xffe01000),
7368 - IRQ(7),
7369 -};
7370 -DEFINE_DEV_DATA(atmel_usart, 1);
7371 -DEV_CLK(usart, atmel_usart1, pba, 4);
7372 -
7373 -static struct atmel_uart_data atmel_usart2_data = {
7374 - .use_dma_tx = 1,
7375 - .use_dma_rx = 1,
7376 -};
7377 -static struct resource atmel_usart2_resource[] = {
7378 - PBMEM(0xffe01400),
7379 - IRQ(8),
7380 -};
7381 -DEFINE_DEV_DATA(atmel_usart, 2);
7382 -DEV_CLK(usart, atmel_usart2, pba, 5);
7383 -
7384 -static struct atmel_uart_data atmel_usart3_data = {
7385 - .use_dma_tx = 1,
7386 - .use_dma_rx = 1,
7387 -};
7388 -static struct resource atmel_usart3_resource[] = {
7389 - PBMEM(0xffe01800),
7390 - IRQ(9),
7391 -};
7392 -DEFINE_DEV_DATA(atmel_usart, 3);
7393 -DEV_CLK(usart, atmel_usart3, pba, 6);
7394 -
7395 -static inline void configure_usart0_pins(void)
7396 -{
7397 - select_peripheral(PA(8), PERIPH_B, 0); /* RXD */
7398 - select_peripheral(PA(9), PERIPH_B, 0); /* TXD */
7399 -}
7400 -
7401 -static inline void configure_usart1_pins(void)
7402 -{
7403 - select_peripheral(PA(17), PERIPH_A, 0); /* RXD */
7404 - select_peripheral(PA(18), PERIPH_A, 0); /* TXD */
7405 -}
7406 -
7407 -static inline void configure_usart2_pins(void)
7408 -{
7409 - select_peripheral(PB(26), PERIPH_B, 0); /* RXD */
7410 - select_peripheral(PB(27), PERIPH_B, 0); /* TXD */
7411 -}
7412 -
7413 -static inline void configure_usart3_pins(void)
7414 -{
7415 - select_peripheral(PB(18), PERIPH_B, 0); /* RXD */
7416 - select_peripheral(PB(17), PERIPH_B, 0); /* TXD */
7417 -}
7418 -
7419 -static struct platform_device *__initdata at32_usarts[4];
7420 -
7421 -void __init at32_map_usart(unsigned int hw_id, unsigned int line)
7422 -{
7423 - struct platform_device *pdev;
7424 -
7425 - switch (hw_id) {
7426 - case 0:
7427 - pdev = &atmel_usart0_device;
7428 - configure_usart0_pins();
7429 - break;
7430 - case 1:
7431 - pdev = &atmel_usart1_device;
7432 - configure_usart1_pins();
7433 - break;
7434 - case 2:
7435 - pdev = &atmel_usart2_device;
7436 - configure_usart2_pins();
7437 - break;
7438 - case 3:
7439 - pdev = &atmel_usart3_device;
7440 - configure_usart3_pins();
7441 - break;
7442 - default:
7443 - return;
7444 - }
7445 -
7446 - if (PXSEG(pdev->resource[0].start) == P4SEG) {
7447 - /* Addresses in the P4 segment are permanently mapped 1:1 */
7448 - struct atmel_uart_data *data = pdev->dev.platform_data;
7449 - data->regs = (void __iomem *)pdev->resource[0].start;
7450 - }
7451 -
7452 - pdev->id = line;
7453 - at32_usarts[line] = pdev;
7454 -}
7455 -
7456 -struct platform_device *__init at32_add_device_usart(unsigned int id)
7457 -{
7458 - platform_device_register(at32_usarts[id]);
7459 - return at32_usarts[id];
7460 -}
7461 -
7462 -struct platform_device *atmel_default_console_device;
7463 -
7464 -void __init at32_setup_serial_console(unsigned int usart_id)
7465 -{
7466 - atmel_default_console_device = at32_usarts[usart_id];
7467 -}
7468 -
7469 -/* --------------------------------------------------------------------
7470 - * Ethernet
7471 - * -------------------------------------------------------------------- */
7472 -
7473 -static struct eth_platform_data macb0_data;
7474 -static struct resource macb0_resource[] = {
7475 - PBMEM(0xfff01800),
7476 - IRQ(25),
7477 -};
7478 -DEFINE_DEV_DATA(macb, 0);
7479 -DEV_CLK(hclk, macb0, hsb, 8);
7480 -DEV_CLK(pclk, macb0, pbb, 6);
7481 -
7482 -static struct eth_platform_data macb1_data;
7483 -static struct resource macb1_resource[] = {
7484 - PBMEM(0xfff01c00),
7485 - IRQ(26),
7486 -};
7487 -DEFINE_DEV_DATA(macb, 1);
7488 -DEV_CLK(hclk, macb1, hsb, 9);
7489 -DEV_CLK(pclk, macb1, pbb, 7);
7490 -
7491 -struct platform_device *__init
7492 -at32_add_device_eth(unsigned int id, struct eth_platform_data *data)
7493 -{
7494 - struct platform_device *pdev;
7495 -
7496 - switch (id) {
7497 - case 0:
7498 - pdev = &macb0_device;
7499 -
7500 - select_peripheral(PC(3), PERIPH_A, 0); /* TXD0 */
7501 - select_peripheral(PC(4), PERIPH_A, 0); /* TXD1 */
7502 - select_peripheral(PC(7), PERIPH_A, 0); /* TXEN */
7503 - select_peripheral(PC(8), PERIPH_A, 0); /* TXCK */
7504 - select_peripheral(PC(9), PERIPH_A, 0); /* RXD0 */
7505 - select_peripheral(PC(10), PERIPH_A, 0); /* RXD1 */
7506 - select_peripheral(PC(13), PERIPH_A, 0); /* RXER */
7507 - select_peripheral(PC(15), PERIPH_A, 0); /* RXDV */
7508 - select_peripheral(PC(16), PERIPH_A, 0); /* MDC */
7509 - select_peripheral(PC(17), PERIPH_A, 0); /* MDIO */
7510 -
7511 - if (!data->is_rmii) {
7512 - select_peripheral(PC(0), PERIPH_A, 0); /* COL */
7513 - select_peripheral(PC(1), PERIPH_A, 0); /* CRS */
7514 - select_peripheral(PC(2), PERIPH_A, 0); /* TXER */
7515 - select_peripheral(PC(5), PERIPH_A, 0); /* TXD2 */
7516 - select_peripheral(PC(6), PERIPH_A, 0); /* TXD3 */
7517 - select_peripheral(PC(11), PERIPH_A, 0); /* RXD2 */
7518 - select_peripheral(PC(12), PERIPH_A, 0); /* RXD3 */
7519 - select_peripheral(PC(14), PERIPH_A, 0); /* RXCK */
7520 - select_peripheral(PC(18), PERIPH_A, 0); /* SPD */
7521 - }
7522 - break;
7523 -
7524 - case 1:
7525 - pdev = &macb1_device;
7526 -
7527 - select_peripheral(PD(13), PERIPH_B, 0); /* TXD0 */
7528 - select_peripheral(PD(14), PERIPH_B, 0); /* TXD1 */
7529 - select_peripheral(PD(11), PERIPH_B, 0); /* TXEN */
7530 - select_peripheral(PD(12), PERIPH_B, 0); /* TXCK */
7531 - select_peripheral(PD(10), PERIPH_B, 0); /* RXD0 */
7532 - select_peripheral(PD(6), PERIPH_B, 0); /* RXD1 */
7533 - select_peripheral(PD(5), PERIPH_B, 0); /* RXER */
7534 - select_peripheral(PD(4), PERIPH_B, 0); /* RXDV */
7535 - select_peripheral(PD(3), PERIPH_B, 0); /* MDC */
7536 - select_peripheral(PD(2), PERIPH_B, 0); /* MDIO */
7537 -
7538 - if (!data->is_rmii) {
7539 - select_peripheral(PC(19), PERIPH_B, 0); /* COL */
7540 - select_peripheral(PC(23), PERIPH_B, 0); /* CRS */
7541 - select_peripheral(PC(26), PERIPH_B, 0); /* TXER */
7542 - select_peripheral(PC(27), PERIPH_B, 0); /* TXD2 */
7543 - select_peripheral(PC(28), PERIPH_B, 0); /* TXD3 */
7544 - select_peripheral(PC(29), PERIPH_B, 0); /* RXD2 */
7545 - select_peripheral(PC(30), PERIPH_B, 0); /* RXD3 */
7546 - select_peripheral(PC(24), PERIPH_B, 0); /* RXCK */
7547 - select_peripheral(PD(15), PERIPH_B, 0); /* SPD */
7548 - }
7549 - break;
7550 -
7551 - default:
7552 - return NULL;
7553 - }
7554 -
7555 - memcpy(pdev->dev.platform_data, data, sizeof(struct eth_platform_data));
7556 - platform_device_register(pdev);
7557 -
7558 - return pdev;
7559 -}
7560 -
7561 -/* --------------------------------------------------------------------
7562 - * SPI
7563 - * -------------------------------------------------------------------- */
7564 -static struct resource atmel_spi0_resource[] = {
7565 - PBMEM(0xffe00000),
7566 - IRQ(3),
7567 -};
7568 -DEFINE_DEV(atmel_spi, 0);
7569 -DEV_CLK(spi_clk, atmel_spi0, pba, 0);
7570 -
7571 -static struct resource atmel_spi1_resource[] = {
7572 - PBMEM(0xffe00400),
7573 - IRQ(4),
7574 -};
7575 -DEFINE_DEV(atmel_spi, 1);
7576 -DEV_CLK(spi_clk, atmel_spi1, pba, 1);
7577 -
7578 -static void __init
7579 -at32_spi_setup_slaves(unsigned int bus_num, struct spi_board_info *b,
7580 - unsigned int n, const u8 *pins)
7581 -{
7582 - unsigned int pin, mode;
7583 -
7584 - for (; n; n--, b++) {
7585 - b->bus_num = bus_num;
7586 - if (b->chip_select >= 4)
7587 - continue;
7588 - pin = (unsigned)b->controller_data;
7589 - if (!pin) {
7590 - pin = pins[b->chip_select];
7591 - b->controller_data = (void *)pin;
7592 - }
7593 - mode = AT32_GPIOF_OUTPUT;
7594 - if (!(b->mode & SPI_CS_HIGH))
7595 - mode |= AT32_GPIOF_HIGH;
7596 - at32_select_gpio(pin, mode);
7597 - }
7598 -}
7599 -
7600 -struct platform_device *__init
7601 -at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n)
7602 -{
7603 - /*
7604 - * Manage the chipselects as GPIOs, normally using the same pins
7605 - * the SPI controller expects; but boards can use other pins.
7606 - */
7607 - static u8 __initdata spi0_pins[] =
7608 - { GPIO_PIN_PA(3), GPIO_PIN_PA(4),
7609 - GPIO_PIN_PA(5), GPIO_PIN_PA(20), };
7610 - static u8 __initdata spi1_pins[] =
7611 - { GPIO_PIN_PB(2), GPIO_PIN_PB(3),
7612 - GPIO_PIN_PB(4), GPIO_PIN_PA(27), };
7613 - struct platform_device *pdev;
7614 -
7615 - switch (id) {
7616 - case 0:
7617 - pdev = &atmel_spi0_device;
7618 - select_peripheral(PA(0), PERIPH_A, 0); /* MISO */
7619 - select_peripheral(PA(1), PERIPH_A, 0); /* MOSI */
7620 - select_peripheral(PA(2), PERIPH_A, 0); /* SCK */
7621 - at32_spi_setup_slaves(0, b, n, spi0_pins);
7622 - break;
7623 -
7624 - case 1:
7625 - pdev = &atmel_spi1_device;
7626 - select_peripheral(PB(0), PERIPH_B, 0); /* MISO */
7627 - select_peripheral(PB(1), PERIPH_B, 0); /* MOSI */
7628 - select_peripheral(PB(5), PERIPH_B, 0); /* SCK */
7629 - at32_spi_setup_slaves(1, b, n, spi1_pins);
7630 - break;
7631 -
7632 - default:
7633 - return NULL;
7634 - }
7635 -
7636 - spi_register_board_info(b, n);
7637 - platform_device_register(pdev);
7638 - return pdev;
7639 -}
7640 -
7641 -/* --------------------------------------------------------------------
7642 - * TWI
7643 - * -------------------------------------------------------------------- */
7644 -static struct resource atmel_twi0_resource[] __initdata = {
7645 - PBMEM(0xffe00800),
7646 - IRQ(5),
7647 -};
7648 -static struct clk atmel_twi0_pclk = {
7649 - .name = "twi_pclk",
7650 - .parent = &pba_clk,
7651 - .mode = pba_clk_mode,
7652 - .get_rate = pba_clk_get_rate,
7653 - .index = 2,
7654 -};
7655 -
7656 -struct platform_device *__init at32_add_device_twi(unsigned int id)
7657 -{
7658 - struct platform_device *pdev;
7659 -
7660 - if (id != 0)
7661 - return NULL;
7662 -
7663 - pdev = platform_device_alloc("atmel_twi", id);
7664 - if (!pdev)
7665 - return NULL;
7666 -
7667 - if (platform_device_add_resources(pdev, atmel_twi0_resource,
7668 - ARRAY_SIZE(atmel_twi0_resource)))
7669 - goto err_add_resources;
7670 -
7671 - select_peripheral(PA(6), PERIPH_A, 0); /* SDA */
7672 - select_peripheral(PA(7), PERIPH_A, 0); /* SDL */
7673 -
7674 - atmel_twi0_pclk.dev = &pdev->dev;
7675 -
7676 - platform_device_add(pdev);
7677 - return pdev;
7678 -
7679 -err_add_resources:
7680 - platform_device_put(pdev);
7681 - return NULL;
7682 -}
7683 -
7684 -/* --------------------------------------------------------------------
7685 - * MMC
7686 - * -------------------------------------------------------------------- */
7687 -static struct resource atmel_mci0_resource[] __initdata = {
7688 - PBMEM(0xfff02400),
7689 - IRQ(28),
7690 -};
7691 -static struct clk atmel_mci0_pclk = {
7692 - .name = "mci_clk",
7693 - .parent = &pbb_clk,
7694 - .mode = pbb_clk_mode,
7695 - .get_rate = pbb_clk_get_rate,
7696 - .index = 9,
7697 -};
7698 -
7699 -struct platform_device *__init at32_add_device_mci(unsigned int id)
7700 -{
7701 - struct platform_device *pdev;
7702 -
7703 - if (id != 0)
7704 - return NULL;
7705 -
7706 - pdev = platform_device_alloc("atmel_mci", id);
7707 - if (!pdev)
7708 - return NULL;
7709 -
7710 - if (platform_device_add_resources(pdev, atmel_mci0_resource,
7711 - ARRAY_SIZE(atmel_mci0_resource)))
7712 - goto err_add_resources;
7713 -
7714 - select_peripheral(PA(10), PERIPH_A, 0); /* CLK */
7715 - select_peripheral(PA(11), PERIPH_A, 0); /* CMD */
7716 - select_peripheral(PA(12), PERIPH_A, 0); /* DATA0 */
7717 - select_peripheral(PA(13), PERIPH_A, 0); /* DATA1 */
7718 - select_peripheral(PA(14), PERIPH_A, 0); /* DATA2 */
7719 - select_peripheral(PA(15), PERIPH_A, 0); /* DATA3 */
7720 -
7721 - atmel_mci0_pclk.dev = &pdev->dev;
7722 -
7723 - platform_device_add(pdev);
7724 - return pdev;
7725 -
7726 -err_add_resources:
7727 - platform_device_put(pdev);
7728 - return NULL;
7729 -}
7730 -
7731 -/* --------------------------------------------------------------------
7732 - * LCDC
7733 - * -------------------------------------------------------------------- */
7734 -static struct atmel_lcdfb_info atmel_lcdfb0_data;
7735 -static struct resource atmel_lcdfb0_resource[] = {
7736 - {
7737 - .start = 0xff000000,
7738 - .end = 0xff000fff,
7739 - .flags = IORESOURCE_MEM,
7740 - },
7741 - IRQ(1),
7742 - {
7743 - /* Placeholder for pre-allocated fb memory */
7744 - .start = 0x00000000,
7745 - .end = 0x00000000,
7746 - .flags = 0,
7747 - },
7748 -};
7749 -DEFINE_DEV_DATA(atmel_lcdfb, 0);
7750 -DEV_CLK(hck1, atmel_lcdfb0, hsb, 7);
7751 -static struct clk atmel_lcdfb0_pixclk = {
7752 - .name = "lcdc_clk",
7753 - .dev = &atmel_lcdfb0_device.dev,
7754 - .mode = genclk_mode,
7755 - .get_rate = genclk_get_rate,
7756 - .set_rate = genclk_set_rate,
7757 - .set_parent = genclk_set_parent,
7758 - .index = 7,
7759 -};
7760 -
7761 -struct platform_device *__init
7762 -at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
7763 - unsigned long fbmem_start, unsigned long fbmem_len)
7764 -{
7765 - struct platform_device *pdev;
7766 - struct atmel_lcdfb_info *info;
7767 - struct fb_monspecs *monspecs;
7768 - struct fb_videomode *modedb;
7769 - unsigned int modedb_size;
7770 -
7771 - /*
7772 - * Do a deep copy of the fb data, monspecs and modedb. Make
7773 - * sure all allocations are done before setting up the
7774 - * portmux.
7775 - */
7776 - monspecs = kmemdup(data->default_monspecs,
7777 - sizeof(struct fb_monspecs), GFP_KERNEL);
7778 - if (!monspecs)
7779 - return NULL;
7780 -
7781 - modedb_size = sizeof(struct fb_videomode) * monspecs->modedb_len;
7782 - modedb = kmemdup(monspecs->modedb, modedb_size, GFP_KERNEL);
7783 - if (!modedb)
7784 - goto err_dup_modedb;
7785 - monspecs->modedb = modedb;
7786 -
7787 - switch (id) {
7788 - case 0:
7789 - pdev = &atmel_lcdfb0_device;
7790 - select_peripheral(PC(19), PERIPH_A, 0); /* CC */
7791 - select_peripheral(PC(20), PERIPH_A, 0); /* HSYNC */
7792 - select_peripheral(PC(21), PERIPH_A, 0); /* PCLK */
7793 - select_peripheral(PC(22), PERIPH_A, 0); /* VSYNC */
7794 - select_peripheral(PC(23), PERIPH_A, 0); /* DVAL */
7795 - select_peripheral(PC(24), PERIPH_A, 0); /* MODE */
7796 - select_peripheral(PC(25), PERIPH_A, 0); /* PWR */
7797 - select_peripheral(PC(26), PERIPH_A, 0); /* DATA0 */
7798 - select_peripheral(PC(27), PERIPH_A, 0); /* DATA1 */
7799 - select_peripheral(PC(28), PERIPH_A, 0); /* DATA2 */
7800 - select_peripheral(PC(29), PERIPH_A, 0); /* DATA3 */
7801 - select_peripheral(PC(30), PERIPH_A, 0); /* DATA4 */
7802 - select_peripheral(PC(31), PERIPH_A, 0); /* DATA5 */
7803 - select_peripheral(PD(0), PERIPH_A, 0); /* DATA6 */
7804 - select_peripheral(PD(1), PERIPH_A, 0); /* DATA7 */
7805 - select_peripheral(PD(2), PERIPH_A, 0); /* DATA8 */
7806 - select_peripheral(PD(3), PERIPH_A, 0); /* DATA9 */
7807 - select_peripheral(PD(4), PERIPH_A, 0); /* DATA10 */
7808 - select_peripheral(PD(5), PERIPH_A, 0); /* DATA11 */
7809 - select_peripheral(PD(6), PERIPH_A, 0); /* DATA12 */
7810 - select_peripheral(PD(7), PERIPH_A, 0); /* DATA13 */
7811 - select_peripheral(PD(8), PERIPH_A, 0); /* DATA14 */
7812 - select_peripheral(PD(9), PERIPH_A, 0); /* DATA15 */
7813 - select_peripheral(PD(10), PERIPH_A, 0); /* DATA16 */
7814 - select_peripheral(PD(11), PERIPH_A, 0); /* DATA17 */
7815 - select_peripheral(PD(12), PERIPH_A, 0); /* DATA18 */
7816 - select_peripheral(PD(13), PERIPH_A, 0); /* DATA19 */
7817 - select_peripheral(PD(14), PERIPH_A, 0); /* DATA20 */
7818 - select_peripheral(PD(15), PERIPH_A, 0); /* DATA21 */
7819 - select_peripheral(PD(16), PERIPH_A, 0); /* DATA22 */
7820 - select_peripheral(PD(17), PERIPH_A, 0); /* DATA23 */
7821 -
7822 - clk_set_parent(&atmel_lcdfb0_pixclk, &pll0);
7823 - clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0));
7824 - break;
7825 -
7826 - default:
7827 - goto err_invalid_id;
7828 - }
7829 -
7830 - if (fbmem_len) {
7831 - pdev->resource[2].start = fbmem_start;
7832 - pdev->resource[2].end = fbmem_start + fbmem_len - 1;
7833 - pdev->resource[2].flags = IORESOURCE_MEM;
7834 - }
7835 -
7836 - info = pdev->dev.platform_data;
7837 - memcpy(info, data, sizeof(struct atmel_lcdfb_info));
7838 - info->default_monspecs = monspecs;
7839 -
7840 - platform_device_register(pdev);
7841 - return pdev;
7842 -
7843 -err_invalid_id:
7844 - kfree(modedb);
7845 -err_dup_modedb:
7846 - kfree(monspecs);
7847 - return NULL;
7848 -}
7849 -
7850 -/* --------------------------------------------------------------------
7851 - * SSC
7852 - * -------------------------------------------------------------------- */
7853 -static struct resource ssc0_resource[] = {
7854 - PBMEM(0xffe01c00),
7855 - IRQ(10),
7856 -};
7857 -DEFINE_DEV(ssc, 0);
7858 -DEV_CLK(pclk, ssc0, pba, 7);
7859 -
7860 -static struct resource ssc1_resource[] = {
7861 - PBMEM(0xffe02000),
7862 - IRQ(11),
7863 -};
7864 -DEFINE_DEV(ssc, 1);
7865 -DEV_CLK(pclk, ssc1, pba, 8);
7866 -
7867 -static struct resource ssc2_resource[] = {
7868 - PBMEM(0xffe02400),
7869 - IRQ(12),
7870 -};
7871 -DEFINE_DEV(ssc, 2);
7872 -DEV_CLK(pclk, ssc2, pba, 9);
7873 -
7874 -struct platform_device *__init
7875 -at32_add_device_ssc(unsigned int id, unsigned int flags)
7876 -{
7877 - struct platform_device *pdev;
7878 -
7879 - switch (id) {
7880 - case 0:
7881 - pdev = &ssc0_device;
7882 - if (flags & ATMEL_SSC_RF)
7883 - select_peripheral(PA(21), PERIPH_A, 0); /* RF */
7884 - if (flags & ATMEL_SSC_RK)
7885 - select_peripheral(PA(22), PERIPH_A, 0); /* RK */
7886 - if (flags & ATMEL_SSC_TK)
7887 - select_peripheral(PA(23), PERIPH_A, 0); /* TK */
7888 - if (flags & ATMEL_SSC_TF)
7889 - select_peripheral(PA(24), PERIPH_A, 0); /* TF */
7890 - if (flags & ATMEL_SSC_TD)
7891 - select_peripheral(PA(25), PERIPH_A, 0); /* TD */
7892 - if (flags & ATMEL_SSC_RD)
7893 - select_peripheral(PA(26), PERIPH_A, 0); /* RD */
7894 - break;
7895 - case 1:
7896 - pdev = &ssc1_device;
7897 - if (flags & ATMEL_SSC_RF)
7898 - select_peripheral(PA(0), PERIPH_B, 0); /* RF */
7899 - if (flags & ATMEL_SSC_RK)
7900 - select_peripheral(PA(1), PERIPH_B, 0); /* RK */
7901 - if (flags & ATMEL_SSC_TK)
7902 - select_peripheral(PA(2), PERIPH_B, 0); /* TK */
7903 - if (flags & ATMEL_SSC_TF)
7904 - select_peripheral(PA(3), PERIPH_B, 0); /* TF */
7905 - if (flags & ATMEL_SSC_TD)
7906 - select_peripheral(PA(4), PERIPH_B, 0); /* TD */
7907 - if (flags & ATMEL_SSC_RD)
7908 - select_peripheral(PA(5), PERIPH_B, 0); /* RD */
7909 - break;
7910 - case 2:
7911 - pdev = &ssc2_device;
7912 - if (flags & ATMEL_SSC_TD)
7913 - select_peripheral(PB(13), PERIPH_A, 0); /* TD */
7914 - if (flags & ATMEL_SSC_RD)
7915 - select_peripheral(PB(14), PERIPH_A, 0); /* RD */
7916 - if (flags & ATMEL_SSC_TK)
7917 - select_peripheral(PB(15), PERIPH_A, 0); /* TK */
7918 - if (flags & ATMEL_SSC_TF)
7919 - select_peripheral(PB(16), PERIPH_A, 0); /* TF */
7920 - if (flags & ATMEL_SSC_RF)
7921 - select_peripheral(PB(17), PERIPH_A, 0); /* RF */
7922 - if (flags & ATMEL_SSC_RK)
7923 - select_peripheral(PB(18), PERIPH_A, 0); /* RK */
7924 - break;
7925 - default:
7926 - return NULL;
7927 - }
7928 -
7929 - platform_device_register(pdev);
7930 - return pdev;
7931 -}
7932 -
7933 -/* --------------------------------------------------------------------
7934 - * USB Device Controller
7935 - * -------------------------------------------------------------------- */
7936 -static struct resource usba0_resource[] __initdata = {
7937 - {
7938 - .start = 0xff300000,
7939 - .end = 0xff3fffff,
7940 - .flags = IORESOURCE_MEM,
7941 - }, {
7942 - .start = 0xfff03000,
7943 - .end = 0xfff033ff,
7944 - .flags = IORESOURCE_MEM,
7945 - },
7946 - IRQ(31),
7947 -};
7948 -static struct clk usba0_pclk = {
7949 - .name = "pclk",
7950 - .parent = &pbb_clk,
7951 - .mode = pbb_clk_mode,
7952 - .get_rate = pbb_clk_get_rate,
7953 - .index = 12,
7954 -};
7955 -static struct clk usba0_hclk = {
7956 - .name = "hclk",
7957 - .parent = &hsb_clk,
7958 - .mode = hsb_clk_mode,
7959 - .get_rate = hsb_clk_get_rate,
7960 - .index = 6,
7961 -};
7962 -
7963 -struct platform_device *__init
7964 -at32_add_device_usba(unsigned int id, struct usba_platform_data *data)
7965 -{
7966 - struct platform_device *pdev;
7967 -
7968 - if (id != 0)
7969 - return NULL;
7970 -
7971 - pdev = platform_device_alloc("atmel_usba_udc", 0);
7972 - if (!pdev)
7973 - return NULL;
7974 -
7975 - if (platform_device_add_resources(pdev, usba0_resource,
7976 - ARRAY_SIZE(usba0_resource)))
7977 - goto out_free_pdev;
7978 -
7979 - if (data) {
7980 - if (platform_device_add_data(pdev, data, sizeof(*data)))
7981 - goto out_free_pdev;
7982 -
7983 - if (data->vbus_pin != GPIO_PIN_NONE)
7984 - at32_select_gpio(data->vbus_pin, 0);
7985 - }
7986 -
7987 - usba0_pclk.dev = &pdev->dev;
7988 - usba0_hclk.dev = &pdev->dev;
7989 -
7990 - platform_device_add(pdev);
7991 -
7992 - return pdev;
7993 -
7994 -out_free_pdev:
7995 - platform_device_put(pdev);
7996 - return NULL;
7997 -}
7998 -
7999 -/* --------------------------------------------------------------------
8000 - * IDE / CompactFlash
8001 - * -------------------------------------------------------------------- */
8002 -static struct resource at32_smc_cs4_resource[] __initdata = {
8003 - {
8004 - .start = 0x04000000,
8005 - .end = 0x07ffffff,
8006 - .flags = IORESOURCE_MEM,
8007 - },
8008 - IRQ(~0UL), /* Magic IRQ will be overridden */
8009 -};
8010 -static struct resource at32_smc_cs5_resource[] __initdata = {
8011 - {
8012 - .start = 0x20000000,
8013 - .end = 0x23ffffff,
8014 - .flags = IORESOURCE_MEM,
8015 - },
8016 - IRQ(~0UL), /* Magic IRQ will be overridden */
8017 -};
8018 -
8019 -static int __init at32_init_ide_or_cf(struct platform_device *pdev,
8020 - unsigned int cs, unsigned int extint)
8021 -{
8022 - static unsigned int extint_pin_map[4] __initdata = {
8023 - GPIO_PIN_PB(25),
8024 - GPIO_PIN_PB(26),
8025 - GPIO_PIN_PB(27),
8026 - GPIO_PIN_PB(28),
8027 - };
8028 - static bool common_pins_initialized __initdata = false;
8029 - unsigned int extint_pin;
8030 - int ret;
8031 -
8032 - if (extint >= ARRAY_SIZE(extint_pin_map))
8033 - return -EINVAL;
8034 - extint_pin = extint_pin_map[extint];
8035 -
8036 - switch (cs) {
8037 - case 4:
8038 - ret = platform_device_add_resources(pdev,
8039 - at32_smc_cs4_resource,
8040 - ARRAY_SIZE(at32_smc_cs4_resource));
8041 - if (ret)
8042 - return ret;
8043 -
8044 - select_peripheral(PE(21), PERIPH_A, 0); /* NCS4 -> OE_N */
8045 - set_ebi_sfr_bits(HMATRIX_BIT(CS4A));
8046 - break;
8047 - case 5:
8048 - ret = platform_device_add_resources(pdev,
8049 - at32_smc_cs5_resource,
8050 - ARRAY_SIZE(at32_smc_cs5_resource));
8051 - if (ret)
8052 - return ret;
8053 -
8054 - select_peripheral(PE(22), PERIPH_A, 0); /* NCS5 -> OE_N */
8055 - set_ebi_sfr_bits(HMATRIX_BIT(CS5A));
8056 - break;
8057 - default:
8058 - return -EINVAL;
8059 - }
8060 -
8061 - if (!common_pins_initialized) {
8062 - select_peripheral(PE(19), PERIPH_A, 0); /* CFCE1 -> CS0_N */
8063 - select_peripheral(PE(20), PERIPH_A, 0); /* CFCE2 -> CS1_N */
8064 - select_peripheral(PE(23), PERIPH_A, 0); /* CFRNW -> DIR */
8065 - select_peripheral(PE(24), PERIPH_A, 0); /* NWAIT <- IORDY */
8066 - common_pins_initialized = true;
8067 - }
8068 -
8069 - at32_select_periph(extint_pin, GPIO_PERIPH_A, AT32_GPIOF_DEGLITCH);
8070 -
8071 - pdev->resource[1].start = EIM_IRQ_BASE + extint;
8072 - pdev->resource[1].end = pdev->resource[1].start;
8073 -
8074 - return 0;
8075 -}
8076 -
8077 -struct platform_device *__init
8078 -at32_add_device_ide(unsigned int id, unsigned int extint,
8079 - struct ide_platform_data *data)
8080 -{
8081 - struct platform_device *pdev;
8082 -
8083 - pdev = platform_device_alloc("at32_ide", id);
8084 - if (!pdev)
8085 - goto fail;
8086 -
8087 - if (platform_device_add_data(pdev, data,
8088 - sizeof(struct ide_platform_data)))
8089 - goto fail;
8090 -
8091 - if (at32_init_ide_or_cf(pdev, data->cs, extint))
8092 - goto fail;
8093 -
8094 - platform_device_add(pdev);
8095 - return pdev;
8096 -
8097 -fail:
8098 - platform_device_put(pdev);
8099 - return NULL;
8100 -}
8101 -
8102 -struct platform_device *__init
8103 -at32_add_device_cf(unsigned int id, unsigned int extint,
8104 - struct cf_platform_data *data)
8105 -{
8106 - struct platform_device *pdev;
8107 -
8108 - pdev = platform_device_alloc("at32_cf", id);
8109 - if (!pdev)
8110 - goto fail;
8111 -
8112 - if (platform_device_add_data(pdev, data,
8113 - sizeof(struct cf_platform_data)))
8114 - goto fail;
8115 -
8116 - if (at32_init_ide_or_cf(pdev, data->cs, extint))
8117 - goto fail;
8118 -
8119 - if (data->detect_pin != GPIO_PIN_NONE)
8120 - at32_select_gpio(data->detect_pin, AT32_GPIOF_DEGLITCH);
8121 - if (data->reset_pin != GPIO_PIN_NONE)
8122 - at32_select_gpio(data->reset_pin, 0);
8123 - if (data->vcc_pin != GPIO_PIN_NONE)
8124 - at32_select_gpio(data->vcc_pin, 0);
8125 - /* READY is used as extint, so we can't select it as gpio */
8126 -
8127 - platform_device_add(pdev);
8128 - return pdev;
8129 -
8130 -fail:
8131 - platform_device_put(pdev);
8132 - return NULL;
8133 -}
8134 -
8135 -/* --------------------------------------------------------------------
8136 - * AC97C
8137 - * -------------------------------------------------------------------- */
8138 -static struct resource atmel_ac97c0_resource[] __initdata = {
8139 - PBMEM(0xfff02800),
8140 - IRQ(29),
8141 -};
8142 -static struct clk atmel_ac97c0_pclk = {
8143 - .name = "pclk",
8144 - .parent = &pbb_clk,
8145 - .mode = pbb_clk_mode,
8146 - .get_rate = pbb_clk_get_rate,
8147 - .index = 10,
8148 -};
8149 -
8150 -struct platform_device *__init at32_add_device_ac97c(unsigned int id)
8151 -{
8152 - struct platform_device *pdev;
8153 -
8154 - if (id != 0)
8155 - return NULL;
8156 -
8157 - pdev = platform_device_alloc("atmel_ac97c", id);
8158 - if (!pdev)
8159 - return NULL;
8160 -
8161 - if (platform_device_add_resources(pdev, atmel_ac97c0_resource,
8162 - ARRAY_SIZE(atmel_ac97c0_resource)))
8163 - goto err_add_resources;
8164 -
8165 - select_peripheral(PB(20), PERIPH_B, 0); /* SYNC */
8166 - select_peripheral(PB(21), PERIPH_B, 0); /* SDO */
8167 - select_peripheral(PB(22), PERIPH_B, 0); /* SDI */
8168 - select_peripheral(PB(23), PERIPH_B, 0); /* SCLK */
8169 -
8170 - atmel_ac97c0_pclk.dev = &pdev->dev;
8171 -
8172 - platform_device_add(pdev);
8173 - return pdev;
8174 -
8175 -err_add_resources:
8176 - platform_device_put(pdev);
8177 - return NULL;
8178 -}
8179 -
8180 -/* --------------------------------------------------------------------
8181 - * ABDAC
8182 - * -------------------------------------------------------------------- */
8183 -static struct resource abdac0_resource[] __initdata = {
8184 - PBMEM(0xfff02000),
8185 - IRQ(27),
8186 -};
8187 -static struct clk abdac0_pclk = {
8188 - .name = "pclk",
8189 - .parent = &pbb_clk,
8190 - .mode = pbb_clk_mode,
8191 - .get_rate = pbb_clk_get_rate,
8192 - .index = 8,
8193 -};
8194 -static struct clk abdac0_sample_clk = {
8195 - .name = "sample_clk",
8196 - .mode = genclk_mode,
8197 - .get_rate = genclk_get_rate,
8198 - .set_rate = genclk_set_rate,
8199 - .set_parent = genclk_set_parent,
8200 - .index = 6,
8201 -};
8202 -
8203 -struct platform_device *__init at32_add_device_abdac(unsigned int id)
8204 -{
8205 - struct platform_device *pdev;
8206 -
8207 - if (id != 0)
8208 - return NULL;
8209 -
8210 - pdev = platform_device_alloc("abdac", id);
8211 - if (!pdev)
8212 - return NULL;
8213 -
8214 - if (platform_device_add_resources(pdev, abdac0_resource,
8215 - ARRAY_SIZE(abdac0_resource)))
8216 - goto err_add_resources;
8217 -
8218 - select_peripheral(PB(20), PERIPH_A, 0); /* DATA1 */
8219 - select_peripheral(PB(21), PERIPH_A, 0); /* DATA0 */
8220 - select_peripheral(PB(22), PERIPH_A, 0); /* DATAN1 */
8221 - select_peripheral(PB(23), PERIPH_A, 0); /* DATAN0 */
8222 -
8223 - abdac0_pclk.dev = &pdev->dev;
8224 - abdac0_sample_clk.dev = &pdev->dev;
8225 -
8226 - platform_device_add(pdev);
8227 - return pdev;
8228 -
8229 -err_add_resources:
8230 - platform_device_put(pdev);
8231 - return NULL;
8232 -}
8233 -
8234 -/* --------------------------------------------------------------------
8235 - * GCLK
8236 - * -------------------------------------------------------------------- */
8237 -static struct clk gclk0 = {
8238 - .name = "gclk0",
8239 - .mode = genclk_mode,
8240 - .get_rate = genclk_get_rate,
8241 - .set_rate = genclk_set_rate,
8242 - .set_parent = genclk_set_parent,
8243 - .index = 0,
8244 -};
8245 -static struct clk gclk1 = {
8246 - .name = "gclk1",
8247 - .mode = genclk_mode,
8248 - .get_rate = genclk_get_rate,
8249 - .set_rate = genclk_set_rate,
8250 - .set_parent = genclk_set_parent,
8251 - .index = 1,
8252 -};
8253 -static struct clk gclk2 = {
8254 - .name = "gclk2",
8255 - .mode = genclk_mode,
8256 - .get_rate = genclk_get_rate,
8257 - .set_rate = genclk_set_rate,
8258 - .set_parent = genclk_set_parent,
8259 - .index = 2,
8260 -};
8261 -static struct clk gclk3 = {
8262 - .name = "gclk3",
8263 - .mode = genclk_mode,
8264 - .get_rate = genclk_get_rate,
8265 - .set_rate = genclk_set_rate,
8266 - .set_parent = genclk_set_parent,
8267 - .index = 3,
8268 -};
8269 -static struct clk gclk4 = {
8270 - .name = "gclk4",
8271 - .mode = genclk_mode,
8272 - .get_rate = genclk_get_rate,
8273 - .set_rate = genclk_set_rate,
8274 - .set_parent = genclk_set_parent,
8275 - .index = 4,
8276 -};
8277 -
8278 -struct clk *at32_clock_list[] = {
8279 - &osc32k,
8280 - &osc0,
8281 - &osc1,
8282 - &pll0,
8283 - &pll1,
8284 - &cpu_clk,
8285 - &hsb_clk,
8286 - &pba_clk,
8287 - &pbb_clk,
8288 - &at32_pm_pclk,
8289 - &at32_intc0_pclk,
8290 - &hmatrix_clk,
8291 - &ebi_clk,
8292 - &hramc_clk,
8293 - &smc0_pclk,
8294 - &smc0_mck,
8295 - &pdc_hclk,
8296 - &pdc_pclk,
8297 - &dmaca0_hclk,
8298 - &pico_clk,
8299 - &pio0_mck,
8300 - &pio1_mck,
8301 - &pio2_mck,
8302 - &pio3_mck,
8303 - &pio4_mck,
8304 - &at32_systc0_pclk,
8305 - &atmel_usart0_usart,
8306 - &atmel_usart1_usart,
8307 - &atmel_usart2_usart,
8308 - &atmel_usart3_usart,
8309 - &macb0_hclk,
8310 - &macb0_pclk,
8311 - &macb1_hclk,
8312 - &macb1_pclk,
8313 - &atmel_spi0_spi_clk,
8314 - &atmel_spi1_spi_clk,
8315 - &atmel_twi0_pclk,
8316 - &atmel_mci0_pclk,
8317 - &atmel_lcdfb0_hck1,
8318 - &atmel_lcdfb0_pixclk,
8319 - &ssc0_pclk,
8320 - &ssc1_pclk,
8321 - &ssc2_pclk,
8322 - &usba0_hclk,
8323 - &usba0_pclk,
8324 - &atmel_ac97c0_pclk,
8325 - &abdac0_pclk,
8326 - &abdac0_sample_clk,
8327 - &gclk0,
8328 - &gclk1,
8329 - &gclk2,
8330 - &gclk3,
8331 - &gclk4,
8332 -};
8333 -unsigned int at32_nr_clocks = ARRAY_SIZE(at32_clock_list);
8334 -
8335 -void __init at32_portmux_init(void)
8336 -{
8337 - at32_init_pio(&pio0_device);
8338 - at32_init_pio(&pio1_device);
8339 - at32_init_pio(&pio2_device);
8340 - at32_init_pio(&pio3_device);
8341 - at32_init_pio(&pio4_device);
8342 -}
8343 -
8344 -void __init at32_clock_init(void)
8345 -{
8346 - u32 cpu_mask = 0, hsb_mask = 0, pba_mask = 0, pbb_mask = 0;
8347 - int i;
8348 -
8349 - if (pm_readl(MCCTRL) & PM_BIT(PLLSEL)) {
8350 - main_clock = &pll0;
8351 - cpu_clk.parent = &pll0;
8352 - } else {
8353 - main_clock = &osc0;
8354 - cpu_clk.parent = &osc0;
8355 - }
8356 -
8357 - if (pm_readl(PLL0) & PM_BIT(PLLOSC))
8358 - pll0.parent = &osc1;
8359 - if (pm_readl(PLL1) & PM_BIT(PLLOSC))
8360 - pll1.parent = &osc1;
8361 -
8362 - genclk_init_parent(&gclk0);
8363 - genclk_init_parent(&gclk1);
8364 - genclk_init_parent(&gclk2);
8365 - genclk_init_parent(&gclk3);
8366 - genclk_init_parent(&gclk4);
8367 - genclk_init_parent(&atmel_lcdfb0_pixclk);
8368 - genclk_init_parent(&abdac0_sample_clk);
8369 -
8370 - /*
8371 - * Turn on all clocks that have at least one user already, and
8372 - * turn off everything else. We only do this for module
8373 - * clocks, and even though it isn't particularly pretty to
8374 - * check the address of the mode function, it should do the
8375 - * trick...
8376 - */
8377 - for (i = 0; i < ARRAY_SIZE(at32_clock_list); i++) {
8378 - struct clk *clk = at32_clock_list[i];
8379 -
8380 - if (clk->users == 0)
8381 - continue;
8382 -
8383 - if (clk->mode == &cpu_clk_mode)
8384 - cpu_mask |= 1 << clk->index;
8385 - else if (clk->mode == &hsb_clk_mode)
8386 - hsb_mask |= 1 << clk->index;
8387 - else if (clk->mode == &pba_clk_mode)
8388 - pba_mask |= 1 << clk->index;
8389 - else if (clk->mode == &pbb_clk_mode)
8390 - pbb_mask |= 1 << clk->index;
8391 - }
8392 -
8393 - pm_writel(CPU_MASK, cpu_mask);
8394 - pm_writel(HSB_MASK, hsb_mask);
8395 - pm_writel(PBA_MASK, pba_mask);
8396 - pm_writel(PBB_MASK, pbb_mask);
8397 -}
8398 diff -urN linux-2.6.24.3/arch/avr32/mach-at32ap/at32ap700x.c avr32-2.6/arch/avr32/mach-at32ap/at32ap700x.c
8399 --- linux-2.6.24.3/arch/avr32/mach-at32ap/at32ap700x.c 1970-01-01 01:00:00.000000000 +0100
8400 +++ avr32-2.6/arch/avr32/mach-at32ap/at32ap700x.c 2008-04-23 20:12:35.000000000 +0200
8401 @@ -0,0 +1,1944 @@
8402 +/*
8403 + * Copyright (C) 2005-2006 Atmel Corporation
8404 + *
8405 + * This program is free software; you can redistribute it and/or modify
8406 + * it under the terms of the GNU General Public License version 2 as
8407 + * published by the Free Software Foundation.
8408 + */
8409 +#include <linux/clk.h>
8410 +#include <linux/fb.h>
8411 +#include <linux/init.h>
8412 +#include <linux/platform_device.h>
8413 +#include <linux/dma-mapping.h>
8414 +#include <linux/spi/spi.h>
8415 +#include <linux/usb/atmel_usba_udc.h>
8416 +
8417 +#include <asm/io.h>
8418 +#include <asm/irq.h>
8419 +
8420 +#include <asm/arch/at32ap700x.h>
8421 +#include <asm/arch/board.h>
8422 +#include <asm/arch/portmux.h>
8423 +
8424 +#include <video/atmel_lcdc.h>
8425 +
8426 +#include "clock.h"
8427 +#include "hmatrix.h"
8428 +#include "pio.h"
8429 +#include "pm.h"
8430 +
8431 +
8432 +#define PBMEM(base) \
8433 + { \
8434 + .start = base, \
8435 + .end = base + 0x3ff, \
8436 + .flags = IORESOURCE_MEM, \
8437 + }
8438 +#define IRQ(num) \
8439 + { \
8440 + .start = num, \
8441 + .end = num, \
8442 + .flags = IORESOURCE_IRQ, \
8443 + }
8444 +#define NAMED_IRQ(num, _name) \
8445 + { \
8446 + .start = num, \
8447 + .end = num, \
8448 + .name = _name, \
8449 + .flags = IORESOURCE_IRQ, \
8450 + }
8451 +
8452 +/* REVISIT these assume *every* device supports DMA, but several
8453 + * don't ... tc, smc, pio, rtc, watchdog, pwm, ps2, and more.
8454 + */
8455 +#define DEFINE_DEV(_name, _id) \
8456 +static u64 _name##_id##_dma_mask = DMA_32BIT_MASK; \
8457 +static struct platform_device _name##_id##_device = { \
8458 + .name = #_name, \
8459 + .id = _id, \
8460 + .dev = { \
8461 + .dma_mask = &_name##_id##_dma_mask, \
8462 + .coherent_dma_mask = DMA_32BIT_MASK, \
8463 + }, \
8464 + .resource = _name##_id##_resource, \
8465 + .num_resources = ARRAY_SIZE(_name##_id##_resource), \
8466 +}
8467 +#define DEFINE_DEV_DATA(_name, _id) \
8468 +static u64 _name##_id##_dma_mask = DMA_32BIT_MASK; \
8469 +static struct platform_device _name##_id##_device = { \
8470 + .name = #_name, \
8471 + .id = _id, \
8472 + .dev = { \
8473 + .dma_mask = &_name##_id##_dma_mask, \
8474 + .platform_data = &_name##_id##_data, \
8475 + .coherent_dma_mask = DMA_32BIT_MASK, \
8476 + }, \
8477 + .resource = _name##_id##_resource, \
8478 + .num_resources = ARRAY_SIZE(_name##_id##_resource), \
8479 +}
8480 +
8481 +#define select_peripheral(pin, periph, flags) \
8482 + at32_select_periph(GPIO_PIN_##pin, GPIO_##periph, flags)
8483 +
8484 +#define DEV_CLK(_name, devname, bus, _index) \
8485 +static struct clk devname##_##_name = { \
8486 + .name = #_name, \
8487 + .dev = &devname##_device.dev, \
8488 + .parent = &bus##_clk, \
8489 + .mode = bus##_clk_mode, \
8490 + .get_rate = bus##_clk_get_rate, \
8491 + .index = _index, \
8492 +}
8493 +
8494 +static DEFINE_SPINLOCK(pm_lock);
8495 +
8496 +unsigned long at32ap7000_osc_rates[3] = {
8497 + [0] = 32768,
8498 + /* FIXME: these are ATSTK1002-specific */
8499 + [1] = 20000000,
8500 + [2] = 12000000,
8501 +};
8502 +
8503 +static unsigned long osc_get_rate(struct clk *clk)
8504 +{
8505 + return at32ap7000_osc_rates[clk->index];
8506 +}
8507 +
8508 +static unsigned long pll_get_rate(struct clk *clk, unsigned long control)
8509 +{
8510 + unsigned long div, mul, rate;
8511 +
8512 + if (!(control & PM_BIT(PLLEN)))
8513 + return 0;
8514 +
8515 + div = PM_BFEXT(PLLDIV, control) + 1;
8516 + mul = PM_BFEXT(PLLMUL, control) + 1;
8517 +
8518 + rate = clk->parent->get_rate(clk->parent);
8519 + rate = (rate + div / 2) / div;
8520 + rate *= mul;
8521 +
8522 + return rate;
8523 +}
8524 +
8525 +static unsigned long pll0_get_rate(struct clk *clk)
8526 +{
8527 + u32 control;
8528 +
8529 + control = pm_readl(PLL0);
8530 +
8531 + return pll_get_rate(clk, control);
8532 +}
8533 +
8534 +static unsigned long pll1_get_rate(struct clk *clk)
8535 +{
8536 + u32 control;
8537 +
8538 + control = pm_readl(PLL1);
8539 +
8540 + return pll_get_rate(clk, control);
8541 +}
8542 +
8543 +/*
8544 + * The AT32AP7000 has five primary clock sources: One 32kHz
8545 + * oscillator, two crystal oscillators and two PLLs.
8546 + */
8547 +static struct clk osc32k = {
8548 + .name = "osc32k",
8549 + .get_rate = osc_get_rate,
8550 + .users = 1,
8551 + .index = 0,
8552 +};
8553 +static struct clk osc0 = {
8554 + .name = "osc0",
8555 + .get_rate = osc_get_rate,
8556 + .users = 1,
8557 + .index = 1,
8558 +};
8559 +static struct clk osc1 = {
8560 + .name = "osc1",
8561 + .get_rate = osc_get_rate,
8562 + .index = 2,
8563 +};
8564 +static struct clk pll0 = {
8565 + .name = "pll0",
8566 + .get_rate = pll0_get_rate,
8567 + .parent = &osc0,
8568 +};
8569 +static struct clk pll1 = {
8570 + .name = "pll1",
8571 + .get_rate = pll1_get_rate,
8572 + .parent = &osc0,
8573 +};
8574 +
8575 +/*
8576 + * The main clock can be either osc0 or pll0. The boot loader may
8577 + * have chosen one for us, so we don't really know which one until we
8578 + * have a look at the SM.
8579 + */
8580 +static struct clk *main_clock;
8581 +
8582 +/*
8583 + * Synchronous clocks are generated from the main clock. The clocks
8584 + * must satisfy the constraint
8585 + * fCPU >= fHSB >= fPB
8586 + * i.e. each clock must not be faster than its parent.
8587 + */
8588 +static unsigned long bus_clk_get_rate(struct clk *clk, unsigned int shift)
8589 +{
8590 + return main_clock->get_rate(main_clock) >> shift;
8591 +};
8592 +
8593 +static void cpu_clk_mode(struct clk *clk, int enabled)
8594 +{
8595 + unsigned long flags;
8596 + u32 mask;
8597 +
8598 + spin_lock_irqsave(&pm_lock, flags);
8599 + mask = pm_readl(CPU_MASK);
8600 + if (enabled)
8601 + mask |= 1 << clk->index;
8602 + else
8603 + mask &= ~(1 << clk->index);
8604 + pm_writel(CPU_MASK, mask);
8605 + spin_unlock_irqrestore(&pm_lock, flags);
8606 +}
8607 +
8608 +static unsigned long cpu_clk_get_rate(struct clk *clk)
8609 +{
8610 + unsigned long cksel, shift = 0;
8611 +
8612 + cksel = pm_readl(CKSEL);
8613 + if (cksel & PM_BIT(CPUDIV))
8614 + shift = PM_BFEXT(CPUSEL, cksel) + 1;
8615 +
8616 + return bus_clk_get_rate(clk, shift);
8617 +}
8618 +
8619 +static long cpu_clk_set_rate(struct clk *clk, unsigned long rate, int apply)
8620 +{
8621 + u32 control;
8622 + unsigned long parent_rate, child_div, actual_rate, div;
8623 +
8624 + parent_rate = clk->parent->get_rate(clk->parent);
8625 + control = pm_readl(CKSEL);
8626 +
8627 + if (control & PM_BIT(HSBDIV))
8628 + child_div = 1 << (PM_BFEXT(HSBSEL, control) + 1);
8629 + else
8630 + child_div = 1;
8631 +
8632 + if (rate > 3 * (parent_rate / 4) || child_div == 1) {
8633 + actual_rate = parent_rate;
8634 + control &= ~PM_BIT(CPUDIV);
8635 + } else {
8636 + unsigned int cpusel;
8637 + div = (parent_rate + rate / 2) / rate;
8638 + if (div > child_div)
8639 + div = child_div;
8640 + cpusel = (div > 1) ? (fls(div) - 2) : 0;
8641 + control = PM_BIT(CPUDIV) | PM_BFINS(CPUSEL, cpusel, control);
8642 + actual_rate = parent_rate / (1 << (cpusel + 1));
8643 + }
8644 +
8645 + pr_debug("clk %s: new rate %lu (actual rate %lu)\n",
8646 + clk->name, rate, actual_rate);
8647 +
8648 + if (apply)
8649 + pm_writel(CKSEL, control);
8650 +
8651 + return actual_rate;
8652 +}
8653 +
8654 +static void hsb_clk_mode(struct clk *clk, int enabled)
8655 +{
8656 + unsigned long flags;
8657 + u32 mask;
8658 +
8659 + spin_lock_irqsave(&pm_lock, flags);
8660 + mask = pm_readl(HSB_MASK);
8661 + if (enabled)
8662 + mask |= 1 << clk->index;
8663 + else
8664 + mask &= ~(1 << clk->index);
8665 + pm_writel(HSB_MASK, mask);
8666 + spin_unlock_irqrestore(&pm_lock, flags);
8667 +}
8668 +
8669 +static unsigned long hsb_clk_get_rate(struct clk *clk)
8670 +{
8671 + unsigned long cksel, shift = 0;
8672 +
8673 + cksel = pm_readl(CKSEL);
8674 + if (cksel & PM_BIT(HSBDIV))
8675 + shift = PM_BFEXT(HSBSEL, cksel) + 1;
8676 +
8677 + return bus_clk_get_rate(clk, shift);
8678 +}
8679 +
8680 +static void pba_clk_mode(struct clk *clk, int enabled)
8681 +{
8682 + unsigned long flags;
8683 + u32 mask;
8684 +
8685 + spin_lock_irqsave(&pm_lock, flags);
8686 + mask = pm_readl(PBA_MASK);
8687 + if (enabled)
8688 + mask |= 1 << clk->index;
8689 + else
8690 + mask &= ~(1 << clk->index);
8691 + pm_writel(PBA_MASK, mask);
8692 + spin_unlock_irqrestore(&pm_lock, flags);
8693 +}
8694 +
8695 +static unsigned long pba_clk_get_rate(struct clk *clk)
8696 +{
8697 + unsigned long cksel, shift = 0;
8698 +
8699 + cksel = pm_readl(CKSEL);
8700 + if (cksel & PM_BIT(PBADIV))
8701 + shift = PM_BFEXT(PBASEL, cksel) + 1;
8702 +
8703 + return bus_clk_get_rate(clk, shift);
8704 +}
8705 +
8706 +static void pbb_clk_mode(struct clk *clk, int enabled)
8707 +{
8708 + unsigned long flags;
8709 + u32 mask;
8710 +
8711 + spin_lock_irqsave(&pm_lock, flags);
8712 + mask = pm_readl(PBB_MASK);
8713 + if (enabled)
8714 + mask |= 1 << clk->index;
8715 + else
8716 + mask &= ~(1 << clk->index);
8717 + pm_writel(PBB_MASK, mask);
8718 + spin_unlock_irqrestore(&pm_lock, flags);
8719 +}
8720 +
8721 +static unsigned long pbb_clk_get_rate(struct clk *clk)
8722 +{
8723 + unsigned long cksel, shift = 0;
8724 +
8725 + cksel = pm_readl(CKSEL);
8726 + if (cksel & PM_BIT(PBBDIV))
8727 + shift = PM_BFEXT(PBBSEL, cksel) + 1;
8728 +
8729 + return bus_clk_get_rate(clk, shift);
8730 +}
8731 +
8732 +static struct clk cpu_clk = {
8733 + .name = "cpu",
8734 + .get_rate = cpu_clk_get_rate,
8735 + .set_rate = cpu_clk_set_rate,
8736 + .users = 1,
8737 +};
8738 +static struct clk hsb_clk = {
8739 + .name = "hsb",
8740 + .parent = &cpu_clk,
8741 + .get_rate = hsb_clk_get_rate,
8742 +};
8743 +static struct clk pba_clk = {
8744 + .name = "pba",
8745 + .parent = &hsb_clk,
8746 + .mode = hsb_clk_mode,
8747 + .get_rate = pba_clk_get_rate,
8748 + .index = 1,
8749 +};
8750 +static struct clk pbb_clk = {
8751 + .name = "pbb",
8752 + .parent = &hsb_clk,
8753 + .mode = hsb_clk_mode,
8754 + .get_rate = pbb_clk_get_rate,
8755 + .users = 1,
8756 + .index = 2,
8757 +};
8758 +
8759 +/* --------------------------------------------------------------------
8760 + * Generic Clock operations
8761 + * -------------------------------------------------------------------- */
8762 +
8763 +static void genclk_mode(struct clk *clk, int enabled)
8764 +{
8765 + u32 control;
8766 +
8767 + control = pm_readl(GCCTRL(clk->index));
8768 + if (enabled)
8769 + control |= PM_BIT(CEN);
8770 + else
8771 + control &= ~PM_BIT(CEN);
8772 + pm_writel(GCCTRL(clk->index), control);
8773 +}
8774 +
8775 +static unsigned long genclk_get_rate(struct clk *clk)
8776 +{
8777 + u32 control;
8778 + unsigned long div = 1;
8779 +
8780 + control = pm_readl(GCCTRL(clk->index));
8781 + if (control & PM_BIT(DIVEN))
8782 + div = 2 * (PM_BFEXT(DIV, control) + 1);
8783 +
8784 + return clk->parent->get_rate(clk->parent) / div;
8785 +}
8786 +
8787 +static long genclk_set_rate(struct clk *clk, unsigned long rate, int apply)
8788 +{
8789 + u32 control;
8790 + unsigned long parent_rate, actual_rate, div;
8791 +
8792 + parent_rate = clk->parent->get_rate(clk->parent);
8793 + control = pm_readl(GCCTRL(clk->index));
8794 +
8795 + if (rate > 3 * parent_rate / 4) {
8796 + actual_rate = parent_rate;
8797 + control &= ~PM_BIT(DIVEN);
8798 + } else {
8799 + div = (parent_rate + rate) / (2 * rate) - 1;
8800 + control = PM_BFINS(DIV, div, control) | PM_BIT(DIVEN);
8801 + actual_rate = parent_rate / (2 * (div + 1));
8802 + }
8803 +
8804 + dev_dbg(clk->dev, "clk %s: new rate %lu (actual rate %lu)\n",
8805 + clk->name, rate, actual_rate);
8806 +
8807 + if (apply)
8808 + pm_writel(GCCTRL(clk->index), control);
8809 +
8810 + return actual_rate;
8811 +}
8812 +
8813 +int genclk_set_parent(struct clk *clk, struct clk *parent)
8814 +{
8815 + u32 control;
8816 +
8817 + dev_dbg(clk->dev, "clk %s: new parent %s (was %s)\n",
8818 + clk->name, parent->name, clk->parent->name);
8819 +
8820 + control = pm_readl(GCCTRL(clk->index));
8821 +
8822 + if (parent == &osc1 || parent == &pll1)
8823 + control |= PM_BIT(OSCSEL);
8824 + else if (parent == &osc0 || parent == &pll0)
8825 + control &= ~PM_BIT(OSCSEL);
8826 + else
8827 + return -EINVAL;
8828 +
8829 + if (parent == &pll0 || parent == &pll1)
8830 + control |= PM_BIT(PLLSEL);
8831 + else
8832 + control &= ~PM_BIT(PLLSEL);
8833 +
8834 + pm_writel(GCCTRL(clk->index), control);
8835 + clk->parent = parent;
8836 +
8837 + return 0;
8838 +}
8839 +
8840 +static void __init genclk_init_parent(struct clk *clk)
8841 +{
8842 + u32 control;
8843 + struct clk *parent;
8844 +
8845 + BUG_ON(clk->index > 7);
8846 +
8847 + control = pm_readl(GCCTRL(clk->index));
8848 + if (control & PM_BIT(OSCSEL))
8849 + parent = (control & PM_BIT(PLLSEL)) ? &pll1 : &osc1;
8850 + else
8851 + parent = (control & PM_BIT(PLLSEL)) ? &pll0 : &osc0;
8852 +
8853 + clk->parent = parent;
8854 +}
8855 +
8856 +/* --------------------------------------------------------------------
8857 + * System peripherals
8858 + * -------------------------------------------------------------------- */
8859 +static struct resource at32_pm0_resource[] = {
8860 + {
8861 + .start = 0xfff00000,
8862 + .end = 0xfff0007f,
8863 + .flags = IORESOURCE_MEM,
8864 + },
8865 + IRQ(20),
8866 +};
8867 +
8868 +static struct resource at32ap700x_rtc0_resource[] = {
8869 + {
8870 + .start = 0xfff00080,
8871 + .end = 0xfff000af,
8872 + .flags = IORESOURCE_MEM,
8873 + },
8874 + IRQ(21),
8875 +};
8876 +
8877 +static struct resource at32_wdt0_resource[] = {
8878 + {
8879 + .start = 0xfff000b0,
8880 + .end = 0xfff000cf,
8881 + .flags = IORESOURCE_MEM,
8882 + },
8883 +};
8884 +
8885 +static struct resource at32_eic0_resource[] = {
8886 + {
8887 + .start = 0xfff00100,
8888 + .end = 0xfff0013f,
8889 + .flags = IORESOURCE_MEM,
8890 + },
8891 + IRQ(19),
8892 +};
8893 +
8894 +DEFINE_DEV(at32_pm, 0);
8895 +DEFINE_DEV(at32ap700x_rtc, 0);
8896 +DEFINE_DEV(at32_wdt, 0);
8897 +DEFINE_DEV(at32_eic, 0);
8898 +
8899 +/*
8900 + * Peripheral clock for PM, RTC, WDT and EIC. PM will ensure that this
8901 + * is always running.
8902 + */
8903 +static struct clk at32_pm_pclk = {
8904 + .name = "pclk",
8905 + .dev = &at32_pm0_device.dev,
8906 + .parent = &pbb_clk,
8907 + .mode = pbb_clk_mode,
8908 + .get_rate = pbb_clk_get_rate,
8909 + .users = 1,
8910 + .index = 0,
8911 +};
8912 +
8913 +static struct resource intc0_resource[] = {
8914 + PBMEM(0xfff00400),
8915 +};
8916 +struct platform_device at32_intc0_device = {
8917 + .name = "intc",
8918 + .id = 0,
8919 + .resource = intc0_resource,
8920 + .num_resources = ARRAY_SIZE(intc0_resource),
8921 +};
8922 +DEV_CLK(pclk, at32_intc0, pbb, 1);
8923 +
8924 +static struct clk ebi_clk = {
8925 + .name = "ebi",
8926 + .parent = &hsb_clk,
8927 + .mode = hsb_clk_mode,
8928 + .get_rate = hsb_clk_get_rate,
8929 + .users = 1,
8930 +};
8931 +static struct clk hramc_clk = {
8932 + .name = "hramc",
8933 + .parent = &hsb_clk,
8934 + .mode = hsb_clk_mode,
8935 + .get_rate = hsb_clk_get_rate,
8936 + .users = 1,
8937 + .index = 3,
8938 +};
8939 +
8940 +static struct resource smc0_resource[] = {
8941 + PBMEM(0xfff03400),
8942 +};
8943 +DEFINE_DEV(smc, 0);
8944 +DEV_CLK(pclk, smc0, pbb, 13);
8945 +DEV_CLK(mck, smc0, hsb, 0);
8946 +
8947 +static struct platform_device pdc_device = {
8948 + .name = "pdc",
8949 + .id = 0,
8950 +};
8951 +DEV_CLK(hclk, pdc, hsb, 4);
8952 +DEV_CLK(pclk, pdc, pba, 16);
8953 +
8954 +static struct clk pico_clk = {
8955 + .name = "pico",
8956 + .parent = &cpu_clk,
8957 + .mode = cpu_clk_mode,
8958 + .get_rate = cpu_clk_get_rate,
8959 + .users = 1,
8960 +};
8961 +
8962 +static struct resource dmaca0_resource[] = {
8963 + {
8964 + .start = 0xff200000,
8965 + .end = 0xff20ffff,
8966 + .flags = IORESOURCE_MEM,
8967 + },
8968 + IRQ(2),
8969 +};
8970 +DEFINE_DEV(dmaca, 0);
8971 +DEV_CLK(hclk, dmaca0, hsb, 10);
8972 +
8973 +/* --------------------------------------------------------------------
8974 + * HMATRIX
8975 + * -------------------------------------------------------------------- */
8976 +
8977 +static struct clk hmatrix_clk = {
8978 + .name = "hmatrix_clk",
8979 + .parent = &pbb_clk,
8980 + .mode = pbb_clk_mode,
8981 + .get_rate = pbb_clk_get_rate,
8982 + .index = 2,
8983 + .users = 1,
8984 +};
8985 +#define HMATRIX_BASE ((void __iomem *)0xfff00800)
8986 +
8987 +#define hmatrix_readl(reg) \
8988 + __raw_readl((HMATRIX_BASE) + HMATRIX_##reg)
8989 +#define hmatrix_writel(reg,value) \
8990 + __raw_writel((value), (HMATRIX_BASE) + HMATRIX_##reg)
8991 +
8992 +/*
8993 + * Set bits in the HMATRIX Special Function Register (SFR) used by the
8994 + * External Bus Interface (EBI). This can be used to enable special
8995 + * features like CompactFlash support, NAND Flash support, etc. on
8996 + * certain chipselects.
8997 + */
8998 +static inline void set_ebi_sfr_bits(u32 mask)
8999 +{
9000 + u32 sfr;
9001 +
9002 + clk_enable(&hmatrix_clk);
9003 + sfr = hmatrix_readl(SFR4);
9004 + sfr |= mask;
9005 + hmatrix_writel(SFR4, sfr);
9006 + clk_disable(&hmatrix_clk);
9007 +}
9008 +
9009 +/* --------------------------------------------------------------------
9010 + * Timer/Counter (TC)
9011 + * -------------------------------------------------------------------- */
9012 +
9013 +static struct resource at32_tcb0_resource[] = {
9014 + PBMEM(0xfff00c00),
9015 + IRQ(22),
9016 +};
9017 +static struct platform_device at32_tcb0_device = {
9018 + .name = "atmel_tcb",
9019 + .id = 0,
9020 + .resource = at32_tcb0_resource,
9021 + .num_resources = ARRAY_SIZE(at32_tcb0_resource),
9022 +};
9023 +DEV_CLK(t0_clk, at32_tcb0, pbb, 3);
9024 +
9025 +static struct resource at32_tcb1_resource[] = {
9026 + PBMEM(0xfff01000),
9027 + IRQ(23),
9028 +};
9029 +static struct platform_device at32_tcb1_device = {
9030 + .name = "atmel_tcb",
9031 + .id = 1,
9032 + .resource = at32_tcb1_resource,
9033 + .num_resources = ARRAY_SIZE(at32_tcb1_resource),
9034 +};
9035 +DEV_CLK(t0_clk, at32_tcb1, pbb, 4);
9036 +
9037 +/* --------------------------------------------------------------------
9038 + * PIO
9039 + * -------------------------------------------------------------------- */
9040 +
9041 +static struct resource pio0_resource[] = {
9042 + PBMEM(0xffe02800),
9043 + IRQ(13),
9044 +};
9045 +DEFINE_DEV(pio, 0);
9046 +DEV_CLK(mck, pio0, pba, 10);
9047 +
9048 +static struct resource pio1_resource[] = {
9049 + PBMEM(0xffe02c00),
9050 + IRQ(14),
9051 +};
9052 +DEFINE_DEV(pio, 1);
9053 +DEV_CLK(mck, pio1, pba, 11);
9054 +
9055 +static struct resource pio2_resource[] = {
9056 + PBMEM(0xffe03000),
9057 + IRQ(15),
9058 +};
9059 +DEFINE_DEV(pio, 2);
9060 +DEV_CLK(mck, pio2, pba, 12);
9061 +
9062 +static struct resource pio3_resource[] = {
9063 + PBMEM(0xffe03400),
9064 + IRQ(16),
9065 +};
9066 +DEFINE_DEV(pio, 3);
9067 +DEV_CLK(mck, pio3, pba, 13);
9068 +
9069 +static struct resource pio4_resource[] = {
9070 + PBMEM(0xffe03800),
9071 + IRQ(17),
9072 +};
9073 +DEFINE_DEV(pio, 4);
9074 +DEV_CLK(mck, pio4, pba, 14);
9075 +
9076 +void __init at32_add_system_devices(void)
9077 +{
9078 + platform_device_register(&at32_pm0_device);
9079 + platform_device_register(&at32_intc0_device);
9080 + platform_device_register(&at32ap700x_rtc0_device);
9081 + platform_device_register(&at32_wdt0_device);
9082 + platform_device_register(&at32_eic0_device);
9083 + platform_device_register(&smc0_device);
9084 + platform_device_register(&pdc_device);
9085 + platform_device_register(&dmaca0_device);
9086 +
9087 + platform_device_register(&at32_tcb0_device);
9088 + platform_device_register(&at32_tcb1_device);
9089 +
9090 + platform_device_register(&pio0_device);
9091 + platform_device_register(&pio1_device);
9092 + platform_device_register(&pio2_device);
9093 + platform_device_register(&pio3_device);
9094 + platform_device_register(&pio4_device);
9095 +}
9096 +
9097 +/* --------------------------------------------------------------------
9098 + * PSIF
9099 + * -------------------------------------------------------------------- */
9100 +static struct resource atmel_psif0_resource[] __initdata = {
9101 + {
9102 + .start = 0xffe03c00,
9103 + .end = 0xffe03cff,
9104 + .flags = IORESOURCE_MEM,
9105 + },
9106 + IRQ(18),
9107 +};
9108 +static struct clk atmel_psif0_pclk = {
9109 + .name = "pclk",
9110 + .parent = &pba_clk,
9111 + .mode = pba_clk_mode,
9112 + .get_rate = pba_clk_get_rate,
9113 + .index = 15,
9114 +};
9115 +
9116 +static struct resource atmel_psif1_resource[] __initdata = {
9117 + {
9118 + .start = 0xffe03d00,
9119 + .end = 0xffe03dff,
9120 + .flags = IORESOURCE_MEM,
9121 + },
9122 + IRQ(18),
9123 +};
9124 +static struct clk atmel_psif1_pclk = {
9125 + .name = "pclk",
9126 + .parent = &pba_clk,
9127 + .mode = pba_clk_mode,
9128 + .get_rate = pba_clk_get_rate,
9129 + .index = 15,
9130 +};
9131 +
9132 +struct platform_device *__init at32_add_device_psif(unsigned int id)
9133 +{
9134 + struct platform_device *pdev;
9135 +
9136 + if (!(id == 0 || id == 1))
9137 + return NULL;
9138 +
9139 + pdev = platform_device_alloc("atmel_psif", id);
9140 + if (!pdev)
9141 + return NULL;
9142 +
9143 + switch (id) {
9144 + case 0:
9145 + if (platform_device_add_resources(pdev, atmel_psif0_resource,
9146 + ARRAY_SIZE(atmel_psif0_resource)))
9147 + goto err_add_resources;
9148 + atmel_psif0_pclk.dev = &pdev->dev;
9149 + select_peripheral(PA(8), PERIPH_A, 0); /* CLOCK */
9150 + select_peripheral(PA(9), PERIPH_A, 0); /* DATA */
9151 + break;
9152 + case 1:
9153 + if (platform_device_add_resources(pdev, atmel_psif1_resource,
9154 + ARRAY_SIZE(atmel_psif1_resource)))
9155 + goto err_add_resources;
9156 + atmel_psif1_pclk.dev = &pdev->dev;
9157 + select_peripheral(PB(11), PERIPH_A, 0); /* CLOCK */
9158 + select_peripheral(PB(12), PERIPH_A, 0); /* DATA */
9159 + break;
9160 + default:
9161 + return NULL;
9162 + }
9163 +
9164 + platform_device_add(pdev);
9165 + return pdev;
9166 +
9167 +err_add_resources:
9168 + platform_device_put(pdev);
9169 + return NULL;
9170 +}
9171 +
9172 +/* --------------------------------------------------------------------
9173 + * USART
9174 + * -------------------------------------------------------------------- */
9175 +
9176 +static struct atmel_uart_data atmel_usart0_data = {
9177 + .use_dma_tx = 1,
9178 + .use_dma_rx = 1,
9179 +};
9180 +static struct resource atmel_usart0_resource[] = {
9181 + PBMEM(0xffe00c00),
9182 + IRQ(6),
9183 +};
9184 +DEFINE_DEV_DATA(atmel_usart, 0);
9185 +DEV_CLK(usart, atmel_usart0, pba, 3);
9186 +
9187 +static struct atmel_uart_data atmel_usart1_data = {
9188 + .use_dma_tx = 1,
9189 + .use_dma_rx = 1,
9190 +};
9191 +static struct resource atmel_usart1_resource[] = {
9192 + PBMEM(0xffe01000),
9193 + IRQ(7),
9194 +};
9195 +DEFINE_DEV_DATA(atmel_usart, 1);
9196 +DEV_CLK(usart, atmel_usart1, pba, 4);
9197 +
9198 +static struct atmel_uart_data atmel_usart2_data = {
9199 + .use_dma_tx = 1,
9200 + .use_dma_rx = 1,
9201 +};
9202 +static struct resource atmel_usart2_resource[] = {
9203 + PBMEM(0xffe01400),
9204 + IRQ(8),
9205 +};
9206 +DEFINE_DEV_DATA(atmel_usart, 2);
9207 +DEV_CLK(usart, atmel_usart2, pba, 5);
9208 +
9209 +static struct atmel_uart_data atmel_usart3_data = {
9210 + .use_dma_tx = 1,
9211 + .use_dma_rx = 1,
9212 +};
9213 +static struct resource atmel_usart3_resource[] = {
9214 + PBMEM(0xffe01800),
9215 + IRQ(9),
9216 +};
9217 +DEFINE_DEV_DATA(atmel_usart, 3);
9218 +DEV_CLK(usart, atmel_usart3, pba, 6);
9219 +
9220 +static inline void configure_usart0_pins(void)
9221 +{
9222 + select_peripheral(PA(8), PERIPH_B, 0); /* RXD */
9223 + select_peripheral(PA(9), PERIPH_B, 0); /* TXD */
9224 +}
9225 +
9226 +static inline void configure_usart1_pins(void)
9227 +{
9228 + select_peripheral(PA(17), PERIPH_A, 0); /* RXD */
9229 + select_peripheral(PA(18), PERIPH_A, 0); /* TXD */
9230 +}
9231 +
9232 +static inline void configure_usart2_pins(void)
9233 +{
9234 + select_peripheral(PB(26), PERIPH_B, 0); /* RXD */
9235 + select_peripheral(PB(27), PERIPH_B, 0); /* TXD */
9236 +}
9237 +
9238 +static inline void configure_usart3_pins(void)
9239 +{
9240 + select_peripheral(PB(18), PERIPH_B, 0); /* RXD */
9241 + select_peripheral(PB(17), PERIPH_B, 0); /* TXD */
9242 +}
9243 +
9244 +static struct platform_device *__initdata at32_usarts[4];
9245 +
9246 +void __init at32_map_usart(unsigned int hw_id, unsigned int line)
9247 +{
9248 + struct platform_device *pdev;
9249 +
9250 + switch (hw_id) {
9251 + case 0:
9252 + pdev = &atmel_usart0_device;
9253 + configure_usart0_pins();
9254 + break;
9255 + case 1:
9256 + pdev = &atmel_usart1_device;
9257 + configure_usart1_pins();
9258 + break;
9259 + case 2:
9260 + pdev = &atmel_usart2_device;
9261 + configure_usart2_pins();
9262 + break;
9263 + case 3:
9264 + pdev = &atmel_usart3_device;
9265 + configure_usart3_pins();
9266 + break;
9267 + default:
9268 + return;
9269 + }
9270 +
9271 + if (PXSEG(pdev->resource[0].start) == P4SEG) {
9272 + /* Addresses in the P4 segment are permanently mapped 1:1 */
9273 + struct atmel_uart_data *data = pdev->dev.platform_data;
9274 + data->regs = (void __iomem *)pdev->resource[0].start;
9275 + }
9276 +
9277 + pdev->id = line;
9278 + at32_usarts[line] = pdev;
9279 +}
9280 +
9281 +struct platform_device *__init at32_add_device_usart(unsigned int id)
9282 +{
9283 + platform_device_register(at32_usarts[id]);
9284 + return at32_usarts[id];
9285 +}
9286 +
9287 +struct platform_device *atmel_default_console_device;
9288 +
9289 +void __init at32_setup_serial_console(unsigned int usart_id)
9290 +{
9291 + atmel_default_console_device = at32_usarts[usart_id];
9292 +}
9293 +
9294 +/* --------------------------------------------------------------------
9295 + * Ethernet
9296 + * -------------------------------------------------------------------- */
9297 +
9298 +#ifdef CONFIG_CPU_AT32AP7000
9299 +static struct eth_platform_data macb0_data;
9300 +static struct resource macb0_resource[] = {
9301 + PBMEM(0xfff01800),
9302 + IRQ(25),
9303 +};
9304 +DEFINE_DEV_DATA(macb, 0);
9305 +DEV_CLK(hclk, macb0, hsb, 8);
9306 +DEV_CLK(pclk, macb0, pbb, 6);
9307 +
9308 +static struct eth_platform_data macb1_data;
9309 +static struct resource macb1_resource[] = {
9310 + PBMEM(0xfff01c00),
9311 + IRQ(26),
9312 +};
9313 +DEFINE_DEV_DATA(macb, 1);
9314 +DEV_CLK(hclk, macb1, hsb, 9);
9315 +DEV_CLK(pclk, macb1, pbb, 7);
9316 +
9317 +struct platform_device *__init
9318 +at32_add_device_eth(unsigned int id, struct eth_platform_data *data)
9319 +{
9320 + struct platform_device *pdev;
9321 +
9322 + switch (id) {
9323 + case 0:
9324 + pdev = &macb0_device;
9325 +
9326 + select_peripheral(PC(3), PERIPH_A, 0); /* TXD0 */
9327 + select_peripheral(PC(4), PERIPH_A, 0); /* TXD1 */
9328 + select_peripheral(PC(7), PERIPH_A, 0); /* TXEN */
9329 + select_peripheral(PC(8), PERIPH_A, 0); /* TXCK */
9330 + select_peripheral(PC(9), PERIPH_A, 0); /* RXD0 */
9331 + select_peripheral(PC(10), PERIPH_A, 0); /* RXD1 */
9332 + select_peripheral(PC(13), PERIPH_A, 0); /* RXER */
9333 + select_peripheral(PC(15), PERIPH_A, 0); /* RXDV */
9334 + select_peripheral(PC(16), PERIPH_A, 0); /* MDC */
9335 + select_peripheral(PC(17), PERIPH_A, 0); /* MDIO */
9336 +
9337 + if (!data->is_rmii) {
9338 + select_peripheral(PC(0), PERIPH_A, 0); /* COL */
9339 + select_peripheral(PC(1), PERIPH_A, 0); /* CRS */
9340 + select_peripheral(PC(2), PERIPH_A, 0); /* TXER */
9341 + select_peripheral(PC(5), PERIPH_A, 0); /* TXD2 */
9342 + select_peripheral(PC(6), PERIPH_A, 0); /* TXD3 */
9343 + select_peripheral(PC(11), PERIPH_A, 0); /* RXD2 */
9344 + select_peripheral(PC(12), PERIPH_A, 0); /* RXD3 */
9345 + select_peripheral(PC(14), PERIPH_A, 0); /* RXCK */
9346 + select_peripheral(PC(18), PERIPH_A, 0); /* SPD */
9347 + }
9348 + break;
9349 +
9350 + case 1:
9351 + pdev = &macb1_device;
9352 +
9353 + select_peripheral(PD(13), PERIPH_B, 0); /* TXD0 */
9354 + select_peripheral(PD(14), PERIPH_B, 0); /* TXD1 */
9355 + select_peripheral(PD(11), PERIPH_B, 0); /* TXEN */
9356 + select_peripheral(PD(12), PERIPH_B, 0); /* TXCK */
9357 + select_peripheral(PD(10), PERIPH_B, 0); /* RXD0 */
9358 + select_peripheral(PD(6), PERIPH_B, 0); /* RXD1 */
9359 + select_peripheral(PD(5), PERIPH_B, 0); /* RXER */
9360 + select_peripheral(PD(4), PERIPH_B, 0); /* RXDV */
9361 + select_peripheral(PD(3), PERIPH_B, 0); /* MDC */
9362 + select_peripheral(PD(2), PERIPH_B, 0); /* MDIO */
9363 +
9364 + if (!data->is_rmii) {
9365 + select_peripheral(PC(19), PERIPH_B, 0); /* COL */
9366 + select_peripheral(PC(23), PERIPH_B, 0); /* CRS */
9367 + select_peripheral(PC(26), PERIPH_B, 0); /* TXER */
9368 + select_peripheral(PC(27), PERIPH_B, 0); /* TXD2 */
9369 + select_peripheral(PC(28), PERIPH_B, 0); /* TXD3 */
9370 + select_peripheral(PC(29), PERIPH_B, 0); /* RXD2 */
9371 + select_peripheral(PC(30), PERIPH_B, 0); /* RXD3 */
9372 + select_peripheral(PC(24), PERIPH_B, 0); /* RXCK */
9373 + select_peripheral(PD(15), PERIPH_B, 0); /* SPD */
9374 + }
9375 + break;
9376 +
9377 + default:
9378 + return NULL;
9379 + }
9380 +
9381 + memcpy(pdev->dev.platform_data, data, sizeof(struct eth_platform_data));
9382 + platform_device_register(pdev);
9383 +
9384 + return pdev;
9385 +}
9386 +#endif
9387 +
9388 +/* --------------------------------------------------------------------
9389 + * SPI
9390 + * -------------------------------------------------------------------- */
9391 +static struct resource atmel_spi0_resource[] = {
9392 + PBMEM(0xffe00000),
9393 + IRQ(3),
9394 +};
9395 +DEFINE_DEV(atmel_spi, 0);
9396 +DEV_CLK(spi_clk, atmel_spi0, pba, 0);
9397 +
9398 +static struct resource atmel_spi1_resource[] = {
9399 + PBMEM(0xffe00400),
9400 + IRQ(4),
9401 +};
9402 +DEFINE_DEV(atmel_spi, 1);
9403 +DEV_CLK(spi_clk, atmel_spi1, pba, 1);
9404 +
9405 +static void __init
9406 +at32_spi_setup_slaves(unsigned int bus_num, struct spi_board_info *b,
9407 + unsigned int n, const u8 *pins)
9408 +{
9409 + unsigned int pin, mode;
9410 +
9411 + for (; n; n--, b++) {
9412 + b->bus_num = bus_num;
9413 + if (b->chip_select >= 4)
9414 + continue;
9415 + pin = (unsigned)b->controller_data;
9416 + if (!pin) {
9417 + pin = pins[b->chip_select];
9418 + b->controller_data = (void *)pin;
9419 + }
9420 + mode = AT32_GPIOF_OUTPUT;
9421 + if (!(b->mode & SPI_CS_HIGH))
9422 + mode |= AT32_GPIOF_HIGH;
9423 + at32_select_gpio(pin, mode);
9424 + }
9425 +}
9426 +
9427 +struct platform_device *__init
9428 +at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n)
9429 +{
9430 + /*
9431 + * Manage the chipselects as GPIOs, normally using the same pins
9432 + * the SPI controller expects; but boards can use other pins.
9433 + */
9434 + static u8 __initdata spi0_pins[] =
9435 + { GPIO_PIN_PA(3), GPIO_PIN_PA(4),
9436 + GPIO_PIN_PA(5), GPIO_PIN_PA(20), };
9437 + static u8 __initdata spi1_pins[] =
9438 + { GPIO_PIN_PB(2), GPIO_PIN_PB(3),
9439 + GPIO_PIN_PB(4), GPIO_PIN_PA(27), };
9440 + struct platform_device *pdev;
9441 +
9442 + switch (id) {
9443 + case 0:
9444 + pdev = &atmel_spi0_device;
9445 + select_peripheral(PA(0), PERIPH_A, 0); /* MISO */
9446 + select_peripheral(PA(1), PERIPH_A, 0); /* MOSI */
9447 + select_peripheral(PA(2), PERIPH_A, 0); /* SCK */
9448 + at32_spi_setup_slaves(0, b, n, spi0_pins);
9449 + break;
9450 +
9451 + case 1:
9452 + pdev = &atmel_spi1_device;
9453 + select_peripheral(PB(0), PERIPH_B, 0); /* MISO */
9454 + select_peripheral(PB(1), PERIPH_B, 0); /* MOSI */
9455 + select_peripheral(PB(5), PERIPH_B, 0); /* SCK */
9456 + at32_spi_setup_slaves(1, b, n, spi1_pins);
9457 + break;
9458 +
9459 + default:
9460 + return NULL;
9461 + }
9462 +
9463 + spi_register_board_info(b, n);
9464 + platform_device_register(pdev);
9465 + return pdev;
9466 +}
9467 +
9468 +/* --------------------------------------------------------------------
9469 + * TWI
9470 + * -------------------------------------------------------------------- */
9471 +static struct resource atmel_twi0_resource[] __initdata = {
9472 + PBMEM(0xffe00800),
9473 + IRQ(5),
9474 +};
9475 +static struct clk atmel_twi0_pclk = {
9476 + .name = "twi_pclk",
9477 + .parent = &pba_clk,
9478 + .mode = pba_clk_mode,
9479 + .get_rate = pba_clk_get_rate,
9480 + .index = 2,
9481 +};
9482 +
9483 +struct platform_device *__init at32_add_device_twi(unsigned int id,
9484 + struct i2c_board_info *b,
9485 + unsigned int n)
9486 +{
9487 + struct platform_device *pdev;
9488 +
9489 + if (id != 0)
9490 + return NULL;
9491 +
9492 + pdev = platform_device_alloc("atmel_twi", id);
9493 + if (!pdev)
9494 + return NULL;
9495 +
9496 + if (platform_device_add_resources(pdev, atmel_twi0_resource,
9497 + ARRAY_SIZE(atmel_twi0_resource)))
9498 + goto err_add_resources;
9499 +
9500 + select_peripheral(PA(6), PERIPH_A, 0); /* SDA */
9501 + select_peripheral(PA(7), PERIPH_A, 0); /* SDL */
9502 +
9503 + atmel_twi0_pclk.dev = &pdev->dev;
9504 +
9505 + if (b)
9506 + i2c_register_board_info(id, b, n);
9507 +
9508 + platform_device_add(pdev);
9509 + return pdev;
9510 +
9511 +err_add_resources:
9512 + platform_device_put(pdev);
9513 + return NULL;
9514 +}
9515 +
9516 +/* --------------------------------------------------------------------
9517 + * MMC
9518 + * -------------------------------------------------------------------- */
9519 +static struct resource atmel_mci0_resource[] __initdata = {
9520 + PBMEM(0xfff02400),
9521 + IRQ(28),
9522 +};
9523 +static struct clk atmel_mci0_pclk = {
9524 + .name = "mci_clk",
9525 + .parent = &pbb_clk,
9526 + .mode = pbb_clk_mode,
9527 + .get_rate = pbb_clk_get_rate,
9528 + .index = 9,
9529 +};
9530 +
9531 +struct platform_device *__init
9532 +at32_add_device_mci(unsigned int id, struct mci_platform_data *data)
9533 +{
9534 + struct platform_device *pdev;
9535 +
9536 + if (id != 0)
9537 + return NULL;
9538 +
9539 + pdev = platform_device_alloc("atmel_mci", id);
9540 + if (!pdev)
9541 + goto fail;
9542 +
9543 + if (platform_device_add_resources(pdev, atmel_mci0_resource,
9544 + ARRAY_SIZE(atmel_mci0_resource)))
9545 + goto fail;
9546 +
9547 + if (data && platform_device_add_data(pdev, data,
9548 + sizeof(struct mci_platform_data)))
9549 + goto fail;
9550 +
9551 + select_peripheral(PA(10), PERIPH_A, 0); /* CLK */
9552 + select_peripheral(PA(11), PERIPH_A, 0); /* CMD */
9553 + select_peripheral(PA(12), PERIPH_A, 0); /* DATA0 */
9554 + select_peripheral(PA(13), PERIPH_A, 0); /* DATA1 */
9555 + select_peripheral(PA(14), PERIPH_A, 0); /* DATA2 */
9556 + select_peripheral(PA(15), PERIPH_A, 0); /* DATA3 */
9557 +
9558 + if (data) {
9559 + if (data->detect_pin != GPIO_PIN_NONE)
9560 + at32_select_gpio(data->detect_pin, 0);
9561 + if (data->wp_pin != GPIO_PIN_NONE)
9562 + at32_select_gpio(data->wp_pin, 0);
9563 + }
9564 +
9565 + atmel_mci0_pclk.dev = &pdev->dev;
9566 +
9567 + platform_device_add(pdev);
9568 + return pdev;
9569 +
9570 +fail:
9571 + platform_device_put(pdev);
9572 + return NULL;
9573 +}
9574 +
9575 +/* --------------------------------------------------------------------
9576 + * LCDC
9577 + * -------------------------------------------------------------------- */
9578 +#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002)
9579 +static struct atmel_lcdfb_info atmel_lcdfb0_data;
9580 +static struct resource atmel_lcdfb0_resource[] = {
9581 + {
9582 + .start = 0xff000000,
9583 + .end = 0xff000fff,
9584 + .flags = IORESOURCE_MEM,
9585 + },
9586 + IRQ(1),
9587 + {
9588 + /* Placeholder for pre-allocated fb memory */
9589 + .start = 0x00000000,
9590 + .end = 0x00000000,
9591 + .flags = 0,
9592 + },
9593 +};
9594 +DEFINE_DEV_DATA(atmel_lcdfb, 0);
9595 +DEV_CLK(hck1, atmel_lcdfb0, hsb, 7);
9596 +static struct clk atmel_lcdfb0_pixclk = {
9597 + .name = "lcdc_clk",
9598 + .dev = &atmel_lcdfb0_device.dev,
9599 + .mode = genclk_mode,
9600 + .get_rate = genclk_get_rate,
9601 + .set_rate = genclk_set_rate,
9602 + .set_parent = genclk_set_parent,
9603 + .index = 7,
9604 +};
9605 +
9606 +struct platform_device *__init
9607 +at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
9608 + unsigned long fbmem_start, unsigned long fbmem_len)
9609 +{
9610 + struct platform_device *pdev;
9611 + struct atmel_lcdfb_info *info;
9612 + struct fb_monspecs *monspecs;
9613 + struct fb_videomode *modedb;
9614 + unsigned int modedb_size;
9615 +
9616 + /*
9617 + * Do a deep copy of the fb data, monspecs and modedb. Make
9618 + * sure all allocations are done before setting up the
9619 + * portmux.
9620 + */
9621 + monspecs = kmemdup(data->default_monspecs,
9622 + sizeof(struct fb_monspecs), GFP_KERNEL);
9623 + if (!monspecs)
9624 + return NULL;
9625 +
9626 + modedb_size = sizeof(struct fb_videomode) * monspecs->modedb_len;
9627 + modedb = kmemdup(monspecs->modedb, modedb_size, GFP_KERNEL);
9628 + if (!modedb)
9629 + goto err_dup_modedb;
9630 + monspecs->modedb = modedb;
9631 +
9632 + switch (id) {
9633 + case 0:
9634 + pdev = &atmel_lcdfb0_device;
9635 + select_peripheral(PC(19), PERIPH_A, 0); /* CC */
9636 + select_peripheral(PC(20), PERIPH_A, 0); /* HSYNC */
9637 + select_peripheral(PC(21), PERIPH_A, 0); /* PCLK */
9638 + select_peripheral(PC(22), PERIPH_A, 0); /* VSYNC */
9639 + select_peripheral(PC(23), PERIPH_A, 0); /* DVAL */
9640 + select_peripheral(PC(24), PERIPH_A, 0); /* MODE */
9641 + select_peripheral(PC(25), PERIPH_A, 0); /* PWR */
9642 + select_peripheral(PC(26), PERIPH_A, 0); /* DATA0 */
9643 + select_peripheral(PC(27), PERIPH_A, 0); /* DATA1 */
9644 + select_peripheral(PC(28), PERIPH_A, 0); /* DATA2 */
9645 + select_peripheral(PC(29), PERIPH_A, 0); /* DATA3 */
9646 + select_peripheral(PC(30), PERIPH_A, 0); /* DATA4 */
9647 + select_peripheral(PC(31), PERIPH_A, 0); /* DATA5 */
9648 + select_peripheral(PD(0), PERIPH_A, 0); /* DATA6 */
9649 + select_peripheral(PD(1), PERIPH_A, 0); /* DATA7 */
9650 + select_peripheral(PD(2), PERIPH_A, 0); /* DATA8 */
9651 + select_peripheral(PD(3), PERIPH_A, 0); /* DATA9 */
9652 + select_peripheral(PD(4), PERIPH_A, 0); /* DATA10 */
9653 + select_peripheral(PD(5), PERIPH_A, 0); /* DATA11 */
9654 + select_peripheral(PD(6), PERIPH_A, 0); /* DATA12 */
9655 + select_peripheral(PD(7), PERIPH_A, 0); /* DATA13 */
9656 + select_peripheral(PD(8), PERIPH_A, 0); /* DATA14 */
9657 + select_peripheral(PD(9), PERIPH_A, 0); /* DATA15 */
9658 + select_peripheral(PD(10), PERIPH_A, 0); /* DATA16 */
9659 + select_peripheral(PD(11), PERIPH_A, 0); /* DATA17 */
9660 + select_peripheral(PD(12), PERIPH_A, 0); /* DATA18 */
9661 + select_peripheral(PD(13), PERIPH_A, 0); /* DATA19 */
9662 + select_peripheral(PD(14), PERIPH_A, 0); /* DATA20 */
9663 + select_peripheral(PD(15), PERIPH_A, 0); /* DATA21 */
9664 + select_peripheral(PD(16), PERIPH_A, 0); /* DATA22 */
9665 + select_peripheral(PD(17), PERIPH_A, 0); /* DATA23 */
9666 +
9667 + clk_set_parent(&atmel_lcdfb0_pixclk, &pll0);
9668 + clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0));
9669 + break;
9670 +
9671 + default:
9672 + goto err_invalid_id;
9673 + }
9674 +
9675 + if (fbmem_len) {
9676 + pdev->resource[2].start = fbmem_start;
9677 + pdev->resource[2].end = fbmem_start + fbmem_len - 1;
9678 + pdev->resource[2].flags = IORESOURCE_MEM;
9679 + }
9680 +
9681 + info = pdev->dev.platform_data;
9682 + memcpy(info, data, sizeof(struct atmel_lcdfb_info));
9683 + info->default_monspecs = monspecs;
9684 +
9685 + platform_device_register(pdev);
9686 + return pdev;
9687 +
9688 +err_invalid_id:
9689 + kfree(modedb);
9690 +err_dup_modedb:
9691 + kfree(monspecs);
9692 + return NULL;
9693 +}
9694 +#endif
9695 +
9696 +/* --------------------------------------------------------------------
9697 + * PWM
9698 + * -------------------------------------------------------------------- */
9699 +static struct resource atmel_pwm0_resource[] __initdata = {
9700 + PBMEM(0xfff01400),
9701 + IRQ(24),
9702 +};
9703 +static struct clk atmel_pwm0_mck = {
9704 + .name = "mck",
9705 + .parent = &pbb_clk,
9706 + .mode = pbb_clk_mode,
9707 + .get_rate = pbb_clk_get_rate,
9708 + .index = 5,
9709 +};
9710 +
9711 +struct platform_device *__init at32_add_device_pwm(u32 mask)
9712 +{
9713 + struct platform_device *pdev;
9714 +
9715 + if (!mask)
9716 + return NULL;
9717 +
9718 + pdev = platform_device_alloc("atmel_pwm", 0);
9719 + if (!pdev)
9720 + return NULL;
9721 +
9722 + if (platform_device_add_resources(pdev, atmel_pwm0_resource,
9723 + ARRAY_SIZE(atmel_pwm0_resource)))
9724 + goto out_free_pdev;
9725 +
9726 + if (platform_device_add_data(pdev, &mask, sizeof(mask)))
9727 + goto out_free_pdev;
9728 +
9729 + if (mask & (1 << 0))
9730 + select_peripheral(PA(28), PERIPH_A, 0);
9731 + if (mask & (1 << 1))
9732 + select_peripheral(PA(29), PERIPH_A, 0);
9733 + if (mask & (1 << 2))
9734 + select_peripheral(PA(21), PERIPH_B, 0);
9735 + if (mask & (1 << 3))
9736 + select_peripheral(PA(22), PERIPH_B, 0);
9737 +
9738 + atmel_pwm0_mck.dev = &pdev->dev;
9739 +
9740 + platform_device_add(pdev);
9741 +
9742 + return pdev;
9743 +
9744 +out_free_pdev:
9745 + platform_device_put(pdev);
9746 + return NULL;
9747 +}
9748 +
9749 +/* --------------------------------------------------------------------
9750 + * SSC
9751 + * -------------------------------------------------------------------- */
9752 +static struct resource ssc0_resource[] = {
9753 + PBMEM(0xffe01c00),
9754 + IRQ(10),
9755 +};
9756 +DEFINE_DEV(ssc, 0);
9757 +DEV_CLK(pclk, ssc0, pba, 7);
9758 +
9759 +static struct resource ssc1_resource[] = {
9760 + PBMEM(0xffe02000),
9761 + IRQ(11),
9762 +};
9763 +DEFINE_DEV(ssc, 1);
9764 +DEV_CLK(pclk, ssc1, pba, 8);
9765 +
9766 +static struct resource ssc2_resource[] = {
9767 + PBMEM(0xffe02400),
9768 + IRQ(12),
9769 +};
9770 +DEFINE_DEV(ssc, 2);
9771 +DEV_CLK(pclk, ssc2, pba, 9);
9772 +
9773 +struct platform_device *__init
9774 +at32_add_device_ssc(unsigned int id, unsigned int flags)
9775 +{
9776 + struct platform_device *pdev;
9777 +
9778 + switch (id) {
9779 + case 0:
9780 + pdev = &ssc0_device;
9781 + if (flags & ATMEL_SSC_RF)
9782 + select_peripheral(PA(21), PERIPH_A, 0); /* RF */
9783 + if (flags & ATMEL_SSC_RK)
9784 + select_peripheral(PA(22), PERIPH_A, 0); /* RK */
9785 + if (flags & ATMEL_SSC_TK)
9786 + select_peripheral(PA(23), PERIPH_A, 0); /* TK */
9787 + if (flags & ATMEL_SSC_TF)
9788 + select_peripheral(PA(24), PERIPH_A, 0); /* TF */
9789 + if (flags & ATMEL_SSC_TD)
9790 + select_peripheral(PA(25), PERIPH_A, 0); /* TD */
9791 + if (flags & ATMEL_SSC_RD)
9792 + select_peripheral(PA(26), PERIPH_A, 0); /* RD */
9793 + break;
9794 + case 1:
9795 + pdev = &ssc1_device;
9796 + if (flags & ATMEL_SSC_RF)
9797 + select_peripheral(PA(0), PERIPH_B, 0); /* RF */
9798 + if (flags & ATMEL_SSC_RK)
9799 + select_peripheral(PA(1), PERIPH_B, 0); /* RK */
9800 + if (flags & ATMEL_SSC_TK)
9801 + select_peripheral(PA(2), PERIPH_B, 0); /* TK */
9802 + if (flags & ATMEL_SSC_TF)
9803 + select_peripheral(PA(3), PERIPH_B, 0); /* TF */
9804 + if (flags & ATMEL_SSC_TD)
9805 + select_peripheral(PA(4), PERIPH_B, 0); /* TD */
9806 + if (flags & ATMEL_SSC_RD)
9807 + select_peripheral(PA(5), PERIPH_B, 0); /* RD */
9808 + break;
9809 + case 2:
9810 + pdev = &ssc2_device;
9811 + if (flags & ATMEL_SSC_TD)
9812 + select_peripheral(PB(13), PERIPH_A, 0); /* TD */
9813 + if (flags & ATMEL_SSC_RD)
9814 + select_peripheral(PB(14), PERIPH_A, 0); /* RD */
9815 + if (flags & ATMEL_SSC_TK)
9816 + select_peripheral(PB(15), PERIPH_A, 0); /* TK */
9817 + if (flags & ATMEL_SSC_TF)
9818 + select_peripheral(PB(16), PERIPH_A, 0); /* TF */
9819 + if (flags & ATMEL_SSC_RF)
9820 + select_peripheral(PB(17), PERIPH_A, 0); /* RF */
9821 + if (flags & ATMEL_SSC_RK)
9822 + select_peripheral(PB(18), PERIPH_A, 0); /* RK */
9823 + break;
9824 + default:
9825 + return NULL;
9826 + }
9827 +
9828 + platform_device_register(pdev);
9829 + return pdev;
9830 +}
9831 +
9832 +/* --------------------------------------------------------------------
9833 + * USB Device Controller
9834 + * -------------------------------------------------------------------- */
9835 +static struct resource usba0_resource[] __initdata = {
9836 + {
9837 + .start = 0xff300000,
9838 + .end = 0xff3fffff,
9839 + .flags = IORESOURCE_MEM,
9840 + }, {
9841 + .start = 0xfff03000,
9842 + .end = 0xfff033ff,
9843 + .flags = IORESOURCE_MEM,
9844 + },
9845 + IRQ(31),
9846 +};
9847 +static struct clk usba0_pclk = {
9848 + .name = "pclk",
9849 + .parent = &pbb_clk,
9850 + .mode = pbb_clk_mode,
9851 + .get_rate = pbb_clk_get_rate,
9852 + .index = 12,
9853 +};
9854 +static struct clk usba0_hclk = {
9855 + .name = "hclk",
9856 + .parent = &hsb_clk,
9857 + .mode = hsb_clk_mode,
9858 + .get_rate = hsb_clk_get_rate,
9859 + .index = 6,
9860 +};
9861 +
9862 +#define EP(nam, idx, maxpkt, maxbk, dma, isoc) \
9863 + [idx] = { \
9864 + .name = nam, \
9865 + .index = idx, \
9866 + .fifo_size = maxpkt, \
9867 + .nr_banks = maxbk, \
9868 + .can_dma = dma, \
9869 + .can_isoc = isoc, \
9870 + }
9871 +
9872 +static struct usba_ep_data at32_usba_ep[] __initdata = {
9873 + EP("ep0", 0, 64, 1, 0, 0),
9874 + EP("ep1", 1, 512, 2, 1, 1),
9875 + EP("ep2", 2, 512, 2, 1, 1),
9876 + EP("ep3-int", 3, 64, 3, 1, 0),
9877 + EP("ep4-int", 4, 64, 3, 1, 0),
9878 + EP("ep5", 5, 1024, 3, 1, 1),
9879 + EP("ep6", 6, 1024, 3, 1, 1),
9880 +};
9881 +
9882 +#undef EP
9883 +
9884 +struct platform_device *__init
9885 +at32_add_device_usba(unsigned int id, struct usba_platform_data *data)
9886 +{
9887 + /*
9888 + * pdata doesn't have room for any endpoints, so we need to
9889 + * append room for the ones we need right after it.
9890 + */
9891 + struct {
9892 + struct usba_platform_data pdata;
9893 + struct usba_ep_data ep[7];
9894 + } usba_data;
9895 + struct platform_device *pdev;
9896 +
9897 + if (id != 0)
9898 + return NULL;
9899 +
9900 + pdev = platform_device_alloc("atmel_usba_udc", 0);
9901 + if (!pdev)
9902 + return NULL;
9903 +
9904 + if (platform_device_add_resources(pdev, usba0_resource,
9905 + ARRAY_SIZE(usba0_resource)))
9906 + goto out_free_pdev;
9907 +
9908 + if (data)
9909 + usba_data.pdata.vbus_pin = data->vbus_pin;
9910 + else
9911 + usba_data.pdata.vbus_pin = -EINVAL;
9912 +
9913 + data = &usba_data.pdata;
9914 + data->num_ep = ARRAY_SIZE(at32_usba_ep);
9915 + memcpy(data->ep, at32_usba_ep, sizeof(at32_usba_ep));
9916 +
9917 + if (platform_device_add_data(pdev, data, sizeof(usba_data)))
9918 + goto out_free_pdev;
9919 +
9920 + if (data->vbus_pin >= 0)
9921 + at32_select_gpio(data->vbus_pin, 0);
9922 +
9923 + usba0_pclk.dev = &pdev->dev;
9924 + usba0_hclk.dev = &pdev->dev;
9925 +
9926 + platform_device_add(pdev);
9927 +
9928 + return pdev;
9929 +
9930 +out_free_pdev:
9931 + platform_device_put(pdev);
9932 + return NULL;
9933 +}
9934 +
9935 +/* --------------------------------------------------------------------
9936 + * IDE / CompactFlash
9937 + * -------------------------------------------------------------------- */
9938 +#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7001)
9939 +static struct resource at32_smc_cs4_resource[] __initdata = {
9940 + {
9941 + .start = 0x04000000,
9942 + .end = 0x07ffffff,
9943 + .flags = IORESOURCE_MEM,
9944 + },
9945 + IRQ(~0UL), /* Magic IRQ will be overridden */
9946 +};
9947 +static struct resource at32_smc_cs5_resource[] __initdata = {
9948 + {
9949 + .start = 0x20000000,
9950 + .end = 0x23ffffff,
9951 + .flags = IORESOURCE_MEM,
9952 + },
9953 + IRQ(~0UL), /* Magic IRQ will be overridden */
9954 +};
9955 +
9956 +static int __init at32_init_ide_or_cf(struct platform_device *pdev,
9957 + unsigned int cs, unsigned int extint)
9958 +{
9959 + static unsigned int extint_pin_map[4] __initdata = {
9960 + GPIO_PIN_PB(25),
9961 + GPIO_PIN_PB(26),
9962 + GPIO_PIN_PB(27),
9963 + GPIO_PIN_PB(28),
9964 + };
9965 + static bool common_pins_initialized __initdata = false;
9966 + unsigned int extint_pin;
9967 + int ret;
9968 +
9969 + if (extint >= ARRAY_SIZE(extint_pin_map))
9970 + return -EINVAL;
9971 + extint_pin = extint_pin_map[extint];
9972 +
9973 + switch (cs) {
9974 + case 4:
9975 + ret = platform_device_add_resources(pdev,
9976 + at32_smc_cs4_resource,
9977 + ARRAY_SIZE(at32_smc_cs4_resource));
9978 + if (ret)
9979 + return ret;
9980 +
9981 + select_peripheral(PE(21), PERIPH_A, 0); /* NCS4 -> OE_N */
9982 + set_ebi_sfr_bits(HMATRIX_BIT(CS4A));
9983 + break;
9984 + case 5:
9985 + ret = platform_device_add_resources(pdev,
9986 + at32_smc_cs5_resource,
9987 + ARRAY_SIZE(at32_smc_cs5_resource));
9988 + if (ret)
9989 + return ret;
9990 +
9991 + select_peripheral(PE(22), PERIPH_A, 0); /* NCS5 -> OE_N */
9992 + set_ebi_sfr_bits(HMATRIX_BIT(CS5A));
9993 + break;
9994 + default:
9995 + return -EINVAL;
9996 + }
9997 +
9998 + if (!common_pins_initialized) {
9999 + select_peripheral(PE(19), PERIPH_A, 0); /* CFCE1 -> CS0_N */
10000 + select_peripheral(PE(20), PERIPH_A, 0); /* CFCE2 -> CS1_N */
10001 + select_peripheral(PE(23), PERIPH_A, 0); /* CFRNW -> DIR */
10002 + select_peripheral(PE(24), PERIPH_A, 0); /* NWAIT <- IORDY */
10003 + common_pins_initialized = true;
10004 + }
10005 +
10006 + at32_select_periph(extint_pin, GPIO_PERIPH_A, AT32_GPIOF_DEGLITCH);
10007 +
10008 + pdev->resource[1].start = EIM_IRQ_BASE + extint;
10009 + pdev->resource[1].end = pdev->resource[1].start;
10010 +
10011 + return 0;
10012 +}
10013 +
10014 +struct platform_device *__init
10015 +at32_add_device_ide(unsigned int id, unsigned int extint,
10016 + struct ide_platform_data *data)
10017 +{
10018 + struct platform_device *pdev;
10019 +
10020 + pdev = platform_device_alloc("at32_ide", id);
10021 + if (!pdev)
10022 + goto fail;
10023 +
10024 + if (platform_device_add_data(pdev, data,
10025 + sizeof(struct ide_platform_data)))
10026 + goto fail;
10027 +
10028 + if (at32_init_ide_or_cf(pdev, data->cs, extint))
10029 + goto fail;
10030 +
10031 + platform_device_add(pdev);
10032 + return pdev;
10033 +
10034 +fail:
10035 + platform_device_put(pdev);
10036 + return NULL;
10037 +}
10038 +
10039 +struct platform_device *__init
10040 +at32_add_device_cf(unsigned int id, unsigned int extint,
10041 + struct cf_platform_data *data)
10042 +{
10043 + struct platform_device *pdev;
10044 +
10045 + pdev = platform_device_alloc("at32_cf", id);
10046 + if (!pdev)
10047 + goto fail;
10048 +
10049 + if (platform_device_add_data(pdev, data,
10050 + sizeof(struct cf_platform_data)))
10051 + goto fail;
10052 +
10053 + if (at32_init_ide_or_cf(pdev, data->cs, extint))
10054 + goto fail;
10055 +
10056 + if (data->detect_pin != GPIO_PIN_NONE)
10057 + at32_select_gpio(data->detect_pin, AT32_GPIOF_DEGLITCH);
10058 + if (data->reset_pin != GPIO_PIN_NONE)
10059 + at32_select_gpio(data->reset_pin, 0);
10060 + if (data->vcc_pin != GPIO_PIN_NONE)
10061 + at32_select_gpio(data->vcc_pin, 0);
10062 + /* READY is used as extint, so we can't select it as gpio */
10063 +
10064 + platform_device_add(pdev);
10065 + return pdev;
10066 +
10067 +fail:
10068 + platform_device_put(pdev);
10069 + return NULL;
10070 +}
10071 +#endif
10072 +
10073 +/* --------------------------------------------------------------------
10074 + * AC97C
10075 + * -------------------------------------------------------------------- */
10076 +static struct resource atmel_ac97c0_resource[] __initdata = {
10077 + PBMEM(0xfff02800),
10078 + IRQ(29),
10079 +};
10080 +static struct clk atmel_ac97c0_pclk = {
10081 + .name = "pclk",
10082 + .parent = &pbb_clk,
10083 + .mode = pbb_clk_mode,
10084 + .get_rate = pbb_clk_get_rate,
10085 + .index = 10,
10086 +};
10087 +
10088 +struct platform_device *__init at32_add_device_ac97c(unsigned int id)
10089 +{
10090 + struct platform_device *pdev;
10091 +
10092 + if (id != 0)
10093 + return NULL;
10094 +
10095 + pdev = platform_device_alloc("atmel_ac97c", id);
10096 + if (!pdev)
10097 + return NULL;
10098 +
10099 + if (platform_device_add_resources(pdev, atmel_ac97c0_resource,
10100 + ARRAY_SIZE(atmel_ac97c0_resource)))
10101 + goto err_add_resources;
10102 +
10103 + select_peripheral(PB(20), PERIPH_B, 0); /* SYNC */
10104 + select_peripheral(PB(21), PERIPH_B, 0); /* SDO */
10105 + select_peripheral(PB(22), PERIPH_B, 0); /* SDI */
10106 + select_peripheral(PB(23), PERIPH_B, 0); /* SCLK */
10107 +
10108 + atmel_ac97c0_pclk.dev = &pdev->dev;
10109 +
10110 + platform_device_add(pdev);
10111 + return pdev;
10112 +
10113 +err_add_resources:
10114 + platform_device_put(pdev);
10115 + return NULL;
10116 +}
10117 +
10118 +/* --------------------------------------------------------------------
10119 + * ABDAC
10120 + * -------------------------------------------------------------------- */
10121 +static struct resource abdac0_resource[] __initdata = {
10122 + PBMEM(0xfff02000),
10123 + IRQ(27),
10124 +};
10125 +static struct clk abdac0_pclk = {
10126 + .name = "pclk",
10127 + .parent = &pbb_clk,
10128 + .mode = pbb_clk_mode,
10129 + .get_rate = pbb_clk_get_rate,
10130 + .index = 8,
10131 +};
10132 +static struct clk abdac0_sample_clk = {
10133 + .name = "sample_clk",
10134 + .mode = genclk_mode,
10135 + .get_rate = genclk_get_rate,
10136 + .set_rate = genclk_set_rate,
10137 + .set_parent = genclk_set_parent,
10138 + .index = 6,
10139 +};
10140 +
10141 +struct platform_device *__init at32_add_device_abdac(unsigned int id)
10142 +{
10143 + struct platform_device *pdev;
10144 +
10145 + if (id != 0)
10146 + return NULL;
10147 +
10148 + pdev = platform_device_alloc("abdac", id);
10149 + if (!pdev)
10150 + return NULL;
10151 +
10152 + if (platform_device_add_resources(pdev, abdac0_resource,
10153 + ARRAY_SIZE(abdac0_resource)))
10154 + goto err_add_resources;
10155 +
10156 + select_peripheral(PB(20), PERIPH_A, 0); /* DATA1 */
10157 + select_peripheral(PB(21), PERIPH_A, 0); /* DATA0 */
10158 + select_peripheral(PB(22), PERIPH_A, 0); /* DATAN1 */
10159 + select_peripheral(PB(23), PERIPH_A, 0); /* DATAN0 */
10160 +
10161 + abdac0_pclk.dev = &pdev->dev;
10162 + abdac0_sample_clk.dev = &pdev->dev;
10163 +
10164 + platform_device_add(pdev);
10165 + return pdev;
10166 +
10167 +err_add_resources:
10168 + platform_device_put(pdev);
10169 + return NULL;
10170 +}
10171 +
10172 +/* --------------------------------------------------------------------
10173 + * GCLK
10174 + * -------------------------------------------------------------------- */
10175 +static struct clk gclk0 = {
10176 + .name = "gclk0",
10177 + .mode = genclk_mode,
10178 + .get_rate = genclk_get_rate,
10179 + .set_rate = genclk_set_rate,
10180 + .set_parent = genclk_set_parent,
10181 + .index = 0,
10182 +};
10183 +static struct clk gclk1 = {
10184 + .name = "gclk1",
10185 + .mode = genclk_mode,
10186 + .get_rate = genclk_get_rate,
10187 + .set_rate = genclk_set_rate,
10188 + .set_parent = genclk_set_parent,
10189 + .index = 1,
10190 +};
10191 +static struct clk gclk2 = {
10192 + .name = "gclk2",
10193 + .mode = genclk_mode,
10194 + .get_rate = genclk_get_rate,
10195 + .set_rate = genclk_set_rate,
10196 + .set_parent = genclk_set_parent,
10197 + .index = 2,
10198 +};
10199 +static struct clk gclk3 = {
10200 + .name = "gclk3",
10201 + .mode = genclk_mode,
10202 + .get_rate = genclk_get_rate,
10203 + .set_rate = genclk_set_rate,
10204 + .set_parent = genclk_set_parent,
10205 + .index = 3,
10206 +};
10207 +static struct clk gclk4 = {
10208 + .name = "gclk4",
10209 + .mode = genclk_mode,
10210 + .get_rate = genclk_get_rate,
10211 + .set_rate = genclk_set_rate,
10212 + .set_parent = genclk_set_parent,
10213 + .index = 4,
10214 +};
10215 +
10216 +struct clk *at32_clock_list[] = {
10217 + &osc32k,
10218 + &osc0,
10219 + &osc1,
10220 + &pll0,
10221 + &pll1,
10222 + &cpu_clk,
10223 + &hsb_clk,
10224 + &pba_clk,
10225 + &pbb_clk,
10226 + &at32_pm_pclk,
10227 + &at32_intc0_pclk,
10228 + &hmatrix_clk,
10229 + &ebi_clk,
10230 + &hramc_clk,
10231 + &smc0_pclk,
10232 + &smc0_mck,
10233 + &pdc_hclk,
10234 + &pdc_pclk,
10235 + &dmaca0_hclk,
10236 + &pico_clk,
10237 + &pio0_mck,
10238 + &pio1_mck,
10239 + &pio2_mck,
10240 + &pio3_mck,
10241 + &pio4_mck,
10242 + &at32_tcb0_t0_clk,
10243 + &at32_tcb1_t0_clk,
10244 + &atmel_psif0_pclk,
10245 + &atmel_psif1_pclk,
10246 + &atmel_usart0_usart,
10247 + &atmel_usart1_usart,
10248 + &atmel_usart2_usart,
10249 + &atmel_usart3_usart,
10250 + &atmel_pwm0_mck,
10251 +#if defined(CONFIG_CPU_AT32AP7000)
10252 + &macb0_hclk,
10253 + &macb0_pclk,
10254 + &macb1_hclk,
10255 + &macb1_pclk,
10256 +#endif
10257 + &atmel_spi0_spi_clk,
10258 + &atmel_spi1_spi_clk,
10259 + &atmel_twi0_pclk,
10260 + &atmel_mci0_pclk,
10261 +#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002)
10262 + &atmel_lcdfb0_hck1,
10263 + &atmel_lcdfb0_pixclk,
10264 +#endif
10265 + &ssc0_pclk,
10266 + &ssc1_pclk,
10267 + &ssc2_pclk,
10268 + &usba0_hclk,
10269 + &usba0_pclk,
10270 + &atmel_ac97c0_pclk,
10271 + &abdac0_pclk,
10272 + &abdac0_sample_clk,
10273 + &gclk0,
10274 + &gclk1,
10275 + &gclk2,
10276 + &gclk3,
10277 + &gclk4,
10278 +};
10279 +unsigned int at32_nr_clocks = ARRAY_SIZE(at32_clock_list);
10280 +
10281 +void __init at32_portmux_init(void)
10282 +{
10283 + at32_init_pio(&pio0_device);
10284 + at32_init_pio(&pio1_device);
10285 + at32_init_pio(&pio2_device);
10286 + at32_init_pio(&pio3_device);
10287 + at32_init_pio(&pio4_device);
10288 +}
10289 +
10290 +void __init at32_clock_init(void)
10291 +{
10292 + u32 cpu_mask = 0, hsb_mask = 0, pba_mask = 0, pbb_mask = 0;
10293 + int i;
10294 +
10295 + if (pm_readl(MCCTRL) & PM_BIT(PLLSEL)) {
10296 + main_clock = &pll0;
10297 + cpu_clk.parent = &pll0;
10298 + } else {
10299 + main_clock = &osc0;
10300 + cpu_clk.parent = &osc0;
10301 + }
10302 +
10303 + if (pm_readl(PLL0) & PM_BIT(PLLOSC))
10304 + pll0.parent = &osc1;
10305 + if (pm_readl(PLL1) & PM_BIT(PLLOSC))
10306 + pll1.parent = &osc1;
10307 +
10308 + genclk_init_parent(&gclk0);
10309 + genclk_init_parent(&gclk1);
10310 + genclk_init_parent(&gclk2);
10311 + genclk_init_parent(&gclk3);
10312 + genclk_init_parent(&gclk4);
10313 +#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002)
10314 + genclk_init_parent(&atmel_lcdfb0_pixclk);
10315 +#endif
10316 + genclk_init_parent(&abdac0_sample_clk);
10317 +
10318 + /*
10319 + * Turn on all clocks that have at least one user already, and
10320 + * turn off everything else. We only do this for module
10321 + * clocks, and even though it isn't particularly pretty to
10322 + * check the address of the mode function, it should do the
10323 + * trick...
10324 + */
10325 + for (i = 0; i < ARRAY_SIZE(at32_clock_list); i++) {
10326 + struct clk *clk = at32_clock_list[i];
10327 +
10328 + if (clk->users == 0)
10329 + continue;
10330 +
10331 + if (clk->mode == &cpu_clk_mode)
10332 + cpu_mask |= 1 << clk->index;
10333 + else if (clk->mode == &hsb_clk_mode)
10334 + hsb_mask |= 1 << clk->index;
10335 + else if (clk->mode == &pba_clk_mode)
10336 + pba_mask |= 1 << clk->index;
10337 + else if (clk->mode == &pbb_clk_mode)
10338 + pbb_mask |= 1 << clk->index;
10339 + }
10340 +
10341 + pm_writel(CPU_MASK, cpu_mask);
10342 + pm_writel(HSB_MASK, hsb_mask);
10343 + pm_writel(PBA_MASK, pba_mask);
10344 + pm_writel(PBB_MASK, pbb_mask);
10345 +}
10346 diff -urN linux-2.6.24.3/arch/avr32/mach-at32ap/extint.c avr32-2.6/arch/avr32/mach-at32ap/extint.c
10347 --- linux-2.6.24.3/arch/avr32/mach-at32ap/extint.c 2008-02-26 01:20:20.000000000 +0100
10348 +++ avr32-2.6/arch/avr32/mach-at32ap/extint.c 2008-04-23 19:33:29.000000000 +0200
10349 @@ -26,16 +26,10 @@
10350 #define EIC_MODE 0x0014
10351 #define EIC_EDGE 0x0018
10352 #define EIC_LEVEL 0x001c
10353 -#define EIC_TEST 0x0020
10354 #define EIC_NMIC 0x0024
10355
10356 -/* Bitfields in TEST */
10357 -#define EIC_TESTEN_OFFSET 31
10358 -#define EIC_TESTEN_SIZE 1
10359 -
10360 /* Bitfields in NMIC */
10361 -#define EIC_EN_OFFSET 0
10362 -#define EIC_EN_SIZE 1
10363 +#define EIC_NMIC_ENABLE (1 << 0)
10364
10365 /* Bit manipulation macros */
10366 #define EIC_BIT(name) \
10367 @@ -63,6 +57,9 @@
10368 unsigned int first_irq;
10369 };
10370
10371 +static struct eic *nmi_eic;
10372 +static bool nmi_enabled;
10373 +
10374 static void eic_ack_irq(unsigned int irq)
10375 {
10376 struct eic *eic = get_irq_chip_data(irq);
10377 @@ -133,8 +130,11 @@
10378 eic_writel(eic, EDGE, edge);
10379 eic_writel(eic, LEVEL, level);
10380
10381 - if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
10382 + if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) {
10383 flow_type |= IRQ_LEVEL;
10384 + __set_irq_handler_unlocked(irq, handle_level_irq);
10385 + } else
10386 + __set_irq_handler_unlocked(irq, handle_edge_irq);
10387 desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
10388 desc->status |= flow_type;
10389 }
10390 @@ -154,9 +154,8 @@
10391 static void demux_eic_irq(unsigned int irq, struct irq_desc *desc)
10392 {
10393 struct eic *eic = desc->handler_data;
10394 - struct irq_desc *ext_desc;
10395 unsigned long status, pending;
10396 - unsigned int i, ext_irq;
10397 + unsigned int i;
10398
10399 status = eic_readl(eic, ISR);
10400 pending = status & eic_readl(eic, IMR);
10401 @@ -165,15 +164,28 @@
10402 i = fls(pending) - 1;
10403 pending &= ~(1 << i);
10404
10405 - ext_irq = i + eic->first_irq;
10406 - ext_desc = irq_desc + ext_irq;
10407 - if (ext_desc->status & IRQ_LEVEL)
10408 - handle_level_irq(ext_irq, ext_desc);
10409 - else
10410 - handle_edge_irq(ext_irq, ext_desc);
10411 + generic_handle_irq(i + eic->first_irq);
10412 }
10413 }
10414
10415 +int nmi_enable(void)
10416 +{
10417 + nmi_enabled = true;
10418 +
10419 + if (nmi_eic)
10420 + eic_writel(nmi_eic, NMIC, EIC_NMIC_ENABLE);
10421 +
10422 + return 0;
10423 +}
10424 +
10425 +void nmi_disable(void)
10426 +{
10427 + if (nmi_eic)
10428 + eic_writel(nmi_eic, NMIC, 0);
10429 +
10430 + nmi_enabled = false;
10431 +}
10432 +
10433 static int __init eic_probe(struct platform_device *pdev)
10434 {
10435 struct eic *eic;
10436 @@ -214,14 +226,13 @@
10437 pattern = eic_readl(eic, MODE);
10438 nr_irqs = fls(pattern);
10439
10440 - /* Trigger on falling edge unless overridden by driver */
10441 - eic_writel(eic, MODE, 0UL);
10442 + /* Trigger on low level unless overridden by driver */
10443 eic_writel(eic, EDGE, 0UL);
10444 + eic_writel(eic, LEVEL, 0UL);
10445
10446 eic->chip = &eic_chip;
10447
10448 for (i = 0; i < nr_irqs; i++) {
10449 - /* NOTE the handler we set here is ignored by the demux */
10450 set_irq_chip_and_handler(eic->first_irq + i, &eic_chip,
10451 handle_level_irq);
10452 set_irq_chip_data(eic->first_irq + i, eic);
10453 @@ -230,6 +241,16 @@
10454 set_irq_chained_handler(int_irq, demux_eic_irq);
10455 set_irq_data(int_irq, eic);
10456
10457 + if (pdev->id == 0) {
10458 + nmi_eic = eic;
10459 + if (nmi_enabled)
10460 + /*
10461 + * Someone tried to enable NMI before we were
10462 + * ready. Do it now.
10463 + */
10464 + nmi_enable();
10465 + }
10466 +
10467 dev_info(&pdev->dev,
10468 "External Interrupt Controller at 0x%p, IRQ %u\n",
10469 eic->regs, int_irq);
10470 diff -urN linux-2.6.24.3/arch/avr32/mach-at32ap/gpio-dev.c avr32-2.6/arch/avr32/mach-at32ap/gpio-dev.c
10471 --- linux-2.6.24.3/arch/avr32/mach-at32ap/gpio-dev.c 1970-01-01 01:00:00.000000000 +0100
10472 +++ avr32-2.6/arch/avr32/mach-at32ap/gpio-dev.c 2008-04-23 19:33:29.000000000 +0200
10473 @@ -0,0 +1,573 @@
10474 +/*
10475 + * GPIO /dev and configfs interface
10476 + *
10477 + * Copyright (C) 2006-2007 Atmel Corporation
10478 + *
10479 + * This program is free software; you can redistribute it and/or modify
10480 + * it under the terms of the GNU General Public License version 2 as
10481 + * published by the Free Software Foundation.
10482 + */
10483 +#include <linux/kernel.h>
10484 +#include <linux/configfs.h>
10485 +#include <linux/cdev.h>
10486 +#include <linux/device.h>
10487 +#include <linux/fs.h>
10488 +#include <linux/interrupt.h>
10489 +#include <linux/module.h>
10490 +#include <linux/poll.h>
10491 +#include <linux/uaccess.h>
10492 +#include <linux/wait.h>
10493 +
10494 +#include <asm/gpio.h>
10495 +#include <asm/arch/portmux.h>
10496 +
10497 +#define GPIO_DEV_MAX 8
10498 +
10499 +static struct class *gpio_dev_class;
10500 +static dev_t gpio_devt;
10501 +
10502 +struct gpio_item {
10503 + spinlock_t lock;
10504 +
10505 + int enabled;
10506 + int initialized;
10507 + int port;
10508 + u32 pin_mask;
10509 + u32 oe_mask;
10510 +
10511 + /* Pin state last time we read it (for blocking reads) */
10512 + u32 pin_state;
10513 + int changed;
10514 +
10515 + wait_queue_head_t change_wq;
10516 + struct fasync_struct *async_queue;
10517 +
10518 + int id;
10519 + struct class_device *gpio_dev;
10520 + struct cdev char_dev;
10521 + struct config_item item;
10522 +};
10523 +
10524 +struct gpio_attribute {
10525 + struct configfs_attribute attr;
10526 + ssize_t (*show)(struct gpio_item *, char *);
10527 + ssize_t (*store)(struct gpio_item *, const char *, size_t);
10528 +};
10529 +
10530 +static irqreturn_t gpio_dev_interrupt(int irq, void *dev_id)
10531 +{
10532 + struct gpio_item *gpio = dev_id;
10533 + u32 old_state, new_state;
10534 +
10535 + old_state = gpio->pin_state;
10536 + new_state = at32_gpio_get_value_multiple(gpio->port, gpio->pin_mask);
10537 + gpio->pin_state = new_state;
10538 +
10539 + if (new_state != old_state) {
10540 + gpio->changed = 1;
10541 + wake_up_interruptible(&gpio->change_wq);
10542 +
10543 + if (gpio->async_queue)
10544 + kill_fasync(&gpio->async_queue, SIGIO, POLL_IN);
10545 + }
10546 +
10547 + return IRQ_HANDLED;
10548 +}
10549 +
10550 +static int gpio_dev_open(struct inode *inode, struct file *file)
10551 +{
10552 + struct gpio_item *gpio = container_of(inode->i_cdev,
10553 + struct gpio_item,
10554 + char_dev);
10555 + unsigned int irq;
10556 + unsigned int i;
10557 + int ret;
10558 +
10559 + nonseekable_open(inode, file);
10560 + config_item_get(&gpio->item);
10561 + file->private_data = gpio;
10562 +
10563 + gpio->pin_state = at32_gpio_get_value_multiple(gpio->port,
10564 + gpio->pin_mask);
10565 + gpio->changed = 1;
10566 +
10567 + for (i = 0; i < 32; i++) {
10568 + if (gpio->pin_mask & (1 << i)) {
10569 + irq = gpio_to_irq(32 * gpio->port + i);
10570 + ret = request_irq(irq, gpio_dev_interrupt, 0,
10571 + "gpio-dev", gpio);
10572 + if (ret)
10573 + goto err_irq;
10574 + }
10575 + }
10576 +
10577 + return 0;
10578 +
10579 +err_irq:
10580 + while (i--) {
10581 + if (gpio->pin_mask & (1 << i)) {
10582 + irq = gpio_to_irq(32 * gpio->port + i);
10583 + free_irq(irq, gpio);
10584 + }
10585 + }
10586 +
10587 + config_item_put(&gpio->item);
10588 +
10589 + return ret;
10590 +}
10591 +
10592 +static int gpio_dev_fasync(int fd, struct file *file, int mode)
10593 +{
10594 + struct gpio_item *gpio = file->private_data;
10595 +
10596 + return fasync_helper(fd, file, mode, &gpio->async_queue);
10597 +}
10598 +
10599 +static int gpio_dev_release(struct inode *inode, struct file *file)
10600 +{
10601 + struct gpio_item *gpio = file->private_data;
10602 + unsigned int irq;
10603 + unsigned int i;
10604 +
10605 + gpio_dev_fasync(-1, file, 0);
10606 +
10607 + for (i = 0; i < 32; i++) {
10608 + if (gpio->pin_mask & (1 << i)) {
10609 + irq = gpio_to_irq(32 * gpio->port + i);
10610 + free_irq(irq, gpio);
10611 + }
10612 + }
10613 +
10614 + config_item_put(&gpio->item);
10615 +
10616 + return 0;
10617 +}
10618 +
10619 +static unsigned int gpio_dev_poll(struct file *file, poll_table *wait)
10620 +{
10621 + struct gpio_item *gpio = file->private_data;
10622 + unsigned int mask = 0;
10623 +
10624 + poll_wait(file, &gpio->change_wq, wait);
10625 + if (gpio->changed)
10626 + mask |= POLLIN | POLLRDNORM;
10627 +
10628 + return mask;
10629 +}
10630 +
10631 +static ssize_t gpio_dev_read(struct file *file, char __user *buf,
10632 + size_t count, loff_t *offset)
10633 +{
10634 + struct gpio_item *gpio = file->private_data;
10635 + u32 value;
10636 +
10637 + spin_lock_irq(&gpio->lock);
10638 + while (!gpio->changed) {
10639 + spin_unlock_irq(&gpio->lock);
10640 +
10641 + if (file->f_flags & O_NONBLOCK)
10642 + return -EAGAIN;
10643 +
10644 + if (wait_event_interruptible(gpio->change_wq, gpio->changed))
10645 + return -ERESTARTSYS;
10646 +
10647 + spin_lock_irq(&gpio->lock);
10648 + }
10649 +
10650 + gpio->changed = 0;
10651 + value = at32_gpio_get_value_multiple(gpio->port, gpio->pin_mask);
10652 +
10653 + spin_unlock_irq(&gpio->lock);
10654 +
10655 + count = min(count, (size_t)4);
10656 + if (copy_to_user(buf, &value, count))
10657 + return -EFAULT;
10658 +
10659 + return count;
10660 +}
10661 +
10662 +static ssize_t gpio_dev_write(struct file *file, const char __user *buf,
10663 + size_t count, loff_t *offset)
10664 +{
10665 + struct gpio_item *gpio = file->private_data;
10666 + u32 value = 0;
10667 + u32 mask = ~0UL;
10668 +
10669 + count = min(count, (size_t)4);
10670 + if (copy_from_user(&value, buf, count))
10671 + return -EFAULT;
10672 +
10673 + /* Assuming big endian */
10674 + mask <<= (4 - count) * 8;
10675 + mask &= gpio->pin_mask;
10676 +
10677 + at32_gpio_set_value_multiple(gpio->port, value, mask);
10678 +
10679 + return count;
10680 +}
10681 +
10682 +static struct file_operations gpio_dev_fops = {
10683 + .owner = THIS_MODULE,
10684 + .llseek = no_llseek,
10685 + .open = gpio_dev_open,
10686 + .release = gpio_dev_release,
10687 + .fasync = gpio_dev_fasync,
10688 + .poll = gpio_dev_poll,
10689 + .read = gpio_dev_read,
10690 + .write = gpio_dev_write,
10691 +};
10692 +
10693 +static struct gpio_item *to_gpio_item(struct config_item *item)
10694 +{
10695 + return item ? container_of(item, struct gpio_item, item) : NULL;
10696 +}
10697 +
10698 +static ssize_t gpio_show_gpio_id(struct gpio_item *gpio, char *page)
10699 +{
10700 + return sprintf(page, "%d\n", gpio->port);
10701 +}
10702 +
10703 +static ssize_t gpio_store_gpio_id(struct gpio_item *gpio,
10704 + const char *page, size_t count)
10705 +{
10706 + unsigned long id;
10707 + char *p = (char *)page;
10708 + ssize_t ret = -EINVAL;
10709 +
10710 + id = simple_strtoul(p, &p, 0);
10711 + if (!p || (*p && (*p != '\n')))
10712 + return -EINVAL;
10713 +
10714 + /* Switching PIO is not allowed when live... */
10715 + spin_lock(&gpio->lock);
10716 + if (!gpio->enabled) {
10717 + ret = -ENXIO;
10718 + if (at32_gpio_port_is_valid(id)) {
10719 + gpio->port = id;
10720 + ret = count;
10721 + }
10722 + }
10723 + spin_unlock(&gpio->lock);
10724 +
10725 + return ret;
10726 +}
10727 +
10728 +static ssize_t gpio_show_pin_mask(struct gpio_item *gpio, char *page)
10729 +{
10730 + return sprintf(page, "0x%08x\n", gpio->pin_mask);
10731 +}
10732 +
10733 +static ssize_t gpio_store_pin_mask(struct gpio_item *gpio,
10734 + const char *page, size_t count)
10735 +{
10736 + u32 new_mask;
10737 + char *p = (char *)page;
10738 + ssize_t ret = -EINVAL;
10739 +
10740 + new_mask = simple_strtoul(p, &p, 0);
10741 + if (!p || (*p && (*p != '\n')))
10742 + return -EINVAL;
10743 +
10744 + /* Can't update the pin mask while live. */
10745 + spin_lock(&gpio->lock);
10746 + if (!gpio->enabled) {
10747 + gpio->oe_mask &= new_mask;
10748 + gpio->pin_mask = new_mask;
10749 + ret = count;
10750 + }
10751 + spin_unlock(&gpio->lock);
10752 +
10753 + return ret;
10754 +}
10755 +
10756 +static ssize_t gpio_show_oe_mask(struct gpio_item *gpio, char *page)
10757 +{
10758 + return sprintf(page, "0x%08x\n", gpio->oe_mask);
10759 +}
10760 +
10761 +static ssize_t gpio_store_oe_mask(struct gpio_item *gpio,
10762 + const char *page, size_t count)
10763 +{
10764 + u32 mask;
10765 + char *p = (char *)page;
10766 + ssize_t ret = -EINVAL;
10767 +
10768 + mask = simple_strtoul(p, &p, 0);
10769 + if (!p || (*p && (*p != '\n')))
10770 + return -EINVAL;
10771 +
10772 + spin_lock(&gpio->lock);
10773 + if (!gpio->enabled) {
10774 + gpio->oe_mask = mask & gpio->pin_mask;
10775 + ret = count;
10776 + }
10777 + spin_unlock(&gpio->lock);
10778 +
10779 + return ret;
10780 +}
10781 +
10782 +static ssize_t gpio_show_enabled(struct gpio_item *gpio, char *page)
10783 +{
10784 + return sprintf(page, "%d\n", gpio->enabled);
10785 +}
10786 +
10787 +static ssize_t gpio_store_enabled(struct gpio_item *gpio,
10788 + const char *page, size_t count)
10789 +{
10790 + char *p = (char *)page;
10791 + int enabled;
10792 + int ret;
10793 +
10794 + enabled = simple_strtoul(p, &p, 0);
10795 + if (!p || (*p && (*p != '\n')))
10796 + return -EINVAL;
10797 +
10798 + /* make it a boolean value */
10799 + enabled = !!enabled;
10800 +
10801 + if (gpio->enabled == enabled)
10802 + /* No change; do nothing. */
10803 + return count;
10804 +
10805 + BUG_ON(gpio->id >= GPIO_DEV_MAX);
10806 +
10807 + if (!enabled) {
10808 + class_device_unregister(gpio->gpio_dev);
10809 + cdev_del(&gpio->char_dev);
10810 + at32_deselect_pins(gpio->port, gpio->pin_mask);
10811 + gpio->initialized = 0;
10812 + } else {
10813 + if (gpio->port < 0 || !gpio->pin_mask)
10814 + return -ENODEV;
10815 + }
10816 +
10817 + /* Disallow any updates to gpio_id or pin_mask */
10818 + spin_lock(&gpio->lock);
10819 + gpio->enabled = enabled;
10820 + spin_unlock(&gpio->lock);
10821 +
10822 + if (!enabled)
10823 + return count;
10824 +
10825 + /* Now, try to allocate the pins */
10826 + ret = at32_select_gpio_pins(gpio->port, gpio->pin_mask, gpio->oe_mask);
10827 + if (ret)
10828 + goto err_alloc_pins;
10829 +
10830 + gpio->initialized = 1;
10831 +
10832 + cdev_init(&gpio->char_dev, &gpio_dev_fops);
10833 + gpio->char_dev.owner = THIS_MODULE;
10834 + ret = cdev_add(&gpio->char_dev, MKDEV(MAJOR(gpio_devt), gpio->id), 1);
10835 + if (ret < 0)
10836 + goto err_cdev_add;
10837 + gpio->gpio_dev = class_device_create(gpio_dev_class, NULL,
10838 + MKDEV(MAJOR(gpio_devt), gpio->id),
10839 + NULL,
10840 + "gpio%d", gpio->id);
10841 + if (IS_ERR(gpio->gpio_dev)) {
10842 + printk(KERN_ERR "failed to create gpio%d\n", gpio->id);
10843 + ret = PTR_ERR(gpio->gpio_dev);
10844 + goto err_class_dev;
10845 + }
10846 +
10847 + printk(KERN_INFO "created gpio%d (port%d/0x%08x) as (%d:%d)\n",
10848 + gpio->id, gpio->port, gpio->pin_mask,
10849 + MAJOR(gpio->gpio_dev->devt), MINOR(gpio->gpio_dev->devt));
10850 +
10851 + return 0;
10852 +
10853 +err_class_dev:
10854 + cdev_del(&gpio->char_dev);
10855 +err_cdev_add:
10856 + at32_deselect_pins(gpio->port, gpio->pin_mask);
10857 + gpio->initialized = 0;
10858 +err_alloc_pins:
10859 + spin_lock(&gpio->lock);
10860 + gpio->enabled = 0;
10861 + spin_unlock(&gpio->lock);
10862 +
10863 + return ret;
10864 +}
10865 +
10866 +static struct gpio_attribute gpio_item_attr_gpio_id = {
10867 + .attr = {
10868 + .ca_owner = THIS_MODULE,
10869 + .ca_name = "gpio_id",
10870 + .ca_mode = S_IRUGO | S_IWUSR,
10871 + },
10872 + .show = gpio_show_gpio_id,
10873 + .store = gpio_store_gpio_id,
10874 +};
10875 +static struct gpio_attribute gpio_item_attr_pin_mask = {
10876 + .attr = {
10877 + .ca_owner = THIS_MODULE,
10878 + .ca_name = "pin_mask",
10879 + .ca_mode = S_IRUGO | S_IWUSR,
10880 + },
10881 + .show = gpio_show_pin_mask,
10882 + .store = gpio_store_pin_mask,
10883 +};
10884 +static struct gpio_attribute gpio_item_attr_oe_mask = {
10885 + .attr = {
10886 + .ca_owner = THIS_MODULE,
10887 + .ca_name = "oe_mask",
10888 + .ca_mode = S_IRUGO | S_IWUSR,
10889 + },
10890 + .show = gpio_show_oe_mask,
10891 + .store = gpio_store_oe_mask,
10892 +};
10893 +static struct gpio_attribute gpio_item_attr_enabled = {
10894 + .attr = {
10895 + .ca_owner = THIS_MODULE,
10896 + .ca_name = "enabled",
10897 + .ca_mode = S_IRUGO | S_IWUSR,
10898 + },
10899 + .show = gpio_show_enabled,
10900 + .store = gpio_store_enabled,
10901 +};
10902 +
10903 +static struct configfs_attribute *gpio_item_attrs[] = {
10904 + &gpio_item_attr_gpio_id.attr,
10905 + &gpio_item_attr_pin_mask.attr,
10906 + &gpio_item_attr_oe_mask.attr,
10907 + &gpio_item_attr_enabled.attr,
10908 + NULL,
10909 +};
10910 +
10911 +static ssize_t gpio_show_attr(struct config_item *item,
10912 + struct configfs_attribute *attr,
10913 + char *page)
10914 +{
10915 + struct gpio_item *gpio_item = to_gpio_item(item);
10916 + struct gpio_attribute *gpio_attr
10917 + = container_of(attr, struct gpio_attribute, attr);
10918 + ssize_t ret = 0;
10919 +
10920 + if (gpio_attr->show)
10921 + ret = gpio_attr->show(gpio_item, page);
10922 + return ret;
10923 +}
10924 +
10925 +static ssize_t gpio_store_attr(struct config_item *item,
10926 + struct configfs_attribute *attr,
10927 + const char *page, size_t count)
10928 +{
10929 + struct gpio_item *gpio_item = to_gpio_item(item);
10930 + struct gpio_attribute *gpio_attr
10931 + = container_of(attr, struct gpio_attribute, attr);
10932 + ssize_t ret = -EINVAL;
10933 +
10934 + if (gpio_attr->store)
10935 + ret = gpio_attr->store(gpio_item, page, count);
10936 + return ret;
10937 +}
10938 +
10939 +static void gpio_release(struct config_item *item)
10940 +{
10941 + kfree(to_gpio_item(item));
10942 +}
10943 +
10944 +static struct configfs_item_operations gpio_item_ops = {
10945 + .release = gpio_release,
10946 + .show_attribute = gpio_show_attr,
10947 + .store_attribute = gpio_store_attr,
10948 +};
10949 +
10950 +static struct config_item_type gpio_item_type = {
10951 + .ct_item_ops = &gpio_item_ops,
10952 + .ct_attrs = gpio_item_attrs,
10953 + .ct_owner = THIS_MODULE,
10954 +};
10955 +
10956 +static struct config_item *gpio_make_item(struct config_group *group,
10957 + const char *name)
10958 +{
10959 + static int next_id;
10960 + struct gpio_item *gpio;
10961 +
10962 + if (next_id >= GPIO_DEV_MAX)
10963 + return NULL;
10964 +
10965 + gpio = kzalloc(sizeof(struct gpio_item), GFP_KERNEL);
10966 + if (!gpio)
10967 + return NULL;
10968 +
10969 + gpio->id = next_id++;
10970 + config_item_init_type_name(&gpio->item, name, &gpio_item_type);
10971 + spin_lock_init(&gpio->lock);
10972 + init_waitqueue_head(&gpio->change_wq);
10973 +
10974 + return &gpio->item;
10975 +}
10976 +
10977 +static void gpio_drop_item(struct config_group *group,
10978 + struct config_item *item)
10979 +{
10980 + struct gpio_item *gpio = to_gpio_item(item);
10981 +
10982 + spin_lock(&gpio->lock);
10983 + if (gpio->enabled) {
10984 + class_device_unregister(gpio->gpio_dev);
10985 + cdev_del(&gpio->char_dev);
10986 + }
10987 +
10988 + if (gpio->initialized) {
10989 + at32_deselect_pins(gpio->port, gpio->pin_mask);
10990 + gpio->initialized = 0;
10991 + gpio->enabled = 0;
10992 + }
10993 + spin_unlock(&gpio->lock);
10994 +}
10995 +
10996 +static struct configfs_group_operations gpio_group_ops = {
10997 + .make_item = gpio_make_item,
10998 + .drop_item = gpio_drop_item,
10999 +};
11000 +
11001 +static struct config_item_type gpio_group_type = {
11002 + .ct_group_ops = &gpio_group_ops,
11003 + .ct_owner = THIS_MODULE,
11004 +};
11005 +
11006 +static struct configfs_subsystem gpio_subsys = {
11007 + .su_group = {
11008 + .cg_item = {
11009 + .ci_namebuf = "gpio",
11010 + .ci_type = &gpio_group_type,
11011 + },
11012 + },
11013 +};
11014 +
11015 +static int __init gpio_dev_init(void)
11016 +{
11017 + int err;
11018 +
11019 + gpio_dev_class = class_create(THIS_MODULE, "gpio-dev");
11020 + if (IS_ERR(gpio_dev_class)) {
11021 + err = PTR_ERR(gpio_dev_class);
11022 + goto err_class_create;
11023 + }
11024 +
11025 + err = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, "gpio");
11026 + if (err < 0)
11027 + goto err_alloc_chrdev;
11028 +
11029 + /* Configfs initialization */
11030 + config_group_init(&gpio_subsys.su_group);
11031 + mutex_init(&gpio_subsys.su_mutex);
11032 + err = configfs_register_subsystem(&gpio_subsys);
11033 + if (err)
11034 + goto err_register_subsys;
11035 +
11036 + return 0;
11037 +
11038 +err_register_subsys:
11039 + unregister_chrdev_region(gpio_devt, GPIO_DEV_MAX);
11040 +err_alloc_chrdev:
11041 + class_destroy(gpio_dev_class);
11042 +err_class_create:
11043 + printk(KERN_WARNING "Failed to initialize gpio /dev interface\n");
11044 + return err;
11045 +}
11046 +late_initcall(gpio_dev_init);
11047 diff -urN linux-2.6.24.3/arch/avr32/mach-at32ap/intc.c avr32-2.6/arch/avr32/mach-at32ap/intc.c
11048 --- linux-2.6.24.3/arch/avr32/mach-at32ap/intc.c 2008-02-26 01:20:20.000000000 +0100
11049 +++ avr32-2.6/arch/avr32/mach-at32ap/intc.c 2008-04-23 20:12:35.000000000 +0200
11050 @@ -13,7 +13,6 @@
11051 #include <linux/irq.h>
11052 #include <linux/platform_device.h>
11053
11054 -#include <asm/intc.h>
11055 #include <asm/io.h>
11056
11057 #include "intc.h"
11058 diff -urN linux-2.6.24.3/arch/avr32/mach-at32ap/Kconfig avr32-2.6/arch/avr32/mach-at32ap/Kconfig
11059 --- linux-2.6.24.3/arch/avr32/mach-at32ap/Kconfig 2008-02-26 01:20:20.000000000 +0100
11060 +++ avr32-2.6/arch/avr32/mach-at32ap/Kconfig 2008-04-23 19:33:29.000000000 +0200
11061 @@ -3,9 +3,9 @@
11062 menu "Atmel AVR32 AP options"
11063
11064 choice
11065 - prompt "AT32AP7000 static memory bus width"
11066 - depends on CPU_AT32AP7000
11067 - default AP7000_16_BIT_SMC
11068 + prompt "AT32AP700x static memory bus width"
11069 + depends on CPU_AT32AP700X
11070 + default AP700X_16_BIT_SMC
11071 help
11072 Define the width of the AP7000 external static memory interface.
11073 This is used to determine how to mangle the address and/or data
11074 @@ -15,17 +15,24 @@
11075 width for all chip selects, excluding the flash (which is using
11076 raw access and is thus not affected by any of this.)
11077
11078 -config AP7000_32_BIT_SMC
11079 +config AP700X_32_BIT_SMC
11080 bool "32 bit"
11081
11082 -config AP7000_16_BIT_SMC
11083 +config AP700X_16_BIT_SMC
11084 bool "16 bit"
11085
11086 -config AP7000_8_BIT_SMC
11087 +config AP700X_8_BIT_SMC
11088 bool "8 bit"
11089
11090 endchoice
11091
11092 +config GPIO_DEV
11093 + bool "GPIO /dev interface"
11094 + select CONFIGFS_FS
11095 + default n
11096 + help
11097 + Say `Y' to enable a /dev interface to the GPIO pins.
11098 +
11099 endmenu
11100
11101 endif # PLATFORM_AT32AP
11102 diff -urN linux-2.6.24.3/arch/avr32/mach-at32ap/Makefile avr32-2.6/arch/avr32/mach-at32ap/Makefile
11103 --- linux-2.6.24.3/arch/avr32/mach-at32ap/Makefile 2008-02-26 01:20:20.000000000 +0100
11104 +++ avr32-2.6/arch/avr32/mach-at32ap/Makefile 2008-04-23 20:12:35.000000000 +0200
11105 @@ -1,4 +1,4 @@
11106 obj-y += at32ap.o clock.o intc.o extint.o pio.o hsmc.o
11107 -obj-$(CONFIG_CPU_AT32AP7000) += at32ap7000.o
11108 -obj-$(CONFIG_CPU_AT32AP7000) += time-tc.o
11109 +obj-$(CONFIG_CPU_AT32AP700X) += at32ap700x.o pm-at32ap700x.o
11110 obj-$(CONFIG_CPU_FREQ_AT32AP) += cpufreq.o
11111 +obj-$(CONFIG_GPIO_DEV) += gpio-dev.o
11112 diff -urN linux-2.6.24.3/arch/avr32/mach-at32ap/pio.c avr32-2.6/arch/avr32/mach-at32ap/pio.c
11113 --- linux-2.6.24.3/arch/avr32/mach-at32ap/pio.c 2008-02-26 01:20:20.000000000 +0100
11114 +++ avr32-2.6/arch/avr32/mach-at32ap/pio.c 2008-04-23 20:12:35.000000000 +0200
11115 @@ -162,6 +162,82 @@
11116 dump_stack();
11117 }
11118
11119 +#ifdef CONFIG_GPIO_DEV
11120 +
11121 +/* Gang allocators and accessors; used by the GPIO /dev driver */
11122 +int at32_gpio_port_is_valid(unsigned int port)
11123 +{
11124 + return port < MAX_NR_PIO_DEVICES && pio_dev[port].regs != NULL;
11125 +}
11126 +
11127 +int at32_select_gpio_pins(unsigned int port, u32 pins, u32 oe_mask)
11128 +{
11129 + struct pio_device *pio;
11130 + u32 old, new;
11131 +
11132 + pio = &pio_dev[port];
11133 + BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs || (oe_mask & ~pins));
11134 +
11135 + /* Try to allocate the pins */
11136 + do {
11137 + old = pio->pinmux_mask;
11138 + if (old & pins)
11139 + return -EBUSY;
11140 +
11141 + new = old | pins;
11142 + } while (cmpxchg(&pio->pinmux_mask, old, new) != old);
11143 +
11144 + /* That went well, now configure the port */
11145 + pio_writel(pio, OER, oe_mask);
11146 + pio_writel(pio, PER, pins);
11147 +
11148 + return 0;
11149 +}
11150 +
11151 +void at32_deselect_pins(unsigned int port, u32 pins)
11152 +{
11153 + struct pio_device *pio;
11154 + u32 old, new;
11155 +
11156 + pio = &pio_dev[port];
11157 + BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs);
11158 +
11159 + /* Return to a "safe" mux configuration */
11160 + pio_writel(pio, PUER, pins);
11161 + pio_writel(pio, ODR, pins);
11162 +
11163 + /* Deallocate the pins */
11164 + do {
11165 + old = pio->pinmux_mask;
11166 + new = old & ~pins;
11167 + } while (cmpxchg(&pio->pinmux_mask, old, new) != old);
11168 +}
11169 +
11170 +u32 at32_gpio_get_value_multiple(unsigned int port, u32 pins)
11171 +{
11172 + struct pio_device *pio;
11173 +
11174 + pio = &pio_dev[port];
11175 + BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs);
11176 +
11177 + return pio_readl(pio, PDSR) & pins;
11178 +}
11179 +
11180 +void at32_gpio_set_value_multiple(unsigned int port, u32 value, u32 mask)
11181 +{
11182 + struct pio_device *pio;
11183 +
11184 + pio = &pio_dev[port];
11185 + BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs);
11186 +
11187 + /* No atomic updates for now... */
11188 + pio_writel(pio, CODR, ~value & mask);
11189 + pio_writel(pio, SODR, value & mask);
11190 +}
11191 +
11192 +#endif /* CONFIG_GPIO_DEV */
11193 +
11194 +
11195 /*--------------------------------------------------------------------------*/
11196
11197 /* GPIO API */
11198 diff -urN linux-2.6.24.3/arch/avr32/mach-at32ap/pm-at32ap700x.S avr32-2.6/arch/avr32/mach-at32ap/pm-at32ap700x.S
11199 --- linux-2.6.24.3/arch/avr32/mach-at32ap/pm-at32ap700x.S 1970-01-01 01:00:00.000000000 +0100
11200 +++ avr32-2.6/arch/avr32/mach-at32ap/pm-at32ap700x.S 2008-04-23 20:12:35.000000000 +0200
11201 @@ -0,0 +1,66 @@
11202 +/*
11203 + * Low-level Power Management code.
11204 + *
11205 + * Copyright (C) 2008 Atmel Corporation
11206 + *
11207 + * This program is free software; you can redistribute it and/or modify
11208 + * it under the terms of the GNU General Public License version 2 as
11209 + * published by the Free Software Foundation.
11210 + */
11211 +#include <asm/asm.h>
11212 +#include <asm/asm-offsets.h>
11213 +#include <asm/thread_info.h>
11214 +#include <asm/arch/pm.h>
11215 +
11216 + .section .bss, "wa", @nobits
11217 + .global disable_idle_sleep
11218 + .type disable_idle_sleep, @object
11219 +disable_idle_sleep:
11220 + .int 4
11221 + .size disable_idle_sleep, . - disable_idle_sleep
11222 +
11223 + /* Keep this close to the irq handlers */
11224 + .section .irq.text, "ax", @progbits
11225 +
11226 + /*
11227 + * void cpu_enter_idle(void)
11228 + *
11229 + * Put the CPU into "idle" mode, in which it will consume
11230 + * significantly less power.
11231 + *
11232 + * If an interrupt comes along in the window between
11233 + * unmask_interrupts and the sleep instruction below, the
11234 + * interrupt code will adjust the return address so that we
11235 + * never execute the sleep instruction. This is required
11236 + * because the AP7000 doesn't unmask interrupts when entering
11237 + * sleep modes; later CPUs may not need this workaround.
11238 + */
11239 + .global cpu_enter_idle
11240 + .type cpu_enter_idle, @function
11241 +cpu_enter_idle:
11242 + mask_interrupts
11243 + get_thread_info r8
11244 + ld.w r9, r8[TI_flags]
11245 + bld r9, TIF_NEED_RESCHED
11246 + brcs .Lret_from_sleep
11247 + sbr r9, TIF_CPU_GOING_TO_SLEEP
11248 + st.w r8[TI_flags], r9
11249 + unmask_interrupts
11250 + sleep CPU_SLEEP_IDLE
11251 + .size cpu_idle_sleep, . - cpu_idle_sleep
11252 +
11253 + /*
11254 + * Common return path for PM functions that don't run from
11255 + * SRAM.
11256 + */
11257 + .global cpu_idle_skip_sleep
11258 + .type cpu_idle_skip_sleep, @function
11259 +cpu_idle_skip_sleep:
11260 + mask_interrupts
11261 + ld.w r9, r8[TI_flags]
11262 + cbr r9, TIF_CPU_GOING_TO_SLEEP
11263 + st.w r8[TI_flags], r9
11264 +.Lret_from_sleep:
11265 + unmask_interrupts
11266 + retal r12
11267 + .size cpu_idle_skip_sleep, . - cpu_idle_skip_sleep
11268 diff -urN linux-2.6.24.3/arch/avr32/mach-at32ap/time-tc.c avr32-2.6/arch/avr32/mach-at32ap/time-tc.c
11269 --- linux-2.6.24.3/arch/avr32/mach-at32ap/time-tc.c 2008-02-26 01:20:20.000000000 +0100
11270 +++ avr32-2.6/arch/avr32/mach-at32ap/time-tc.c 1970-01-01 01:00:00.000000000 +0100
11271 @@ -1,218 +0,0 @@
11272 -/*
11273 - * Copyright (C) 2004-2007 Atmel Corporation
11274 - *
11275 - * Based on MIPS implementation arch/mips/kernel/time.c
11276 - * Copyright 2001 MontaVista Software Inc.
11277 - *
11278 - * This program is free software; you can redistribute it and/or modify
11279 - * it under the terms of the GNU General Public License version 2 as
11280 - * published by the Free Software Foundation.
11281 - */
11282 -
11283 -#include <linux/clk.h>
11284 -#include <linux/clocksource.h>
11285 -#include <linux/time.h>
11286 -#include <linux/module.h>
11287 -#include <linux/interrupt.h>
11288 -#include <linux/irq.h>
11289 -#include <linux/kernel_stat.h>
11290 -#include <linux/errno.h>
11291 -#include <linux/init.h>
11292 -#include <linux/profile.h>
11293 -#include <linux/sysdev.h>
11294 -#include <linux/err.h>
11295 -
11296 -#include <asm/div64.h>
11297 -#include <asm/sysreg.h>
11298 -#include <asm/io.h>
11299 -#include <asm/sections.h>
11300 -
11301 -#include <asm/arch/time.h>
11302 -
11303 -/* how many counter cycles in a jiffy? */
11304 -static u32 cycles_per_jiffy;
11305 -
11306 -/* the count value for the next timer interrupt */
11307 -static u32 expirelo;
11308 -
11309 -/* the I/O registers of the TC module */
11310 -static void __iomem *ioregs;
11311 -
11312 -cycle_t read_cycle_count(void)
11313 -{
11314 - return (cycle_t)timer_read(ioregs, 0, CV);
11315 -}
11316 -
11317 -struct clocksource clocksource_avr32 = {
11318 - .name = "avr32",
11319 - .rating = 342,
11320 - .read = read_cycle_count,
11321 - .mask = CLOCKSOURCE_MASK(16),
11322 - .shift = 16,
11323 - .flags = CLOCK_SOURCE_IS_CONTINUOUS,
11324 -};
11325 -
11326 -static void avr32_timer_ack(void)
11327 -{
11328 - u16 count = expirelo;
11329 -
11330 - /* Ack this timer interrupt and set the next one, use a u16
11331 - * variable so it will wrap around correctly */
11332 - count += cycles_per_jiffy;
11333 - expirelo = count;
11334 - timer_write(ioregs, 0, RC, expirelo);
11335 -
11336 - /* Check to see if we have missed any timer interrupts */
11337 - count = timer_read(ioregs, 0, CV);
11338 - if ((count - expirelo) < 0x7fff) {
11339 - expirelo = count + cycles_per_jiffy;
11340 - timer_write(ioregs, 0, RC, expirelo);
11341 - }
11342 -}
11343 -
11344 -u32 avr32_hpt_read(void)
11345 -{
11346 - return timer_read(ioregs, 0, CV);
11347 -}
11348 -
11349 -static int avr32_timer_calc_div_and_set_jiffies(struct clk *pclk)
11350 -{
11351 - unsigned int cycles_max = (clocksource_avr32.mask + 1) / 2;
11352 - unsigned int divs[] = { 4, 8, 16, 32 };
11353 - int divs_size = ARRAY_SIZE(divs);
11354 - int i = 0;
11355 - unsigned long count_hz;
11356 - unsigned long shift;
11357 - unsigned long mult;
11358 - int clock_div = -1;
11359 - u64 tmp;
11360 -
11361 - shift = clocksource_avr32.shift;
11362 -
11363 - do {
11364 - count_hz = clk_get_rate(pclk) / divs[i];
11365 - mult = clocksource_hz2mult(count_hz, shift);
11366 - clocksource_avr32.mult = mult;
11367 -
11368 - tmp = TICK_NSEC;
11369 - tmp <<= shift;
11370 - tmp += mult / 2;
11371 - do_div(tmp, mult);
11372 -
11373 - cycles_per_jiffy = tmp;
11374 - } while (cycles_per_jiffy > cycles_max && ++i < divs_size);
11375 -
11376 - clock_div = i + 1;
11377 -
11378 - if (clock_div > divs_size) {
11379 - pr_debug("timer: could not calculate clock divider\n");
11380 - return -EFAULT;
11381 - }
11382 -
11383 - /* Set the clock divider */
11384 - timer_write(ioregs, 0, CMR, TIMER_BF(CMR_TCCLKS, clock_div));
11385 -
11386 - return 0;
11387 -}
11388 -
11389 -int avr32_hpt_init(unsigned int count)
11390 -{
11391 - struct resource *regs;
11392 - struct clk *pclk;
11393 - int irq = -1;
11394 - int ret = 0;
11395 -
11396 - ret = -ENXIO;
11397 -
11398 - irq = platform_get_irq(&at32_systc0_device, 0);
11399 - if (irq < 0) {
11400 - pr_debug("timer: could not get irq\n");
11401 - goto out_error;
11402 - }
11403 -
11404 - pclk = clk_get(&at32_systc0_device.dev, "pclk");
11405 - if (IS_ERR(pclk)) {
11406 - pr_debug("timer: could not get clk: %ld\n", PTR_ERR(pclk));
11407 - goto out_error;
11408 - }
11409 - clk_enable(pclk);
11410 -
11411 - regs = platform_get_resource(&at32_systc0_device, IORESOURCE_MEM, 0);
11412 - if (!regs) {
11413 - pr_debug("timer: could not get resource\n");
11414 - goto out_error_clk;
11415 - }
11416 -
11417 - ioregs = ioremap(regs->start, regs->end - regs->start + 1);
11418 - if (!ioregs) {
11419 - pr_debug("timer: could not get ioregs\n");
11420 - goto out_error_clk;
11421 - }
11422 -
11423 - ret = avr32_timer_calc_div_and_set_jiffies(pclk);
11424 - if (ret)
11425 - goto out_error_io;
11426 -
11427 - ret = setup_irq(irq, &timer_irqaction);
11428 - if (ret) {
11429 - pr_debug("timer: could not request irq %d: %d\n",
11430 - irq, ret);
11431 - goto out_error_io;
11432 - }
11433 -
11434 - expirelo = (timer_read(ioregs, 0, CV) / cycles_per_jiffy + 1)
11435 - * cycles_per_jiffy;
11436 -
11437 - /* Enable clock and interrupts on RC compare */
11438 - timer_write(ioregs, 0, CCR, TIMER_BIT(CCR_CLKEN));
11439 - timer_write(ioregs, 0, IER, TIMER_BIT(IER_CPCS));
11440 - /* Set cycles to first interrupt */
11441 - timer_write(ioregs, 0, RC, expirelo);
11442 -
11443 - printk(KERN_INFO "timer: AT32AP system timer/counter at 0x%p irq %d\n",
11444 - ioregs, irq);
11445 -
11446 - return 0;
11447 -
11448 -out_error_io:
11449 - iounmap(ioregs);
11450 -out_error_clk:
11451 - clk_put(pclk);
11452 -out_error:
11453 - return ret;
11454 -}
11455 -
11456 -int avr32_hpt_start(void)
11457 -{
11458 - timer_write(ioregs, 0, CCR, TIMER_BIT(CCR_SWTRG));
11459 - return 0;
11460 -}
11461 -
11462 -irqreturn_t timer_interrupt(int irq, void *dev_id)
11463 -{
11464 - unsigned int sr = timer_read(ioregs, 0, SR);
11465 -
11466 - if (sr & TIMER_BIT(SR_CPCS)) {
11467 - /* ack timer interrupt and try to set next interrupt */
11468 - avr32_timer_ack();
11469 -
11470 - /*
11471 - * Call the generic timer interrupt handler
11472 - */
11473 - write_seqlock(&xtime_lock);
11474 - do_timer(1);
11475 - write_sequnlock(&xtime_lock);
11476 -
11477 - /*
11478 - * In UP mode, we call local_timer_interrupt() to do profiling
11479 - * and process accounting.
11480 - *
11481 - * SMP is not supported yet.
11482 - */
11483 - local_timer_interrupt(irq, dev_id);
11484 -
11485 - return IRQ_HANDLED;
11486 - }
11487 -
11488 - return IRQ_NONE;
11489 -}
11490 diff -urN linux-2.6.24.3/arch/avr32/Makefile avr32-2.6/arch/avr32/Makefile
11491 --- linux-2.6.24.3/arch/avr32/Makefile 2008-02-26 01:20:20.000000000 +0100
11492 +++ avr32-2.6/arch/avr32/Makefile 2008-04-23 19:33:28.000000000 +0200
11493 @@ -16,7 +16,7 @@
11494 CFLAGS_MODULE += -mno-relax
11495 LDFLAGS_vmlinux += --relax
11496
11497 -cpuflags-$(CONFIG_CPU_AT32AP7000) += -mcpu=ap7000
11498 +cpuflags-$(CONFIG_PLATFORM_AT32AP) += -march=ap
11499
11500 KBUILD_CFLAGS += $(cpuflags-y)
11501 KBUILD_AFLAGS += $(cpuflags-y)
11502 @@ -31,6 +31,8 @@
11503 core-$(CONFIG_LOADER_U_BOOT) += arch/avr32/boot/u-boot/
11504 core-y += arch/avr32/kernel/
11505 core-y += arch/avr32/mm/
11506 +drivers-$(CONFIG_OPROFILE) += arch/avr32/oprofile/
11507 +drivers-y += arch/avr32/drivers/
11508 libs-y += arch/avr32/lib/
11509
11510 archincdir-$(CONFIG_PLATFORM_AT32AP) := arch-at32ap
11511 diff -urN linux-2.6.24.3/arch/avr32/mm/dma-coherent.c avr32-2.6/arch/avr32/mm/dma-coherent.c
11512 --- linux-2.6.24.3/arch/avr32/mm/dma-coherent.c 2008-02-26 01:20:20.000000000 +0100
11513 +++ avr32-2.6/arch/avr32/mm/dma-coherent.c 2008-04-23 19:33:29.000000000 +0200
11514 @@ -41,6 +41,13 @@
11515 struct page *page, *free, *end;
11516 int order;
11517
11518 + /* Following is a work-around (a.k.a. hack) to prevent pages
11519 + * with __GFP_COMP being passed to split_page() which cannot
11520 + * handle them. The real problem is that this flag probably
11521 + * should be 0 on AVR32 as it is not supported on this
11522 + * platform--see CONFIG_HUGETLB_PAGE. */
11523 + gfp &= ~(__GFP_COMP);
11524 +
11525 size = PAGE_ALIGN(size);
11526 order = get_order(size);
11527
11528 diff -urN linux-2.6.24.3/arch/avr32/mm/fault.c avr32-2.6/arch/avr32/mm/fault.c
11529 --- linux-2.6.24.3/arch/avr32/mm/fault.c 2008-02-26 01:20:20.000000000 +0100
11530 +++ avr32-2.6/arch/avr32/mm/fault.c 2008-04-23 20:12:35.000000000 +0200
11531 @@ -189,6 +189,8 @@
11532
11533 page = sysreg_read(PTBR);
11534 printk(KERN_ALERT "ptbr = %08lx", page);
11535 + if (address >= TASK_SIZE)
11536 + page = (unsigned long)swapper_pg_dir;
11537 if (page) {
11538 page = ((unsigned long *)page)[address >> 22];
11539 printk(" pgd = %08lx", page);
11540 diff -urN linux-2.6.24.3/arch/avr32/mm/tlb.c avr32-2.6/arch/avr32/mm/tlb.c
11541 --- linux-2.6.24.3/arch/avr32/mm/tlb.c 2008-02-26 01:20:20.000000000 +0100
11542 +++ avr32-2.6/arch/avr32/mm/tlb.c 2008-04-23 19:33:29.000000000 +0200
11543 @@ -348,7 +348,7 @@
11544 return 0;
11545 }
11546
11547 -static struct seq_operations tlb_ops = {
11548 +static const struct seq_operations tlb_ops = {
11549 .start = tlb_start,
11550 .next = tlb_next,
11551 .stop = tlb_stop,
11552 diff -urN linux-2.6.24.3/arch/avr32/oprofile/Makefile avr32-2.6/arch/avr32/oprofile/Makefile
11553 --- linux-2.6.24.3/arch/avr32/oprofile/Makefile 1970-01-01 01:00:00.000000000 +0100
11554 +++ avr32-2.6/arch/avr32/oprofile/Makefile 2008-04-23 19:33:29.000000000 +0200
11555 @@ -0,0 +1,8 @@
11556 +obj-$(CONFIG_OPROFILE) += oprofile.o
11557 +
11558 +oprofile-y := $(addprefix ../../../drivers/oprofile/, \
11559 + oprof.o cpu_buffer.o buffer_sync.o \
11560 + event_buffer.o oprofile_files.o \
11561 + oprofilefs.o oprofile_stats.o \
11562 + timer_int.o)
11563 +oprofile-y += op_model_avr32.o
11564 diff -urN linux-2.6.24.3/arch/avr32/oprofile/op_model_avr32.c avr32-2.6/arch/avr32/oprofile/op_model_avr32.c
11565 --- linux-2.6.24.3/arch/avr32/oprofile/op_model_avr32.c 1970-01-01 01:00:00.000000000 +0100
11566 +++ avr32-2.6/arch/avr32/oprofile/op_model_avr32.c 2008-04-23 20:12:35.000000000 +0200
11567 @@ -0,0 +1,234 @@
11568 +/*
11569 + * AVR32 Performance Counter Driver
11570 + *
11571 + * Copyright (C) 2005-2007 Atmel Corporation
11572 + *
11573 + * This program is free software; you can redistribute it and/or modify
11574 + * it under the terms of the GNU General Public License version 2 as
11575 + * published by the Free Software Foundation.
11576 + *
11577 + * Author: Ronny Pedersen
11578 + */
11579 +#include <linux/errno.h>
11580 +#include <linux/interrupt.h>
11581 +#include <linux/irq.h>
11582 +#include <linux/oprofile.h>
11583 +#include <linux/sched.h>
11584 +#include <linux/types.h>
11585 +
11586 +#include <asm/sysreg.h>
11587 +#include <asm/system.h>
11588 +
11589 +#define AVR32_PERFCTR_IRQ_GROUP 0
11590 +#define AVR32_PERFCTR_IRQ_LINE 1
11591 +
11592 +enum { PCCNT, PCNT0, PCNT1, NR_counter };
11593 +
11594 +struct avr32_perf_counter {
11595 + unsigned long enabled;
11596 + unsigned long event;
11597 + unsigned long count;
11598 + unsigned long unit_mask;
11599 + unsigned long kernel;
11600 + unsigned long user;
11601 +
11602 + u32 ie_mask;
11603 + u32 flag_mask;
11604 +};
11605 +
11606 +static struct avr32_perf_counter counter[NR_counter] = {
11607 + {
11608 + .ie_mask = SYSREG_BIT(IEC),
11609 + .flag_mask = SYSREG_BIT(FC),
11610 + }, {
11611 + .ie_mask = SYSREG_BIT(IE0),
11612 + .flag_mask = SYSREG_BIT(F0),
11613 + }, {
11614 + .ie_mask = SYSREG_BIT(IE1),
11615 + .flag_mask = SYSREG_BIT(F1),
11616 + },
11617 +};
11618 +
11619 +static void avr32_perf_counter_reset(void)
11620 +{
11621 + /* Reset all counter and disable/clear all interrupts */
11622 + sysreg_write(PCCR, (SYSREG_BIT(PCCR_R)
11623 + | SYSREG_BIT(PCCR_C)
11624 + | SYSREG_BIT(FC)
11625 + | SYSREG_BIT(F0)
11626 + | SYSREG_BIT(F1)));
11627 +}
11628 +
11629 +static irqreturn_t avr32_perf_counter_interrupt(int irq, void *dev_id)
11630 +{
11631 + struct avr32_perf_counter *ctr = dev_id;
11632 + struct pt_regs *regs;
11633 + u32 pccr;
11634 +
11635 + if (likely(!(intc_get_pending(AVR32_PERFCTR_IRQ_GROUP)
11636 + & (1 << AVR32_PERFCTR_IRQ_LINE))))
11637 + return IRQ_NONE;
11638 +
11639 + regs = get_irq_regs();
11640 + pccr = sysreg_read(PCCR);
11641 +
11642 + /* Clear the interrupt flags we're about to handle */
11643 + sysreg_write(PCCR, pccr);
11644 +
11645 + /* PCCNT */
11646 + if (ctr->enabled && (pccr & ctr->flag_mask)) {
11647 + sysreg_write(PCCNT, -ctr->count);
11648 + oprofile_add_sample(regs, PCCNT);
11649 + }
11650 + ctr++;
11651 + /* PCNT0 */
11652 + if (ctr->enabled && (pccr & ctr->flag_mask)) {
11653 + sysreg_write(PCNT0, -ctr->count);
11654 + oprofile_add_sample(regs, PCNT0);
11655 + }
11656 + ctr++;
11657 + /* PCNT1 */
11658 + if (ctr->enabled && (pccr & ctr->flag_mask)) {
11659 + sysreg_write(PCNT1, -ctr->count);
11660 + oprofile_add_sample(regs, PCNT1);
11661 + }
11662 +
11663 + return IRQ_HANDLED;
11664 +}
11665 +
11666 +static int avr32_perf_counter_create_files(struct super_block *sb,
11667 + struct dentry *root)
11668 +{
11669 + struct dentry *dir;
11670 + unsigned int i;
11671 + char filename[4];
11672 +
11673 + for (i = 0; i < NR_counter; i++) {
11674 + snprintf(filename, sizeof(filename), "%u", i);
11675 + dir = oprofilefs_mkdir(sb, root, filename);
11676 +
11677 + oprofilefs_create_ulong(sb, dir, "enabled",
11678 + &counter[i].enabled);
11679 + oprofilefs_create_ulong(sb, dir, "event",
11680 + &counter[i].event);
11681 + oprofilefs_create_ulong(sb, dir, "count",
11682 + &counter[i].count);
11683 +
11684 + /* Dummy entries */
11685 + oprofilefs_create_ulong(sb, dir, "kernel",
11686 + &counter[i].kernel);
11687 + oprofilefs_create_ulong(sb, dir, "user",
11688 + &counter[i].user);
11689 + oprofilefs_create_ulong(sb, dir, "unit_mask",
11690 + &counter[i].unit_mask);
11691 + }
11692 +
11693 + return 0;
11694 +}
11695 +
11696 +static int avr32_perf_counter_setup(void)
11697 +{
11698 + struct avr32_perf_counter *ctr;
11699 + u32 pccr;
11700 + int ret;
11701 + int i;
11702 +
11703 + pr_debug("avr32_perf_counter_setup\n");
11704 +
11705 + if (sysreg_read(PCCR) & SYSREG_BIT(PCCR_E)) {
11706 + printk(KERN_ERR
11707 + "oprofile: setup: perf counter already enabled\n");
11708 + return -EBUSY;
11709 + }
11710 +
11711 + ret = request_irq(AVR32_PERFCTR_IRQ_GROUP,
11712 + avr32_perf_counter_interrupt, IRQF_SHARED,
11713 + "oprofile", counter);
11714 + if (ret)
11715 + return ret;
11716 +
11717 + avr32_perf_counter_reset();
11718 +
11719 + pccr = 0;
11720 + for (i = PCCNT; i < NR_counter; i++) {
11721 + ctr = &counter[i];
11722 + if (!ctr->enabled)
11723 + continue;
11724 +
11725 + pr_debug("enabling counter %d...\n", i);
11726 +
11727 + pccr |= ctr->ie_mask;
11728 +
11729 + switch (i) {
11730 + case PCCNT:
11731 + /* PCCNT always counts cycles, so no events */
11732 + sysreg_write(PCCNT, -ctr->count);
11733 + break;
11734 + case PCNT0:
11735 + pccr |= SYSREG_BF(CONF0, ctr->event);
11736 + sysreg_write(PCNT0, -ctr->count);
11737 + break;
11738 + case PCNT1:
11739 + pccr |= SYSREG_BF(CONF1, ctr->event);
11740 + sysreg_write(PCNT1, -ctr->count);
11741 + break;
11742 + }
11743 + }
11744 +
11745 + pr_debug("oprofile: writing 0x%x to PCCR...\n", pccr);
11746 +
11747 + sysreg_write(PCCR, pccr);
11748 +
11749 + return 0;
11750 +}
11751 +
11752 +static void avr32_perf_counter_shutdown(void)
11753 +{
11754 + pr_debug("avr32_perf_counter_shutdown\n");
11755 +
11756 + avr32_perf_counter_reset();
11757 + free_irq(AVR32_PERFCTR_IRQ_GROUP, counter);
11758 +}
11759 +
11760 +static int avr32_perf_counter_start(void)
11761 +{
11762 + pr_debug("avr32_perf_counter_start\n");
11763 +
11764 + sysreg_write(PCCR, sysreg_read(PCCR) | SYSREG_BIT(PCCR_E));
11765 +
11766 + return 0;
11767 +}
11768 +
11769 +static void avr32_perf_counter_stop(void)
11770 +{
11771 + pr_debug("avr32_perf_counter_stop\n");
11772 +
11773 + sysreg_write(PCCR, sysreg_read(PCCR) & ~SYSREG_BIT(PCCR_E));
11774 +}
11775 +
11776 +static struct oprofile_operations avr32_perf_counter_ops __initdata = {
11777 + .create_files = avr32_perf_counter_create_files,
11778 + .setup = avr32_perf_counter_setup,
11779 + .shutdown = avr32_perf_counter_shutdown,
11780 + .start = avr32_perf_counter_start,
11781 + .stop = avr32_perf_counter_stop,
11782 + .cpu_type = "avr32",
11783 +};
11784 +
11785 +int __init oprofile_arch_init(struct oprofile_operations *ops)
11786 +{
11787 + if (!(current_cpu_data.features & AVR32_FEATURE_PCTR))
11788 + return -ENODEV;
11789 +
11790 + memcpy(ops, &avr32_perf_counter_ops,
11791 + sizeof(struct oprofile_operations));
11792 +
11793 + printk(KERN_INFO "oprofile: using AVR32 performance monitoring.\n");
11794 +
11795 + return 0;
11796 +}
11797 +
11798 +void oprofile_arch_exit(void)
11799 +{
11800 +
11801 +}
11802 diff -urN linux-2.6.24.3/Documentation/kernel-parameters.txt avr32-2.6/Documentation/kernel-parameters.txt
11803 --- linux-2.6.24.3/Documentation/kernel-parameters.txt 2008-02-26 01:20:20.000000000 +0100
11804 +++ avr32-2.6/Documentation/kernel-parameters.txt 2008-04-23 20:12:35.000000000 +0200
11805 @@ -34,6 +34,7 @@
11806 ALSA ALSA sound support is enabled.
11807 APIC APIC support is enabled.
11808 APM Advanced Power Management support is enabled.
11809 + AVR32 AVR32 architecture is enabled.
11810 AX25 Appropriate AX.25 support is enabled.
11811 BLACKFIN Blackfin architecture is enabled.
11812 DRM Direct Rendering Management support is enabled.
11813 @@ -1123,6 +1124,10 @@
11814 of returning the full 64-bit number.
11815 The default is to return 64-bit inode numbers.
11816
11817 + nmi_debug= [KNL,AVR32] Specify one or more actions to take
11818 + when a NMI is triggered.
11819 + Format: [state][,regs][,debounce][,die]
11820 +
11821 nmi_watchdog= [KNL,BUGS=X86-32] Debugging features for SMP kernels
11822
11823 no387 [BUGS=X86-32] Tells the kernel to use the 387 maths
11824 diff -urN linux-2.6.24.3/drivers/clocksource/Makefile avr32-2.6/drivers/clocksource/Makefile
11825 --- linux-2.6.24.3/drivers/clocksource/Makefile 2008-02-26 01:20:20.000000000 +0100
11826 +++ avr32-2.6/drivers/clocksource/Makefile 2008-04-23 20:12:39.000000000 +0200
11827 @@ -1,3 +1,4 @@
11828 +obj-$(CONFIG_ATMEL_TCB_CLKSRC) += tcb_clksrc.o
11829 obj-$(CONFIG_X86_CYCLONE_TIMER) += cyclone.o
11830 obj-$(CONFIG_X86_PM_TIMER) += acpi_pm.o
11831 obj-$(CONFIG_SCx200HR_TIMER) += scx200_hrt.o
11832 diff -urN linux-2.6.24.3/drivers/clocksource/tcb_clksrc.c avr32-2.6/drivers/clocksource/tcb_clksrc.c
11833 --- linux-2.6.24.3/drivers/clocksource/tcb_clksrc.c 1970-01-01 01:00:00.000000000 +0100
11834 +++ avr32-2.6/drivers/clocksource/tcb_clksrc.c 2008-04-23 20:12:39.000000000 +0200
11835 @@ -0,0 +1,305 @@
11836 +#include <linux/init.h>
11837 +#include <linux/clocksource.h>
11838 +#include <linux/clockchips.h>
11839 +#include <linux/interrupt.h>
11840 +#include <linux/irq.h>
11841 +
11842 +#include <linux/clk.h>
11843 +#include <linux/err.h>
11844 +#include <linux/ioport.h>
11845 +#include <linux/io.h>
11846 +#include <linux/platform_device.h>
11847 +#include <linux/atmel_tc.h>
11848 +
11849 +
11850 +/*
11851 + * We're configured to use a specific TC block, one that's not hooked
11852 + * up to external hardware, to provide a time solution:
11853 + *
11854 + * - Two channels combine to create a free-running 32 bit counter
11855 + * with a base rate of 5+ MHz, packaged as a clocksource (with
11856 + * resolution better than 200 nsec).
11857 + *
11858 + * - The third channel may be used to provide a 16-bit clockevent
11859 + * source, used in either periodic or oneshot mode. This runs
11860 + * at 32 KiHZ, and can handle delays of up to two seconds.
11861 + *
11862 + * A boot clocksource and clockevent source are also currently needed,
11863 + * unless the relevant platforms (ARM/AT91, AVR32/AT32) are changed so
11864 + * this code can be used when init_timers() is called, well before most
11865 + * devices are set up. (Some low end AT91 parts, which can run uClinux,
11866 + * have only the timers in one TC block... they currently don't support
11867 + * the tclib code, because of that initialization issue.)
11868 + *
11869 + * REVISIT behavior during system suspend states... we should disable
11870 + * all clocks and save the power. Easily done for clockevent devices,
11871 + * but clocksources won't necessarily get the needed notifications.
11872 + * For deeper system sleep states, this will be mandatory...
11873 + */
11874 +
11875 +static void __iomem *tcaddr;
11876 +
11877 +static cycle_t tc_get_cycles(void)
11878 +{
11879 + unsigned long flags;
11880 + u32 lower, upper;
11881 +
11882 + raw_local_irq_save(flags);
11883 + do {
11884 + upper = __raw_readl(tcaddr + ATMEL_TC_REG(1, CV));
11885 + lower = __raw_readl(tcaddr + ATMEL_TC_REG(0, CV));
11886 + } while (upper != __raw_readl(tcaddr + ATMEL_TC_REG(1, CV)));
11887 +
11888 + raw_local_irq_restore(flags);
11889 + return (upper << 16) | lower;
11890 +}
11891 +
11892 +static struct clocksource clksrc = {
11893 + .name = "tcb_clksrc",
11894 + .rating = 200,
11895 + .read = tc_get_cycles,
11896 + .mask = CLOCKSOURCE_MASK(32),
11897 + .shift = 18,
11898 + .flags = CLOCK_SOURCE_IS_CONTINUOUS,
11899 +};
11900 +
11901 +#ifdef CONFIG_GENERIC_CLOCKEVENTS
11902 +
11903 +struct tc_clkevt_device {
11904 + struct clock_event_device clkevt;
11905 + struct clk *clk;
11906 + void __iomem *regs;
11907 +};
11908 +
11909 +static struct tc_clkevt_device *to_tc_clkevt(struct clock_event_device *clkevt)
11910 +{
11911 + return container_of(clkevt, struct tc_clkevt_device, clkevt);
11912 +}
11913 +
11914 +/* For now, we always use the 32K clock ... this optimizes for NO_HZ,
11915 + * because using one of the divided clocks would usually mean the
11916 + * tick rate can never be less than several dozen Hz (vs 0.5 Hz).
11917 + *
11918 + * A divided clock could be good for high resolution timers, since
11919 + * 30.5 usec resolution can seem "low".
11920 + */
11921 +static u32 timer_clock;
11922 +
11923 +static void tc_mode(enum clock_event_mode m, struct clock_event_device *d)
11924 +{
11925 + struct tc_clkevt_device *tcd = to_tc_clkevt(d);
11926 + void __iomem *regs = tcd->regs;
11927 +
11928 + if (tcd->clkevt.mode == CLOCK_EVT_MODE_PERIODIC
11929 + || tcd->clkevt.mode == CLOCK_EVT_MODE_ONESHOT) {
11930 + __raw_writel(0xff, regs + ATMEL_TC_REG(2, IDR));
11931 + __raw_writel(ATMEL_TC_CLKDIS, regs + ATMEL_TC_REG(2, CCR));
11932 + clk_disable(tcd->clk);
11933 + }
11934 +
11935 + switch (m) {
11936 +
11937 + /* By not making the gentime core emulate periodic mode on top
11938 + * of oneshot, we get lower overhead and improved accuracy.
11939 + */
11940 + case CLOCK_EVT_MODE_PERIODIC:
11941 + clk_enable(tcd->clk);
11942 +
11943 + /* slow clock, count up to RC, then irq and restart */
11944 + __raw_writel(timer_clock
11945 + | ATMEL_TC_WAVE | ATMEL_TC_WAVESEL_UP_AUTO,
11946 + regs + ATMEL_TC_REG(2, CMR));
11947 + __raw_writel((32768 + HZ/2) / HZ, tcaddr + ATMEL_TC_REG(2, RC));
11948 +
11949 + /* Enable clock and interrupts on RC compare */
11950 + __raw_writel(ATMEL_TC_CPCS, regs + ATMEL_TC_REG(2, IER));
11951 +
11952 + /* go go gadget! */
11953 + __raw_writel(ATMEL_TC_CLKEN | ATMEL_TC_SWTRG,
11954 + regs + ATMEL_TC_REG(2, CCR));
11955 + break;
11956 +
11957 + case CLOCK_EVT_MODE_ONESHOT:
11958 + clk_enable(tcd->clk);
11959 +
11960 + /* slow clock, count up to RC, then irq and stop */
11961 + __raw_writel(timer_clock | ATMEL_TC_CPCSTOP
11962 + | ATMEL_TC_WAVE | ATMEL_TC_WAVESEL_UP_AUTO,
11963 + regs + ATMEL_TC_REG(2, CMR));
11964 + __raw_writel(ATMEL_TC_CPCS, regs + ATMEL_TC_REG(2, IER));
11965 +
11966 + /* set_next_event() configures and starts the timer */
11967 + break;
11968 +
11969 + default:
11970 + break;
11971 + }
11972 +}
11973 +
11974 +static int tc_next_event(unsigned long delta, struct clock_event_device *d)
11975 +{
11976 + __raw_writel(delta, tcaddr + ATMEL_TC_REG(2, RC));
11977 +
11978 + /* go go gadget! */
11979 + __raw_writel(ATMEL_TC_CLKEN | ATMEL_TC_SWTRG,
11980 + tcaddr + ATMEL_TC_REG(2, CCR));
11981 + return 0;
11982 +}
11983 +
11984 +static struct tc_clkevt_device clkevt = {
11985 + .clkevt = {
11986 + .name = "tc_clkevt",
11987 + .features = CLOCK_EVT_FEAT_PERIODIC
11988 + | CLOCK_EVT_FEAT_ONESHOT,
11989 + .shift = 32,
11990 + /* Should be lower than at91rm9200's system timer */
11991 + .rating = 125,
11992 + .cpumask = CPU_MASK_CPU0,
11993 + .set_next_event = tc_next_event,
11994 + .set_mode = tc_mode,
11995 + },
11996 +};
11997 +
11998 +static irqreturn_t ch2_irq(int irq, void *handle)
11999 +{
12000 + struct tc_clkevt_device *dev = handle;
12001 + unsigned int sr;
12002 +
12003 + sr = __raw_readl(dev->regs + ATMEL_TC_REG(2, SR));
12004 + if (sr & ATMEL_TC_CPCS) {
12005 + dev->clkevt.event_handler(&dev->clkevt);
12006 + return IRQ_HANDLED;
12007 + }
12008 +
12009 + return IRQ_NONE;
12010 +}
12011 +
12012 +static struct irqaction tc_irqaction = {
12013 + .name = "tc_clkevt",
12014 + .flags = IRQF_TIMER | IRQF_DISABLED,
12015 + .handler = ch2_irq,
12016 +};
12017 +
12018 +static void __init setup_clkevents(struct atmel_tc *tc,
12019 + struct clk *t0_clk, int clk32k_divisor_idx)
12020 +{
12021 + struct platform_device *pdev = tc->pdev;
12022 + struct clk *t2_clk = tc->clk[2];
12023 + int irq = tc->irq[2];
12024 +
12025 + clkevt.regs = tc->regs;
12026 + clkevt.clk = t2_clk;
12027 + tc_irqaction.dev_id = &clkevt;
12028 +
12029 + timer_clock = clk32k_divisor_idx;
12030 +
12031 + clkevt.clkevt.mult = div_sc(32768, NSEC_PER_SEC, clkevt.clkevt.shift);
12032 + clkevt.clkevt.max_delta_ns
12033 + = clockevent_delta2ns(0xffff, &clkevt.clkevt);
12034 + clkevt.clkevt.min_delta_ns = clockevent_delta2ns(1, &clkevt.clkevt) + 1;
12035 +
12036 + setup_irq(irq, &tc_irqaction);
12037 +
12038 + clockevents_register_device(&clkevt.clkevt);
12039 +}
12040 +
12041 +#else /* !CONFIG_GENERIC_CLOCKEVENTS */
12042 +
12043 +static void __init setup_clkevents(struct atmel_tc *tc,
12044 + struct clk *t0_clk, int clk32k_divisor_idx)
12045 +{
12046 + /* NOTHING */
12047 +}
12048 +
12049 +#endif
12050 +
12051 +static int __init tcb_clksrc_init(void)
12052 +{
12053 + static char bootinfo[] __initdata
12054 + = KERN_DEBUG "%s: tc%d at %d.%03d MHz\n";
12055 +
12056 + struct platform_device *pdev;
12057 + struct atmel_tc *tc;
12058 + struct clk *t0_clk, *t1_clk;
12059 + u32 rate, divided_rate = 0;
12060 + int best_divisor_idx = -1;
12061 + int clk32k_divisor_idx = -1;
12062 + int i;
12063 +
12064 + tc = atmel_tc_alloc(CONFIG_ATMEL_TCB_CLKSRC_BLOCK, clksrc.name);
12065 + if (!tc) {
12066 + pr_debug("can't alloc TC for clocksource\n");
12067 + return -ENODEV;
12068 + }
12069 + tcaddr = tc->regs;
12070 + pdev = tc->pdev;
12071 +
12072 + t0_clk = tc->clk[0];
12073 + clk_enable(t0_clk);
12074 +
12075 + /* How fast will we be counting? Pick something over 5 MHz. */
12076 + rate = (u32) clk_get_rate(t0_clk);
12077 + for (i = 0; i < 5; i++) {
12078 + unsigned divisor = atmel_tc_divisors[i];
12079 + unsigned tmp;
12080 +
12081 + /* remember 32 KiHz clock for later */
12082 + if (!divisor) {
12083 + clk32k_divisor_idx = i;
12084 + continue;
12085 + }
12086 +
12087 + tmp = rate / divisor;
12088 + pr_debug("TC: %u / %-3u [%d] --> %u\n", rate, divisor, i, tmp);
12089 + if (best_divisor_idx > 0) {
12090 + if (tmp < 5 * 1000 * 1000)
12091 + continue;
12092 + }
12093 + divided_rate = tmp;
12094 + best_divisor_idx = i;
12095 + }
12096 +
12097 + clksrc.mult = clocksource_hz2mult(divided_rate, clksrc.shift);
12098 +
12099 + printk(bootinfo, clksrc.name, CONFIG_ATMEL_TCB_CLKSRC_BLOCK,
12100 + divided_rate / 1000000,
12101 + ((divided_rate + 500000) % 1000000) / 1000);
12102 +
12103 + /* tclib will give us three clocks no matter what the
12104 + * underlying platform supports.
12105 + */
12106 + clk_enable(tc->clk[1]);
12107 +
12108 + /* channel 0: waveform mode, input mclk/8, clock TIOA0 on overflow */
12109 + __raw_writel(best_divisor_idx /* likely divide-by-8 */
12110 + | ATMEL_TC_WAVE
12111 + | ATMEL_TC_WAVESEL_UP /* free-run */
12112 + | ATMEL_TC_ACPA_SET /* TIOA0 rises at 0 */
12113 + | ATMEL_TC_ACPC_CLEAR, /* (duty cycle 50%) */
12114 + tcaddr + ATMEL_TC_REG(0, CMR));
12115 + __raw_writel(0x0000, tcaddr + ATMEL_TC_REG(0, RA));
12116 + __raw_writel(0x8000, tcaddr + ATMEL_TC_REG(0, RC));
12117 + __raw_writel(0xff, tcaddr + ATMEL_TC_REG(0, IDR)); /* no irqs */
12118 + __raw_writel(ATMEL_TC_CLKEN, tcaddr + ATMEL_TC_REG(0, CCR));
12119 +
12120 + /* channel 1: waveform mode, input TIOA0 */
12121 + __raw_writel(ATMEL_TC_XC1 /* input: TIOA0 */
12122 + | ATMEL_TC_WAVE
12123 + | ATMEL_TC_WAVESEL_UP, /* free-run */
12124 + tcaddr + ATMEL_TC_REG(1, CMR));
12125 + __raw_writel(0xff, tcaddr + ATMEL_TC_REG(1, IDR)); /* no irqs */
12126 + __raw_writel(ATMEL_TC_CLKEN, tcaddr + ATMEL_TC_REG(1, CCR));
12127 +
12128 + /* chain channel 0 to channel 1, then reset all the timers */
12129 + __raw_writel(ATMEL_TC_TC1XC1S_TIOA0, tcaddr + ATMEL_TC_BMR);
12130 + __raw_writel(ATMEL_TC_SYNC, tcaddr + ATMEL_TC_BCR);
12131 +
12132 + /* and away we go! */
12133 + clocksource_register(&clksrc);
12134 +
12135 + /* channel 2: periodic and oneshot timer support */
12136 + setup_clkevents(tc, t0_clk, clk32k_divisor_idx);
12137 +
12138 + return 0;
12139 +}
12140 +arch_initcall(tcb_clksrc_init);
12141 diff -urN linux-2.6.24.3/drivers/i2c/busses/i2c-atmeltwi.c avr32-2.6/drivers/i2c/busses/i2c-atmeltwi.c
12142 --- linux-2.6.24.3/drivers/i2c/busses/i2c-atmeltwi.c 1970-01-01 01:00:00.000000000 +0100
12143 +++ avr32-2.6/drivers/i2c/busses/i2c-atmeltwi.c 2008-04-23 19:33:37.000000000 +0200
12144 @@ -0,0 +1,436 @@
12145 +/*
12146 + * i2c Support for Atmel's Two-Wire Interface (TWI)
12147 + *
12148 + * Based on the work of Copyright (C) 2004 Rick Bronson
12149 + * Converted to 2.6 by Andrew Victor <andrew at sanpeople.com>
12150 + * Ported to AVR32 and heavily modified by Espen Krangnes
12151 + * <ekrangnes at atmel.com>
12152 + *
12153 + * Copyright (C) 2006 Atmel Corporation
12154 + *
12155 + * Borrowed heavily from the original work by:
12156 + * Copyright (C) 2000 Philip Edelbrock <phil at stimpy.netroedge.com>
12157 + *
12158 + * Partialy rewriten by Karel Hojdar <cmkaho at seznam.cz>
12159 + * bugs removed, interrupt routine markedly rewritten
12160 + *
12161 + * This program is free software; you can redistribute it and/or modify
12162 + * it under the terms of the GNU General Public License as published by
12163 + * the Free Software Foundation; either version 2 of the License, or
12164 + * (at your option) any later version.
12165 + */
12166 +#undef VERBOSE_DEBUG
12167 +
12168 +#include <linux/module.h>
12169 +#include <linux/slab.h>
12170 +#include <linux/i2c.h>
12171 +#include <linux/init.h>
12172 +#include <linux/clk.h>
12173 +#include <linux/err.h>
12174 +#include <linux/interrupt.h>
12175 +#include <linux/platform_device.h>
12176 +#include <linux/completion.h>
12177 +#include <linux/io.h>
12178 +
12179 +#include "i2c-atmeltwi.h"
12180 +
12181 +static unsigned int baudrate = 100 * 1000;
12182 +module_param(baudrate, uint, S_IRUGO);
12183 +MODULE_PARM_DESC(baudrate, "The TWI baudrate");
12184 +
12185 +
12186 +struct atmel_twi {
12187 + void __iomem *regs;
12188 + struct i2c_adapter adapter;
12189 + struct clk *pclk;
12190 + struct completion comp;
12191 + u32 mask;
12192 + u8 *buf;
12193 + u16 len;
12194 + u16 acks_left;
12195 + int status;
12196 + unsigned int irq;
12197 +
12198 +};
12199 +#define to_atmel_twi(adap) container_of(adap, struct atmel_twi, adapter)
12200 +
12201 +/*
12202 + * (Re)Initialize the TWI hardware registers.
12203 + */
12204 +static int twi_hwinit(struct atmel_twi *twi)
12205 +{
12206 + unsigned long cdiv, ckdiv = 0;
12207 +
12208 + /* REVISIT: wait till SCL is high before resetting; otherwise,
12209 + * some versions will wedge forever.
12210 + */
12211 +
12212 + twi_writel(twi, IDR, ~0UL);
12213 + twi_writel(twi, CR, TWI_BIT(SWRST)); /*Reset peripheral*/
12214 + twi_readl(twi, SR);
12215 +
12216 + cdiv = (clk_get_rate(twi->pclk) / (2 * baudrate)) - 4;
12217 +
12218 + while (cdiv > 255) {
12219 + ckdiv++;
12220 + cdiv = cdiv >> 1;
12221 + }
12222 +
12223 + /* REVISIT: there are various errata to consider re CDIV and CHDIV
12224 + * here, at least on at91 parts.
12225 + */
12226 +
12227 + if (ckdiv > 7)
12228 + return -EINVAL;
12229 + else
12230 + twi_writel(twi, CWGR, TWI_BF(CKDIV, ckdiv)
12231 + | TWI_BF(CHDIV, cdiv)
12232 + | TWI_BF(CLDIV, cdiv));
12233 + return 0;
12234 +}
12235 +
12236 +/*
12237 + * Waits for the i2c status register to set the specified bitmask
12238 + * Returns 0 if timed out ... ~100ms is much longer than the SMBus
12239 + * limit, but I2C has no limit at all.
12240 + */
12241 +static int twi_complete(struct atmel_twi *twi, u32 mask)
12242 +{
12243 + int timeout = msecs_to_jiffies(100);
12244 +
12245 + mask |= TWI_BIT(TXCOMP);
12246 + twi->mask = mask | TWI_BIT(NACK) | TWI_BIT(OVRE);
12247 + init_completion(&twi->comp);
12248 +
12249 + twi_writel(twi, IER, mask);
12250 +
12251 + if (!wait_for_completion_timeout(&twi->comp, timeout)) {
12252 + /* RESET TWI interface */
12253 + twi_writel(twi, CR, TWI_BIT(SWRST));
12254 +
12255 + /* Reinitialize TWI */
12256 + twi_hwinit(twi);
12257 +
12258 + return -ETIMEDOUT;
12259 + }
12260 + return 0;
12261 +}
12262 +
12263 +/*
12264 + * Generic i2c master transfer entrypoint.
12265 + */
12266 +static int twi_xfer(struct i2c_adapter *adap, struct i2c_msg *pmsg, int num)
12267 +{
12268 + struct atmel_twi *twi = to_atmel_twi(adap);
12269 + int i;
12270 +
12271 + dev_dbg(&adap->dev, "twi_xfer: processing %d messages:\n", num);
12272 +
12273 + twi->status = 0;
12274 + for (i = 0; i < num; i++, pmsg++) {
12275 + twi->len = pmsg->len;
12276 + twi->buf = pmsg->buf;
12277 + twi->acks_left = pmsg->len;
12278 + twi_writel(twi, MMR, TWI_BF(DADR, pmsg->addr) |
12279 + (pmsg->flags & I2C_M_RD ? TWI_BIT(MREAD) : 0));
12280 + twi_writel(twi, IADR, TWI_BF(IADR, pmsg->addr));
12281 +
12282 + dev_dbg(&adap->dev,
12283 + "#%d: %s %d byte%s %s dev 0x%02x\n",
12284 + i,
12285 + pmsg->flags & I2C_M_RD ? "reading" : "writing",
12286 + pmsg->len,
12287 + pmsg->len > 1 ? "s" : "",
12288 + pmsg->flags & I2C_M_RD ? "from" : "to", pmsg->addr);
12289 +
12290 + /* enable */
12291 + twi_writel(twi, CR, TWI_BIT(MSEN));
12292 +
12293 + if (pmsg->flags & I2C_M_RD) {
12294 + /* cleanup after previous RX overruns */
12295 + while (twi_readl(twi, SR) & TWI_BIT(RXRDY))
12296 + twi_readl(twi, RHR);
12297 +
12298 + if (twi->len == 1)
12299 + twi_writel(twi, CR,
12300 + TWI_BIT(START) | TWI_BIT(STOP));
12301 + else
12302 + twi_writel(twi, CR, TWI_BIT(START));
12303 +
12304 + if (twi_complete(twi, TWI_BIT(RXRDY)) == -ETIMEDOUT) {
12305 + dev_dbg(&adap->dev, "RX[%d] timeout. "
12306 + "Stopped with %d bytes left\n",
12307 + i, twi->acks_left);
12308 + return -ETIMEDOUT;
12309 + }
12310 + } else {
12311 + twi_writel(twi, THR, twi->buf[0]);
12312 + twi->acks_left--;
12313 + /* REVISIT: some chips don't start automagically:
12314 + * twi_writel(twi, CR, TWI_BIT(START));
12315 + */
12316 + if (twi_complete(twi, TWI_BIT(TXRDY)) == -ETIMEDOUT) {
12317 + dev_dbg(&adap->dev, "TX[%d] timeout. "
12318 + "Stopped with %d bytes left\n",
12319 + i, twi->acks_left);
12320 + return -ETIMEDOUT;
12321 + }
12322 + /* REVISIT: an erratum workaround may be needed here;
12323 + * see sam9261 "STOP not generated" (START either).
12324 + */
12325 + }
12326 +
12327 + /* Disable TWI interface */
12328 + twi_writel(twi, CR, TWI_BIT(MSDIS));
12329 +
12330 + if (twi->status)
12331 + return twi->status;
12332 +
12333 + /* WARNING: This driver lies about properly supporting
12334 + * repeated start, or it would *ALWAYS* return here. It
12335 + * has issued a STOP. Continuing is a false claim -- that
12336 + * a second (or third, etc.) message is part of the same
12337 + * "combined" (no STOPs between parts) message.
12338 + */
12339 +
12340 + } /* end cur msg */
12341 +
12342 + return i;
12343 +}
12344 +
12345 +
12346 +static irqreturn_t twi_interrupt(int irq, void *dev_id)
12347 +{
12348 + struct atmel_twi *twi = dev_id;
12349 + int status = twi_readl(twi, SR);
12350 +
12351 + /* Save state for later debug prints */
12352 + int old_status = status;
12353 +
12354 + if (twi->mask & status) {
12355 +
12356 + status &= twi->mask;
12357 +
12358 + if (status & TWI_BIT(RXRDY)) {
12359 + if ((status & TWI_BIT(OVRE)) && twi->acks_left) {
12360 + /* Note weakness in fault reporting model:
12361 + * we can't say "the first N of these data
12362 + * bytes are valid".
12363 + */
12364 + dev_err(&twi->adapter.dev,
12365 + "OVERRUN RX! %04x, lost %d\n",
12366 + old_status, twi->acks_left);
12367 + twi->acks_left = 0;
12368 + twi_writel(twi, CR, TWI_BIT(STOP));
12369 + twi->status = -EOVERFLOW;
12370 + } else if (twi->acks_left > 0) {
12371 + twi->buf[twi->len - twi->acks_left] =
12372 + twi_readl(twi, RHR);
12373 + twi->acks_left--;
12374 + }
12375 + if (status & TWI_BIT(TXCOMP))
12376 + goto done;
12377 + if (twi->acks_left == 1)
12378 + twi_writel(twi, CR, TWI_BIT(STOP));
12379 +
12380 + } else if (status & (TWI_BIT(NACK) | TWI_BIT(TXCOMP))) {
12381 + goto done;
12382 +
12383 + } else if (status & TWI_BIT(TXRDY)) {
12384 + if (twi->acks_left > 0) {
12385 + twi_writel(twi, THR,
12386 + twi->buf[twi->len - twi->acks_left]);
12387 + twi->acks_left--;
12388 + } else
12389 + twi_writel(twi, CR, TWI_BIT(STOP));
12390 + }
12391 +
12392 + if (twi->acks_left == 0)
12393 + twi_writel(twi, IDR, ~TWI_BIT(TXCOMP));
12394 + }
12395 +
12396 + /* enabling this message helps trigger overruns/underruns ... */
12397 + dev_vdbg(&twi->adapter.dev,
12398 + "ISR: SR 0x%04X, mask 0x%04X, acks %i\n",
12399 + old_status,
12400 + twi->acks_left ? twi->mask : TWI_BIT(TXCOMP),
12401 + twi->acks_left);
12402 +
12403 + return IRQ_HANDLED;
12404 +
12405 +done:
12406 + /* Note weak fault reporting model: we can't report how many
12407 + * bytes we sent before the NAK, or let upper layers choose
12408 + * whether to continue. The I2C stack doesn't allow that...
12409 + */
12410 + if (status & TWI_BIT(NACK)) {
12411 + dev_dbg(&twi->adapter.dev, "NACK received! %d to go\n",
12412 + twi->acks_left);
12413 + twi->status = -EPIPE;
12414 +
12415 + /* TX underrun morphs automagically into a premature STOP;
12416 + * we'll probably observe UVRE even when it's not documented.
12417 + */
12418 + } else if (twi->acks_left && (twi->mask & TWI_BIT(TXRDY))) {
12419 + dev_err(&twi->adapter.dev, "UNDERRUN TX! %04x, %d to go\n",
12420 + old_status, twi->acks_left);
12421 + twi->status = -ENOSR;
12422 + }
12423 +
12424 + twi_writel(twi, IDR, ~0UL);
12425 + complete(&twi->comp);
12426 +
12427 + dev_dbg(&twi->adapter.dev, "ISR: SR 0x%04X, acks %i --> %d\n",
12428 + old_status, twi->acks_left, twi->status);
12429 +
12430 + return IRQ_HANDLED;
12431 +}
12432 +
12433 +
12434 +/*
12435 + * Return list of supported functionality.
12436 + *
12437 + * NOTE: see warning above about repeated starts; this driver is falsely
12438 + * claiming to support "combined" transfers. The mid-message STOPs mean
12439 + * some slaves will never work with this driver. (Use i2c-gpio...)
12440 + */
12441 +static u32 twi_func(struct i2c_adapter *adapter)
12442 +{
12443 + return (I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL)
12444 + & ~I2C_FUNC_SMBUS_QUICK;
12445 +}
12446 +
12447 +static struct i2c_algorithm twi_algorithm = {
12448 + .master_xfer = twi_xfer,
12449 + .functionality = twi_func,
12450 +};
12451 +
12452 +/*
12453 + * Main initialization routine.
12454 + */
12455 +static int __init twi_probe(struct platform_device *pdev)
12456 +{
12457 + struct atmel_twi *twi;
12458 + struct resource *regs;
12459 + struct clk *pclk;
12460 + struct i2c_adapter *adapter;
12461 + int rc, irq;
12462 +
12463 + regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
12464 + if (!regs)
12465 + return -ENXIO;
12466 +
12467 + pclk = clk_get(&pdev->dev, "twi_pclk");
12468 + if (IS_ERR(pclk))
12469 + return PTR_ERR(pclk);
12470 + clk_enable(pclk);
12471 +
12472 + rc = -ENOMEM;
12473 + twi = kzalloc(sizeof(struct atmel_twi), GFP_KERNEL);
12474 + if (!twi) {
12475 + dev_dbg(&pdev->dev, "can't allocate interface!\n");
12476 + goto err_alloc_twi;
12477 + }
12478 +
12479 + twi->pclk = pclk;
12480 + twi->regs = ioremap(regs->start, regs->end - regs->start + 1);
12481 + if (!twi->regs)
12482 + goto err_ioremap;
12483 +
12484 + irq = platform_get_irq(pdev, 0);
12485 + rc = request_irq(irq, twi_interrupt, 0, "twi", twi);
12486 + if (rc) {
12487 + dev_dbg(&pdev->dev, "can't bind irq!\n");
12488 + goto err_irq;
12489 + }
12490 + twi->irq = irq;
12491 +
12492 + rc = twi_hwinit(twi);
12493 + if (rc) {
12494 + dev_err(&pdev->dev, "Unable to set baudrate\n");
12495 + goto err_hw_init;
12496 + }
12497 +
12498 + adapter = &twi->adapter;
12499 + sprintf(adapter->name, "TWI");
12500 + adapter->algo = &twi_algorithm;
12501 + adapter->class = I2C_CLASS_ALL;
12502 + adapter->nr = pdev->id;
12503 + adapter->dev.parent = &pdev->dev;
12504 +
12505 + platform_set_drvdata(pdev, twi);
12506 +
12507 + rc = i2c_add_numbered_adapter(adapter);
12508 + if (rc) {
12509 + dev_dbg(&pdev->dev, "Adapter %s registration failed\n",
12510 + adapter->name);
12511 + goto err_register;
12512 + }
12513 +
12514 + dev_info(&pdev->dev,
12515 + "Atmel TWI/I2C adapter (baudrate %dk) at 0x%08lx.\n",
12516 + baudrate/1000, (unsigned long)regs->start);
12517 +
12518 + return 0;
12519 +
12520 +
12521 +err_register:
12522 + platform_set_drvdata(pdev, NULL);
12523 +
12524 +err_hw_init:
12525 + free_irq(irq, twi);
12526 +
12527 +err_irq:
12528 + iounmap(twi->regs);
12529 +
12530 +err_ioremap:
12531 + kfree(twi);
12532 +
12533 +err_alloc_twi:
12534 + clk_disable(pclk);
12535 + clk_put(pclk);
12536 +
12537 + return rc;
12538 +}
12539 +
12540 +static int __exit twi_remove(struct platform_device *pdev)
12541 +{
12542 + struct atmel_twi *twi = platform_get_drvdata(pdev);
12543 + int res;
12544 +
12545 + platform_set_drvdata(pdev, NULL);
12546 + res = i2c_del_adapter(&twi->adapter);
12547 + twi_writel(twi, CR, TWI_BIT(MSDIS));
12548 + iounmap(twi->regs);
12549 + clk_disable(twi->pclk);
12550 + clk_put(twi->pclk);
12551 + free_irq(twi->irq, twi);
12552 + kfree(twi);
12553 +
12554 + return res;
12555 +}
12556 +
12557 +static struct platform_driver twi_driver = {
12558 + .remove = __exit_p(twi_remove),
12559 + .driver = {
12560 + .name = "atmel_twi",
12561 + .owner = THIS_MODULE,
12562 + },
12563 +};
12564 +
12565 +static int __init atmel_twi_init(void)
12566 +{
12567 + return platform_driver_probe(&twi_driver, twi_probe);
12568 +}
12569 +
12570 +static void __exit atmel_twi_exit(void)
12571 +{
12572 + platform_driver_unregister(&twi_driver);
12573 +}
12574 +
12575 +module_init(atmel_twi_init);
12576 +module_exit(atmel_twi_exit);
12577 +
12578 +MODULE_AUTHOR("Espen Krangnes");
12579 +MODULE_DESCRIPTION("I2C driver for Atmel TWI");
12580 +MODULE_LICENSE("GPL");
12581 diff -urN linux-2.6.24.3/drivers/i2c/busses/i2c-atmeltwi.h avr32-2.6/drivers/i2c/busses/i2c-atmeltwi.h
12582 --- linux-2.6.24.3/drivers/i2c/busses/i2c-atmeltwi.h 1970-01-01 01:00:00.000000000 +0100
12583 +++ avr32-2.6/drivers/i2c/busses/i2c-atmeltwi.h 2008-04-23 19:33:37.000000000 +0200
12584 @@ -0,0 +1,117 @@
12585 +/*
12586 + * Register definitions for the Atmel Two-Wire Interface
12587 + */
12588 +
12589 +#ifndef __ATMELTWI_H__
12590 +#define __ATMELTWI_H__
12591 +
12592 +/* TWI register offsets */
12593 +#define TWI_CR 0x0000
12594 +#define TWI_MMR 0x0004
12595 +#define TWI_SMR 0x0008
12596 +#define TWI_IADR 0x000c
12597 +#define TWI_CWGR 0x0010
12598 +#define TWI_SR 0x0020
12599 +#define TWI_IER 0x0024
12600 +#define TWI_IDR 0x0028
12601 +#define TWI_IMR 0x002c
12602 +#define TWI_RHR 0x0030
12603 +#define TWI_THR 0x0034
12604 +
12605 +/* Bitfields in CR */
12606 +#define TWI_START_OFFSET 0
12607 +#define TWI_START_SIZE 1
12608 +#define TWI_STOP_OFFSET 1
12609 +#define TWI_STOP_SIZE 1
12610 +#define TWI_MSEN_OFFSET 2
12611 +#define TWI_MSEN_SIZE 1
12612 +#define TWI_MSDIS_OFFSET 3
12613 +#define TWI_MSDIS_SIZE 1
12614 +#define TWI_SVEN_OFFSET 4
12615 +#define TWI_SVEN_SIZE 1
12616 +#define TWI_SVDIS_OFFSET 5
12617 +#define TWI_SVDIS_SIZE 1
12618 +#define TWI_SWRST_OFFSET 7
12619 +#define TWI_SWRST_SIZE 1
12620 +
12621 +/* Bitfields in MMR */
12622 +#define TWI_IADRSZ_OFFSET 8
12623 +#define TWI_IADRSZ_SIZE 2
12624 +#define TWI_MREAD_OFFSET 12
12625 +#define TWI_MREAD_SIZE 1
12626 +#define TWI_DADR_OFFSET 16
12627 +#define TWI_DADR_SIZE 7
12628 +
12629 +/* Bitfields in SMR */
12630 +#define TWI_SADR_OFFSET 16
12631 +#define TWI_SADR_SIZE 7
12632 +
12633 +/* Bitfields in IADR */
12634 +#define TWI_IADR_OFFSET 0
12635 +#define TWI_IADR_SIZE 24
12636 +
12637 +/* Bitfields in CWGR */
12638 +#define TWI_CLDIV_OFFSET 0
12639 +#define TWI_CLDIV_SIZE 8
12640 +#define TWI_CHDIV_OFFSET 8
12641 +#define TWI_CHDIV_SIZE 8
12642 +#define TWI_CKDIV_OFFSET 16
12643 +#define TWI_CKDIV_SIZE 3
12644 +
12645 +/* Bitfields in SR */
12646 +#define TWI_TXCOMP_OFFSET 0
12647 +#define TWI_TXCOMP_SIZE 1
12648 +#define TWI_RXRDY_OFFSET 1
12649 +#define TWI_RXRDY_SIZE 1
12650 +#define TWI_TXRDY_OFFSET 2
12651 +#define TWI_TXRDY_SIZE 1
12652 +#define TWI_SVDIR_OFFSET 3
12653 +#define TWI_SVDIR_SIZE 1
12654 +#define TWI_SVACC_OFFSET 4
12655 +#define TWI_SVACC_SIZE 1
12656 +#define TWI_GCACC_OFFSET 5
12657 +#define TWI_GCACC_SIZE 1
12658 +#define TWI_OVRE_OFFSET 6
12659 +#define TWI_OVRE_SIZE 1
12660 +#define TWI_UNRE_OFFSET 7
12661 +#define TWI_UNRE_SIZE 1
12662 +#define TWI_NACK_OFFSET 8
12663 +#define TWI_NACK_SIZE 1
12664 +#define TWI_ARBLST_OFFSET 9
12665 +#define TWI_ARBLST_SIZE 1
12666 +
12667 +/* Bitfields in RHR */
12668 +#define TWI_RXDATA_OFFSET 0
12669 +#define TWI_RXDATA_SIZE 8
12670 +
12671 +/* Bitfields in THR */
12672 +#define TWI_TXDATA_OFFSET 0
12673 +#define TWI_TXDATA_SIZE 8
12674 +
12675 +/* Constants for IADRSZ */
12676 +#define TWI_IADRSZ_NO_ADDR 0
12677 +#define TWI_IADRSZ_ONE_BYTE 1
12678 +#define TWI_IADRSZ_TWO_BYTES 2
12679 +#define TWI_IADRSZ_THREE_BYTES 3
12680 +
12681 +/* Bit manipulation macros */
12682 +#define TWI_BIT(name) \
12683 + (1 << TWI_##name##_OFFSET)
12684 +#define TWI_BF(name, value) \
12685 + (((value) & ((1 << TWI_##name##_SIZE) - 1)) \
12686 + << TWI_##name##_OFFSET)
12687 +#define TWI_BFEXT(name, value) \
12688 + (((value) >> TWI_##name##_OFFSET) \
12689 + & ((1 << TWI_##name##_SIZE) - 1))
12690 +#define TWI_BFINS(name, value, old) \
12691 + (((old) & ~(((1 << TWI_##name##_SIZE) - 1) \
12692 + << TWI_##name##_OFFSET)) \
12693 + | TWI_BF(name, (value)))
12694 +
12695 +/* Register access macros */
12696 +#define twi_readl(port, reg) \
12697 + __raw_readl((port)->regs + TWI_##reg)
12698 +#define twi_writel(port, reg, value) \
12699 + __raw_writel((value), (port)->regs + TWI_##reg)
12700 +
12701 +#endif /* __ATMELTWI_H__ */
12702 diff -urN linux-2.6.24.3/drivers/i2c/busses/Kconfig avr32-2.6/drivers/i2c/busses/Kconfig
12703 --- linux-2.6.24.3/drivers/i2c/busses/Kconfig 2008-02-26 01:20:20.000000000 +0100
12704 +++ avr32-2.6/drivers/i2c/busses/Kconfig 2008-04-23 20:12:40.000000000 +0200
12705 @@ -88,6 +88,14 @@
12706 to support combined I2C messages. Use the i2c-gpio driver
12707 unless your system can cope with those limitations.
12708
12709 +config I2C_ATMELTWI
12710 + tristate "Atmel Two-Wire Interface (TWI)"
12711 + depends on I2C && (ARCH_AT91 || PLATFORM_AT32AP)
12712 + help
12713 + Atmel on-chip TWI controller. Say Y if you have an AT32 or
12714 + AT91-based device and want to use its built-in TWI
12715 + functionality.
12716 +
12717 config I2C_AU1550
12718 tristate "Au1550/Au1200 SMBus interface"
12719 depends on SOC_AU1550 || SOC_AU1200
12720 diff -urN linux-2.6.24.3/drivers/i2c/busses/Makefile avr32-2.6/drivers/i2c/busses/Makefile
12721 --- linux-2.6.24.3/drivers/i2c/busses/Makefile 2008-02-26 01:20:20.000000000 +0100
12722 +++ avr32-2.6/drivers/i2c/busses/Makefile 2008-04-23 20:12:40.000000000 +0200
12723 @@ -53,6 +53,7 @@
12724 obj-$(CONFIG_I2C_VOODOO3) += i2c-voodoo3.o
12725 obj-$(CONFIG_SCx200_ACB) += scx200_acb.o
12726 obj-$(CONFIG_SCx200_I2C) += scx200_i2c.o
12727 +obj-$(CONFIG_I2C_ATMELTWI) += i2c-atmeltwi.o
12728
12729 ifeq ($(CONFIG_I2C_DEBUG_BUS),y)
12730 EXTRA_CFLAGS += -DDEBUG
12731 diff -urN linux-2.6.24.3/drivers/input/serio/at32psif.c avr32-2.6/drivers/input/serio/at32psif.c
12732 --- linux-2.6.24.3/drivers/input/serio/at32psif.c 1970-01-01 01:00:00.000000000 +0100
12733 +++ avr32-2.6/drivers/input/serio/at32psif.c 2008-04-23 20:12:40.000000000 +0200
12734 @@ -0,0 +1,351 @@
12735 +/*
12736 + * Copyright (C) 2007 Atmel Corporation
12737 + *
12738 + * Driver for the AT32AP700X PS/2 controller (PSIF).
12739 + *
12740 + * This program is free software; you can redistribute it and/or modify it
12741 + * under the terms of the GNU General Public License version 2 as published
12742 + * by the Free Software Foundation.
12743 + */
12744 +#include <linux/kernel.h>
12745 +#include <linux/module.h>
12746 +#include <linux/device.h>
12747 +#include <linux/init.h>
12748 +#include <linux/serio.h>
12749 +#include <linux/timer.h>
12750 +#include <linux/interrupt.h>
12751 +#include <linux/err.h>
12752 +#include <linux/io.h>
12753 +#include <linux/clk.h>
12754 +#include <linux/platform_device.h>
12755 +
12756 +#include "at32psif.h"
12757 +
12758 +#define PSIF_BUF_SIZE 16
12759 +
12760 +#define ring_is_empty(_psif) (_psif->head == _psif->tail)
12761 +#define ring_next_head(_psif) ((_psif->head + 1) & (PSIF_BUF_SIZE - 1))
12762 +#define ring_next_tail(_psif) ((_psif->tail + 1) & (PSIF_BUF_SIZE - 1))
12763 +
12764 +struct psif {
12765 + struct platform_device *pdev;
12766 + struct clk *pclk;
12767 + struct serio *io;
12768 + struct timer_list tx_timer;
12769 + void __iomem *regs;
12770 + unsigned int irq;
12771 + unsigned int open;
12772 + /* Prevent concurrent writes to circular buffer. */
12773 + spinlock_t lock;
12774 + unsigned int head;
12775 + unsigned int tail;
12776 + unsigned char buffer[PSIF_BUF_SIZE];
12777 +};
12778 +
12779 +static irqreturn_t psif_interrupt(int irq, void *_ptr)
12780 +{
12781 + struct psif *psif = _ptr;
12782 + int retval = IRQ_NONE;
12783 + unsigned int io_flags = 0;
12784 + unsigned long status;
12785 +
12786 + status = psif_readl(psif, SR);
12787 +
12788 + if (status & PSIF_BIT(RXRDY)) {
12789 + unsigned char val = (unsigned char) psif_readl(psif, RHR);
12790 +
12791 + if (status & PSIF_BIT(PARITY))
12792 + io_flags |= SERIO_PARITY;
12793 + if (status & PSIF_BIT(OVRUN))
12794 + dev_err(&psif->pdev->dev, "overrun read error\n");
12795 +
12796 + serio_interrupt(psif->io, val, io_flags);
12797 +
12798 + retval = IRQ_HANDLED;
12799 + }
12800 +
12801 + spin_lock(&psif->lock);
12802 +
12803 + if (status & PSIF_BIT(TXEMPTY)) {
12804 + if (status & PSIF_BIT(NACK))
12805 + dev_err(&psif->pdev->dev, "NACK error\n");
12806 +
12807 + psif_writel(psif, IDR, PSIF_BIT(TXEMPTY));
12808 +
12809 + if (!ring_is_empty(psif))
12810 + mod_timer(&psif->tx_timer,
12811 + jiffies + msecs_to_jiffies(1));
12812 +
12813 + retval = IRQ_HANDLED;
12814 + }
12815 +
12816 + spin_unlock(&psif->lock);
12817 +
12818 + return retval;
12819 +}
12820 +
12821 +static void psif_transmit_data(unsigned long data)
12822 +{
12823 + struct psif *psif = (struct psif *)data;
12824 + unsigned long flags;
12825 +
12826 + spin_lock_irqsave(&psif->lock, flags);
12827 +
12828 + psif_writel(psif, THR, psif->buffer[psif->tail]);
12829 + psif->tail = ring_next_tail(psif);
12830 +
12831 + if (!ring_is_empty(psif))
12832 + psif_writel(psif, IER, PSIF_BIT(TXEMPTY));
12833 +
12834 + spin_unlock_irqrestore(&psif->lock, flags);
12835 +}
12836 +
12837 +static int psif_write(struct serio *io, unsigned char val)
12838 +{
12839 + struct psif *psif = io->port_data;
12840 + unsigned long flags;
12841 + unsigned int head;
12842 +
12843 + spin_lock_irqsave(&psif->lock, flags);
12844 +
12845 + head = ring_next_head(psif);
12846 +
12847 + if (head != psif->tail) {
12848 + psif->buffer[psif->head] = val;
12849 + psif->head = head;
12850 + } else {
12851 + dev_err(&psif->pdev->dev, "underrun write error\n");
12852 + }
12853 +
12854 + spin_unlock_irqrestore(&psif->lock, flags);
12855 +
12856 + /* Make sure TXEMPTY interrupt is enabled. */
12857 + psif_writel(psif, IER, PSIF_BIT(TXEMPTY));
12858 +
12859 + return 0;
12860 +}
12861 +
12862 +static int psif_open(struct serio *io)
12863 +{
12864 + struct psif *psif = io->port_data;
12865 + int retval;
12866 +
12867 + retval = clk_enable(psif->pclk);
12868 + if (retval)
12869 + goto out;
12870 +
12871 + psif_writel(psif, CR, PSIF_BIT(CR_TXEN) | PSIF_BIT(CR_RXEN));
12872 + psif_writel(psif, IER, PSIF_BIT(RXRDY));
12873 +
12874 + psif->open = 1;
12875 +out:
12876 + return retval;
12877 +}
12878 +
12879 +static void psif_close(struct serio *io)
12880 +{
12881 + struct psif *psif = io->port_data;
12882 +
12883 + psif->open = 0;
12884 +
12885 + psif_writel(psif, IDR, ~0UL);
12886 + psif_writel(psif, CR, PSIF_BIT(CR_TXDIS) | PSIF_BIT(CR_RXDIS));
12887 +
12888 + clk_disable(psif->pclk);
12889 +}
12890 +
12891 +static void psif_set_prescaler(struct psif *psif)
12892 +{
12893 + unsigned long prscv;
12894 + unsigned long rate = clk_get_rate(psif->pclk);
12895 +
12896 + /* PRSCV = Pulse length (100 us) * PSIF module frequency. */
12897 + prscv = 100 * (rate / 1000000UL);
12898 +
12899 + if (prscv > ((1<<PSIF_PSR_PRSCV_SIZE) - 1)) {
12900 + prscv = (1<<PSIF_PSR_PRSCV_SIZE) - 1;
12901 + dev_dbg(&psif->pdev->dev, "pclk too fast, "
12902 + "prescaler set to max\n");
12903 + }
12904 +
12905 + clk_enable(psif->pclk);
12906 + psif_writel(psif, PSR, prscv);
12907 + clk_disable(psif->pclk);
12908 +}
12909 +
12910 +static int __init psif_probe(struct platform_device *pdev)
12911 +{
12912 + struct resource *regs;
12913 + struct psif *psif;
12914 + struct serio *io;
12915 + struct clk *pclk;
12916 + int irq;
12917 + int ret;
12918 +
12919 + psif = kzalloc(sizeof(struct psif), GFP_KERNEL);
12920 + if (!psif) {
12921 + dev_dbg(&pdev->dev, "out of memory\n");
12922 + ret = -ENOMEM;
12923 + goto out;
12924 + }
12925 + psif->pdev = pdev;
12926 +
12927 + io = kzalloc(sizeof(struct serio), GFP_KERNEL);
12928 + if (!io) {
12929 + dev_dbg(&pdev->dev, "out of memory\n");
12930 + ret = -ENOMEM;
12931 + goto out_free_psif;
12932 + }
12933 + psif->io = io;
12934 +
12935 + regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
12936 + if (!regs) {
12937 + dev_dbg(&pdev->dev, "no mmio resources defined\n");
12938 + ret = -ENOMEM;
12939 + goto out_free_io;
12940 + }
12941 +
12942 + psif->regs = ioremap(regs->start, regs->end - regs->start + 1);
12943 + if (!psif->regs) {
12944 + ret = -ENOMEM;
12945 + dev_dbg(&pdev->dev, "could not map I/O memory\n");
12946 + goto out_free_io;
12947 + }
12948 +
12949 + pclk = clk_get(&pdev->dev, "pclk");
12950 + if (IS_ERR(pclk)) {
12951 + dev_dbg(&pdev->dev, "could not get peripheral clock\n");
12952 + ret = PTR_ERR(pclk);
12953 + goto out_iounmap;
12954 + }
12955 + psif->pclk = pclk;
12956 +
12957 + /* Reset the PSIF to enter at a known state. */
12958 + ret = clk_enable(pclk);
12959 + if (ret) {
12960 + dev_dbg(&pdev->dev, "could not enable pclk\n");
12961 + goto out_put_clk;
12962 + }
12963 + psif_writel(psif, CR, PSIF_BIT(CR_SWRST));
12964 + clk_disable(pclk);
12965 +
12966 + setup_timer(&psif->tx_timer, psif_transmit_data, (unsigned long)psif);
12967 +
12968 + irq = platform_get_irq(pdev, 0);
12969 + if (irq < 0) {
12970 + dev_dbg(&pdev->dev, "could not get irq\n");
12971 + ret = -ENXIO;
12972 + goto out_put_clk;
12973 + }
12974 + ret = request_irq(irq, psif_interrupt, IRQF_SHARED, "at32psif", psif);
12975 + if (ret) {
12976 + dev_dbg(&pdev->dev, "could not request irq %d\n", irq);
12977 + goto out_put_clk;
12978 + }
12979 + psif->irq = irq;
12980 +
12981 + io->id.type = SERIO_8042;
12982 + io->write = psif_write;
12983 + io->open = psif_open;
12984 + io->close = psif_close;
12985 + strlcpy(io->name, pdev->dev.bus_id, sizeof(io->name));
12986 + strlcpy(io->phys, pdev->dev.bus_id, sizeof(io->phys));
12987 + io->port_data = psif;
12988 + io->dev.parent = &pdev->dev;
12989 +
12990 + psif_set_prescaler(psif);
12991 +
12992 + spin_lock_init(&psif->lock);
12993 + serio_register_port(psif->io);
12994 + platform_set_drvdata(pdev, psif);
12995 +
12996 + dev_info(&pdev->dev, "Atmel AVR32 PSIF PS/2 driver on 0x%08x irq %d\n",
12997 + (int)psif->regs, psif->irq);
12998 +
12999 + return 0;
13000 +
13001 +out_put_clk:
13002 + clk_put(psif->pclk);
13003 +out_iounmap:
13004 + iounmap(psif->regs);
13005 +out_free_io:
13006 + kfree(io);
13007 +out_free_psif:
13008 + kfree(psif);
13009 +out:
13010 + return ret;
13011 +}
13012 +
13013 +static int __exit psif_remove(struct platform_device *pdev)
13014 +{
13015 + struct psif *psif = platform_get_drvdata(pdev);
13016 +
13017 + psif_writel(psif, IDR, ~0UL);
13018 + psif_writel(psif, CR, PSIF_BIT(CR_TXDIS) | PSIF_BIT(CR_RXDIS));
13019 +
13020 + serio_unregister_port(psif->io);
13021 + iounmap(psif->regs);
13022 + free_irq(psif->irq, psif);
13023 + clk_put(psif->pclk);
13024 + kfree(psif);
13025 +
13026 + platform_set_drvdata(pdev, NULL);
13027 +
13028 + return 0;
13029 +}
13030 +
13031 +#ifdef CONFIG_PM
13032 +static int psif_suspend(struct platform_device *pdev, pm_message_t state)
13033 +{
13034 + struct psif *psif = platform_get_drvdata(pdev);
13035 +
13036 + if (psif->open) {
13037 + psif_writel(psif, CR, PSIF_BIT(CR_RXDIS) | PSIF_BIT(CR_TXDIS));
13038 + clk_disable(psif->pclk);
13039 + }
13040 +
13041 + return 0;
13042 +}
13043 +
13044 +static int psif_resume(struct platform_device *pdev)
13045 +{
13046 + struct psif *psif = platform_get_drvdata(pdev);
13047 +
13048 + if (psif->open) {
13049 + clk_enable(psif->pclk);
13050 + psif_set_prescaler(psif);
13051 + psif_writel(psif, CR, PSIF_BIT(CR_RXEN) | PSIF_BIT(CR_TXEN));
13052 + }
13053 +
13054 + return 0;
13055 +}
13056 +#else
13057 +#define psif_suspend NULL
13058 +#define psif_resume NULL
13059 +#endif
13060 +
13061 +static struct platform_driver psif_driver = {
13062 + .remove = __exit_p(psif_remove),
13063 + .driver = {
13064 + .name = "atmel_psif",
13065 + },
13066 + .suspend = psif_suspend,
13067 + .resume = psif_resume,
13068 +};
13069 +
13070 +static int __init psif_init(void)
13071 +{
13072 + return platform_driver_probe(&psif_driver, psif_probe);
13073 +}
13074 +
13075 +static void __exit psif_exit(void)
13076 +{
13077 + platform_driver_unregister(&psif_driver);
13078 +}
13079 +
13080 +module_init(psif_init);
13081 +module_exit(psif_exit);
13082 +
13083 +MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>");
13084 +MODULE_DESCRIPTION("Atmel AVR32 PSIF PS/2 driver");
13085 +MODULE_LICENSE("GPL");
13086 diff -urN linux-2.6.24.3/drivers/input/serio/at32psif.h avr32-2.6/drivers/input/serio/at32psif.h
13087 --- linux-2.6.24.3/drivers/input/serio/at32psif.h 1970-01-01 01:00:00.000000000 +0100
13088 +++ avr32-2.6/drivers/input/serio/at32psif.h 2008-04-23 20:12:40.000000000 +0200
13089 @@ -0,0 +1,82 @@
13090 +/*
13091 + * Copyright (C) 2007 Atmel Corporation
13092 + *
13093 + * Driver for the AT32AP700X PS/2 controller (PSIF).
13094 + *
13095 + * This program is free software; you can redistribute it and/or modify it
13096 + * under the terms of the GNU General Public License version 2 as published
13097 + * by the Free Software Foundation.
13098 + */
13099 +
13100 +#ifndef _AT32PSIF_H
13101 +#define _AT32PSIF_H
13102 +
13103 +/* PSIF register offsets */
13104 +#define PSIF_CR 0x00
13105 +#define PSIF_RHR 0x04
13106 +#define PSIF_THR 0x08
13107 +#define PSIF_SR 0x10
13108 +#define PSIF_IER 0x14
13109 +#define PSIF_IDR 0x18
13110 +#define PSIF_IMR 0x1c
13111 +#define PSIF_PSR 0x24
13112 +
13113 +/* Bitfields in control register. */
13114 +#define PSIF_CR_RXDIS_OFFSET 1
13115 +#define PSIF_CR_RXDIS_SIZE 1
13116 +#define PSIF_CR_RXEN_OFFSET 0
13117 +#define PSIF_CR_RXEN_SIZE 1
13118 +#define PSIF_CR_SWRST_OFFSET 15
13119 +#define PSIF_CR_SWRST_SIZE 1
13120 +#define PSIF_CR_TXDIS_OFFSET 9
13121 +#define PSIF_CR_TXDIS_SIZE 1
13122 +#define PSIF_CR_TXEN_OFFSET 8
13123 +#define PSIF_CR_TXEN_SIZE 1
13124 +
13125 +/* Bitfields in interrupt disable, enable, mask and status register. */
13126 +#define PSIF_NACK_OFFSET 8
13127 +#define PSIF_NACK_SIZE 1
13128 +#define PSIF_OVRUN_OFFSET 5
13129 +#define PSIF_OVRUN_SIZE 1
13130 +#define PSIF_PARITY_OFFSET 9
13131 +#define PSIF_PARITY_SIZE 1
13132 +#define PSIF_RXRDY_OFFSET 4
13133 +#define PSIF_RXRDY_SIZE 1
13134 +#define PSIF_TXEMPTY_OFFSET 1
13135 +#define PSIF_TXEMPTY_SIZE 1
13136 +#define PSIF_TXRDY_OFFSET 0
13137 +#define PSIF_TXRDY_SIZE 1
13138 +
13139 +/* Bitfields in prescale register. */
13140 +#define PSIF_PSR_PRSCV_OFFSET 0
13141 +#define PSIF_PSR_PRSCV_SIZE 12
13142 +
13143 +/* Bitfields in receive hold register. */
13144 +#define PSIF_RHR_RXDATA_OFFSET 0
13145 +#define PSIF_RHR_RXDATA_SIZE 8
13146 +
13147 +/* Bitfields in transmit hold register. */
13148 +#define PSIF_THR_TXDATA_OFFSET 0
13149 +#define PSIF_THR_TXDATA_SIZE 8
13150 +
13151 +/* Bit manipulation macros */
13152 +#define PSIF_BIT(name) \
13153 + (1 << PSIF_##name##_OFFSET)
13154 +#define PSIF_BF(name, value) \
13155 + (((value) & ((1 << PSIF_##name##_SIZE) - 1)) \
13156 + << PSIF_##name##_OFFSET)
13157 +#define PSIF_BFEXT(name, value)\
13158 + (((value) >> PSIF_##name##_OFFSET) \
13159 + & ((1 << PSIF_##name##_SIZE) - 1))
13160 +#define PSIF_BFINS(name, value, old) \
13161 + (((old) & ~(((1 << PSIF_##name##_SIZE) - 1) \
13162 + << PSIF_##name##_OFFSET)) \
13163 + | PSIF_BF(name, value))
13164 +
13165 +/* Register access macros */
13166 +#define psif_readl(port, reg) \
13167 + __raw_readl((port)->regs + PSIF_##reg)
13168 +#define psif_writel(port, reg, value) \
13169 + __raw_writel((value), (port)->regs + PSIF_##reg)
13170 +
13171 +#endif /* _AT32PSIF_H */
13172 diff -urN linux-2.6.24.3/drivers/input/serio/Kconfig avr32-2.6/drivers/input/serio/Kconfig
13173 --- linux-2.6.24.3/drivers/input/serio/Kconfig 2008-02-26 01:20:20.000000000 +0100
13174 +++ avr32-2.6/drivers/input/serio/Kconfig 2008-04-23 20:12:40.000000000 +0200
13175 @@ -88,6 +88,17 @@
13176 To compile this driver as a module, choose M here: the
13177 module will be called rpckbd.
13178
13179 +config SERIO_AT32PSIF
13180 + tristate "AVR32 PSIF PS/2 keyboard and mouse controller"
13181 + depends on AVR32
13182 + default n
13183 + help
13184 + Say Y here if you want to use the PSIF peripheral on AVR32 devices
13185 + and connect a PS/2 keyboard and/or mouse to it.
13186 +
13187 + To compile this driver as a module, choose M here: the module will
13188 + be called at32psif.
13189 +
13190 config SERIO_AMBAKMI
13191 tristate "AMBA KMI keyboard controller"
13192 depends on ARM_AMBA
13193 diff -urN linux-2.6.24.3/drivers/input/serio/Makefile avr32-2.6/drivers/input/serio/Makefile
13194 --- linux-2.6.24.3/drivers/input/serio/Makefile 2008-02-26 01:20:20.000000000 +0100
13195 +++ avr32-2.6/drivers/input/serio/Makefile 2008-04-23 20:12:40.000000000 +0200
13196 @@ -12,6 +12,7 @@
13197 obj-$(CONFIG_SERIO_RPCKBD) += rpckbd.o
13198 obj-$(CONFIG_SERIO_SA1111) += sa1111ps2.o
13199 obj-$(CONFIG_SERIO_AMBAKMI) += ambakmi.o
13200 +obj-$(CONFIG_SERIO_AT32PSIF) += at32psif.o
13201 obj-$(CONFIG_SERIO_Q40KBD) += q40kbd.o
13202 obj-$(CONFIG_SERIO_GSCPS2) += gscps2.o
13203 obj-$(CONFIG_HP_SDC) += hp_sdc.o
13204 diff -urN linux-2.6.24.3/drivers/leds/Kconfig avr32-2.6/drivers/leds/Kconfig
13205 --- linux-2.6.24.3/drivers/leds/Kconfig 2008-02-26 01:20:20.000000000 +0100
13206 +++ avr32-2.6/drivers/leds/Kconfig 2008-04-23 20:12:41.000000000 +0200
13207 @@ -18,6 +18,13 @@
13208
13209 comment "LED drivers"
13210
13211 +config LEDS_ATMEL_PWM
13212 + tristate "LED Support using Atmel PWM outputs"
13213 + depends on LEDS_CLASS && ATMEL_PWM
13214 + help
13215 + This option enables support for LEDs driven using outputs
13216 + of the dedicated PWM controller found on newer Atmel SOCs.
13217 +
13218 config LEDS_CORGI
13219 tristate "LED Support for the Sharp SL-C7x0 series"
13220 depends on LEDS_CLASS && PXA_SHARP_C7xx
13221 diff -urN linux-2.6.24.3/drivers/leds/leds-atmel-pwm.c avr32-2.6/drivers/leds/leds-atmel-pwm.c
13222 --- linux-2.6.24.3/drivers/leds/leds-atmel-pwm.c 1970-01-01 01:00:00.000000000 +0100
13223 +++ avr32-2.6/drivers/leds/leds-atmel-pwm.c 2008-04-23 19:33:39.000000000 +0200
13224 @@ -0,0 +1,155 @@
13225 +#include <linux/kernel.h>
13226 +#include <linux/platform_device.h>
13227 +#include <linux/leds.h>
13228 +#include <linux/io.h>
13229 +#include <linux/atmel_pwm.h>
13230 +
13231 +
13232 +struct pwmled {
13233 + struct led_classdev cdev;
13234 + struct pwm_channel pwmc;
13235 + struct gpio_led *desc;
13236 + u32 mult;
13237 + u8 active_low;
13238 +};
13239 +
13240 +
13241 +/*
13242 + * For simplicity, we use "brightness" as if it were a linear function
13243 + * of PWM duty cycle. However, a logarithmic function of duty cycle is
13244 + * probably a better match for perceived brightness: two is half as bright
13245 + * as four, four is half as bright as eight, etc
13246 + */
13247 +static void pwmled_brightness(struct led_classdev *cdev, enum led_brightness b)
13248 +{
13249 + struct pwmled *led;
13250 +
13251 + /* update the duty cycle for the *next* period */
13252 + led = container_of(cdev, struct pwmled, cdev);
13253 + pwm_channel_writel(&led->pwmc, PWM_CUPD, led->mult * (unsigned) b);
13254 +}
13255 +
13256 +/*
13257 + * NOTE: we reuse the platform_data structure of GPIO leds,
13258 + * but repurpose its "gpio" number as a PWM channel number.
13259 + */
13260 +static int __init pwmled_probe(struct platform_device *pdev)
13261 +{
13262 + const struct gpio_led_platform_data *pdata;
13263 + struct pwmled *leds;
13264 + unsigned i;
13265 + int status;
13266 +
13267 + pdata = pdev->dev.platform_data;
13268 + if (!pdata || pdata->num_leds < 1)
13269 + return -ENODEV;
13270 +
13271 + leds = kcalloc(pdata->num_leds, sizeof(*leds), GFP_KERNEL);
13272 + if (!leds)
13273 + return -ENOMEM;
13274 +
13275 + for (i = 0; i < pdata->num_leds; i++) {
13276 + struct pwmled *led = leds + i;
13277 + const struct gpio_led *dat = pdata->leds + i;
13278 + u32 tmp;
13279 +
13280 + led->cdev.name = dat->name;
13281 + led->cdev.brightness = LED_OFF;
13282 + led->cdev.brightness_set = pwmled_brightness;
13283 + led->cdev.default_trigger = dat->default_trigger;
13284 +
13285 + led->active_low = dat->active_low;
13286 +
13287 + status = pwm_channel_alloc(dat->gpio, &led->pwmc);
13288 + if (status < 0)
13289 + goto err;
13290 +
13291 + /*
13292 + * Prescale clock by 2^x, so PWM counts in low MHz.
13293 + * Start each cycle with the LED active, so increasing
13294 + * the duty cycle gives us more time on (== brighter).
13295 + */
13296 + tmp = 5;
13297 + if (!led->active_low)
13298 + tmp |= PWM_CPR_CPOL;
13299 + pwm_channel_writel(&led->pwmc, PWM_CMR, tmp);
13300 +
13301 + /*
13302 + * Pick a period so PWM cycles at 100+ Hz; and a multiplier
13303 + * for scaling duty cycle: brightness * mult.
13304 + */
13305 + tmp = (led->pwmc.mck / (1 << 5)) / 100;
13306 + tmp /= 255;
13307 + led->mult = tmp;
13308 + pwm_channel_writel(&led->pwmc, PWM_CDTY,
13309 + led->cdev.brightness * 255);
13310 + pwm_channel_writel(&led->pwmc, PWM_CPRD,
13311 + LED_FULL * tmp);
13312 +
13313 + pwm_channel_enable(&led->pwmc);
13314 +
13315 + /* Hand it over to the LED framework */
13316 + status = led_classdev_register(&pdev->dev, &led->cdev);
13317 + if (status < 0) {
13318 + pwm_channel_free(&led->pwmc);
13319 + goto err;
13320 + }
13321 + }
13322 +
13323 + platform_set_drvdata(pdev, leds);
13324 + return 0;
13325 +
13326 +err:
13327 + while (i-- > 0) {
13328 + led_classdev_unregister(&leds[i].cdev);
13329 + pwm_channel_free(&leds[i].pwmc);
13330 + }
13331 + kfree(leds);
13332 +
13333 + return status;
13334 +}
13335 +
13336 +static int __exit pwmled_remove(struct platform_device *pdev)
13337 +{
13338 + const struct gpio_led_platform_data *pdata;
13339 + struct pwmled *leds;
13340 + unsigned i;
13341 +
13342 + pdata = pdev->dev.platform_data;
13343 + leds = platform_get_drvdata(pdev);
13344 +
13345 + for (i = 0; i < pdata->num_leds; i++) {
13346 + struct pwmled *led = leds + i;
13347 +
13348 + led_classdev_unregister(&led->cdev);
13349 + pwm_channel_free(&led->pwmc);
13350 + }
13351 +
13352 + kfree(leds);
13353 + platform_set_drvdata(pdev, NULL);
13354 + return 0;
13355 +}
13356 +
13357 +static struct platform_driver pwmled_driver = {
13358 + .driver = {
13359 + .name = "leds-atmel-pwm",
13360 + .owner = THIS_MODULE,
13361 + },
13362 + /* REVISIT add suspend() and resume() methods */
13363 + .remove = __exit_p(pwmled_remove),
13364 +};
13365 +
13366 +static int __init modinit(void)
13367 +{
13368 + return platform_driver_probe(&pwmled_driver, pwmled_probe);
13369 +}
13370 +module_init(modinit);
13371 +
13372 +static void __exit modexit(void)
13373 +{
13374 + platform_driver_unregister(&pwmled_driver);
13375 +}
13376 +module_exit(modexit);
13377 +
13378 +MODULE_DESCRIPTION("Driver for LEDs with PWM-controlled brightness");
13379 +MODULE_LICENSE("GPL");
13380 diff -urN linux-2.6.24.3/drivers/leds/Makefile avr32-2.6/drivers/leds/Makefile
13381 --- linux-2.6.24.3/drivers/leds/Makefile 2008-02-26 01:20:20.000000000 +0100
13382 +++ avr32-2.6/drivers/leds/Makefile 2008-04-23 20:12:41.000000000 +0200
13383 @@ -5,6 +5,7 @@
13384 obj-$(CONFIG_LEDS_TRIGGERS) += led-triggers.o
13385
13386 # LED Platform Drivers
13387 +obj-$(CONFIG_LEDS_ATMEL_PWM) += leds-atmel-pwm.o
13388 obj-$(CONFIG_LEDS_CORGI) += leds-corgi.o
13389 obj-$(CONFIG_LEDS_LOCOMO) += leds-locomo.o
13390 obj-$(CONFIG_LEDS_SPITZ) += leds-spitz.o
13391 diff -urN linux-2.6.24.3/drivers/misc/atmel_pwm.c avr32-2.6/drivers/misc/atmel_pwm.c
13392 --- linux-2.6.24.3/drivers/misc/atmel_pwm.c 1970-01-01 01:00:00.000000000 +0100
13393 +++ avr32-2.6/drivers/misc/atmel_pwm.c 2008-04-23 19:33:40.000000000 +0200
13394 @@ -0,0 +1,409 @@
13395 +#include <linux/module.h>
13396 +#include <linux/clk.h>
13397 +#include <linux/err.h>
13398 +#include <linux/io.h>
13399 +#include <linux/interrupt.h>
13400 +#include <linux/platform_device.h>
13401 +#include <linux/atmel_pwm.h>
13402 +
13403 +
13404 +/*
13405 + * This is a simple driver for the PWM controller found in various newer
13406 + * Atmel SOCs, including the AVR32 series and the AT91sam9263.
13407 + *
13408 + * Chips with current Linux ports have only 4 PWM channels, out of max 32.
13409 + * AT32UC3A and AT32UC3B chips have 7 channels (but currently no Linux).
13410 + * Docs are inconsistent about the width of the channel counter registers;
13411 + * it's at least 16 bits, but several places say 20 bits.
13412 + */
13413 +#define PWM_NCHAN 4 /* max 32 */
13414 +
13415 +struct pwm {
13416 + spinlock_t lock;
13417 + struct platform_device *pdev;
13418 + u32 mask;
13419 + int irq;
13420 + void __iomem *base;
13421 + struct clk *clk;
13422 + struct pwm_channel *channel[PWM_NCHAN];
13423 + void (*handler[PWM_NCHAN])(struct pwm_channel *);
13424 +};
13425 +
13426 +
13427 +/* global PWM controller registers */
13428 +#define PWM_MR 0x00
13429 +#define PWM_ENA 0x04
13430 +#define PWM_DIS 0x08
13431 +#define PWM_SR 0x0c
13432 +#define PWM_IER 0x10
13433 +#define PWM_IDR 0x14
13434 +#define PWM_IMR 0x18
13435 +#define PWM_ISR 0x1c
13436 +
13437 +static inline void pwm_writel(const struct pwm *p, unsigned offset, u32 val)
13438 +{
13439 + __raw_writel(val, p->base + offset);
13440 +}
13441 +
13442 +static inline u32 pwm_readl(const struct pwm *p, unsigned offset)
13443 +{
13444 + return __raw_readl(p->base + offset);
13445 +}
13446 +
13447 +static inline void __iomem *pwmc_regs(const struct pwm *p, int index)
13448 +{
13449 + return p->base + 0x200 + index * 0x20;
13450 +}
13451 +
13452 +static struct pwm *pwm;
13453 +
13454 +static void pwm_dumpregs(struct pwm_channel *ch, char *tag)
13455 +{
13456 + struct device *dev = &pwm->pdev->dev;
13457 +
13458 + dev_dbg(dev, "%s: mr %08x, sr %08x, imr %08x\n",
13459 + tag,
13460 + pwm_readl(pwm, PWM_MR),
13461 + pwm_readl(pwm, PWM_SR),
13462 + pwm_readl(pwm, PWM_IMR));
13463 + dev_dbg(dev,
13464 + "pwm ch%d - mr %08x, dty %u, prd %u, cnt %u\n",
13465 + ch->index,
13466 + pwm_channel_readl(ch, PWM_CMR),
13467 + pwm_channel_readl(ch, PWM_CDTY),
13468 + pwm_channel_readl(ch, PWM_CPRD),
13469 + pwm_channel_readl(ch, PWM_CCNT));
13470 +}
13471 +
13472 +
13473 +/**
13474 + * pwm_channel_alloc - allocate an unused PWM channel
13475 + * @index: identifies the channel
13476 + * @ch: structure to be initialized
13477 + *
13478 + * Drivers allocate PWM channels according to the board's wiring, and
13479 + * matching board-specific setup code. Returns zero or negative errno.
13480 + */
13481 +int pwm_channel_alloc(int index, struct pwm_channel *ch)
13482 +{
13483 + unsigned long flags;
13484 + int status = 0;
13485 +
13486 + /* insist on PWM init, with this signal pinned out */
13487 + if (!pwm || !(pwm->mask & 1 << index))
13488 + return -ENODEV;
13489 +
13490 + if (index < 0 || index >= PWM_NCHAN || !ch)
13491 + return -EINVAL;
13492 + memset(ch, 0, sizeof *ch);
13493 +
13494 + spin_lock_irqsave(&pwm->lock, flags);
13495 + if (pwm->channel[index])
13496 + status = -EBUSY;
13497 + else {
13498 + clk_enable(pwm->clk);
13499 +
13500 + ch->regs = pwmc_regs(pwm, index);
13501 + ch->index = index;
13502 +
13503 + /* REVISIT: ap7000 seems to go 2x as fast as we expect!! */
13504 + ch->mck = clk_get_rate(pwm->clk);
13505 +
13506 + pwm->channel[index] = ch;
13507 + pwm->handler[index] = NULL;
13508 +
13509 + /* channel and irq are always disabled when we return */
13510 + pwm_writel(pwm, PWM_DIS, 1 << index);
13511 + pwm_writel(pwm, PWM_IDR, 1 << index);
13512 + }
13513 + spin_unlock_irqrestore(&pwm->lock, flags);
13514 + return status;
13515 +}
13516 +EXPORT_SYMBOL(pwm_channel_alloc);
13517 +
13518 +static int pwmcheck(struct pwm_channel *ch)
13519 +{
13520 + int index;
13521 +
13522 + if (!pwm)
13523 + return -ENODEV;
13524 + if (!ch)
13525 + return -EINVAL;
13526 + index = ch->index;
13527 + if (index < 0 || index >= PWM_NCHAN || pwm->channel[index] != ch)
13528 + return -EINVAL;
13529 +
13530 + return index;
13531 +}
13532 +
13533 +/**
13534 + * pwm_channel_free - release a previously allocated channel
13535 + * @ch: the channel being released
13536 + *
13537 + * The channel is completely shut down (counter and IRQ disabled),
13538 + * and made available for re-use. Returns zero, or negative errno.
13539 + */
13540 +int pwm_channel_free(struct pwm_channel *ch)
13541 +{
13542 + unsigned long flags;
13543 + int t;
13544 +
13545 + spin_lock_irqsave(&pwm->lock, flags);
13546 + t = pwmcheck(ch);
13547 + if (t >= 0) {
13548 + pwm->channel[t] = NULL;
13549 + pwm->handler[t] = NULL;
13550 +
13551 + /* channel and irq are always disabled when we return */
13552 + pwm_writel(pwm, PWM_DIS, 1 << t);
13553 + pwm_writel(pwm, PWM_IDR, 1 << t);
13554 +
13555 + clk_disable(pwm->clk);
13556 + t = 0;
13557 + }
13558 + spin_unlock_irqrestore(&pwm->lock, flags);
13559 + return t;
13560 +}
13561 +EXPORT_SYMBOL(pwm_channel_free);
13562 +
13563 +int __pwm_channel_onoff(struct pwm_channel *ch, int enabled)
13564 +{
13565 + unsigned long flags;
13566 + int t;
13567 +
13568 + /* OMITTED FUNCTIONALITY: starting several channels in synch */
13569 +
13570 + spin_lock_irqsave(&pwm->lock, flags);
13571 + t = pwmcheck(ch);
13572 + if (t >= 0) {
13573 + pwm_writel(pwm, enabled ? PWM_ENA : PWM_DIS, 1 << t);
13574 + t = 0;
13575 + pwm_dumpregs(ch, enabled ? "enable" : "disable");
13576 + }
13577 + spin_unlock_irqrestore(&pwm->lock, flags);
13578 +
13579 + return t;
13580 +}
13581 +EXPORT_SYMBOL(__pwm_channel_onoff);
13582 +
13583 +/**
13584 + * pwm_clk_alloc - allocate and configure CLKA or CLKB
13585 + * @prescale: from 0..10, the power of two used to divide MCK
13586 + * @div: from 1..255, the linear divisor to use
13587 + *
13588 + * Returns PWM_CPR_CLKA, PWM_CPR_CLKB, or negative errno. The allocated
13589 + * clock will run with a period of (2^prescale * div) / MCK, or twice as
13590 + * long if center aligned PWM output is used. The clock must later be
13591 + * deconfigured using pwm_clk_free().
13592 + */
13593 +int pwm_clk_alloc(unsigned prescale, unsigned div)
13594 +{
13595 + unsigned long flags;
13596 + u32 mr;
13597 + u32 val = (prescale << 8) | div;
13598 + int ret = -EBUSY;
13599 +
13600 + if (prescale >= 10 || div == 0 || div > 255)
13601 + return -EINVAL;
13602 +
13603 + spin_lock_irqsave(&pwm->lock, flags);
13604 + mr = pwm_readl(pwm, PWM_MR);
13605 + if ((mr & 0xffff) == 0) {
13606 + mr |= val;
13607 + ret = PWM_CPR_CLKA;
13608 + }
13609 + if ((mr & (0xffff << 16)) == 0) {
13610 + mr |= val << 16;
13611 + ret = PWM_CPR_CLKB;
13612 + }
13613 + if (ret > 0)
13614 + pwm_writel(pwm, PWM_MR, mr);
13615 + spin_unlock_irqrestore(&pwm->lock, flags);
13616 + return ret;
13617 +}
13618 +EXPORT_SYMBOL(pwm_clk_alloc);
13619 +
13620 +/**
13621 + * pwm_clk_free - deconfigure and release CLKA or CLKB
13622 + *
13623 + * Reverses the effect of pwm_clk_alloc().
13624 + */
13625 +void pwm_clk_free(unsigned clk)
13626 +{
13627 + unsigned long flags;
13628 + u32 mr;
13629 +
13630 + spin_lock_irqsave(&pwm->lock, flags);
13631 + mr = pwm_readl(pwm, PWM_MR);
13632 + if (clk == PWM_CPR_CLKA)
13633 + pwm_writel(pwm, PWM_MR, mr & ~(0xffff << 0));
13634 + if (clk == PWM_CPR_CLKB)
13635 + pwm_writel(pwm, PWM_MR, mr & ~(0xffff << 16));
13636 + spin_unlock_irqrestore(&pwm->lock, flags);
13637 +}
13638 +EXPORT_SYMBOL(pwm_clk_free);
13639 +
13640 +/**
13641 + * pwm_channel_handler - manage channel's IRQ handler
13642 + * @ch: the channel
13643 + * @handler: the handler to use, possibly NULL
13644 + *
13645 + * If the handler is non-null, the handler will be called after every
13646 + * period of this PWM channel. If the handler is null, this channel
13647 + * won't generate an IRQ.
13648 + */
13649 +int pwm_channel_handler(struct pwm_channel *ch,
13650 + void (*handler)(struct pwm_channel *ch))
13651 +{
13652 + unsigned long flags;
13653 + int t;
13654 +
13655 + spin_lock_irqsave(&pwm->lock, flags);
13656 + t = pwmcheck(ch);
13657 + if (t >= 0) {
13658 + pwm->handler[t] = handler;
13659 + pwm_writel(pwm, handler ? PWM_IER : PWM_IDR, 1 << t);
13660 + t = 0;
13661 + }
13662 + spin_unlock_irqrestore(&pwm->lock, flags);
13663 +
13664 + return t;
13665 +}
13666 +EXPORT_SYMBOL(pwm_channel_handler);
13667 +
13668 +static irqreturn_t pwm_irq(int id, void *_pwm)
13669 +{
13670 + struct pwm *p = _pwm;
13671 + irqreturn_t handled = IRQ_NONE;
13672 + u32 irqstat;
13673 + int index;
13674 +
13675 + spin_lock(&p->lock);
13676 +
13677 + /* ack irqs, then handle them */
13678 + irqstat = pwm_readl(pwm, PWM_ISR);
13679 +
13680 + while (irqstat) {
13681 + struct pwm_channel *ch;
13682 + void (*handler)(struct pwm_channel *ch);
13683 +
13684 + index = ffs(irqstat) - 1;
13685 + irqstat &= ~(1 << index);
13686 + ch = pwm->channel[index];
13687 + handler = pwm->handler[index];
13688 + if (handler && ch) {
13689 + spin_unlock(&p->lock);
13690 + handler(ch);
13691 + spin_lock(&p->lock);
13692 + handled = IRQ_HANDLED;
13693 + }
13694 + }
13695 +
13696 + spin_unlock(&p->lock);
13697 + return handled;
13698 +}
13699 +
13700 +static int __init pwm_probe(struct platform_device *pdev)
13701 +{
13702 + struct resource *r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
13703 + int irq = platform_get_irq(pdev, 0);
13704 + u32 *mp = pdev->dev.platform_data;
13705 + struct pwm *p;
13706 + int status = -EIO;
13707 +
13708 + if (pwm)
13709 + return -EBUSY;
13710 + if (!r || irq < 0 || !mp || !*mp)
13711 + return -ENODEV;
13712 + if (*mp & ~((1<<PWM_NCHAN)-1)) {
13713 + dev_warn(&pdev->dev, "mask 0x%x ... more than %d channels\n",
13714 + *mp, PWM_NCHAN);
13715 + return -EINVAL;
13716 + }
13717 +
13718 + p = kzalloc(sizeof(*p), GFP_KERNEL);
13719 + if (!p)
13720 + return -ENOMEM;
13721 +
13722 + spin_lock_init(&p->lock);
13723 + p->pdev = pdev;
13724 + p->mask = *mp;
13725 + p->irq = irq;
13726 + p->base = ioremap(r->start, r->end - r->start + 1);
13727 + if (!p->base)
13728 + goto fail;
13729 + p->clk = clk_get(&pdev->dev, "mck");
13730 + if (IS_ERR(p->clk)) {
13731 + status = PTR_ERR(p->clk);
13732 + p->clk = NULL;
13733 + goto fail;
13734 + }
13735 +
13736 + status = request_irq(irq, pwm_irq, 0, pdev->name, p);
13737 + if (status < 0)
13738 + goto fail;
13739 +
13740 + pwm = p;
13741 + platform_set_drvdata(pdev, p);
13742 +
13743 + return 0;
13744 +
13745 +fail:
13746 + if (p->clk)
13747 + clk_put(p->clk);
13748 + if (p->base)
13749 + iounmap(p->base);
13750 +
13751 + kfree(p);
13752 + return status;
13753 +}
13754 +
13755 +static int __exit pwm_remove(struct platform_device *pdev)
13756 +{
13757 + struct pwm *p = platform_get_drvdata(pdev);
13758 +
13759 + if (p != pwm)
13760 + return -EINVAL;
13761 +
13762 + clk_enable(pwm->clk);
13763 + pwm_writel(pwm, PWM_DIS, (1 << PWM_NCHAN) - 1);
13764 + pwm_writel(pwm, PWM_IDR, (1 << PWM_NCHAN) - 1);
13765 + clk_disable(pwm->clk);
13766 +
13767 + pwm = NULL;
13768 +
13769 + free_irq(p->irq, p);
13770 + clk_put(p->clk);
13771 + iounmap(p->base);
13772 + kfree(p);
13773 +
13774 + return 0;
13775 +}
13776 +
13777 +static struct platform_driver atmel_pwm_driver = {
13778 + .driver = {
13779 + .name = "atmel_pwm",
13780 + .owner = THIS_MODULE,
13781 + },
13782 + .remove = __exit_p(pwm_remove),
13783 +
13784 + /* NOTE: PWM can keep running in AVR32 "idle" and "frozen" states;
13785 + * and all AT91sam9263 states, albeit at reduced clock rate if
13786 + * MCK becomes the slow clock (i.e. what Linux labels STR).
13787 + */
13788 +};
13789 +
13790 +static int __init pwm_init(void)
13791 +{
13792 + return platform_driver_probe(&atmel_pwm_driver, pwm_probe);
13793 +}
13794 +module_init(pwm_init);
13795 +
13796 +static void __exit pwm_exit(void)
13797 +{
13798 + platform_driver_unregister(&atmel_pwm_driver);
13799 +}
13800 +module_exit(pwm_exit);
13801 +
13802 +MODULE_DESCRIPTION("Driver for AT32/AT91 PWM module");
13803 +MODULE_LICENSE("GPL");
13804 diff -urN linux-2.6.24.3/drivers/misc/atmel_tclib.c avr32-2.6/drivers/misc/atmel_tclib.c
13805 --- linux-2.6.24.3/drivers/misc/atmel_tclib.c 1970-01-01 01:00:00.000000000 +0100
13806 +++ avr32-2.6/drivers/misc/atmel_tclib.c 2008-04-23 20:12:41.000000000 +0200
13807 @@ -0,0 +1,161 @@
13808 +#include <linux/atmel_tc.h>
13809 +#include <linux/clk.h>
13810 +#include <linux/err.h>
13811 +#include <linux/init.h>
13812 +#include <linux/io.h>
13813 +#include <linux/ioport.h>
13814 +#include <linux/kernel.h>
13815 +#include <linux/platform_device.h>
13816 +
13817 +/* Number of bytes to reserve for the iomem resource */
13818 +#define ATMEL_TC_IOMEM_SIZE 256
13819 +
13820 +
13821 +/*
13822 + * This is a thin library to solve the problem of how to portably allocate
13823 + * one of the TC blocks. For simplicity, it doesn't currently expect to
13824 + * share individual timers between different drivers.
13825 + */
13826 +
13827 +#if defined(CONFIG_AVR32)
13828 +/* AVR32 has these divide PBB */
13829 +const u8 atmel_tc_divisors[5] = { 0, 4, 8, 16, 32, };
13830 +EXPORT_SYMBOL(atmel_tc_divisors);
13831 +
13832 +#elif defined(CONFIG_ARCH_AT91)
13833 +/* AT91 has these divide MCK */
13834 +const u8 atmel_tc_divisors[5] = { 2, 8, 32, 128, 0, };
13835 +EXPORT_SYMBOL(atmel_tc_divisors);
13836 +
13837 +#endif
13838 +
13839 +static DEFINE_SPINLOCK(tc_list_lock);
13840 +static LIST_HEAD(tc_list);
13841 +
13842 +/**
13843 + * atmel_tc_alloc - allocate a specified TC block
13844 + * @block: which block to allocate
13845 + * @name: name to be associated with the iomem resource
13846 + *
13847 + * Caller allocates a block. If it is available, a pointer to a
13848 + * pre-initialized struct atmel_tc is returned. The caller can access
13849 + * the registers directly through the "regs" field.
13850 + */
13851 +struct atmel_tc *atmel_tc_alloc(unsigned block, const char *name)
13852 +{
13853 + struct atmel_tc *tc;
13854 + struct platform_device *pdev = NULL;
13855 + struct resource *r;
13856 +
13857 + spin_lock(&tc_list_lock);
13858 + list_for_each_entry(tc, &tc_list, node) {
13859 + if (tc->pdev->id == block) {
13860 + pdev = tc->pdev;
13861 + break;
13862 + }
13863 + }
13864 +
13865 + if (!pdev || tc->iomem)
13866 + goto fail;
13867 +
13868 + r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
13869 + r = request_mem_region(r->start, ATMEL_TC_IOMEM_SIZE, name);
13870 + if (!r)
13871 + goto fail;
13872 +
13873 + tc->regs = ioremap(r->start, ATMEL_TC_IOMEM_SIZE);
13874 + if (!tc->regs)
13875 + goto fail_ioremap;
13876 +
13877 + tc->iomem = r;
13878 +
13879 +out:
13880 + spin_unlock(&tc_list_lock);
13881 + return tc;
13882 +
13883 +fail_ioremap:
13884 + release_resource(r);
13885 +fail:
13886 + tc = NULL;
13887 + goto out;
13888 +}
13889 +EXPORT_SYMBOL_GPL(atmel_tc_alloc);
13890 +
13891 +/**
13892 + * atmel_tc_free - release a specified TC block
13893 + * @tc: Timer/counter block that was returned by atmel_tc_alloc()
13894 + *
13895 + * This reverses the effect of atmel_tc_alloc(), unmapping the I/O
13896 + * registers, invalidating the resource returned by that routine and
13897 + * making the TC available to other drivers.
13898 + */
13899 +void atmel_tc_free(struct atmel_tc *tc)
13900 +{
13901 + spin_lock(&tc_list_lock);
13902 + if (tc->regs) {
13903 + iounmap(tc->regs);
13904 + release_resource(tc->iomem);
13905 + tc->regs = NULL;
13906 + tc->iomem = NULL;
13907 + }
13908 + spin_unlock(&tc_list_lock);
13909 +}
13910 +EXPORT_SYMBOL_GPL(atmel_tc_free);
13911 +
13912 +static int __init tc_probe(struct platform_device *pdev)
13913 +{
13914 + struct atmel_tc *tc;
13915 + struct clk *clk;
13916 + int irq;
13917 +
13918 + if (!platform_get_resource(pdev, IORESOURCE_MEM, 0))
13919 + return -EINVAL;
13920 +
13921 + irq = platform_get_irq(pdev, 0);
13922 + if (irq < 0)
13923 + return -EINVAL;
13924 +
13925 + tc = kzalloc(sizeof(struct atmel_tc), GFP_KERNEL);
13926 + if (!tc)
13927 + return -ENOMEM;
13928 +
13929 + tc->pdev = pdev;
13930 +
13931 + clk = clk_get(&pdev->dev, "t0_clk");
13932 + if (IS_ERR(clk)) {
13933 + kfree(tc);
13934 + return -EINVAL;
13935 + }
13936 +
13937 + tc->clk[0] = clk;
13938 + tc->clk[1] = clk_get(&pdev->dev, "t1_clk");
13939 + if (IS_ERR(tc->clk[1]))
13940 + tc->clk[1] = clk;
13941 + tc->clk[2] = clk_get(&pdev->dev, "t2_clk");
13942 + if (IS_ERR(tc->clk[2]))
13943 + tc->clk[2] = clk;
13944 +
13945 + tc->irq[0] = irq;
13946 + tc->irq[1] = platform_get_irq(pdev, 1);
13947 + if (tc->irq[1] < 0)
13948 + tc->irq[1] = irq;
13949 + tc->irq[2] = platform_get_irq(pdev, 2);
13950 + if (tc->irq[2] < 0)
13951 + tc->irq[2] = irq;
13952 +
13953 + spin_lock(&tc_list_lock);
13954 + list_add_tail(&tc->node, &tc_list);
13955 + spin_unlock(&tc_list_lock);
13956 +
13957 + return 0;
13958 +}
13959 +
13960 +static struct platform_driver tc_driver = {
13961 + .driver.name = "atmel_tcb",
13962 +};
13963 +
13964 +static int __init tc_init(void)
13965 +{
13966 + return platform_driver_probe(&tc_driver, tc_probe);
13967 +}
13968 +arch_initcall(tc_init);
13969 diff -urN linux-2.6.24.3/drivers/misc/Kconfig avr32-2.6/drivers/misc/Kconfig
13970 --- linux-2.6.24.3/drivers/misc/Kconfig 2008-02-26 01:20:20.000000000 +0100
13971 +++ avr32-2.6/drivers/misc/Kconfig 2008-04-23 20:12:41.000000000 +0200
13972 @@ -13,6 +13,48 @@
13973
13974 if MISC_DEVICES
13975
13976 +config ATMEL_PWM
13977 + tristate "Atmel AT32/AT91 PWM support"
13978 + depends on AVR32 || ARCH_AT91
13979 + help
13980 + This option enables device driver support for the PWM channels
13981 + on certain Atmel prcoessors. Pulse Width Modulation is used for
13982 + purposes including software controlled power-efficent backlights
13983 + on LCD displays, motor control, and waveform generation.
13984 +
13985 +config ATMEL_TCLIB
13986 + bool "Atmel AT32/AT91 Timer/Counter Library"
13987 + depends on (AVR32 || ARCH_AT91)
13988 + help
13989 + Select this if you want a library to allocate the Timer/Counter
13990 + blocks found on many Atmel processors. This facilitates using
13991 + these blocks by different drivers despite processor differences.
13992 +
13993 +config ATMEL_TCB_CLKSRC
13994 + bool "TC Block Clocksource"
13995 + depends on ATMEL_TCLIB && GENERIC_TIME
13996 + default y
13997 + help
13998 + Select this to get a high precision clocksource based on a
13999 + TC block with a 5+ MHz base clock rate. Two timer channels
14000 + are combined to make a single 32-bit timer.
14001 +
14002 + When GENERIC_CLOCKEVENTS is defined, the third timer channel
14003 + may be used as a clock event device supporting oneshot mode
14004 + (delays of up to two seconds) based on the 32 KiHz clock.
14005 +
14006 +config ATMEL_TCB_CLKSRC_BLOCK
14007 + int
14008 + depends on ATMEL_TCB_CLKSRC
14009 + prompt "TC Block" if ARCH_AT91RM9200 || ARCH_AT91SAM9260 || CPU_AT32AP700X
14010 + default 0
14011 + range 0 1
14012 + help
14013 + Some chips provide more than one TC block, so you have the
14014 + choice of which one to use for the clock framework. The other
14015 + TC can be used for other purposes, such as PWM generation and
14016 + interval timing.
14017 +
14018 config IBM_ASM
14019 tristate "Device driver for IBM RSA service processor"
14020 depends on X86 && PCI && INPUT && EXPERIMENTAL
14021 diff -urN linux-2.6.24.3/drivers/misc/Makefile avr32-2.6/drivers/misc/Makefile
14022 --- linux-2.6.24.3/drivers/misc/Makefile 2008-02-26 01:20:20.000000000 +0100
14023 +++ avr32-2.6/drivers/misc/Makefile 2008-04-23 20:12:41.000000000 +0200
14024 @@ -7,7 +7,9 @@
14025 obj-$(CONFIG_HDPU_FEATURES) += hdpuftrs/
14026 obj-$(CONFIG_MSI_LAPTOP) += msi-laptop.o
14027 obj-$(CONFIG_ASUS_LAPTOP) += asus-laptop.o
14028 +obj-$(CONFIG_ATMEL_PWM) += atmel_pwm.o
14029 obj-$(CONFIG_ATMEL_SSC) += atmel-ssc.o
14030 +obj-$(CONFIG_ATMEL_TCLIB) += atmel_tclib.o
14031 obj-$(CONFIG_LKDTM) += lkdtm.o
14032 obj-$(CONFIG_TIFM_CORE) += tifm_core.o
14033 obj-$(CONFIG_TIFM_7XX1) += tifm_7xx1.o
14034 diff -urN linux-2.6.24.3/drivers/mmc/host/atmel-mci.c avr32-2.6/drivers/mmc/host/atmel-mci.c
14035 --- linux-2.6.24.3/drivers/mmc/host/atmel-mci.c 1970-01-01 01:00:00.000000000 +0100
14036 +++ avr32-2.6/drivers/mmc/host/atmel-mci.c 2008-04-23 20:12:41.000000000 +0200
14037 @@ -0,0 +1,1220 @@
14038 +/*
14039 + * Atmel MultiMedia Card Interface driver
14040 + *
14041 + * Copyright (C) 2004-2006 Atmel Corporation
14042 + *
14043 + * This program is free software; you can redistribute it and/or modify
14044 + * it under the terms of the GNU General Public License version 2 as
14045 + * published by the Free Software Foundation.
14046 + */
14047 +#include <linux/blkdev.h>
14048 +#include <linux/clk.h>
14049 +#include <linux/device.h>
14050 +#include <linux/dma-mapping.h>
14051 +#include <linux/init.h>
14052 +#include <linux/interrupt.h>
14053 +#include <linux/ioport.h>
14054 +#include <linux/module.h>
14055 +#include <linux/platform_device.h>
14056 +
14057 +#include <linux/mmc/host.h>
14058 +
14059 +#include <asm/dma-controller.h>
14060 +#include <asm/io.h>
14061 +#include <asm/arch/board.h>
14062 +#include <asm/arch/gpio.h>
14063 +
14064 +#include "atmel-mci.h"
14065 +
14066 +#define DRIVER_NAME "atmel_mci"
14067 +
14068 +#define MCI_DATA_ERROR_FLAGS (MCI_BIT(DCRCE) | MCI_BIT(DTOE) | \
14069 + MCI_BIT(OVRE) | MCI_BIT(UNRE))
14070 +
14071 +enum {
14072 + EVENT_CMD_COMPLETE = 0,
14073 + EVENT_DATA_COMPLETE,
14074 + EVENT_DATA_ERROR,
14075 + EVENT_STOP_SENT,
14076 + EVENT_STOP_COMPLETE,
14077 + EVENT_DMA_COMPLETE,
14078 + EVENT_DMA_ERROR,
14079 +};
14080 +
14081 +struct atmel_mci_dma {
14082 + struct dma_request_sg req;
14083 + unsigned short rx_periph_id;
14084 + unsigned short tx_periph_id;
14085 +};
14086 +
14087 +struct atmel_mci {
14088 + struct mmc_host *mmc;
14089 + void __iomem *regs;
14090 + struct atmel_mci_dma dma;
14091 +
14092 + struct mmc_request *mrq;
14093 + struct mmc_command *cmd;
14094 + struct mmc_data *data;
14095 +
14096 + u32 cmd_status;
14097 + u32 data_status;
14098 + u32 stop_status;
14099 + u32 stop_cmdr;
14100 +
14101 + struct tasklet_struct tasklet;
14102 + unsigned long pending_events;
14103 + unsigned long completed_events;
14104 +
14105 + int present;
14106 + int detect_pin;
14107 + int wp_pin;
14108 +
14109 + /* For detect pin debouncing */
14110 + struct timer_list detect_timer;
14111 +
14112 + unsigned long bus_hz;
14113 + unsigned long mapbase;
14114 + struct clk *mck;
14115 + struct platform_device *pdev;
14116 +
14117 +#ifdef CONFIG_DEBUG_FS
14118 + struct dentry *debugfs_root;
14119 + struct dentry *debugfs_regs;
14120 + struct dentry *debugfs_req;
14121 + struct dentry *debugfs_pending_events;
14122 + struct dentry *debugfs_completed_events;
14123 +#endif
14124 +};
14125 +
14126 +/* Those printks take an awful lot of time... */
14127 +#ifndef DEBUG
14128 +static unsigned int fmax = 15000000U;
14129 +#else
14130 +static unsigned int fmax = 1000000U;
14131 +#endif
14132 +module_param(fmax, uint, 0444);
14133 +MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock");
14134 +
14135 +/* Test bit macros for completed events */
14136 +#define mci_cmd_is_complete(host) \
14137 + test_bit(EVENT_CMD_COMPLETE, &host->completed_events)
14138 +#define mci_data_is_complete(host) \
14139 + test_bit(EVENT_DATA_COMPLETE, &host->completed_events)
14140 +#define mci_data_error_is_complete(host) \
14141 + test_bit(EVENT_DATA_ERROR, &host->completed_events)
14142 +#define mci_stop_sent_is_complete(host) \
14143 + test_bit(EVENT_STOP_SENT, &host->completed_events)
14144 +#define mci_stop_is_complete(host) \
14145 + test_bit(EVENT_STOP_COMPLETE, &host->completed_events)
14146 +#define mci_dma_is_complete(host) \
14147 + test_bit(EVENT_DMA_COMPLETE, &host->completed_events)
14148 +#define mci_dma_error_is_complete(host) \
14149 + test_bit(EVENT_DMA_ERROR, &host->completed_events)
14150 +
14151 +/* Test and clear bit macros for pending events */
14152 +#define mci_clear_cmd_is_pending(host) \
14153 + test_and_clear_bit(EVENT_CMD_COMPLETE, &host->pending_events)
14154 +#define mci_clear_data_is_pending(host) \
14155 + test_and_clear_bit(EVENT_DATA_COMPLETE, &host->pending_events)
14156 +#define mci_clear_data_error_is_pending(host) \
14157 + test_and_clear_bit(EVENT_DATA_ERROR, &host->pending_events)
14158 +#define mci_clear_stop_sent_is_pending(host) \
14159 + test_and_clear_bit(EVENT_STOP_SENT, &host->pending_events)
14160 +#define mci_clear_stop_is_pending(host) \
14161 + test_and_clear_bit(EVENT_STOP_COMPLETE, &host->pending_events)
14162 +#define mci_clear_dma_error_is_pending(host) \
14163 + test_and_clear_bit(EVENT_DMA_ERROR, &host->pending_events)
14164 +
14165 +/* Test and set bit macros for completed events */
14166 +#define mci_set_cmd_is_completed(host) \
14167 + test_and_set_bit(EVENT_CMD_COMPLETE, &host->completed_events)
14168 +#define mci_set_data_is_completed(host) \
14169 + test_and_set_bit(EVENT_DATA_COMPLETE, &host->completed_events)
14170 +#define mci_set_data_error_is_completed(host) \
14171 + test_and_set_bit(EVENT_DATA_ERROR, &host->completed_events)
14172 +#define mci_set_stop_sent_is_completed(host) \
14173 + test_and_set_bit(EVENT_STOP_SENT, &host->completed_events)
14174 +#define mci_set_stop_is_completed(host) \
14175 + test_and_set_bit(EVENT_STOP_COMPLETE, &host->completed_events)
14176 +#define mci_set_dma_error_is_completed(host) \
14177 + test_and_set_bit(EVENT_DMA_ERROR, &host->completed_events)
14178 +
14179 +/* Set bit macros for completed events */
14180 +#define mci_set_cmd_complete(host) \
14181 + set_bit(EVENT_CMD_COMPLETE, &host->completed_events)
14182 +#define mci_set_data_complete(host) \
14183 + set_bit(EVENT_DATA_COMPLETE, &host->completed_events)
14184 +#define mci_set_data_error_complete(host) \
14185 + set_bit(EVENT_DATA_ERROR, &host->completed_events)
14186 +#define mci_set_stop_sent_complete(host) \
14187 + set_bit(EVENT_STOP_SENT, &host->completed_events)
14188 +#define mci_set_stop_complete(host) \
14189 + set_bit(EVENT_STOP_COMPLETE, &host->completed_events)
14190 +#define mci_set_dma_complete(host) \
14191 + set_bit(EVENT_DMA_COMPLETE, &host->completed_events)
14192 +#define mci_set_dma_error_complete(host) \
14193 + set_bit(EVENT_DMA_ERROR, &host->completed_events)
14194 +
14195 +/* Set bit macros for pending events */
14196 +#define mci_set_cmd_pending(host) \
14197 + set_bit(EVENT_CMD_COMPLETE, &host->pending_events)
14198 +#define mci_set_data_pending(host) \
14199 + set_bit(EVENT_DATA_COMPLETE, &host->pending_events)
14200 +#define mci_set_data_error_pending(host) \
14201 + set_bit(EVENT_DATA_ERROR, &host->pending_events)
14202 +#define mci_set_stop_sent_pending(host) \
14203 + set_bit(EVENT_STOP_SENT, &host->pending_events)
14204 +#define mci_set_stop_pending(host) \
14205 + set_bit(EVENT_STOP_COMPLETE, &host->pending_events)
14206 +#define mci_set_dma_error_pending(host) \
14207 + set_bit(EVENT_DMA_ERROR, &host->pending_events)
14208 +
14209 +/* Clear bit macros for pending events */
14210 +#define mci_clear_cmd_pending(host) \
14211 + clear_bit(EVENT_CMD_COMPLETE, &host->pending_events)
14212 +#define mci_clear_data_pending(host) \
14213 + clear_bit(EVENT_DATA_COMPLETE, &host->pending_events)
14214 +#define mci_clear_data_error_pending(host) \
14215 + clear_bit(EVENT_DATA_ERROR, &host->pending_events)
14216 +#define mci_clear_stop_sent_pending(host) \
14217 + clear_bit(EVENT_STOP_SENT, &host->pending_events)
14218 +#define mci_clear_stop_pending(host) \
14219 + clear_bit(EVENT_STOP_COMPLETE, &host->pending_events)
14220 +#define mci_clear_dma_error_pending(host) \
14221 + clear_bit(EVENT_DMA_ERROR, &host->pending_events)
14222 +
14223 +
14224 +#ifdef CONFIG_DEBUG_FS
14225 +#include <linux/debugfs.h>
14226 +
14227 +#define DBG_REQ_BUF_SIZE (4096 - sizeof(unsigned int))
14228 +
14229 +struct req_dbg_data {
14230 + unsigned int nbytes;
14231 + char str[DBG_REQ_BUF_SIZE];
14232 +};
14233 +
14234 +static int req_dbg_open(struct inode *inode, struct file *file)
14235 +{
14236 + struct atmel_mci *host;
14237 + struct mmc_request *mrq;
14238 + struct mmc_command *cmd, *stop;
14239 + struct mmc_data *data;
14240 + struct req_dbg_data *priv;
14241 + char *str;
14242 + unsigned long n = 0;
14243 +
14244 + priv = kzalloc(DBG_REQ_BUF_SIZE, GFP_KERNEL);
14245 + if (!priv)
14246 + return -ENOMEM;
14247 + str = priv->str;
14248 +
14249 + mutex_lock(&inode->i_mutex);
14250 + host = inode->i_private;
14251 +
14252 + spin_lock_irq(&host->mmc->lock);
14253 + mrq = host->mrq;
14254 + if (mrq) {
14255 + cmd = mrq->cmd;
14256 + data = mrq->data;
14257 + stop = mrq->stop;
14258 + n = snprintf(str, DBG_REQ_BUF_SIZE,
14259 + "CMD%u(0x%x) %x %x %x %x %x (err %u)\n",
14260 + cmd->opcode, cmd->arg, cmd->flags,
14261 + cmd->resp[0], cmd->resp[1], cmd->resp[2],
14262 + cmd->resp[3], cmd->error);
14263 + if (n < DBG_REQ_BUF_SIZE && data)
14264 + n += snprintf(str + n, DBG_REQ_BUF_SIZE - n,
14265 + "DATA %u * %u (%u) %x (err %u)\n",
14266 + data->blocks, data->blksz,
14267 + data->bytes_xfered, data->flags,
14268 + data->error);
14269 + if (n < DBG_REQ_BUF_SIZE && stop)
14270 + n += snprintf(str + n, DBG_REQ_BUF_SIZE - n,
14271 + "CMD%u(0x%x) %x %x %x %x %x (err %u)\n",
14272 + stop->opcode, stop->arg, stop->flags,
14273 + stop->resp[0], stop->resp[1],
14274 + stop->resp[2], stop->resp[3],
14275 + stop->error);
14276 + }
14277 + spin_unlock_irq(&host->mmc->lock);
14278 + mutex_unlock(&inode->i_mutex);
14279 +
14280 + priv->nbytes = min(n, DBG_REQ_BUF_SIZE);
14281 + file->private_data = priv;
14282 +
14283 + return 0;
14284 +}
14285 +
14286 +static ssize_t req_dbg_read(struct file *file, char __user *buf,
14287 + size_t nbytes, loff_t *ppos)
14288 +{
14289 + struct req_dbg_data *priv = file->private_data;
14290 +
14291 + return simple_read_from_buffer(buf, nbytes, ppos,
14292 + priv->str, priv->nbytes);
14293 +}
14294 +
14295 +static int req_dbg_release(struct inode *inode, struct file *file)
14296 +{
14297 + kfree(file->private_data);
14298 + return 0;
14299 +}
14300 +
14301 +static const struct file_operations req_dbg_fops = {
14302 + .owner = THIS_MODULE,
14303 + .open = req_dbg_open,
14304 + .llseek = no_llseek,
14305 + .read = req_dbg_read,
14306 + .release = req_dbg_release,
14307 +};
14308 +
14309 +static int regs_dbg_open(struct inode *inode, struct file *file)
14310 +{
14311 + struct atmel_mci *host;
14312 + unsigned int i;
14313 + u32 *data;
14314 + int ret = -ENOMEM;
14315 +
14316 + mutex_lock(&inode->i_mutex);
14317 + host = inode->i_private;
14318 + data = kmalloc(inode->i_size, GFP_KERNEL);
14319 + if (!data)
14320 + goto out;
14321 +
14322 + spin_lock_irq(&host->mmc->lock);
14323 + for (i = 0; i < inode->i_size / 4; i++)
14324 + data[i] = __raw_readl(host->regs + i * 4);
14325 + spin_unlock_irq(&host->mmc->lock);
14326 +
14327 + file->private_data = data;
14328 + ret = 0;
14329 +
14330 +out:
14331 + mutex_unlock(&inode->i_mutex);
14332 +
14333 + return ret;
14334 +}
14335 +
14336 +static ssize_t regs_dbg_read(struct file *file, char __user *buf,
14337 + size_t nbytes, loff_t *ppos)
14338 +{
14339 + struct inode *inode = file->f_dentry->d_inode;
14340 + int ret;
14341 +
14342 + mutex_lock(&inode->i_mutex);
14343 + ret = simple_read_from_buffer(buf, nbytes, ppos,
14344 + file->private_data,
14345 + file->f_dentry->d_inode->i_size);
14346 + mutex_unlock(&inode->i_mutex);
14347 +
14348 + return ret;
14349 +}
14350 +
14351 +static int regs_dbg_release(struct inode *inode, struct file *file)
14352 +{
14353 + kfree(file->private_data);
14354 + return 0;
14355 +}
14356 +
14357 +static const struct file_operations regs_dbg_fops = {
14358 + .owner = THIS_MODULE,
14359 + .open = regs_dbg_open,
14360 + .llseek = generic_file_llseek,
14361 + .read = regs_dbg_read,
14362 + .release = regs_dbg_release,
14363 +};
14364 +
14365 +static void atmci_init_debugfs(struct atmel_mci *host)
14366 +{
14367 + struct mmc_host *mmc;
14368 + struct dentry *root, *regs;
14369 + struct resource *res;
14370 +
14371 + mmc = host->mmc;
14372 + root = debugfs_create_dir(mmc_hostname(mmc), NULL);
14373 + if (IS_ERR(root) || !root)
14374 + goto err_root;
14375 + host->debugfs_root = root;
14376 +
14377 + regs = debugfs_create_file("regs", 0400, root, host, &regs_dbg_fops);
14378 + if (!regs)
14379 + goto err_regs;
14380 +
14381 + res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0);
14382 + regs->d_inode->i_size = res->end - res->start + 1;
14383 + host->debugfs_regs = regs;
14384 +
14385 + host->debugfs_req = debugfs_create_file("req", 0400, root,
14386 + host, &req_dbg_fops);
14387 + if (!host->debugfs_req)
14388 + goto err_req;
14389 +
14390 + host->debugfs_pending_events
14391 + = debugfs_create_u32("pending_events", 0400, root,
14392 + (u32 *)&host->pending_events);
14393 + if (!host->debugfs_pending_events)
14394 + goto err_pending_events;
14395 +
14396 + host->debugfs_completed_events
14397 + = debugfs_create_u32("completed_events", 0400, root,
14398 + (u32 *)&host->completed_events);
14399 + if (!host->debugfs_completed_events)
14400 + goto err_completed_events;
14401 +
14402 + return;
14403 +
14404 +err_completed_events:
14405 + debugfs_remove(host->debugfs_pending_events);
14406 +err_pending_events:
14407 + debugfs_remove(host->debugfs_req);
14408 +err_req:
14409 + debugfs_remove(host->debugfs_regs);
14410 +err_regs:
14411 + debugfs_remove(host->debugfs_root);
14412 +err_root:
14413 + host->debugfs_root = NULL;
14414 + dev_err(&host->pdev->dev,
14415 + "failed to initialize debugfs for %s\n",
14416 + mmc_hostname(mmc));
14417 +}
14418 +
14419 +static void atmci_cleanup_debugfs(struct atmel_mci *host)
14420 +{
14421 + if (host->debugfs_root) {
14422 + debugfs_remove(host->debugfs_completed_events);
14423 + debugfs_remove(host->debugfs_pending_events);
14424 + debugfs_remove(host->debugfs_req);
14425 + debugfs_remove(host->debugfs_regs);
14426 + debugfs_remove(host->debugfs_root);
14427 + host->debugfs_root = NULL;
14428 + }
14429 +}
14430 +#else
14431 +static inline void atmci_init_debugfs(struct atmel_mci *host)
14432 +{
14433 +
14434 +}
14435 +
14436 +static inline void atmci_cleanup_debugfs(struct atmel_mci *host)
14437 +{
14438 +
14439 +}
14440 +#endif /* CONFIG_DEBUG_FS */
14441 +
14442 +static inline unsigned int ns_to_clocks(struct atmel_mci *host,
14443 + unsigned int ns)
14444 +{
14445 + return (ns * (host->bus_hz / 1000000) + 999) / 1000;
14446 +}
14447 +
14448 +static void atmci_set_timeout(struct atmel_mci *host,
14449 + struct mmc_data *data)
14450 +{
14451 + static unsigned dtomul_to_shift[] = {
14452 + 0, 4, 7, 8, 10, 12, 16, 20
14453 + };
14454 + unsigned timeout;
14455 + unsigned dtocyc, dtomul;
14456 +
14457 + timeout = ns_to_clocks(host, data->timeout_ns) + data->timeout_clks;
14458 +
14459 + for (dtomul = 0; dtomul < 8; dtomul++) {
14460 + unsigned shift = dtomul_to_shift[dtomul];
14461 + dtocyc = (timeout + (1 << shift) - 1) >> shift;
14462 + if (dtocyc < 15)
14463 + break;
14464 + }
14465 +
14466 + if (dtomul >= 8) {
14467 + dtomul = 7;
14468 + dtocyc = 15;
14469 + }
14470 +
14471 + dev_dbg(&host->mmc->class_dev, "setting timeout to %u cycles\n",
14472 + dtocyc << dtomul_to_shift[dtomul]);
14473 + mci_writel(host, DTOR, (MCI_BF(DTOMUL, dtomul)
14474 + | MCI_BF(DTOCYC, dtocyc)));
14475 +}
14476 +
14477 +/*
14478 + * Return mask with command flags to be enabled for this command.
14479 + */
14480 +static u32 atmci_prepare_command(struct mmc_host *mmc,
14481 + struct mmc_command *cmd)
14482 +{
14483 + u32 cmdr;
14484 +
14485 + cmd->error = 0;
14486 +
14487 + cmdr = MCI_BF(CMDNB, cmd->opcode);
14488 +
14489 + if (cmd->flags & MMC_RSP_PRESENT) {
14490 + if (cmd->flags & MMC_RSP_136)
14491 + cmdr |= MCI_BF(RSPTYP, MCI_RSPTYP_136_BIT);
14492 + else
14493 + cmdr |= MCI_BF(RSPTYP, MCI_RSPTYP_48_BIT);
14494 + }
14495 +
14496 + /*
14497 + * This should really be MAXLAT_5 for CMD2 and ACMD41, but
14498 + * it's too difficult to determine whether this is an ACMD or
14499 + * not. Better make it 64.
14500 + */
14501 + cmdr |= MCI_BIT(MAXLAT);
14502 +
14503 + if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN)
14504 + cmdr |= MCI_BIT(OPDCMD);
14505 +
14506 + dev_dbg(&mmc->class_dev,
14507 + "cmd: op %02x arg %08x flags %08x, cmdflags %08lx\n",
14508 + cmd->opcode, cmd->arg, cmd->flags, (unsigned long)cmdr);
14509 +
14510 + return cmdr;
14511 +}
14512 +
14513 +static void atmci_start_command(struct atmel_mci *host,
14514 + struct mmc_command *cmd,
14515 + u32 cmd_flags)
14516 +{
14517 + WARN_ON(host->cmd);
14518 + host->cmd = cmd;
14519 +
14520 + mci_writel(host, ARGR, cmd->arg);
14521 + mci_writel(host, CMDR, cmd_flags);
14522 +
14523 + if (cmd->data)
14524 + dma_start_request(host->dma.req.req.dmac,
14525 + host->dma.req.req.channel);
14526 +}
14527 +
14528 +/*
14529 + * Returns a mask of flags to be set in the command register when the
14530 + * command to start the transfer is to be sent.
14531 + */
14532 +static u32 atmci_prepare_data(struct mmc_host *mmc, struct mmc_data *data)
14533 +{
14534 + struct atmel_mci *host = mmc_priv(mmc);
14535 + u32 cmd_flags;
14536 +
14537 + WARN_ON(host->data);
14538 + host->data = data;
14539 +
14540 + atmci_set_timeout(host, data);
14541 + mci_writel(host, BLKR, (MCI_BF(BCNT, data->blocks)
14542 + | MCI_BF(BLKLEN, data->blksz)));
14543 + host->dma.req.block_size = data->blksz;
14544 + host->dma.req.nr_blocks = data->blocks;
14545 +
14546 + cmd_flags = MCI_BF(TRCMD, MCI_TRCMD_START_TRANS);
14547 + if (data->flags & MMC_DATA_STREAM)
14548 + cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_STREAM);
14549 + else if (data->blocks > 1)
14550 + cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_MULTI_BLOCK);
14551 + else
14552 + cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_BLOCK);
14553 +
14554 + if (data->flags & MMC_DATA_READ) {
14555 + cmd_flags |= MCI_BIT(TRDIR);
14556 + host->dma.req.nr_sg
14557 + = dma_map_sg(&host->pdev->dev, data->sg,
14558 + data->sg_len, DMA_FROM_DEVICE);
14559 + host->dma.req.periph_id = host->dma.rx_periph_id;
14560 + host->dma.req.direction = DMA_DIR_PERIPH_TO_MEM;
14561 + host->dma.req.data_reg = host->mapbase + MCI_RDR;
14562 + } else {
14563 + host->dma.req.nr_sg
14564 + = dma_map_sg(&host->pdev->dev, data->sg,
14565 + data->sg_len, DMA_TO_DEVICE);
14566 + host->dma.req.periph_id = host->dma.tx_periph_id;
14567 + host->dma.req.direction = DMA_DIR_MEM_TO_PERIPH;
14568 + host->dma.req.data_reg = host->mapbase + MCI_TDR;
14569 + }
14570 + host->dma.req.sg = data->sg;
14571 +
14572 + dma_prepare_request_sg(host->dma.req.req.dmac, &host->dma.req);
14573 +
14574 + return cmd_flags;
14575 +}
14576 +
14577 +static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
14578 +{
14579 + struct atmel_mci *host = mmc_priv(mmc);
14580 + struct mmc_data *data = mrq->data;
14581 + u32 iflags;
14582 + u32 cmdflags = 0;
14583 +
14584 + iflags = mci_readl(host, IMR);
14585 + if (iflags)
14586 + dev_warn(&mmc->class_dev, "WARNING: IMR=0x%08x\n",
14587 + mci_readl(host, IMR));
14588 +
14589 + WARN_ON(host->mrq != NULL);
14590 +
14591 + /*
14592 + * We may "know" the card is gone even though there's still an
14593 + * electrical connection. If so, we really need to communicate
14594 + * this to the MMC core since there won't be any more
14595 + * interrupts as the card is completely removed. Otherwise,
14596 + * the MMC core might believe the card is still there even
14597 + * though the card was just removed very slowly.
14598 + */
14599 + if (!host->present) {
14600 + mrq->cmd->error = -ENOMEDIUM;
14601 + mmc_request_done(mmc, mrq);
14602 + return;
14603 + }
14604 +
14605 + host->mrq = mrq;
14606 + host->pending_events = 0;
14607 + host->completed_events = 0;
14608 +
14609 + iflags = MCI_BIT(CMDRDY);
14610 + cmdflags = atmci_prepare_command(mmc, mrq->cmd);
14611 +
14612 + if (mrq->stop) {
14613 + WARN_ON(!data);
14614 +
14615 + host->stop_cmdr = atmci_prepare_command(mmc, mrq->stop);
14616 + host->stop_cmdr |= MCI_BF(TRCMD, MCI_TRCMD_STOP_TRANS);
14617 + if (!(data->flags & MMC_DATA_WRITE))
14618 + host->stop_cmdr |= MCI_BIT(TRDIR);
14619 + if (data->flags & MMC_DATA_STREAM)
14620 + host->stop_cmdr |= MCI_BF(TRTYP, MCI_TRTYP_STREAM);
14621 + else
14622 + host->stop_cmdr |= MCI_BF(TRTYP, MCI_TRTYP_MULTI_BLOCK);
14623 + }
14624 + if (data) {
14625 + cmdflags |= atmci_prepare_data(mmc, data);
14626 + iflags |= MCI_DATA_ERROR_FLAGS;
14627 + }
14628 +
14629 + atmci_start_command(host, mrq->cmd, cmdflags);
14630 + mci_writel(host, IER, iflags);
14631 +}
14632 +
14633 +static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
14634 +{
14635 + struct atmel_mci *host = mmc_priv(mmc);
14636 + u32 mr;
14637 +
14638 + if (ios->clock) {
14639 + u32 clkdiv;
14640 +
14641 + /* Set clock rate */
14642 + clkdiv = DIV_ROUND_UP(host->bus_hz, 2 * ios->clock) - 1;
14643 + if (clkdiv > 255) {
14644 + dev_warn(&mmc->class_dev,
14645 + "clock %u too slow; using %lu\n",
14646 + ios->clock, host->bus_hz / (2 * 256));
14647 + clkdiv = 255;
14648 + }
14649 +
14650 + mr = mci_readl(host, MR);
14651 + mr = MCI_BFINS(CLKDIV, clkdiv, mr)
14652 + | MCI_BIT(WRPROOF) | MCI_BIT(RDPROOF);
14653 + mci_writel(host, MR, mr);
14654 +
14655 + /* Enable the MCI controller */
14656 + mci_writel(host, CR, MCI_BIT(MCIEN));
14657 + } else {
14658 + /* Disable the MCI controller */
14659 + mci_writel(host, CR, MCI_BIT(MCIDIS));
14660 + }
14661 +
14662 + switch (ios->bus_width) {
14663 + case MMC_BUS_WIDTH_1:
14664 + mci_writel(host, SDCR, 0);
14665 + break;
14666 + case MMC_BUS_WIDTH_4:
14667 + mci_writel(host, SDCR, MCI_BIT(SDCBUS));
14668 + break;
14669 + }
14670 +
14671 + switch (ios->power_mode) {
14672 + case MMC_POWER_ON:
14673 + /* Send init sequence (74 clock cycles) */
14674 + mci_writel(host, IDR, ~0UL);
14675 + mci_writel(host, CMDR, MCI_BF(SPCMD, MCI_SPCMD_INIT_CMD));
14676 + while (!(mci_readl(host, SR) & MCI_BIT(CMDRDY)))
14677 + cpu_relax();
14678 + break;
14679 + default:
14680 + /*
14681 + * TODO: None of the currently available AVR32-based
14682 + * boards allow MMC power to be turned off. Implement
14683 + * power control when this can be tested properly.
14684 + */
14685 + break;
14686 + }
14687 +}
14688 +
14689 +static int atmci_get_ro(struct mmc_host *mmc)
14690 +{
14691 + int read_only = 0;
14692 + struct atmel_mci *host = mmc_priv(mmc);
14693 +
14694 + if (host->wp_pin >= 0) {
14695 + read_only = gpio_get_value(host->wp_pin);
14696 + dev_dbg(&mmc->class_dev, "card is %s\n",
14697 + read_only ? "read-only" : "read-write");
14698 + } else {
14699 + dev_dbg(&mmc->class_dev,
14700 + "no pin for checking read-only switch."
14701 + " Assuming write-enable.\n");
14702 + }
14703 +
14704 + return read_only;
14705 +}
14706 +
14707 +static struct mmc_host_ops atmci_ops = {
14708 + .request = atmci_request,
14709 + .set_ios = atmci_set_ios,
14710 + .get_ro = atmci_get_ro,
14711 +};
14712 +
14713 +static void atmci_request_end(struct mmc_host *mmc, struct mmc_request *mrq)
14714 +{
14715 + struct atmel_mci *host = mmc_priv(mmc);
14716 +
14717 + WARN_ON(host->cmd || host->data);
14718 + host->mrq = NULL;
14719 +
14720 + mmc_request_done(mmc, mrq);
14721 +}
14722 +
14723 +static void send_stop_cmd(struct mmc_host *mmc, struct mmc_data *data,
14724 + u32 flags)
14725 +{
14726 + struct atmel_mci *host = mmc_priv(mmc);
14727 +
14728 + atmci_start_command(host, data->stop, host->stop_cmdr | flags);
14729 + mci_writel(host, IER, MCI_BIT(CMDRDY));
14730 +}
14731 +
14732 +static void atmci_data_complete(struct atmel_mci *host, struct mmc_data *data)
14733 +{
14734 + host->data = NULL;
14735 + dma_unmap_sg(&host->pdev->dev, data->sg, host->dma.req.nr_sg,
14736 + ((data->flags & MMC_DATA_WRITE)
14737 + ? DMA_TO_DEVICE : DMA_FROM_DEVICE));
14738 +
14739 + /*
14740 + * Data might complete before command for very short transfers
14741 + * (like READ_SCR)
14742 + */
14743 + if (mci_cmd_is_complete(host)
14744 + && (!data->stop || mci_stop_is_complete(host)))
14745 + atmci_request_end(host->mmc, data->mrq);
14746 +}
14747 +
14748 +static void atmci_command_complete(struct atmel_mci *host,
14749 + struct mmc_command *cmd, u32 status)
14750 +{
14751 + if (status & MCI_BIT(RTOE))
14752 + cmd->error = -ETIMEDOUT;
14753 + else if ((cmd->flags & MMC_RSP_CRC)
14754 + && (status & MCI_BIT(RCRCE)))
14755 + cmd->error = -EILSEQ;
14756 + else if (status & (MCI_BIT(RINDE) | MCI_BIT(RDIRE) | MCI_BIT(RENDE)))
14757 + cmd->error = -EIO;
14758 +
14759 + if (cmd->error) {
14760 + dev_dbg(&host->mmc->class_dev,
14761 + "command error: op=0x%x status=0x%08x\n",
14762 + cmd->opcode, status);
14763 +
14764 + if (cmd->data) {
14765 + dma_stop_request(host->dma.req.req.dmac,
14766 + host->dma.req.req.channel);
14767 + mci_writel(host, IDR, MCI_BIT(NOTBUSY)
14768 + | MCI_DATA_ERROR_FLAGS);
14769 + host->data = NULL;
14770 + }
14771 + }
14772 +}
14773 +
14774 +static void atmci_detect_change(unsigned long data)
14775 +{
14776 + struct atmel_mci *host = (struct atmel_mci *)data;
14777 + struct mmc_request *mrq = host->mrq;
14778 + int present;
14779 +
14780 + /*
14781 + * atmci_remove() sets detect_pin to -1 before freeing the
14782 + * interrupt. We must not re-enable the interrupt if it has
14783 + * been freed.
14784 + */
14785 + smp_rmb();
14786 + if (host->detect_pin < 0)
14787 + return;
14788 +
14789 + enable_irq(gpio_to_irq(host->detect_pin));
14790 + present = !gpio_get_value(host->detect_pin);
14791 +
14792 + dev_vdbg(&host->pdev->dev, "detect change: %d (was %d)\n",
14793 + present, host->present);
14794 +
14795 + if (present != host->present) {
14796 + dev_dbg(&host->mmc->class_dev, "card %s\n",
14797 + present ? "inserted" : "removed");
14798 + host->present = present;
14799 +
14800 + /* Reset controller if card is gone */
14801 + if (!present) {
14802 + mci_writel(host, CR, MCI_BIT(SWRST));
14803 + mci_writel(host, IDR, ~0UL);
14804 + mci_writel(host, CR, MCI_BIT(MCIEN));
14805 + }
14806 +
14807 + /* Clean up queue if present */
14808 + if (mrq) {
14809 + if (!mci_cmd_is_complete(host))
14810 + mrq->cmd->error = -ENOMEDIUM;
14811 + if (mrq->data && !mci_data_is_complete(host)
14812 + && !mci_data_error_is_complete(host)) {
14813 + dma_stop_request(host->dma.req.req.dmac,
14814 + host->dma.req.req.channel);
14815 + host->data->error = -ENOMEDIUM;
14816 + atmci_data_complete(host, host->data);
14817 + }
14818 + if (mrq->stop && !mci_stop_is_complete(host))
14819 + mrq->stop->error = -ENOMEDIUM;
14820 +
14821 + host->cmd = NULL;
14822 + atmci_request_end(host->mmc, mrq);
14823 + }
14824 +
14825 + mmc_detect_change(host->mmc, 0);
14826 + }
14827 +}
14828 +
14829 +static void atmci_tasklet_func(unsigned long priv)
14830 +{
14831 + struct mmc_host *mmc = (struct mmc_host *)priv;
14832 + struct atmel_mci *host = mmc_priv(mmc);
14833 + struct mmc_request *mrq = host->mrq;
14834 + struct mmc_data *data = host->data;
14835 +
14836 + dev_vdbg(&mmc->class_dev,
14837 + "tasklet: pending/completed/mask %lx/%lx/%x\n",
14838 + host->pending_events, host->completed_events,
14839 + mci_readl(host, IMR));
14840 +
14841 + if (mci_clear_cmd_is_pending(host)) {
14842 + mci_set_cmd_complete(host);
14843 + atmci_command_complete(host, mrq->cmd, host->cmd_status);
14844 + if (!host->data || mci_data_is_complete(host)
14845 + || mci_data_error_is_complete(host))
14846 + atmci_request_end(mmc, mrq);
14847 + }
14848 + if (mci_clear_stop_is_pending(host)) {
14849 + mci_set_stop_complete(host);
14850 + atmci_command_complete(host, mrq->stop, host->stop_status);
14851 + if (mci_data_is_complete(host)
14852 + || mci_data_error_is_complete(host))
14853 + atmci_request_end(mmc, mrq);
14854 + }
14855 + if (mci_clear_dma_error_is_pending(host)) {
14856 + mci_set_dma_error_complete(host);
14857 + mci_clear_data_pending(host);
14858 +
14859 + /* DMA controller got bus error => invalid address */
14860 + data->error = -EIO;
14861 +
14862 + dev_dbg(&mmc->class_dev, "dma error after %u bytes xfered\n",
14863 + host->data->bytes_xfered);
14864 +
14865 + if (data->stop
14866 + && !mci_set_stop_sent_is_completed(host))
14867 + /* TODO: Check if card is still present */
14868 + send_stop_cmd(host->mmc, data, 0);
14869 +
14870 + atmci_data_complete(host, data);
14871 + }
14872 + if (mci_clear_data_error_is_pending(host)) {
14873 + u32 status = host->data_status;
14874 +
14875 + mci_set_data_error_complete(host);
14876 + mci_clear_data_pending(host);
14877 +
14878 + dma_stop_request(host->dma.req.req.dmac,
14879 + host->dma.req.req.channel);
14880 +
14881 + if (status & MCI_BIT(DCRCE)) {
14882 + dev_dbg(&mmc->class_dev, "data CRC error\n");
14883 + data->error = -EILSEQ;
14884 + } else if (status & MCI_BIT(DTOE)) {
14885 + dev_dbg(&mmc->class_dev, "data timeout error\n");
14886 + data->error = -ETIMEDOUT;
14887 + } else {
14888 + dev_dbg(&mmc->class_dev, "data FIFO error\n");
14889 + data->error = -EIO;
14890 + }
14891 + dev_dbg(&mmc->class_dev, "bytes xfered: %u\n",
14892 + data->bytes_xfered);
14893 +
14894 + if (data->stop
14895 + && !mci_set_stop_sent_is_completed(host))
14896 + /* TODO: Check if card is still present */
14897 + send_stop_cmd(host->mmc, data, 0);
14898 +
14899 + atmci_data_complete(host, data);
14900 + }
14901 + if (mci_clear_data_is_pending(host)) {
14902 + mci_set_data_complete(host);
14903 + data->bytes_xfered = data->blocks * data->blksz;
14904 + atmci_data_complete(host, data);
14905 + }
14906 +}
14907 +
14908 +static void atmci_cmd_interrupt(struct mmc_host *mmc, u32 status)
14909 +{
14910 + struct atmel_mci *host = mmc_priv(mmc);
14911 + struct mmc_command *cmd = host->cmd;
14912 +
14913 + /*
14914 + * Read the response now so that we're free to send a new
14915 + * command immediately.
14916 + */
14917 + cmd->resp[0] = mci_readl(host, RSPR);
14918 + cmd->resp[1] = mci_readl(host, RSPR);
14919 + cmd->resp[2] = mci_readl(host, RSPR);
14920 + cmd->resp[3] = mci_readl(host, RSPR);
14921 +
14922 + mci_writel(host, IDR, MCI_BIT(CMDRDY));
14923 + host->cmd = NULL;
14924 +
14925 + if (mci_stop_sent_is_complete(host)) {
14926 + host->stop_status = status;
14927 + mci_set_stop_pending(host);
14928 + } else {
14929 + struct mmc_request *mrq = host->mrq;
14930 +
14931 + if (mrq->stop && mci_dma_is_complete(host)
14932 + && !mci_set_stop_sent_is_completed(host))
14933 + send_stop_cmd(host->mmc, mrq->data, 0);
14934 + host->cmd_status = status;
14935 + mci_set_cmd_pending(host);
14936 + }
14937 +
14938 + tasklet_schedule(&host->tasklet);
14939 +}
14940 +
14941 +static void atmci_xfer_complete(struct dma_request *_req)
14942 +{
14943 + struct dma_request_sg *req = to_dma_request_sg(_req);
14944 + struct atmel_mci_dma *dma;
14945 + struct atmel_mci *host;
14946 + struct mmc_data *data;
14947 +
14948 + dma = container_of(req, struct atmel_mci_dma, req);
14949 + host = container_of(dma, struct atmel_mci, dma);
14950 + data = host->data;
14951 +
14952 + /*
14953 + * This callback may be called before we see the CMDRDY
14954 + * interrupt under heavy irq load (possibly caused by other
14955 + * drivers) or when interrupts are disabled for a long time.
14956 + */
14957 + mci_set_dma_complete(host);
14958 + if (data->stop && mci_cmd_is_complete(host)
14959 + && !mci_set_stop_sent_is_completed(host))
14960 + send_stop_cmd(host->mmc, data, 0);
14961 +
14962 + /*
14963 + * Regardless of what the documentation says, we have to wait
14964 + * for NOTBUSY even after block read operations.
14965 + *
14966 + * When the DMA transfer is complete, the controller may still
14967 + * be reading the CRC from the card, i.e. the data transfer is
14968 + * still in progress and we haven't seen all the potential
14969 + * error bits yet.
14970 + */
14971 + mci_writel(host, IER, MCI_BIT(NOTBUSY));
14972 +}
14973 +
14974 +static void atmci_dma_error(struct dma_request *_req)
14975 +{
14976 + struct dma_request_sg *req = to_dma_request_sg(_req);
14977 + struct atmel_mci_dma *dma;
14978 + struct atmel_mci *host;
14979 +
14980 + dma = container_of(req, struct atmel_mci_dma, req);
14981 + host = container_of(dma, struct atmel_mci, dma);
14982 +
14983 + mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
14984 + | MCI_DATA_ERROR_FLAGS));
14985 +
14986 + mci_set_dma_error_pending(host);
14987 + tasklet_schedule(&host->tasklet);
14988 +}
14989 +
14990 +static irqreturn_t atmci_interrupt(int irq, void *dev_id)
14991 +{
14992 + struct mmc_host *mmc = dev_id;
14993 + struct atmel_mci *host = mmc_priv(mmc);
14994 + u32 status, mask, pending;
14995 +
14996 + spin_lock(&mmc->lock);
14997 +
14998 + status = mci_readl(host, SR);
14999 + mask = mci_readl(host, IMR);
15000 + pending = status & mask;
15001 +
15002 + do {
15003 + if (pending & MCI_DATA_ERROR_FLAGS) {
15004 + mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
15005 + | MCI_DATA_ERROR_FLAGS));
15006 + host->data_status = status;
15007 + mci_set_data_error_pending(host);
15008 + tasklet_schedule(&host->tasklet);
15009 + break;
15010 + }
15011 + if (pending & MCI_BIT(CMDRDY))
15012 + atmci_cmd_interrupt(mmc, status);
15013 + if (pending & MCI_BIT(NOTBUSY)) {
15014 + mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
15015 + | MCI_DATA_ERROR_FLAGS));
15016 + mci_set_data_pending(host);
15017 + tasklet_schedule(&host->tasklet);
15018 + }
15019 +
15020 + status = mci_readl(host, SR);
15021 + mask = mci_readl(host, IMR);
15022 + pending = status & mask;
15023 + } while (pending);
15024 +
15025 + spin_unlock(&mmc->lock);
15026 +
15027 + return IRQ_HANDLED;
15028 +}
15029 +
15030 +static irqreturn_t atmci_detect_interrupt(int irq, void *dev_id)
15031 +{
15032 + struct mmc_host *mmc = dev_id;
15033 + struct atmel_mci *host = mmc_priv(mmc);
15034 +
15035 + /*
15036 + * Disable interrupts until the pin has stabilized and check
15037 + * the state then. Use mod_timer() since we may be in the
15038 + * middle of the timer routine when this interrupt triggers.
15039 + */
15040 + disable_irq_nosync(irq);
15041 + mod_timer(&host->detect_timer, jiffies + msecs_to_jiffies(20));
15042 +
15043 + return IRQ_HANDLED;
15044 +}
15045 +
15046 +static int __devinit atmci_probe(struct platform_device *pdev)
15047 +{
15048 + struct mci_platform_data *board;
15049 + struct atmel_mci *host;
15050 + struct mmc_host *mmc;
15051 + struct resource *regs;
15052 + int irq;
15053 + int ret;
15054 +
15055 + regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
15056 + if (!regs)
15057 + return -ENXIO;
15058 + irq = platform_get_irq(pdev, 0);
15059 + if (irq < 0)
15060 + return irq;
15061 +
15062 + board = pdev->dev.platform_data;
15063 +
15064 + mmc = mmc_alloc_host(sizeof(struct atmel_mci), &pdev->dev);
15065 + if (!mmc)
15066 + return -ENOMEM;
15067 +
15068 + host = mmc_priv(mmc);
15069 + host->pdev = pdev;
15070 + host->mmc = mmc;
15071 + if (board) {
15072 + host->detect_pin = board->detect_pin;
15073 + host->wp_pin = board->wp_pin;
15074 + } else {
15075 + host->detect_pin = -1;
15076 + host->wp_pin = -1;
15077 + }
15078 +
15079 + host->mck = clk_get(&pdev->dev, "mci_clk");
15080 + if (IS_ERR(host->mck)) {
15081 + ret = PTR_ERR(host->mck);
15082 + goto out_free_host;
15083 + }
15084 + clk_enable(host->mck);
15085 +
15086 + ret = -ENOMEM;
15087 + host->regs = ioremap(regs->start, regs->end - regs->start + 1);
15088 + if (!host->regs)
15089 + goto out_disable_clk;
15090 +
15091 + host->bus_hz = clk_get_rate(host->mck);
15092 + host->mapbase = regs->start;
15093 +
15094 + mmc->ops = &atmci_ops;
15095 + mmc->f_min = (host->bus_hz + 511) / 512;
15096 + mmc->f_max = min((unsigned int)(host->bus_hz / 2), fmax);
15097 + mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
15098 + mmc->caps |= MMC_CAP_4_BIT_DATA;
15099 +
15100 + tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)mmc);
15101 +
15102 + ret = request_irq(irq, atmci_interrupt, 0, "mmci", mmc);
15103 + if (ret)
15104 + goto out_unmap;
15105 +
15106 + /* Assume card is present if we don't have a detect pin */
15107 + host->present = 1;
15108 + if (host->detect_pin >= 0) {
15109 + if (gpio_request(host->detect_pin, "mmc_detect")) {
15110 + dev_dbg(&mmc->class_dev, "no detect pin available\n");
15111 + host->detect_pin = -1;
15112 + } else {
15113 + host->present = !gpio_get_value(host->detect_pin);
15114 + }
15115 + }
15116 + if (host->wp_pin >= 0) {
15117 + if (gpio_request(host->wp_pin, "mmc_wp")) {
15118 + dev_dbg(&mmc->class_dev, "no WP pin available\n");
15119 + host->wp_pin = -1;
15120 + }
15121 + }
15122 +
15123 + /* TODO: Get this information from platform data */
15124 + ret = -ENOMEM;
15125 + host->dma.req.req.dmac = find_dma_controller(0);
15126 + if (!host->dma.req.req.dmac) {
15127 + dev_dbg(&mmc->class_dev, "no DMA controller available\n");
15128 + goto out_free_irq;
15129 + }
15130 + ret = dma_alloc_channel(host->dma.req.req.dmac);
15131 + if (ret < 0) {
15132 + dev_dbg(&mmc->class_dev, "unable to allocate DMA channel\n");
15133 + goto out_free_irq;
15134 + }
15135 + host->dma.req.req.channel = ret;
15136 + host->dma.req.width = DMA_WIDTH_32BIT;
15137 + host->dma.req.req.xfer_complete = atmci_xfer_complete;
15138 + host->dma.req.req.block_complete = NULL; // atmci_block_complete;
15139 + host->dma.req.req.error = atmci_dma_error;
15140 + host->dma.rx_periph_id = 0;
15141 + host->dma.tx_periph_id = 1;
15142 +
15143 + mci_writel(host, CR, MCI_BIT(SWRST));
15144 + mci_writel(host, IDR, ~0UL);
15145 +
15146 + platform_set_drvdata(pdev, host);
15147 +
15148 + mmc_add_host(mmc);
15149 +
15150 + if (host->detect_pin >= 0) {
15151 + setup_timer(&host->detect_timer, atmci_detect_change,
15152 + (unsigned long)host);
15153 +
15154 + ret = request_irq(gpio_to_irq(host->detect_pin),
15155 + atmci_detect_interrupt,
15156 + IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
15157 + DRIVER_NAME, mmc);
15158 + if (ret) {
15159 + dev_dbg(&mmc->class_dev,
15160 + "could not request IRQ %d for detect pin\n",
15161 + gpio_to_irq(host->detect_pin));
15162 + gpio_free(host->detect_pin);
15163 + host->detect_pin = -1;
15164 + }
15165 + }
15166 +
15167 + dev_info(&mmc->class_dev, "Atmel MCI controller at 0x%08lx irq %d\n",
15168 + host->mapbase, irq);
15169 +
15170 + atmci_init_debugfs(host);
15171 +
15172 + return 0;
15173 +
15174 +out_free_irq:
15175 + if (host->detect_pin >= 0)
15176 + gpio_free(host->detect_pin);
15177 + if (host->wp_pin >= 0)
15178 + gpio_free(host->wp_pin);
15179 + free_irq(irq, mmc);
15180 +out_unmap:
15181 + iounmap(host->regs);
15182 +out_disable_clk:
15183 + clk_disable(host->mck);
15184 + clk_put(host->mck);
15185 +out_free_host:
15186 + mmc_free_host(mmc);
15187 + return ret;
15188 +}
15189 +
15190 +static int __devexit atmci_remove(struct platform_device *pdev)
15191 +{
15192 + struct atmel_mci *host = platform_get_drvdata(pdev);
15193 +
15194 + platform_set_drvdata(pdev, NULL);
15195 +
15196 + if (host) {
15197 + atmci_cleanup_debugfs(host);
15198 +
15199 + if (host->detect_pin >= 0) {
15200 + int pin = host->detect_pin;
15201 +
15202 + /* Make sure our timer doesn't enable the interrupt */
15203 + host->detect_pin = -1;
15204 + smp_wmb();
15205 +
15206 + free_irq(gpio_to_irq(pin), host->mmc);
15207 + del_timer_sync(&host->detect_timer);
15208 + cancel_delayed_work(&host->mmc->detect);
15209 + gpio_free(pin);
15210 + }
15211 +
15212 + mmc_remove_host(host->mmc);
15213 +
15214 + mci_writel(host, IDR, ~0UL);
15215 + mci_writel(host, CR, MCI_BIT(MCIDIS));
15216 + mci_readl(host, SR);
15217 +
15218 + dma_release_channel(host->dma.req.req.dmac,
15219 + host->dma.req.req.channel);
15220 +
15221 + if (host->wp_pin >= 0)
15222 + gpio_free(host->wp_pin);
15223 +
15224 + free_irq(platform_get_irq(pdev, 0), host->mmc);
15225 + iounmap(host->regs);
15226 +
15227 + clk_disable(host->mck);
15228 + clk_put(host->mck);
15229 +
15230 + mmc_free_host(host->mmc);
15231 + }
15232 + return 0;
15233 +}
15234 +
15235 +static struct platform_driver atmci_driver = {
15236 + .probe = atmci_probe,
15237 + .remove = __devexit_p(atmci_remove),
15238 + .driver = {
15239 + .name = DRIVER_NAME,
15240 + },
15241 +};
15242 +
15243 +static int __init atmci_init(void)
15244 +{
15245 + return platform_driver_register(&atmci_driver);
15246 +}
15247 +
15248 +static void __exit atmci_exit(void)
15249 +{
15250 + platform_driver_unregister(&atmci_driver);
15251 +}
15252 +
15253 +module_init(atmci_init);
15254 +module_exit(atmci_exit);
15255 +
15256 +MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver");
15257 +MODULE_LICENSE("GPL");
15258 diff -urN linux-2.6.24.3/drivers/mmc/host/atmel-mci.h avr32-2.6/drivers/mmc/host/atmel-mci.h
15259 --- linux-2.6.24.3/drivers/mmc/host/atmel-mci.h 1970-01-01 01:00:00.000000000 +0100
15260 +++ avr32-2.6/drivers/mmc/host/atmel-mci.h 2008-04-23 19:33:40.000000000 +0200
15261 @@ -0,0 +1,192 @@
15262 +/*
15263 + * Atmel MultiMedia Card Interface driver
15264 + *
15265 + * Copyright (C) 2004-2006 Atmel Corporation
15266 + *
15267 + * This program is free software; you can redistribute it and/or modify
15268 + * it under the terms of the GNU General Public License version 2 as
15269 + * published by the Free Software Foundation.
15270 + */
15271 +#ifndef __DRIVERS_MMC_ATMEL_MCI_H__
15272 +#define __DRIVERS_MMC_ATMEL_MCI_H__
15273 +
15274 +/* MCI register offsets */
15275 +#define MCI_CR 0x0000
15276 +#define MCI_MR 0x0004
15277 +#define MCI_DTOR 0x0008
15278 +#define MCI_SDCR 0x000c
15279 +#define MCI_ARGR 0x0010
15280 +#define MCI_CMDR 0x0014
15281 +#define MCI_BLKR 0x0018
15282 +#define MCI_RSPR 0x0020
15283 +#define MCI_RSPR1 0x0024
15284 +#define MCI_RSPR2 0x0028
15285 +#define MCI_RSPR3 0x002c
15286 +#define MCI_RDR 0x0030
15287 +#define MCI_TDR 0x0034
15288 +#define MCI_SR 0x0040
15289 +#define MCI_IER 0x0044
15290 +#define MCI_IDR 0x0048
15291 +#define MCI_IMR 0x004c
15292 +
15293 +/* Bitfields in CR */
15294 +#define MCI_MCIEN_OFFSET 0
15295 +#define MCI_MCIEN_SIZE 1
15296 +#define MCI_MCIDIS_OFFSET 1
15297 +#define MCI_MCIDIS_SIZE 1
15298 +#define MCI_PWSEN_OFFSET 2
15299 +#define MCI_PWSEN_SIZE 1
15300 +#define MCI_PWSDIS_OFFSET 3
15301 +#define MCI_PWSDIS_SIZE 1
15302 +#define MCI_SWRST_OFFSET 7
15303 +#define MCI_SWRST_SIZE 1
15304 +
15305 +/* Bitfields in MR */
15306 +#define MCI_CLKDIV_OFFSET 0
15307 +#define MCI_CLKDIV_SIZE 8
15308 +#define MCI_PWSDIV_OFFSET 8
15309 +#define MCI_PWSDIV_SIZE 3
15310 +#define MCI_RDPROOF_OFFSET 11
15311 +#define MCI_RDPROOF_SIZE 1
15312 +#define MCI_WRPROOF_OFFSET 12
15313 +#define MCI_WRPROOF_SIZE 1
15314 +#define MCI_DMAPADV_OFFSET 14
15315 +#define MCI_DMAPADV_SIZE 1
15316 +#define MCI_BLKLEN_OFFSET 16
15317 +#define MCI_BLKLEN_SIZE 16
15318 +
15319 +/* Bitfields in DTOR */
15320 +#define MCI_DTOCYC_OFFSET 0
15321 +#define MCI_DTOCYC_SIZE 4
15322 +#define MCI_DTOMUL_OFFSET 4
15323 +#define MCI_DTOMUL_SIZE 3
15324 +
15325 +/* Bitfields in SDCR */
15326 +#define MCI_SDCSEL_OFFSET 0
15327 +#define MCI_SDCSEL_SIZE 4
15328 +#define MCI_SDCBUS_OFFSET 7
15329 +#define MCI_SDCBUS_SIZE 1
15330 +
15331 +/* Bitfields in ARGR */
15332 +#define MCI_ARG_OFFSET 0
15333 +#define MCI_ARG_SIZE 32
15334 +
15335 +/* Bitfields in CMDR */
15336 +#define MCI_CMDNB_OFFSET 0
15337 +#define MCI_CMDNB_SIZE 6
15338 +#define MCI_RSPTYP_OFFSET 6
15339 +#define MCI_RSPTYP_SIZE 2
15340 +#define MCI_SPCMD_OFFSET 8
15341 +#define MCI_SPCMD_SIZE 3
15342 +#define MCI_OPDCMD_OFFSET 11
15343 +#define MCI_OPDCMD_SIZE 1
15344 +#define MCI_MAXLAT_OFFSET 12
15345 +#define MCI_MAXLAT_SIZE 1
15346 +#define MCI_TRCMD_OFFSET 16
15347 +#define MCI_TRCMD_SIZE 2
15348 +#define MCI_TRDIR_OFFSET 18
15349 +#define MCI_TRDIR_SIZE 1
15350 +#define MCI_TRTYP_OFFSET 19
15351 +#define MCI_TRTYP_SIZE 2
15352 +
15353 +/* Bitfields in BLKR */
15354 +#define MCI_BCNT_OFFSET 0
15355 +#define MCI_BCNT_SIZE 16
15356 +
15357 +/* Bitfields in RSPRn */
15358 +#define MCI_RSP_OFFSET 0
15359 +#define MCI_RSP_SIZE 32
15360 +
15361 +/* Bitfields in SR/IER/IDR/IMR */
15362 +#define MCI_CMDRDY_OFFSET 0
15363 +#define MCI_CMDRDY_SIZE 1
15364 +#define MCI_RXRDY_OFFSET 1
15365 +#define MCI_RXRDY_SIZE 1
15366 +#define MCI_TXRDY_OFFSET 2
15367 +#define MCI_TXRDY_SIZE 1
15368 +#define MCI_BLKE_OFFSET 3
15369 +#define MCI_BLKE_SIZE 1
15370 +#define MCI_DTIP_OFFSET 4
15371 +#define MCI_DTIP_SIZE 1
15372 +#define MCI_NOTBUSY_OFFSET 5
15373 +#define MCI_NOTBUSY_SIZE 1
15374 +#define MCI_ENDRX_OFFSET 6
15375 +#define MCI_ENDRX_SIZE 1
15376 +#define MCI_ENDTX_OFFSET 7
15377 +#define MCI_ENDTX_SIZE 1
15378 +#define MCI_RXBUFF_OFFSET 14
15379 +#define MCI_RXBUFF_SIZE 1
15380 +#define MCI_TXBUFE_OFFSET 15
15381 +#define MCI_TXBUFE_SIZE 1
15382 +#define MCI_RINDE_OFFSET 16
15383 +#define MCI_RINDE_SIZE 1
15384 +#define MCI_RDIRE_OFFSET 17
15385 +#define MCI_RDIRE_SIZE 1
15386 +#define MCI_RCRCE_OFFSET 18
15387 +#define MCI_RCRCE_SIZE 1
15388 +#define MCI_RENDE_OFFSET 19
15389 +#define MCI_RENDE_SIZE 1
15390 +#define MCI_RTOE_OFFSET 20
15391 +#define MCI_RTOE_SIZE 1
15392 +#define MCI_DCRCE_OFFSET 21
15393 +#define MCI_DCRCE_SIZE 1
15394 +#define MCI_DTOE_OFFSET 22
15395 +#define MCI_DTOE_SIZE 1
15396 +#define MCI_OVRE_OFFSET 30
15397 +#define MCI_OVRE_SIZE 1
15398 +#define MCI_UNRE_OFFSET 31
15399 +#define MCI_UNRE_SIZE 1
15400 +
15401 +/* Constants for DTOMUL */
15402 +#define MCI_DTOMUL_1_CYCLE 0
15403 +#define MCI_DTOMUL_16_CYCLES 1
15404 +#define MCI_DTOMUL_128_CYCLES 2
15405 +#define MCI_DTOMUL_256_CYCLES 3
15406 +#define MCI_DTOMUL_1024_CYCLES 4
15407 +#define MCI_DTOMUL_4096_CYCLES 5
15408 +#define MCI_DTOMUL_65536_CYCLES 6
15409 +#define MCI_DTOMUL_1048576_CYCLES 7
15410 +
15411 +/* Constants for RSPTYP */
15412 +#define MCI_RSPTYP_NO_RESP 0
15413 +#define MCI_RSPTYP_48_BIT 1
15414 +#define MCI_RSPTYP_136_BIT 2
15415 +
15416 +/* Constants for SPCMD */
15417 +#define MCI_SPCMD_NO_SPEC_CMD 0
15418 +#define MCI_SPCMD_INIT_CMD 1
15419 +#define MCI_SPCMD_SYNC_CMD 2
15420 +#define MCI_SPCMD_INT_CMD 4
15421 +#define MCI_SPCMD_INT_RESP 5
15422 +
15423 +/* Constants for TRCMD */
15424 +#define MCI_TRCMD_NO_TRANS 0
15425 +#define MCI_TRCMD_START_TRANS 1
15426 +#define MCI_TRCMD_STOP_TRANS 2
15427 +
15428 +/* Constants for TRTYP */
15429 +#define MCI_TRTYP_BLOCK 0
15430 +#define MCI_TRTYP_MULTI_BLOCK 1
15431 +#define MCI_TRTYP_STREAM 2
15432 +
15433 +/* Bit manipulation macros */
15434 +#define MCI_BIT(name) \
15435 + (1 << MCI_##name##_OFFSET)
15436 +#define MCI_BF(name,value) \
15437 + (((value) & ((1 << MCI_##name##_SIZE) - 1)) \
15438 + << MCI_##name##_OFFSET)
15439 +#define MCI_BFEXT(name,value) \
15440 + (((value) >> MCI_##name##_OFFSET) \
15441 + & ((1 << MCI_##name##_SIZE) - 1))
15442 +#define MCI_BFINS(name,value,old) \
15443 + (((old) & ~(((1 << MCI_##name##_SIZE) - 1) \
15444 + << MCI_##name##_OFFSET)) \
15445 + | MCI_BF(name,value))
15446 +
15447 +/* Register access macros */
15448 +#define mci_readl(port,reg) \
15449 + __raw_readl((port)->regs + MCI_##reg)
15450 +#define mci_writel(port,reg,value) \
15451 + __raw_writel((value), (port)->regs + MCI_##reg)
15452 +
15453 +#endif /* __DRIVERS_MMC_ATMEL_MCI_H__ */
15454 diff -urN linux-2.6.24.3/drivers/mmc/host/Kconfig avr32-2.6/drivers/mmc/host/Kconfig
15455 --- linux-2.6.24.3/drivers/mmc/host/Kconfig 2008-02-26 01:20:20.000000000 +0100
15456 +++ avr32-2.6/drivers/mmc/host/Kconfig 2008-04-23 19:33:40.000000000 +0200
15457 @@ -91,6 +91,16 @@
15458
15459 If unsure, say N.
15460
15461 +config MMC_ATMELMCI
15462 + tristate "Atmel Multimedia Card Interface support"
15463 + depends on AVR32 && MMC
15464 + help
15465 + This selects the Atmel Multimedia Card Interface. If you have
15466 + a AT91 (ARM) or AT32 (AVR32) platform with a Multimedia Card
15467 + slot, say Y or M here.
15468 +
15469 + If unsure, say N.
15470 +
15471 config MMC_IMX
15472 tristate "Motorola i.MX Multimedia Card Interface support"
15473 depends on ARCH_IMX
15474 diff -urN linux-2.6.24.3/drivers/mmc/host/Makefile avr32-2.6/drivers/mmc/host/Makefile
15475 --- linux-2.6.24.3/drivers/mmc/host/Makefile 2008-02-26 01:20:20.000000000 +0100
15476 +++ avr32-2.6/drivers/mmc/host/Makefile 2008-04-23 19:33:40.000000000 +0200
15477 @@ -15,6 +15,7 @@
15478 obj-$(CONFIG_MMC_AU1X) += au1xmmc.o
15479 obj-$(CONFIG_MMC_OMAP) += omap.o
15480 obj-$(CONFIG_MMC_AT91) += at91_mci.o
15481 +obj-$(CONFIG_MMC_ATMELMCI) += atmel-mci.o
15482 obj-$(CONFIG_MMC_TIFM_SD) += tifm_sd.o
15483 obj-$(CONFIG_MMC_SPI) += mmc_spi.o
15484
15485 diff -urN linux-2.6.24.3/drivers/mtd/chips/cfi_cmdset_0001.c avr32-2.6/drivers/mtd/chips/cfi_cmdset_0001.c
15486 --- linux-2.6.24.3/drivers/mtd/chips/cfi_cmdset_0001.c 2008-02-26 01:20:20.000000000 +0100
15487 +++ avr32-2.6/drivers/mtd/chips/cfi_cmdset_0001.c 2008-04-23 20:12:41.000000000 +0200
15488 @@ -50,6 +50,7 @@
15489 #define I82802AC 0x00ac
15490 #define MANUFACTURER_ST 0x0020
15491 #define M50LPW080 0x002F
15492 +#define AT49BV640D 0x02de
15493
15494 static int cfi_intelext_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
15495 static int cfi_intelext_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
15496 @@ -157,6 +158,47 @@
15497 }
15498 #endif
15499
15500 +/* Atmel chips don't use the same PRI format as Intel chips */
15501 +static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param)
15502 +{
15503 + struct map_info *map = mtd->priv;
15504 + struct cfi_private *cfi = map->fldrv_priv;
15505 + struct cfi_pri_intelext *extp = cfi->cmdset_priv;
15506 + struct cfi_pri_atmel atmel_pri;
15507 + uint32_t features = 0;
15508 +
15509 + /* Reverse byteswapping */
15510 + extp->FeatureSupport = cpu_to_le32(extp->FeatureSupport);
15511 + extp->BlkStatusRegMask = cpu_to_le16(extp->BlkStatusRegMask);
15512 + extp->ProtRegAddr = cpu_to_le16(extp->ProtRegAddr);
15513 +
15514 + memcpy(&atmel_pri, extp, sizeof(atmel_pri));
15515 + memset((char *)extp + 5, 0, sizeof(*extp) - 5);
15516 +
15517 + printk(KERN_ERR "atmel Features: %02x\n", atmel_pri.Features);
15518 +
15519 + if (atmel_pri.Features & 0x01) /* chip erase supported */
15520 + features |= (1<<0);
15521 + if (atmel_pri.Features & 0x02) /* erase suspend supported */
15522 + features |= (1<<1);
15523 + if (atmel_pri.Features & 0x04) /* program suspend supported */
15524 + features |= (1<<2);
15525 + if (atmel_pri.Features & 0x08) /* simultaneous operations supported */
15526 + features |= (1<<9);
15527 + if (atmel_pri.Features & 0x20) /* page mode read supported */
15528 + features |= (1<<7);
15529 + if (atmel_pri.Features & 0x40) /* queued erase supported */
15530 + features |= (1<<4);
15531 + if (atmel_pri.Features & 0x80) /* Protection bits supported */
15532 + features |= (1<<6);
15533 +
15534 + extp->FeatureSupport = features;
15535 +
15536 + /* burst write mode not supported */
15537 + cfi->cfiq->BufWriteTimeoutTyp = 0;
15538 + cfi->cfiq->BufWriteTimeoutMax = 0;
15539 +}
15540 +
15541 #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE
15542 /* Some Intel Strata Flash prior to FPO revision C has bugs in this area */
15543 static void fixup_intel_strataflash(struct mtd_info *mtd, void* param)
15544 @@ -234,6 +276,7 @@
15545 }
15546
15547 static struct cfi_fixup cfi_fixup_table[] = {
15548 + { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
15549 #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE
15550 { CFI_MFR_ANY, CFI_ID_ANY, fixup_intel_strataflash, NULL },
15551 #endif
15552 diff -urN linux-2.6.24.3/drivers/mtd/chips/cfi_cmdset_0002.c avr32-2.6/drivers/mtd/chips/cfi_cmdset_0002.c
15553 --- linux-2.6.24.3/drivers/mtd/chips/cfi_cmdset_0002.c 2008-02-26 01:20:20.000000000 +0100
15554 +++ avr32-2.6/drivers/mtd/chips/cfi_cmdset_0002.c 2008-04-23 20:12:41.000000000 +0200
15555 @@ -185,6 +185,10 @@
15556 extp->TopBottom = 2;
15557 else
15558 extp->TopBottom = 3;
15559 +
15560 + /* burst write mode not supported */
15561 + cfi->cfiq->BufWriteTimeoutTyp = 0;
15562 + cfi->cfiq->BufWriteTimeoutMax = 0;
15563 }
15564
15565 static void fixup_use_secsi(struct mtd_info *mtd, void *param)
15566 @@ -217,6 +221,7 @@
15567 }
15568
15569 static struct cfi_fixup cfi_fixup_table[] = {
15570 + { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
15571 #ifdef AMD_BOOTLOC_BUG
15572 { CFI_MFR_AMD, CFI_ID_ANY, fixup_amd_bootblock, NULL },
15573 #endif
15574 @@ -229,7 +234,6 @@
15575 #if !FORCE_WORD_WRITE
15576 { CFI_MFR_ANY, CFI_ID_ANY, fixup_use_write_buffers, NULL, },
15577 #endif
15578 - { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
15579 { 0, 0, NULL, NULL }
15580 };
15581 static struct cfi_fixup jedec_fixup_table[] = {
15582 diff -urN linux-2.6.24.3/drivers/pcmcia/at32_cf.c avr32-2.6/drivers/pcmcia/at32_cf.c
15583 --- linux-2.6.24.3/drivers/pcmcia/at32_cf.c 1970-01-01 01:00:00.000000000 +0100
15584 +++ avr32-2.6/drivers/pcmcia/at32_cf.c 2008-04-23 19:33:42.000000000 +0200
15585 @@ -0,0 +1,533 @@
15586 +/*
15587 + * Driver for AVR32 Static Memory Controller: CompactFlash support
15588 + *
15589 + * Copyright (C) 2006 Atmel Norway
15590 + *
15591 + * This program is free software; you can redistribute it and/or
15592 + * modify it under the terms of the GNU General Public License as
15593 + * published by the Free Software Foundation; either version 2 of the
15594 + * License, or (at your option) any later version.
15595 + *
15596 + * This program is distributed in the hope that it will be useful, but
15597 + * WITHOUT ANY WARRANTY; without even the implied warranty of
15598 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15599 + * General Public License for more details.
15600 + *
15601 + * You should have received a copy of the GNU General Public License
15602 + * along with this program; if not, write to the Free Software
15603 + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
15604 + * 02111-1307, USA.
15605 + *
15606 + * The full GNU General Public License is included in this
15607 + * distribution in the file called COPYING.
15608 + */
15609 +#include <linux/module.h>
15610 +#include <linux/kernel.h>
15611 +#include <linux/platform_device.h>
15612 +#include <linux/init.h>
15613 +#include <linux/device.h>
15614 +#include <linux/delay.h>
15615 +#include <linux/interrupt.h>
15616 +#include <linux/err.h>
15617 +#include <linux/clk.h>
15618 +#include <linux/dma-mapping.h>
15619 +
15620 +#include <pcmcia/ss.h>
15621 +
15622 +#include <asm/gpio.h>
15623 +#include <asm/io.h>
15624 +#include <asm/arch/board.h>
15625 +
15626 +#include <asm/arch/smc.h>
15627 +
15628 +struct at32_cf_socket {
15629 + struct pcmcia_socket socket;
15630 + int detect_pin;
15631 + int reset_pin;
15632 + int vcc_pin;
15633 + int ready_pin;
15634 + struct resource res_attr;
15635 + struct resource res_mem;
15636 + struct resource res_io;
15637 + struct smc_config smc;
15638 + unsigned int irq;
15639 + unsigned int cf_cs;
15640 + socket_state_t state;
15641 + unsigned present:1;
15642 +};
15643 +#define to_at32_cf(sock) container_of(sock, struct at32_cf_socket, socket)
15644 +
15645 +/*
15646 + * We have the following memory layout relative to the base address:
15647 + *
15648 + * Alt IDE Mode: 00e0 0000 -> 00ff ffff
15649 + * True IDE Mode: 00c0 0000 -> 00df ffff
15650 + * I/O memory: 0080 0000 -> 00bf ffff
15651 + * Common memory: 0040 0000 -> 007f ffff
15652 + * Attribute memory: 0000 0000 -> 003f ffff
15653 + */
15654 +#define CF_ATTR_OFFSET 0x00000000
15655 +#define CF_MEM_OFFSET 0x00400000
15656 +#define CF_IO_OFFSET 0x00800000
15657 +#define CF_RES_SIZE 4096
15658 +
15659 +#ifdef DEBUG
15660 +
15661 +static int pc_debug;
15662 +module_param(pc_debug, int, 0644);
15663 +
15664 +static void at32_cf_debug(struct at32_cf_socket *cf, const char *func,
15665 + int level, const char *fmt, ...)
15666 +{
15667 + va_list args;
15668 +
15669 + if (pc_debug > level) {
15670 + printk(KERN_DEBUG "at32_cf/%u: %s: ", cf->cf_cs, func);
15671 + va_start(args, fmt);
15672 + vprintk(fmt, args);
15673 + va_end(args);
15674 + }
15675 +}
15676 +
15677 +#define debug(cf, lvl, fmt, arg...) \
15678 + at32_cf_debug(cf, __func__, lvl, fmt, ##arg)
15679 +
15680 +#else
15681 +#define debug(cf, lvl, fmt, arg...) do { } while (0)
15682 +#endif
15683 +
15684 +static inline int at32_cf_present(struct at32_cf_socket *cf)
15685 +{
15686 + int present = 1;
15687 +
15688 + /* If we don't have a detect pin, assume the card is present */
15689 + if (cf->detect_pin >= 0)
15690 + present = !gpio_get_value(cf->detect_pin);
15691 +
15692 + return present;
15693 +}
15694 +
15695 +static irqreturn_t at32_cf_irq(int irq, void *dev_id)
15696 +{
15697 + struct at32_cf_socket *cf = dev_id;
15698 + unsigned int present;
15699 +
15700 + present = at32_cf_present(cf);
15701 + if (present != cf->present) {
15702 + cf->present = present;
15703 + debug(cf, 3, "card %s\n", present ? "present" : "gone");
15704 + pcmcia_parse_events(&cf->socket, SS_DETECT);
15705 + }
15706 +
15707 + return IRQ_HANDLED;
15708 +}
15709 +
15710 +static int at32_cf_get_status(struct pcmcia_socket *sock, u_int *value)
15711 +{
15712 + struct at32_cf_socket *cf;
15713 + u_int status = 0;
15714 +
15715 + cf = container_of(sock, struct at32_cf_socket, socket);
15716 +
15717 + if (at32_cf_present(cf)) {
15718 + /* NOTE: gpio on AP7xxx is 3.3V */
15719 + status = SS_DETECT | SS_3VCARD;
15720 + if (cf->ready_pin < 0 || gpio_get_value(cf->ready_pin))
15721 + status |= SS_READY;
15722 + if (cf->vcc_pin < 0 || gpio_get_value(cf->vcc_pin))
15723 + status |= SS_POWERON;
15724 + }
15725 +
15726 + *value = status;
15727 + return 0;
15728 +}
15729 +
15730 +static int at32_cf_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
15731 +{
15732 + struct at32_cf_socket *cf = container_of(sock, struct at32_cf_socket, socket);
15733 +
15734 + debug(cf, 2, "mask: %s%s%s%s%s%sflags: %s%s%s%s%s%sVcc %d Vpp %d irq %d\n",
15735 + (state->csc_mask==0)?"<NONE> ":"",
15736 + (state->csc_mask&SS_DETECT)?"DETECT ":"",
15737 + (state->csc_mask&SS_READY)?"READY ":"",
15738 + (state->csc_mask&SS_BATDEAD)?"BATDEAD ":"",
15739 + (state->csc_mask&SS_BATWARN)?"BATWARN ":"",
15740 + (state->csc_mask&SS_STSCHG)?"STSCHG ":"",
15741 + (state->flags==0)?"<NONE> ":"",
15742 + (state->flags&SS_PWR_AUTO)?"PWR_AUTO ":"",
15743 + (state->flags&SS_IOCARD)?"IOCARD ":"",
15744 + (state->flags&SS_RESET)?"RESET ":"",
15745 + (state->flags&SS_SPKR_ENA)?"SPKR_ENA ":"",
15746 + (state->flags&SS_OUTPUT_ENA)?"OUTPUT_ENA ":"",
15747 + state->Vcc, state->Vpp, state->io_irq);
15748 +
15749 + /*
15750 + * TODO: Allow boards to override this in case they have level
15751 + * converters.
15752 + */
15753 + switch (state->Vcc) {
15754 + case 0:
15755 + if (cf->vcc_pin >= 0)
15756 + gpio_set_value(cf->vcc_pin, 0);
15757 + break;
15758 + case 33:
15759 + if (cf->vcc_pin >= 0)
15760 + gpio_set_value(cf->vcc_pin, 1);
15761 + break;
15762 + default:
15763 + return -EINVAL;
15764 + }
15765 +
15766 + if (cf->reset_pin >= 0)
15767 + gpio_set_value(cf->reset_pin, state->flags & SS_RESET);
15768 +
15769 + cf->state = *state;
15770 +
15771 + return 0;
15772 +}
15773 +
15774 +static int at32_cf_socket_init(struct pcmcia_socket *sock)
15775 +{
15776 + debug(to_at32_cf(sock), 2, "called\n");
15777 +
15778 + return 0;
15779 +}
15780 +
15781 +static int at32_cf_suspend(struct pcmcia_socket *sock)
15782 +{
15783 + debug(to_at32_cf(sock), 2, "called\n");
15784 +
15785 + at32_cf_set_socket(sock, &dead_socket);
15786 +
15787 + return 0;
15788 +}
15789 +
15790 +static int at32_cf_set_io_map(struct pcmcia_socket *sock,
15791 + struct pccard_io_map *map)
15792 +{
15793 + struct at32_cf_socket *cf = container_of(sock, struct at32_cf_socket, socket);
15794 + int retval;
15795 +
15796 + debug(cf, 2, "map %u speed %u start 0x%08x stop 0x%08x\n",
15797 + map->map, map->speed, map->start, map->stop);
15798 + debug(cf, 2, "flags: %s%s%s%s%s%s%s%s\n",
15799 + (map->flags == 0) ? "<NONE>":"",
15800 + (map->flags & MAP_ACTIVE) ? "ACTIVE " : "",
15801 + (map->flags & MAP_16BIT) ? "16BIT " : "",
15802 + (map->flags & MAP_AUTOSZ) ? "AUTOSZ " : "",
15803 + (map->flags & MAP_0WS) ? "0WS " : "",
15804 + (map->flags & MAP_WRPROT) ? "WRPROT " : "",
15805 + (map->flags & MAP_USE_WAIT) ? "USE_WAIT " : "",
15806 + (map->flags & MAP_PREFETCH) ? "PREFETCH " : "");
15807 +
15808 + map->flags &= MAP_ACTIVE | MAP_16BIT | MAP_USE_WAIT;
15809 +
15810 + if (map->flags & MAP_16BIT)
15811 + cf->smc.bus_width = 2;
15812 + else
15813 + cf->smc.bus_width = 1;
15814 +
15815 + if (map->flags & MAP_USE_WAIT)
15816 + cf->smc.nwait_mode = 3;
15817 + else
15818 + cf->smc.nwait_mode = 0;
15819 +
15820 + retval = smc_set_configuration(cf->cf_cs, &cf->smc);
15821 + if (retval) {
15822 + printk(KERN_ERR "at32_cf: could not set up SMC for I/O\n");
15823 + return retval;
15824 + }
15825 +
15826 + map->start = cf->socket.io_offset;
15827 + map->stop = map->start + CF_RES_SIZE - 1;
15828 +
15829 + return 0;
15830 +}
15831 +
15832 +static int
15833 +at32_cf_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *map)
15834 +{
15835 + struct at32_cf_socket *cf;
15836 + struct resource *res;
15837 + int retval;
15838 +
15839 + cf = container_of(sock, struct at32_cf_socket, socket);
15840 +
15841 + debug(cf, 2, "map %u speed %u card_start %08x\n",
15842 + map->map, map->speed, map->card_start);
15843 + debug(cf, 2, "flags: %s%s%s%s%s%s%s%s\n",
15844 + (map->flags==0)?"<NONE>":"",
15845 + (map->flags&MAP_ACTIVE)?"ACTIVE ":"",
15846 + (map->flags&MAP_16BIT)?"16BIT ":"",
15847 + (map->flags&MAP_AUTOSZ)?"AUTOSZ ":"",
15848 + (map->flags&MAP_0WS)?"0WS ":"",
15849 + (map->flags&MAP_WRPROT)?"WRPROT ":"",
15850 + (map->flags&MAP_ATTRIB)?"ATTRIB ":"",
15851 + (map->flags&MAP_USE_WAIT)?"USE_WAIT ":"");
15852 +
15853 + if (map->card_start)
15854 + return -EINVAL;
15855 +
15856 + map->flags &= MAP_ACTIVE | MAP_ATTRIB | MAP_16BIT | MAP_USE_WAIT;
15857 +
15858 + if (map->flags & MAP_ATTRIB) {
15859 + res = &cf->res_attr;
15860 +
15861 + /* Linksys WCF12 seems to use WAIT when reading CIS */
15862 + map->flags |= MAP_USE_WAIT;
15863 + } else {
15864 + res = &cf->res_mem;
15865 + }
15866 +
15867 + if (map->flags & MAP_USE_WAIT)
15868 + cf->smc.nwait_mode = 3;
15869 + else
15870 + cf->smc.nwait_mode = 0;
15871 +
15872 + retval = smc_set_configuration(cf->cf_cs, &cf->smc);
15873 + if (retval) {
15874 + printk(KERN_ERR "at32_cf: could not set up SMC for mem\n");
15875 + return retval;
15876 + }
15877 +
15878 + map->static_start = res->start;
15879 +
15880 + return 0;
15881 +}
15882 +
15883 +static struct pccard_operations at32_cf_ops = {
15884 + .init = at32_cf_socket_init,
15885 + .suspend = at32_cf_suspend,
15886 + .get_status = at32_cf_get_status,
15887 + .set_socket = at32_cf_set_socket,
15888 + .set_io_map = at32_cf_set_io_map,
15889 + .set_mem_map = at32_cf_set_mem_map,
15890 +};
15891 +
15892 +static int __init request_pin(struct platform_device *pdev,
15893 + unsigned int pin, const char *name)
15894 +{
15895 + if (gpio_request(pin, name)) {
15896 + dev_warn(&pdev->dev, "failed to request %s pin\n", name);
15897 + return -1;
15898 + }
15899 +
15900 + return pin;
15901 +}
15902 +
15903 +static struct smc_timing at32_cf_timing __initdata = {
15904 + .ncs_read_setup = 30,
15905 + .nrd_setup = 100,
15906 + .ncs_write_setup = 30,
15907 + .nwe_setup = 100,
15908 +
15909 + .ncs_read_pulse = 360,
15910 + .nrd_pulse = 290,
15911 + .ncs_write_pulse = 360,
15912 + .nwe_pulse = 290,
15913 +
15914 + .read_cycle = 420,
15915 + .write_cycle = 420,
15916 +};
15917 +
15918 +static int __init at32_cf_probe(struct platform_device *pdev)
15919 +{
15920 + struct at32_cf_socket *cf;
15921 + struct cf_platform_data *board = pdev->dev.platform_data;
15922 + struct resource *res_skt;
15923 + int irq;
15924 + int ret;
15925 +
15926 + dev_dbg(&pdev->dev, "probe");
15927 +
15928 + if (!board)
15929 + return -ENXIO;
15930 +
15931 + res_skt = platform_get_resource(pdev, IORESOURCE_MEM, 0);
15932 + if (!res_skt)
15933 + return -ENXIO;
15934 +
15935 + irq = platform_get_irq(pdev, 0);
15936 + if (irq < 0)
15937 + return irq;
15938 +
15939 + cf = kzalloc(sizeof(struct at32_cf_socket), GFP_KERNEL);
15940 + if (!cf)
15941 + return -ENOMEM;
15942 +
15943 + cf->detect_pin = -1;
15944 + cf->reset_pin = -1;
15945 + cf->vcc_pin = -1;
15946 + cf->ready_pin = -1;
15947 + cf->cf_cs = board->cs;
15948 +
15949 + if (board->detect_pin != GPIO_PIN_NONE)
15950 + cf->detect_pin = request_pin(pdev, board->detect_pin,
15951 + "cf_detect");
15952 + if (board->reset_pin != GPIO_PIN_NONE)
15953 + cf->reset_pin = request_pin(pdev, board->reset_pin,
15954 + "cf_reset");
15955 + if (board->vcc_pin != GPIO_PIN_NONE)
15956 + cf->vcc_pin = request_pin(pdev, board->vcc_pin,
15957 + "cf_vcc");
15958 + if (board->ready_pin != GPIO_PIN_NONE)
15959 + /* READY is also used for irq through EIM */
15960 + cf->ready_pin = board->ready_pin;
15961 +
15962 + debug(cf, 2, "pins: detect=%d reset=%d vcc=%d\n",
15963 + cf->detect_pin, cf->reset_pin, cf->vcc_pin);
15964 +
15965 + cf->socket.pci_irq = irq;
15966 + cf->socket.ops = &at32_cf_ops;
15967 + cf->socket.resource_ops = &pccard_static_ops;
15968 + cf->socket.dev.parent = &pdev->dev;
15969 + cf->socket.owner = THIS_MODULE;
15970 + cf->socket.features =
15971 + SS_CAP_MEM_ALIGN | SS_CAP_STATIC_MAP | SS_CAP_PCCARD;
15972 + cf->socket.map_size = CF_RES_SIZE;
15973 +
15974 + cf->res_attr.start = res_skt->start + CF_ATTR_OFFSET;
15975 + cf->res_attr.end = cf->res_attr.start + CF_RES_SIZE - 1;
15976 + cf->res_attr.name = "attribute";
15977 + cf->res_attr.flags = IORESOURCE_MEM;
15978 + ret = request_resource(res_skt, &cf->res_attr);
15979 + if (ret)
15980 + goto err_request_res_attr;
15981 +
15982 + cf->res_mem.start = res_skt->start + CF_MEM_OFFSET;
15983 + cf->res_mem.end = cf->res_mem.start + CF_RES_SIZE - 1;
15984 + cf->res_mem.name = "memory";
15985 + cf->res_mem.flags = IORESOURCE_MEM;
15986 + ret = request_resource(res_skt, &cf->res_mem);
15987 + if (ret)
15988 + goto err_request_res_mem;
15989 +
15990 + cf->res_io.start = res_skt->start + CF_IO_OFFSET;
15991 + cf->res_io.end = cf->res_io.start + CF_RES_SIZE - 1;
15992 + cf->res_io.name = "io";
15993 + cf->res_io.flags = IORESOURCE_MEM;
15994 + ret = request_resource(res_skt, &cf->res_io);
15995 + if (ret)
15996 + goto err_request_res_io;
15997 +
15998 + cf->socket.io_offset = cf->res_io.start;
15999 +
16000 + if (cf->detect_pin >= 0) {
16001 + ret = request_irq(gpio_to_irq(cf->detect_pin), at32_cf_irq,
16002 + IRQF_SHARED, "cf_detect", cf);
16003 + if (ret) {
16004 + debug(cf, 1,
16005 + "failed to request cf_detect interrupt\n");
16006 + goto err_detect_irq;
16007 + }
16008 + }
16009 +
16010 + cf->present = at32_cf_present(cf);
16011 +
16012 + /* Setup SMC timings */
16013 + smc_set_timing(&cf->smc, &at32_cf_timing);
16014 +
16015 + cf->smc.bus_width = 2;
16016 + cf->smc.nrd_controlled = 1;
16017 + cf->smc.nwe_controlled = 1;
16018 + cf->smc.nwait_mode = 0;
16019 + cf->smc.byte_write = 0;
16020 + cf->smc.tdf_cycles = 8;
16021 + cf->smc.tdf_mode = 0;
16022 +
16023 + ret = smc_set_configuration(cf->cf_cs, &cf->smc);
16024 + if (ret) {
16025 + debug(cf, 1, "failed to configure SMC\n", ret);
16026 + goto err_smc;
16027 + }
16028 +
16029 + ret = pcmcia_register_socket(&cf->socket);
16030 + if (ret) {
16031 + debug(cf, 1, "failed to register socket: %d\n", ret);
16032 + goto err_register_socket;
16033 + }
16034 +
16035 + if (cf->reset_pin >= 0)
16036 + gpio_direction_output(cf->reset_pin, 0);
16037 +
16038 + platform_set_drvdata(pdev, cf);
16039 +
16040 + dev_info(&pdev->dev, "Atmel SMC CF interface at 0x%08lx\n",
16041 + (unsigned long)res_skt->start);
16042 +
16043 + return 0;
16044 +
16045 +err_register_socket:
16046 +err_smc:
16047 + if (cf->detect_pin >= 0)
16048 + free_irq(gpio_to_irq(cf->detect_pin), cf);
16049 +err_detect_irq:
16050 + release_resource(&cf->res_io);
16051 +err_request_res_io:
16052 + release_resource(&cf->res_mem);
16053 +err_request_res_mem:
16054 + release_resource(&cf->res_attr);
16055 +err_request_res_attr:
16056 + if (cf->vcc_pin >= 0)
16057 + gpio_free(cf->vcc_pin);
16058 + if (cf->reset_pin >= 0)
16059 + gpio_free(cf->reset_pin);
16060 + if (cf->detect_pin >= 0)
16061 + gpio_free(cf->detect_pin);
16062 + kfree(cf);
16063 +
16064 + return ret;
16065 +}
16066 +
16067 +static int __exit at32_cf_remove(struct platform_device *pdev)
16068 +{
16069 + struct at32_cf_socket *cf = platform_get_drvdata(pdev);
16070 +
16071 + pcmcia_unregister_socket(&cf->socket);
16072 + if (cf->detect_pin >= 0) {
16073 + free_irq(gpio_to_irq(cf->detect_pin), cf);
16074 + gpio_free(cf->detect_pin);
16075 + }
16076 + if (cf->vcc_pin >= 0)
16077 + gpio_free(cf->vcc_pin);
16078 + if (cf->reset_pin >= 0)
16079 + gpio_free(cf->reset_pin);
16080 +
16081 + release_resource(&cf->res_io);
16082 + release_resource(&cf->res_mem);
16083 + release_resource(&cf->res_attr);
16084 + kfree(cf);
16085 + platform_set_drvdata(pdev, NULL);
16086 +
16087 + return 0;
16088 +}
16089 +
16090 +static struct platform_driver at32_cf_driver = {
16091 + .remove = __exit_p(at32_cf_remove),
16092 + .driver = {
16093 + .name = "at32_cf",
16094 + .owner = THIS_MODULE,
16095 + },
16096 +};
16097 +
16098 +static int __init at32_cf_init(void)
16099 +{
16100 + int ret;
16101 +
16102 + ret = platform_driver_probe(&at32_cf_driver, at32_cf_probe);
16103 + if (ret)
16104 + printk(KERN_ERR "at32_cf: probe failed: %d\n", ret);
16105 + return ret;
16106 +}
16107 +
16108 +static void __exit at32_cf_exit(void)
16109 +{
16110 + platform_driver_unregister(&at32_cf_driver);
16111 +}
16112 +
16113 +module_init(at32_cf_init);
16114 +module_exit(at32_cf_exit);
16115 +
16116 +MODULE_LICENSE("GPL");
16117 +MODULE_DESCRIPTION("Driver for SMC PCMCIA interface");
16118 +MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>");
16119 diff -urN linux-2.6.24.3/drivers/pcmcia/Kconfig avr32-2.6/drivers/pcmcia/Kconfig
16120 --- linux-2.6.24.3/drivers/pcmcia/Kconfig 2008-02-26 01:20:20.000000000 +0100
16121 +++ avr32-2.6/drivers/pcmcia/Kconfig 2008-04-23 19:33:42.000000000 +0200
16122 @@ -276,6 +276,13 @@
16123 Say Y here to support the CompactFlash controller on the
16124 PA Semi Electra eval board.
16125
16126 +config AT32_CF
16127 + tristate "AT32AP CompactFlash Controller"
16128 + depends on PCMCIA && AVR32 && PLATFORM_AT32AP
16129 + help
16130 + Say Y here to support the CompactFlash controller on AT32 chips.
16131 + Or choose M to compile the driver as a module named "at32_cf".
16132 +
16133 config PCCARD_NONSTATIC
16134 tristate
16135
16136 diff -urN linux-2.6.24.3/drivers/pcmcia/Makefile avr32-2.6/drivers/pcmcia/Makefile
16137 --- linux-2.6.24.3/drivers/pcmcia/Makefile 2008-02-26 01:20:20.000000000 +0100
16138 +++ avr32-2.6/drivers/pcmcia/Makefile 2008-04-23 19:33:42.000000000 +0200
16139 @@ -38,6 +38,7 @@
16140 obj-$(CONFIG_OMAP_CF) += omap_cf.o
16141 obj-$(CONFIG_AT91_CF) += at91_cf.o
16142 obj-$(CONFIG_ELECTRA_CF) += electra_cf.o
16143 +obj-$(CONFIG_AT32_CF) += at32_cf.o
16144
16145 sa11xx_core-y += soc_common.o sa11xx_base.o
16146 pxa2xx_core-y += soc_common.o pxa2xx_base.o
16147 diff -urN linux-2.6.24.3/drivers/serial/atmel_serial.c avr32-2.6/drivers/serial/atmel_serial.c
16148 --- linux-2.6.24.3/drivers/serial/atmel_serial.c 2008-02-26 01:20:20.000000000 +0100
16149 +++ avr32-2.6/drivers/serial/atmel_serial.c 2008-04-23 20:12:44.000000000 +0200
16150 @@ -7,6 +7,8 @@
16151 * Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd.
16152 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
16153 *
16154 + * DMA support added by Chip Coldwell.
16155 + *
16156 * This program is free software; you can redistribute it and/or modify
16157 * it under the terms of the GNU General Public License as published by
16158 * the Free Software Foundation; either version 2 of the License, or
16159 @@ -33,7 +35,9 @@
16160 #include <linux/sysrq.h>
16161 #include <linux/tty_flip.h>
16162 #include <linux/platform_device.h>
16163 +#include <linux/dma-mapping.h>
16164 #include <linux/atmel_pdc.h>
16165 +#include <linux/atmel_serial.h>
16166
16167 #include <asm/io.h>
16168
16169 @@ -45,7 +49,9 @@
16170 #include <asm/arch/gpio.h>
16171 #endif
16172
16173 -#include "atmel_serial.h"
16174 +#define PDC_BUFFER_SIZE 512
16175 +/* Revisit: We should calculate this based on the actual port settings */
16176 +#define PDC_RX_TIMEOUT (3 * 10) /* 3 bytes */
16177
16178 #if defined(CONFIG_SERIAL_ATMEL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
16179 #define SUPPORT_SYSRQ
16180 @@ -74,6 +80,7 @@
16181
16182 #define ATMEL_ISR_PASS_LIMIT 256
16183
16184 +/* UART registers. CR is write-only, hence no GET macro */
16185 #define UART_PUT_CR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_CR)
16186 #define UART_GET_MR(port) __raw_readl((port)->membase + ATMEL_US_MR)
16187 #define UART_PUT_MR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_MR)
16188 @@ -87,8 +94,6 @@
16189 #define UART_PUT_BRGR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_BRGR)
16190 #define UART_PUT_RTOR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_RTOR)
16191
16192 -// #define UART_GET_CR(port) __raw_readl((port)->membase + ATMEL_US_CR) // is write-only
16193 -
16194 /* PDC registers */
16195 #define UART_PUT_PTCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR)
16196 #define UART_GET_PTSR(port) __raw_readl((port)->membase + ATMEL_PDC_PTSR)
16197 @@ -101,12 +106,24 @@
16198
16199 #define UART_PUT_TPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TPR)
16200 #define UART_PUT_TCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TCR)
16201 -//#define UART_PUT_TNPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TNPR)
16202 -//#define UART_PUT_TNCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TNCR)
16203
16204 static int (*atmel_open_hook)(struct uart_port *);
16205 static void (*atmel_close_hook)(struct uart_port *);
16206
16207 +struct atmel_dma_buffer {
16208 + unsigned char *buf;
16209 + dma_addr_t dma_addr;
16210 + unsigned int dma_size;
16211 + unsigned int ofs;
16212 +};
16213 +
16214 +struct atmel_uart_char {
16215 + u16 status;
16216 + u16 ch;
16217 +};
16218 +
16219 +#define ATMEL_SERIAL_RINGSIZE 1024
16220 +
16221 /*
16222 * We wrap our port structure around the generic uart_port.
16223 */
16224 @@ -115,6 +132,19 @@
16225 struct clk *clk; /* uart clock */
16226 unsigned short suspended; /* is port suspended? */
16227 int break_active; /* break being received */
16228 +
16229 + short use_dma_rx; /* enable PDC receiver */
16230 + short pdc_rx_idx; /* current PDC RX buffer */
16231 + struct atmel_dma_buffer pdc_rx[2]; /* PDC receier */
16232 +
16233 + short use_dma_tx; /* enable PDC transmitter */
16234 + struct atmel_dma_buffer pdc_tx; /* PDC transmitter */
16235 +
16236 + struct tasklet_struct tasklet;
16237 + unsigned int irq_status;
16238 + unsigned int irq_status_prev;
16239 +
16240 + struct circ_buf rx_ring;
16241 };
16242
16243 static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART];
16244 @@ -123,6 +153,38 @@
16245 static struct console atmel_console;
16246 #endif
16247
16248 +static inline struct atmel_uart_port *
16249 +to_atmel_uart_port(struct uart_port *uart)
16250 +{
16251 + return container_of(uart, struct atmel_uart_port, uart);
16252 +}
16253 +
16254 +#ifdef CONFIG_SERIAL_ATMEL_PDC
16255 +static bool atmel_use_dma_rx(struct uart_port *port)
16256 +{
16257 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
16258 +
16259 + return atmel_port->use_dma_rx;
16260 +}
16261 +
16262 +static bool atmel_use_dma_tx(struct uart_port *port)
16263 +{
16264 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
16265 +
16266 + return atmel_port->use_dma_tx;
16267 +}
16268 +#else
16269 +static bool atmel_use_dma_rx(struct uart_port *port)
16270 +{
16271 + return false;
16272 +}
16273 +
16274 +static bool atmel_use_dma_tx(struct uart_port *port)
16275 +{
16276 + return false;
16277 +}
16278 +#endif
16279 +
16280 /*
16281 * Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty.
16282 */
16283 @@ -142,8 +204,8 @@
16284 #ifdef CONFIG_ARCH_AT91RM9200
16285 if (cpu_is_at91rm9200()) {
16286 /*
16287 - * AT91RM9200 Errata #39: RTS0 is not internally connected to PA21.
16288 - * We need to drive the pin manually.
16289 + * AT91RM9200 Errata #39: RTS0 is not internally connected
16290 + * to PA21. We need to drive the pin manually.
16291 */
16292 if (port->mapbase == AT91RM9200_BASE_US0) {
16293 if (mctrl & TIOCM_RTS)
16294 @@ -204,7 +266,12 @@
16295 */
16296 static void atmel_stop_tx(struct uart_port *port)
16297 {
16298 - UART_PUT_IDR(port, ATMEL_US_TXRDY);
16299 + if (atmel_use_dma_tx(port)) {
16300 + /* disable PDC transmit */
16301 + UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
16302 + UART_PUT_IDR(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
16303 + } else
16304 + UART_PUT_IDR(port, ATMEL_US_TXRDY);
16305 }
16306
16307 /*
16308 @@ -212,7 +279,17 @@
16309 */
16310 static void atmel_start_tx(struct uart_port *port)
16311 {
16312 - UART_PUT_IER(port, ATMEL_US_TXRDY);
16313 + if (atmel_use_dma_tx(port)) {
16314 + if (UART_GET_PTSR(port) & ATMEL_PDC_TXTEN)
16315 + /* The transmitter is already running. Yes, we
16316 + really need this.*/
16317 + return;
16318 +
16319 + UART_PUT_IER(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
16320 + /* re-enable PDC transmit */
16321 + UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
16322 + } else
16323 + UART_PUT_IER(port, ATMEL_US_TXRDY);
16324 }
16325
16326 /*
16327 @@ -220,7 +297,12 @@
16328 */
16329 static void atmel_stop_rx(struct uart_port *port)
16330 {
16331 - UART_PUT_IDR(port, ATMEL_US_RXRDY);
16332 + if (atmel_use_dma_rx(port)) {
16333 + /* disable PDC receive */
16334 + UART_PUT_PTCR(port, ATMEL_PDC_RXTDIS);
16335 + UART_PUT_IDR(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
16336 + } else
16337 + UART_PUT_IDR(port, ATMEL_US_RXRDY);
16338 }
16339
16340 /*
16341 @@ -228,7 +310,8 @@
16342 */
16343 static void atmel_enable_ms(struct uart_port *port)
16344 {
16345 - UART_PUT_IER(port, ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC | ATMEL_US_CTSIC);
16346 + UART_PUT_IER(port, ATMEL_US_RIIC | ATMEL_US_DSRIC
16347 + | ATMEL_US_DCDIC | ATMEL_US_CTSIC);
16348 }
16349
16350 /*
16351 @@ -243,22 +326,63 @@
16352 }
16353
16354 /*
16355 + * Stores the incoming character in the ring buffer
16356 + */
16357 +static void
16358 +atmel_buffer_rx_char(struct uart_port *port, unsigned int status,
16359 + unsigned int ch)
16360 +{
16361 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
16362 + struct circ_buf *ring = &atmel_port->rx_ring;
16363 + struct atmel_uart_char *c;
16364 +
16365 + if (!CIRC_SPACE(ring->head, ring->tail, ATMEL_SERIAL_RINGSIZE))
16366 + /* Buffer overflow, ignore char */
16367 + return;
16368 +
16369 + c = &((struct atmel_uart_char *)ring->buf)[ring->head];
16370 + c->status = status;
16371 + c->ch = ch;
16372 +
16373 + /* Make sure the character is stored before we update head. */
16374 + smp_wmb();
16375 +
16376 + ring->head = (ring->head + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
16377 +}
16378 +
16379 +/*
16380 + * Deal with parity, framing and overrun errors.
16381 + */
16382 +static void atmel_pdc_rxerr(struct uart_port *port, unsigned int status)
16383 +{
16384 + /* clear error */
16385 + UART_PUT_CR(port, ATMEL_US_RSTSTA);
16386 +
16387 + if (status & ATMEL_US_RXBRK) {
16388 + /* ignore side-effect */
16389 + status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
16390 + port->icount.brk++;
16391 + }
16392 + if (status & ATMEL_US_PARE)
16393 + port->icount.parity++;
16394 + if (status & ATMEL_US_FRAME)
16395 + port->icount.frame++;
16396 + if (status & ATMEL_US_OVRE)
16397 + port->icount.overrun++;
16398 +}
16399 +
16400 +/*
16401 * Characters received (called from interrupt handler)
16402 */
16403 static void atmel_rx_chars(struct uart_port *port)
16404 {
16405 - struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
16406 - struct tty_struct *tty = port->info->tty;
16407 - unsigned int status, ch, flg;
16408 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
16409 + unsigned int status, ch;
16410
16411 status = UART_GET_CSR(port);
16412 while (status & ATMEL_US_RXRDY) {
16413 ch = UART_GET_CHAR(port);
16414
16415 - port->icount.rx++;
16416 -
16417 - flg = TTY_NORMAL;
16418 -
16419 /*
16420 * note that the error handling code is
16421 * out of the main execution path
16422 @@ -266,15 +390,14 @@
16423 if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
16424 | ATMEL_US_OVRE | ATMEL_US_RXBRK)
16425 || atmel_port->break_active)) {
16426 - UART_PUT_CR(port, ATMEL_US_RSTSTA); /* clear error */
16427 +
16428 + /* clear error */
16429 + UART_PUT_CR(port, ATMEL_US_RSTSTA);
16430 +
16431 if (status & ATMEL_US_RXBRK
16432 && !atmel_port->break_active) {
16433 - status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME); /* ignore side-effect */
16434 - port->icount.brk++;
16435 atmel_port->break_active = 1;
16436 UART_PUT_IER(port, ATMEL_US_RXBRK);
16437 - if (uart_handle_break(port))
16438 - goto ignore_char;
16439 } else {
16440 /*
16441 * This is either the end-of-break
16442 @@ -287,52 +410,30 @@
16443 status &= ~ATMEL_US_RXBRK;
16444 atmel_port->break_active = 0;
16445 }
16446 - if (status & ATMEL_US_PARE)
16447 - port->icount.parity++;
16448 - if (status & ATMEL_US_FRAME)
16449 - port->icount.frame++;
16450 - if (status & ATMEL_US_OVRE)
16451 - port->icount.overrun++;
16452 -
16453 - status &= port->read_status_mask;
16454 -
16455 - if (status & ATMEL_US_RXBRK)
16456 - flg = TTY_BREAK;
16457 - else if (status & ATMEL_US_PARE)
16458 - flg = TTY_PARITY;
16459 - else if (status & ATMEL_US_FRAME)
16460 - flg = TTY_FRAME;
16461 }
16462
16463 - if (uart_handle_sysrq_char(port, ch))
16464 - goto ignore_char;
16465 -
16466 - uart_insert_char(port, status, ATMEL_US_OVRE, ch, flg);
16467 -
16468 - ignore_char:
16469 + atmel_buffer_rx_char(port, status, ch);
16470 status = UART_GET_CSR(port);
16471 }
16472
16473 - tty_flip_buffer_push(tty);
16474 + tasklet_schedule(&atmel_port->tasklet);
16475 }
16476
16477 /*
16478 - * Transmit characters (called from interrupt handler)
16479 + * Transmit characters (called from tasklet with TXRDY interrupt
16480 + * disabled)
16481 */
16482 static void atmel_tx_chars(struct uart_port *port)
16483 {
16484 struct circ_buf *xmit = &port->info->xmit;
16485
16486 - if (port->x_char) {
16487 + if (port->x_char && UART_GET_CSR(port) & ATMEL_US_TXRDY) {
16488 UART_PUT_CHAR(port, port->x_char);
16489 port->icount.tx++;
16490 port->x_char = 0;
16491 - return;
16492 }
16493 - if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
16494 - atmel_stop_tx(port);
16495 + if (uart_circ_empty(xmit) || uart_tx_stopped(port))
16496 return;
16497 - }
16498
16499 while (UART_GET_CSR(port) & ATMEL_US_TXRDY) {
16500 UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
16501 @@ -345,8 +446,88 @@
16502 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
16503 uart_write_wakeup(port);
16504
16505 - if (uart_circ_empty(xmit))
16506 - atmel_stop_tx(port);
16507 + if (!uart_circ_empty(xmit))
16508 + UART_PUT_IER(port, ATMEL_US_TXRDY);
16509 +}
16510 +
16511 +/*
16512 + * receive interrupt handler.
16513 + */
16514 +static void
16515 +atmel_handle_receive(struct uart_port *port, unsigned int pending)
16516 +{
16517 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
16518 +
16519 + if (atmel_use_dma_rx(port)) {
16520 + /*
16521 + * PDC receive. Just schedule the tasklet and let it
16522 + * figure out the details.
16523 + *
16524 + * TODO: We're not handling error flags correctly at
16525 + * the moment.
16526 + */
16527 + if (pending & (ATMEL_US_ENDRX | ATMEL_US_TIMEOUT)) {
16528 + UART_PUT_IDR(port, (ATMEL_US_ENDRX
16529 + | ATMEL_US_TIMEOUT));
16530 + tasklet_schedule(&atmel_port->tasklet);
16531 + }
16532 +
16533 + if (pending & (ATMEL_US_RXBRK | ATMEL_US_OVRE |
16534 + ATMEL_US_FRAME | ATMEL_US_PARE))
16535 + atmel_pdc_rxerr(port, pending);
16536 + }
16537 +
16538 + /* Interrupt receive */
16539 + if (pending & ATMEL_US_RXRDY)
16540 + atmel_rx_chars(port);
16541 + else if (pending & ATMEL_US_RXBRK) {
16542 + /*
16543 + * End of break detected. If it came along with a
16544 + * character, atmel_rx_chars will handle it.
16545 + */
16546 + UART_PUT_CR(port, ATMEL_US_RSTSTA);
16547 + UART_PUT_IDR(port, ATMEL_US_RXBRK);
16548 + atmel_port->break_active = 0;
16549 + }
16550 +}
16551 +
16552 +/*
16553 + * transmit interrupt handler. (Transmit is IRQF_NODELAY safe)
16554 + */
16555 +static void
16556 +atmel_handle_transmit(struct uart_port *port, unsigned int pending)
16557 +{
16558 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
16559 +
16560 + if (atmel_use_dma_tx(port)) {
16561 + /* PDC transmit */
16562 + if (pending & (ATMEL_US_ENDTX | ATMEL_US_TXBUFE)) {
16563 + UART_PUT_IDR(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
16564 + tasklet_schedule(&atmel_port->tasklet);
16565 + }
16566 + } else {
16567 + /* Interrupt transmit */
16568 + if (pending & ATMEL_US_TXRDY) {
16569 + UART_PUT_IDR(port, ATMEL_US_TXRDY);
16570 + tasklet_schedule(&atmel_port->tasklet);
16571 + }
16572 + }
16573 +}
16574 +
16575 +/*
16576 + * status flags interrupt handler.
16577 + */
16578 +static void
16579 +atmel_handle_status(struct uart_port *port, unsigned int pending,
16580 + unsigned int status)
16581 +{
16582 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
16583 +
16584 + if (pending & (ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC
16585 + | ATMEL_US_CTSIC)) {
16586 + atmel_port->irq_status = status;
16587 + tasklet_schedule(&atmel_port->tasklet);
16588 + }
16589 }
16590
16591 /*
16592 @@ -355,47 +536,255 @@
16593 static irqreturn_t atmel_interrupt(int irq, void *dev_id)
16594 {
16595 struct uart_port *port = dev_id;
16596 - struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
16597 unsigned int status, pending, pass_counter = 0;
16598
16599 - status = UART_GET_CSR(port);
16600 - pending = status & UART_GET_IMR(port);
16601 - while (pending) {
16602 - /* Interrupt receive */
16603 - if (pending & ATMEL_US_RXRDY)
16604 - atmel_rx_chars(port);
16605 - else if (pending & ATMEL_US_RXBRK) {
16606 + do {
16607 + status = UART_GET_CSR(port);
16608 + pending = status & UART_GET_IMR(port);
16609 + if (!pending)
16610 + break;
16611 +
16612 + atmel_handle_receive(port, pending);
16613 + atmel_handle_status(port, pending, status);
16614 + atmel_handle_transmit(port, pending);
16615 + } while (pass_counter++ < ATMEL_ISR_PASS_LIMIT);
16616 +
16617 + return IRQ_HANDLED;
16618 +}
16619 +
16620 +/*
16621 + * Called from tasklet with ENDTX and TXBUFE interrupts disabled.
16622 + */
16623 +static void atmel_tx_dma(struct uart_port *port)
16624 +{
16625 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
16626 + struct circ_buf *xmit = &port->info->xmit;
16627 + struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
16628 + int count;
16629 +
16630 + xmit->tail += pdc->ofs;
16631 + xmit->tail &= UART_XMIT_SIZE - 1;
16632 +
16633 + port->icount.tx += pdc->ofs;
16634 + pdc->ofs = 0;
16635 +
16636 + if (!uart_circ_empty(xmit)) {
16637 + /* more to transmit - setup next transfer */
16638 +
16639 + /* disable PDC transmit */
16640 + UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
16641 + dma_sync_single_for_device(port->dev,
16642 + pdc->dma_addr,
16643 + pdc->dma_size,
16644 + DMA_TO_DEVICE);
16645 +
16646 + count = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);
16647 + pdc->ofs = count;
16648 +
16649 + UART_PUT_TPR(port, pdc->dma_addr + xmit->tail);
16650 + UART_PUT_TCR(port, count);
16651 + /* re-enable PDC transmit and interrupts */
16652 + UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
16653 + UART_PUT_IER(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
16654 + } else {
16655 + /* nothing left to transmit - disable the transmitter */
16656 +
16657 + /* disable PDC transmit */
16658 + UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
16659 + }
16660 +
16661 + if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
16662 + uart_write_wakeup(port);
16663 +}
16664 +
16665 +static void atmel_rx_from_ring(struct uart_port *port)
16666 +{
16667 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
16668 + struct circ_buf *ring = &atmel_port->rx_ring;
16669 + unsigned int flg;
16670 + unsigned int status;
16671 +
16672 + while (ring->head != ring->tail) {
16673 + struct atmel_uart_char c;
16674 +
16675 + /* Make sure c is loaded after head. */
16676 + smp_rmb();
16677 +
16678 + c = ((struct atmel_uart_char *)ring->buf)[ring->tail];
16679 +
16680 + ring->tail = (ring->tail + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
16681 +
16682 + port->icount.rx++;
16683 + status = c.status;
16684 + flg = TTY_NORMAL;
16685 +
16686 + /*
16687 + * note that the error handling code is
16688 + * out of the main execution path
16689 + */
16690 + if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
16691 + | ATMEL_US_OVRE | ATMEL_US_RXBRK))) {
16692 + if (status & ATMEL_US_RXBRK) {
16693 + /* ignore side-effect */
16694 + status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
16695 +
16696 + port->icount.brk++;
16697 + if (uart_handle_break(port))
16698 + continue;
16699 + }
16700 + if (status & ATMEL_US_PARE)
16701 + port->icount.parity++;
16702 + if (status & ATMEL_US_FRAME)
16703 + port->icount.frame++;
16704 + if (status & ATMEL_US_OVRE)
16705 + port->icount.overrun++;
16706 +
16707 + status &= port->read_status_mask;
16708 +
16709 + if (status & ATMEL_US_RXBRK)
16710 + flg = TTY_BREAK;
16711 + else if (status & ATMEL_US_PARE)
16712 + flg = TTY_PARITY;
16713 + else if (status & ATMEL_US_FRAME)
16714 + flg = TTY_FRAME;
16715 + }
16716 +
16717 +
16718 + if (uart_handle_sysrq_char(port, c.ch))
16719 + continue;
16720 +
16721 + uart_insert_char(port, status, ATMEL_US_OVRE, c.ch, flg);
16722 + }
16723 +
16724 + /*
16725 + * Drop the lock here since it might end up calling
16726 + * uart_start(), which takes the lock.
16727 + */
16728 + spin_unlock(&port->lock);
16729 + tty_flip_buffer_push(port->info->tty);
16730 + spin_lock(&port->lock);
16731 +}
16732 +
16733 +static void atmel_rx_from_dma(struct uart_port *port)
16734 +{
16735 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
16736 + struct tty_struct *tty = port->info->tty;
16737 + struct atmel_dma_buffer *pdc;
16738 + int rx_idx = atmel_port->pdc_rx_idx;
16739 + unsigned int head;
16740 + unsigned int tail;
16741 + unsigned int count;
16742 +
16743 + do {
16744 + /* Reset the UART timeout early so that we don't miss one */
16745 + UART_PUT_CR(port, ATMEL_US_STTTO);
16746 +
16747 + pdc = &atmel_port->pdc_rx[rx_idx];
16748 + head = UART_GET_RPR(port) - pdc->dma_addr;
16749 + tail = pdc->ofs;
16750 +
16751 + /* If the PDC has switched buffers, RPR won't contain
16752 + * any address within the current buffer. Since head
16753 + * is unsigned, we just need a one-way comparison to
16754 + * find out.
16755 + *
16756 + * In this case, we just need to consume the entire
16757 + * buffer and resubmit it for DMA. This will clear the
16758 + * ENDRX bit as well, so that we can safely re-enable
16759 + * all interrupts below.
16760 + */
16761 + head = min(head, pdc->dma_size);
16762 +
16763 + if (likely(head != tail)) {
16764 + dma_sync_single_for_cpu(port->dev, pdc->dma_addr,
16765 + pdc->dma_size, DMA_FROM_DEVICE);
16766 +
16767 /*
16768 - * End of break detected. If it came along
16769 - * with a character, atmel_rx_chars will
16770 - * handle it.
16771 + * head will only wrap around when we recycle
16772 + * the DMA buffer, and when that happens, we
16773 + * explicitly set tail to 0. So head will
16774 + * always be greater than tail.
16775 */
16776 - UART_PUT_CR(port, ATMEL_US_RSTSTA);
16777 - UART_PUT_IDR(port, ATMEL_US_RXBRK);
16778 - atmel_port->break_active = 0;
16779 + count = head - tail;
16780 +
16781 + tty_insert_flip_string(tty, pdc->buf + pdc->ofs, count);
16782 +
16783 + dma_sync_single_for_device(port->dev, pdc->dma_addr,
16784 + pdc->dma_size, DMA_FROM_DEVICE);
16785 +
16786 + port->icount.rx += count;
16787 + pdc->ofs = head;
16788 + }
16789 +
16790 + /*
16791 + * If the current buffer is full, we need to check if
16792 + * the next one contains any additional data.
16793 + */
16794 + if (head >= pdc->dma_size) {
16795 + pdc->ofs = 0;
16796 + UART_PUT_RNPR(port, pdc->dma_addr);
16797 + UART_PUT_RNCR(port, pdc->dma_size);
16798 +
16799 + rx_idx = !rx_idx;
16800 + atmel_port->pdc_rx_idx = rx_idx;
16801 }
16802 + } while (head >= pdc->dma_size);
16803 +
16804 + /*
16805 + * Drop the lock here since it might end up calling
16806 + * uart_start(), which takes the lock.
16807 + */
16808 + spin_unlock(&port->lock);
16809 + tty_flip_buffer_push(tty);
16810 + spin_lock(&port->lock);
16811 +
16812 + UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
16813 +}
16814
16815 - // TODO: All reads to CSR will clear these interrupts!
16816 - if (pending & ATMEL_US_RIIC) port->icount.rng++;
16817 - if (pending & ATMEL_US_DSRIC) port->icount.dsr++;
16818 - if (pending & ATMEL_US_DCDIC)
16819 +/*
16820 + * tasklet handling tty stuff outside the interrupt handler.
16821 + */
16822 +static void atmel_tasklet_func(unsigned long data)
16823 +{
16824 + struct uart_port *port = (struct uart_port *)data;
16825 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
16826 + unsigned int status;
16827 + unsigned int status_change;
16828 +
16829 + /* The interrupt handler does not take the lock */
16830 + spin_lock(&port->lock);
16831 +
16832 + if (atmel_use_dma_tx(port))
16833 + atmel_tx_dma(port);
16834 + else
16835 + atmel_tx_chars(port);
16836 +
16837 + status = atmel_port->irq_status;
16838 + status_change = status ^ atmel_port->irq_status_prev;
16839 +
16840 + if (status_change & (ATMEL_US_RI | ATMEL_US_DSR
16841 + | ATMEL_US_DCD | ATMEL_US_CTS)) {
16842 + /* TODO: All reads to CSR will clear these interrupts! */
16843 + if (status_change & ATMEL_US_RI)
16844 + port->icount.rng++;
16845 + if (status_change & ATMEL_US_DSR)
16846 + port->icount.dsr++;
16847 + if (status_change & ATMEL_US_DCD)
16848 uart_handle_dcd_change(port, !(status & ATMEL_US_DCD));
16849 - if (pending & ATMEL_US_CTSIC)
16850 + if (status_change & ATMEL_US_CTS)
16851 uart_handle_cts_change(port, !(status & ATMEL_US_CTS));
16852 - if (pending & (ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC | ATMEL_US_CTSIC))
16853 - wake_up_interruptible(&port->info->delta_msr_wait);
16854 -
16855 - /* Interrupt transmit */
16856 - if (pending & ATMEL_US_TXRDY)
16857 - atmel_tx_chars(port);
16858
16859 - if (pass_counter++ > ATMEL_ISR_PASS_LIMIT)
16860 - break;
16861 + wake_up_interruptible(&port->info->delta_msr_wait);
16862
16863 - status = UART_GET_CSR(port);
16864 - pending = status & UART_GET_IMR(port);
16865 + atmel_port->irq_status_prev = status;
16866 }
16867 - return IRQ_HANDLED;
16868 +
16869 + if (atmel_use_dma_rx(port))
16870 + atmel_rx_from_dma(port);
16871 + else
16872 + atmel_rx_from_ring(port);
16873 +
16874 + spin_unlock(&port->lock);
16875 }
16876
16877 /*
16878 @@ -403,6 +792,8 @@
16879 */
16880 static int atmel_startup(struct uart_port *port)
16881 {
16882 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
16883 + struct tty_struct *tty = port->info->tty;
16884 int retval;
16885
16886 /*
16887 @@ -415,13 +806,64 @@
16888 /*
16889 * Allocate the IRQ
16890 */
16891 - retval = request_irq(port->irq, atmel_interrupt, IRQF_SHARED, "atmel_serial", port);
16892 + retval = request_irq(port->irq, atmel_interrupt, IRQF_SHARED,
16893 + tty ? tty->name : "atmel_serial", port);
16894 if (retval) {
16895 printk("atmel_serial: atmel_startup - Can't get irq\n");
16896 return retval;
16897 }
16898
16899 /*
16900 + * Initialize DMA (if necessary)
16901 + */
16902 + if (atmel_use_dma_rx(port)) {
16903 + int i;
16904 +
16905 + for (i = 0; i < 2; i++) {
16906 + struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
16907 +
16908 + pdc->buf = kmalloc(PDC_BUFFER_SIZE, GFP_KERNEL);
16909 + if (pdc->buf == NULL) {
16910 + if (i != 0) {
16911 + dma_unmap_single(port->dev,
16912 + atmel_port->pdc_rx[0].dma_addr,
16913 + PDC_BUFFER_SIZE,
16914 + DMA_FROM_DEVICE);
16915 + kfree(atmel_port->pdc_rx[0].buf);
16916 + }
16917 + free_irq(port->irq, port);
16918 + return -ENOMEM;
16919 + }
16920 + pdc->dma_addr = dma_map_single(port->dev,
16921 + pdc->buf,
16922 + PDC_BUFFER_SIZE,
16923 + DMA_FROM_DEVICE);
16924 + pdc->dma_size = PDC_BUFFER_SIZE;
16925 + pdc->ofs = 0;
16926 + }
16927 +
16928 + atmel_port->pdc_rx_idx = 0;
16929 +
16930 + UART_PUT_RPR(port, atmel_port->pdc_rx[0].dma_addr);
16931 + UART_PUT_RCR(port, PDC_BUFFER_SIZE);
16932 +
16933 + UART_PUT_RNPR(port, atmel_port->pdc_rx[1].dma_addr);
16934 + UART_PUT_RNCR(port, PDC_BUFFER_SIZE);
16935 + }
16936 + if (atmel_use_dma_tx(port)) {
16937 + struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
16938 + struct circ_buf *xmit = &port->info->xmit;
16939 +
16940 + pdc->buf = xmit->buf;
16941 + pdc->dma_addr = dma_map_single(port->dev,
16942 + pdc->buf,
16943 + UART_XMIT_SIZE,
16944 + DMA_TO_DEVICE);
16945 + pdc->dma_size = UART_XMIT_SIZE;
16946 + pdc->ofs = 0;
16947 + }
16948 +
16949 + /*
16950 * If there is a specific "open" function (to register
16951 * control line interrupts)
16952 */
16953 @@ -437,9 +879,21 @@
16954 * Finally, enable the serial port
16955 */
16956 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
16957 - UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN); /* enable xmit & rcvr */
16958 + /* enable xmit & rcvr */
16959 + UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
16960
16961 - UART_PUT_IER(port, ATMEL_US_RXRDY); /* enable receive only */
16962 + if (atmel_use_dma_rx(port)) {
16963 + /* set UART timeout */
16964 + UART_PUT_RTOR(port, PDC_RX_TIMEOUT);
16965 + UART_PUT_CR(port, ATMEL_US_STTTO);
16966 +
16967 + UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
16968 + /* enable PDC controller */
16969 + UART_PUT_PTCR(port, ATMEL_PDC_RXTEN);
16970 + } else {
16971 + /* enable receive only */
16972 + UART_PUT_IER(port, ATMEL_US_RXRDY);
16973 + }
16974
16975 return 0;
16976 }
16977 @@ -449,6 +903,38 @@
16978 */
16979 static void atmel_shutdown(struct uart_port *port)
16980 {
16981 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
16982 + /*
16983 + * Ensure everything is stopped.
16984 + */
16985 + atmel_stop_rx(port);
16986 + atmel_stop_tx(port);
16987 +
16988 + /*
16989 + * Shut-down the DMA.
16990 + */
16991 + if (atmel_use_dma_rx(port)) {
16992 + int i;
16993 +
16994 + for (i = 0; i < 2; i++) {
16995 + struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
16996 +
16997 + dma_unmap_single(port->dev,
16998 + pdc->dma_addr,
16999 + pdc->dma_size,
17000 + DMA_FROM_DEVICE);
17001 + kfree(pdc->buf);
17002 + }
17003 + }
17004 + if (atmel_use_dma_tx(port)) {
17005 + struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
17006 +
17007 + dma_unmap_single(port->dev,
17008 + pdc->dma_addr,
17009 + pdc->dma_size,
17010 + DMA_TO_DEVICE);
17011 + }
17012 +
17013 /*
17014 * Disable all interrupts, port and break condition.
17015 */
17016 @@ -471,45 +957,48 @@
17017 /*
17018 * Power / Clock management.
17019 */
17020 -static void atmel_serial_pm(struct uart_port *port, unsigned int state, unsigned int oldstate)
17021 +static void atmel_serial_pm(struct uart_port *port, unsigned int state,
17022 + unsigned int oldstate)
17023 {
17024 - struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
17025 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
17026
17027 switch (state) {
17028 - case 0:
17029 - /*
17030 - * Enable the peripheral clock for this serial port.
17031 - * This is called on uart_open() or a resume event.
17032 - */
17033 - clk_enable(atmel_port->clk);
17034 - break;
17035 - case 3:
17036 - /*
17037 - * Disable the peripheral clock for this serial port.
17038 - * This is called on uart_close() or a suspend event.
17039 - */
17040 - clk_disable(atmel_port->clk);
17041 - break;
17042 - default:
17043 - printk(KERN_ERR "atmel_serial: unknown pm %d\n", state);
17044 + case 0:
17045 + /*
17046 + * Enable the peripheral clock for this serial port.
17047 + * This is called on uart_open() or a resume event.
17048 + */
17049 + clk_enable(atmel_port->clk);
17050 + break;
17051 + case 3:
17052 + /*
17053 + * Disable the peripheral clock for this serial port.
17054 + * This is called on uart_close() or a suspend event.
17055 + */
17056 + clk_disable(atmel_port->clk);
17057 + break;
17058 + default:
17059 + printk(KERN_ERR "atmel_serial: unknown pm %d\n", state);
17060 }
17061 }
17062
17063 /*
17064 * Change the port parameters
17065 */
17066 -static void atmel_set_termios(struct uart_port *port, struct ktermios * termios, struct ktermios * old)
17067 +static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
17068 + struct ktermios *old)
17069 {
17070 unsigned long flags;
17071 unsigned int mode, imr, quot, baud;
17072
17073 /* Get current mode register */
17074 - mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL | ATMEL_US_NBSTOP | ATMEL_US_PAR);
17075 + mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL
17076 + | ATMEL_US_NBSTOP | ATMEL_US_PAR);
17077
17078 - baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
17079 + baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
17080 quot = uart_get_divisor(port, baud);
17081
17082 - if (quot > 65535) { /* BRGR is 16-bit, so switch to slower clock */
17083 + if (quot > 65535) { /* BRGR is 16-bit, so switch to slower clock */
17084 quot /= 8;
17085 mode |= ATMEL_US_USCLKS_MCK_DIV8;
17086 }
17087 @@ -536,18 +1025,17 @@
17088
17089 /* parity */
17090 if (termios->c_cflag & PARENB) {
17091 - if (termios->c_cflag & CMSPAR) { /* Mark or Space parity */
17092 + /* Mark or Space parity */
17093 + if (termios->c_cflag & CMSPAR) {
17094 if (termios->c_cflag & PARODD)
17095 mode |= ATMEL_US_PAR_MARK;
17096 else
17097 mode |= ATMEL_US_PAR_SPACE;
17098 - }
17099 - else if (termios->c_cflag & PARODD)
17100 + } else if (termios->c_cflag & PARODD)
17101 mode |= ATMEL_US_PAR_ODD;
17102 else
17103 mode |= ATMEL_US_PAR_EVEN;
17104 - }
17105 - else
17106 + } else
17107 mode |= ATMEL_US_PAR_NONE;
17108
17109 spin_lock_irqsave(&port->lock, flags);
17110 @@ -558,6 +1046,10 @@
17111 if (termios->c_iflag & (BRKINT | PARMRK))
17112 port->read_status_mask |= ATMEL_US_RXBRK;
17113
17114 + if (atmel_use_dma_rx(port))
17115 + /* need to enable error interrupts */
17116 + UART_PUT_IER(port, port->read_status_mask);
17117 +
17118 /*
17119 * Characters to ignore
17120 */
17121 @@ -573,16 +1065,16 @@
17122 if (termios->c_iflag & IGNPAR)
17123 port->ignore_status_mask |= ATMEL_US_OVRE;
17124 }
17125 -
17126 - // TODO: Ignore all characters if CREAD is set.
17127 + /* TODO: Ignore all characters if CREAD is set.*/
17128
17129 /* update the per-port timeout */
17130 uart_update_timeout(port, termios->c_cflag, baud);
17131
17132 - /* disable interrupts and drain transmitter */
17133 - imr = UART_GET_IMR(port); /* get interrupt mask */
17134 - UART_PUT_IDR(port, -1); /* disable all interrupts */
17135 - while (!(UART_GET_CSR(port) & ATMEL_US_TXEMPTY)) { barrier(); }
17136 + /* save/disable interrupts and drain transmitter */
17137 + imr = UART_GET_IMR(port);
17138 + UART_PUT_IDR(port, -1);
17139 + while (!(UART_GET_CSR(port) & ATMEL_US_TXEMPTY))
17140 + cpu_relax();
17141
17142 /* disable receiver and transmitter */
17143 UART_PUT_CR(port, ATMEL_US_TXDIS | ATMEL_US_RXDIS);
17144 @@ -708,7 +1200,8 @@
17145 /*
17146 * Configure the port from the platform device resource info.
17147 */
17148 -static void __devinit atmel_init_port(struct atmel_uart_port *atmel_port, struct platform_device *pdev)
17149 +static void __devinit atmel_init_port(struct atmel_uart_port *atmel_port,
17150 + struct platform_device *pdev)
17151 {
17152 struct uart_port *port = &atmel_port->uart;
17153 struct atmel_uart_data *data = pdev->dev.platform_data;
17154 @@ -723,6 +1216,11 @@
17155 port->mapbase = pdev->resource[0].start;
17156 port->irq = pdev->resource[1].start;
17157
17158 + tasklet_init(&atmel_port->tasklet, atmel_tasklet_func,
17159 + (unsigned long)port);
17160 +
17161 + memset(&atmel_port->rx_ring, 0, sizeof(atmel_port->rx_ring));
17162 +
17163 if (data->regs)
17164 /* Already mapped by setup code */
17165 port->membase = data->regs;
17166 @@ -731,11 +1229,17 @@
17167 port->membase = NULL;
17168 }
17169
17170 - if (!atmel_port->clk) { /* for console, the clock could already be configured */
17171 + /* for console, the clock could already be configured */
17172 + if (!atmel_port->clk) {
17173 atmel_port->clk = clk_get(&pdev->dev, "usart");
17174 clk_enable(atmel_port->clk);
17175 port->uartclk = clk_get_rate(atmel_port->clk);
17176 }
17177 +
17178 + atmel_port->use_dma_rx = data->use_dma_rx;
17179 + atmel_port->use_dma_tx = data->use_dma_tx;
17180 + if (atmel_use_dma_tx(port))
17181 + port->fifosize = PDC_BUFFER_SIZE;
17182 }
17183
17184 /*
17185 @@ -755,12 +1259,11 @@
17186 atmel_pops.set_wake = fns->set_wake;
17187 }
17188
17189 -
17190 #ifdef CONFIG_SERIAL_ATMEL_CONSOLE
17191 static void atmel_console_putchar(struct uart_port *port, int ch)
17192 {
17193 while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY))
17194 - barrier();
17195 + cpu_relax();
17196 UART_PUT_CHAR(port, ch);
17197 }
17198
17199 @@ -773,38 +1276,40 @@
17200 unsigned int status, imr;
17201
17202 /*
17203 - * First, save IMR and then disable interrupts
17204 + * First, save IMR and then disable interrupts
17205 */
17206 - imr = UART_GET_IMR(port); /* get interrupt mask */
17207 + imr = UART_GET_IMR(port);
17208 UART_PUT_IDR(port, ATMEL_US_RXRDY | ATMEL_US_TXRDY);
17209
17210 uart_console_write(port, s, count, atmel_console_putchar);
17211
17212 /*
17213 - * Finally, wait for transmitter to become empty
17214 - * and restore IMR
17215 + * Finally, wait for transmitter to become empty
17216 + * and restore IMR
17217 */
17218 do {
17219 status = UART_GET_CSR(port);
17220 } while (!(status & ATMEL_US_TXRDY));
17221 - UART_PUT_IER(port, imr); /* set interrupts back the way they were */
17222 + /* set interrupts back the way they were */
17223 + UART_PUT_IER(port, imr);
17224 }
17225
17226 /*
17227 - * If the port was already initialised (eg, by a boot loader), try to determine
17228 - * the current setup.
17229 + * If the port was already initialised (eg, by a boot loader),
17230 + * try to determine the current setup.
17231 */
17232 -static void __init atmel_console_get_options(struct uart_port *port, int *baud, int *parity, int *bits)
17233 +static void __init atmel_console_get_options(struct uart_port *port, int *baud,
17234 + int *parity, int *bits)
17235 {
17236 unsigned int mr, quot;
17237
17238 -// TODO: CR is a write-only register
17239 -// unsigned int cr;
17240 -//
17241 -// cr = UART_GET_CR(port) & (ATMEL_US_RXEN | ATMEL_US_TXEN);
17242 -// if (cr == (ATMEL_US_RXEN | ATMEL_US_TXEN)) {
17243 -// /* ok, the port was enabled */
17244 -// }
17245 + /*
17246 + * If the baud rate generator isn't running, the port wasn't
17247 + * initialized by the boot loader.
17248 + */
17249 + quot = UART_GET_BRGR(port);
17250 + if (!quot)
17251 + return;
17252
17253 mr = UART_GET_MR(port) & ATMEL_US_CHRL;
17254 if (mr == ATMEL_US_CHRL_8)
17255 @@ -824,7 +1329,6 @@
17256 * lower than one of those, as it would make us fall through
17257 * to a much lower baud rate than we really want.
17258 */
17259 - quot = UART_GET_BRGR(port);
17260 *baud = port->uartclk / (16 * (quot - 1));
17261 }
17262
17263 @@ -836,10 +1340,12 @@
17264 int parity = 'n';
17265 int flow = 'n';
17266
17267 - if (port->membase == 0) /* Port not initialized yet - delay setup */
17268 + if (port->membase == NULL) {
17269 + /* Port not initialized yet - delay setup */
17270 return -ENODEV;
17271 + }
17272
17273 - UART_PUT_IDR(port, -1); /* disable interrupts */
17274 + UART_PUT_IDR(port, -1);
17275 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
17276 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
17277
17278 @@ -871,13 +1377,16 @@
17279 static int __init atmel_console_init(void)
17280 {
17281 if (atmel_default_console_device) {
17282 - add_preferred_console(ATMEL_DEVICENAME, atmel_default_console_device->id, NULL);
17283 - atmel_init_port(&(atmel_ports[atmel_default_console_device->id]), atmel_default_console_device);
17284 + add_preferred_console(ATMEL_DEVICENAME,
17285 + atmel_default_console_device->id, NULL);
17286 + atmel_init_port(&atmel_ports[atmel_default_console_device->id],
17287 + atmel_default_console_device);
17288 register_console(&atmel_console);
17289 }
17290
17291 return 0;
17292 }
17293 +
17294 console_initcall(atmel_console_init);
17295
17296 /*
17297 @@ -885,34 +1394,48 @@
17298 */
17299 static int __init atmel_late_console_init(void)
17300 {
17301 - if (atmel_default_console_device && !(atmel_console.flags & CON_ENABLED))
17302 + if (atmel_default_console_device
17303 + && !(atmel_console.flags & CON_ENABLED))
17304 register_console(&atmel_console);
17305
17306 return 0;
17307 }
17308 +
17309 core_initcall(atmel_late_console_init);
17310
17311 +static inline bool atmel_is_console_port(struct uart_port *port)
17312 +{
17313 + return port->cons && port->cons->index == port->line;
17314 +}
17315 +
17316 #else
17317 #define ATMEL_CONSOLE_DEVICE NULL
17318 +
17319 +static inline bool atmel_is_console_port(struct uart_port *port)
17320 +{
17321 + return false;
17322 +}
17323 #endif
17324
17325 static struct uart_driver atmel_uart = {
17326 - .owner = THIS_MODULE,
17327 - .driver_name = "atmel_serial",
17328 - .dev_name = ATMEL_DEVICENAME,
17329 - .major = SERIAL_ATMEL_MAJOR,
17330 - .minor = MINOR_START,
17331 - .nr = ATMEL_MAX_UART,
17332 - .cons = ATMEL_CONSOLE_DEVICE,
17333 + .owner = THIS_MODULE,
17334 + .driver_name = "atmel_serial",
17335 + .dev_name = ATMEL_DEVICENAME,
17336 + .major = SERIAL_ATMEL_MAJOR,
17337 + .minor = MINOR_START,
17338 + .nr = ATMEL_MAX_UART,
17339 + .cons = ATMEL_CONSOLE_DEVICE,
17340 };
17341
17342 #ifdef CONFIG_PM
17343 -static int atmel_serial_suspend(struct platform_device *pdev, pm_message_t state)
17344 +static int atmel_serial_suspend(struct platform_device *pdev,
17345 + pm_message_t state)
17346 {
17347 struct uart_port *port = platform_get_drvdata(pdev);
17348 - struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
17349 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
17350
17351 - if (device_may_wakeup(&pdev->dev) && !at91_suspend_entering_slow_clock())
17352 + if (device_may_wakeup(&pdev->dev)
17353 + && !at91_suspend_entering_slow_clock())
17354 enable_irq_wake(port->irq);
17355 else {
17356 uart_suspend_port(&atmel_uart, port);
17357 @@ -925,13 +1448,12 @@
17358 static int atmel_serial_resume(struct platform_device *pdev)
17359 {
17360 struct uart_port *port = platform_get_drvdata(pdev);
17361 - struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
17362 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
17363
17364 if (atmel_port->suspended) {
17365 uart_resume_port(&atmel_uart, port);
17366 atmel_port->suspended = 0;
17367 - }
17368 - else
17369 + } else
17370 disable_irq_wake(port->irq);
17371
17372 return 0;
17373 @@ -944,15 +1466,40 @@
17374 static int __devinit atmel_serial_probe(struct platform_device *pdev)
17375 {
17376 struct atmel_uart_port *port;
17377 + void *data;
17378 int ret;
17379
17380 + BUILD_BUG_ON(!is_power_of_2(ATMEL_SERIAL_RINGSIZE));
17381 +
17382 port = &atmel_ports[pdev->id];
17383 atmel_init_port(port, pdev);
17384
17385 + if (!atmel_use_dma_rx(&port->uart)) {
17386 + ret = -ENOMEM;
17387 + data = kmalloc(sizeof(struct atmel_uart_char)
17388 + * ATMEL_SERIAL_RINGSIZE, GFP_KERNEL);
17389 + if (!data)
17390 + goto err_alloc_ring;
17391 + port->rx_ring.buf = data;
17392 + }
17393 +
17394 ret = uart_add_one_port(&atmel_uart, &port->uart);
17395 - if (!ret) {
17396 - device_init_wakeup(&pdev->dev, 1);
17397 - platform_set_drvdata(pdev, port);
17398 + if (ret)
17399 + goto err_add_port;
17400 +
17401 + device_init_wakeup(&pdev->dev, 1);
17402 + platform_set_drvdata(pdev, port);
17403 +
17404 + return 0;
17405 +
17406 +err_add_port:
17407 + kfree(port->rx_ring.buf);
17408 + port->rx_ring.buf = NULL;
17409 +err_alloc_ring:
17410 + if (!atmel_is_console_port(&port->uart)) {
17411 + clk_disable(port->clk);
17412 + clk_put(port->clk);
17413 + port->clk = NULL;
17414 }
17415
17416 return ret;
17417 @@ -961,19 +1508,21 @@
17418 static int __devexit atmel_serial_remove(struct platform_device *pdev)
17419 {
17420 struct uart_port *port = platform_get_drvdata(pdev);
17421 - struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
17422 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
17423 int ret = 0;
17424
17425 - clk_disable(atmel_port->clk);
17426 - clk_put(atmel_port->clk);
17427 -
17428 device_init_wakeup(&pdev->dev, 0);
17429 platform_set_drvdata(pdev, NULL);
17430
17431 - if (port) {
17432 - ret = uart_remove_one_port(&atmel_uart, port);
17433 - kfree(port);
17434 - }
17435 + ret = uart_remove_one_port(&atmel_uart, port);
17436 +
17437 + tasklet_kill(&atmel_port->tasklet);
17438 + kfree(atmel_port->rx_ring.buf);
17439 +
17440 + /* "port" is allocated statically, so we shouldn't free it */
17441 +
17442 + clk_disable(atmel_port->clk);
17443 + clk_put(atmel_port->clk);
17444
17445 return ret;
17446 }
17447 diff -urN linux-2.6.24.3/drivers/serial/atmel_serial.h avr32-2.6/drivers/serial/atmel_serial.h
17448 --- linux-2.6.24.3/drivers/serial/atmel_serial.h 2008-02-26 01:20:20.000000000 +0100
17449 +++ avr32-2.6/drivers/serial/atmel_serial.h 1970-01-01 01:00:00.000000000 +0100
17450 @@ -1,127 +0,0 @@
17451 -/*
17452 - * drivers/serial/atmel_serial.h
17453 - *
17454 - * Copyright (C) 2005 Ivan Kokshaysky
17455 - * Copyright (C) SAN People
17456 - *
17457 - * USART registers.
17458 - * Based on AT91RM9200 datasheet revision E.
17459 - *
17460 - * This program is free software; you can redistribute it and/or modify
17461 - * it under the terms of the GNU General Public License as published by
17462 - * the Free Software Foundation; either version 2 of the License, or
17463 - * (at your option) any later version.
17464 - */
17465 -
17466 -#ifndef ATMEL_SERIAL_H
17467 -#define ATMEL_SERIAL_H
17468 -
17469 -#define ATMEL_US_CR 0x00 /* Control Register */
17470 -#define ATMEL_US_RSTRX (1 << 2) /* Reset Receiver */
17471 -#define ATMEL_US_RSTTX (1 << 3) /* Reset Transmitter */
17472 -#define ATMEL_US_RXEN (1 << 4) /* Receiver Enable */
17473 -#define ATMEL_US_RXDIS (1 << 5) /* Receiver Disable */
17474 -#define ATMEL_US_TXEN (1 << 6) /* Transmitter Enable */
17475 -#define ATMEL_US_TXDIS (1 << 7) /* Transmitter Disable */
17476 -#define ATMEL_US_RSTSTA (1 << 8) /* Reset Status Bits */
17477 -#define ATMEL_US_STTBRK (1 << 9) /* Start Break */
17478 -#define ATMEL_US_STPBRK (1 << 10) /* Stop Break */
17479 -#define ATMEL_US_STTTO (1 << 11) /* Start Time-out */
17480 -#define ATMEL_US_SENDA (1 << 12) /* Send Address */
17481 -#define ATMEL_US_RSTIT (1 << 13) /* Reset Iterations */
17482 -#define ATMEL_US_RSTNACK (1 << 14) /* Reset Non Acknowledge */
17483 -#define ATMEL_US_RETTO (1 << 15) /* Rearm Time-out */
17484 -#define ATMEL_US_DTREN (1 << 16) /* Data Terminal Ready Enable [AT91RM9200 only] */
17485 -#define ATMEL_US_DTRDIS (1 << 17) /* Data Terminal Ready Disable [AT91RM9200 only] */
17486 -#define ATMEL_US_RTSEN (1 << 18) /* Request To Send Enable */
17487 -#define ATMEL_US_RTSDIS (1 << 19) /* Request To Send Disable */
17488 -
17489 -#define ATMEL_US_MR 0x04 /* Mode Register */
17490 -#define ATMEL_US_USMODE (0xf << 0) /* Mode of the USART */
17491 -#define ATMEL_US_USMODE_NORMAL 0
17492 -#define ATMEL_US_USMODE_RS485 1
17493 -#define ATMEL_US_USMODE_HWHS 2
17494 -#define ATMEL_US_USMODE_MODEM 3
17495 -#define ATMEL_US_USMODE_ISO7816_T0 4
17496 -#define ATMEL_US_USMODE_ISO7816_T1 6
17497 -#define ATMEL_US_USMODE_IRDA 8
17498 -#define ATMEL_US_USCLKS (3 << 4) /* Clock Selection */
17499 -#define ATMEL_US_USCLKS_MCK (0 << 4)
17500 -#define ATMEL_US_USCLKS_MCK_DIV8 (1 << 4)
17501 -#define ATMEL_US_USCLKS_SCK (3 << 4)
17502 -#define ATMEL_US_CHRL (3 << 6) /* Character Length */
17503 -#define ATMEL_US_CHRL_5 (0 << 6)
17504 -#define ATMEL_US_CHRL_6 (1 << 6)
17505 -#define ATMEL_US_CHRL_7 (2 << 6)
17506 -#define ATMEL_US_CHRL_8 (3 << 6)
17507 -#define ATMEL_US_SYNC (1 << 8) /* Synchronous Mode Select */
17508 -#define ATMEL_US_PAR (7 << 9) /* Parity Type */
17509 -#define ATMEL_US_PAR_EVEN (0 << 9)
17510 -#define ATMEL_US_PAR_ODD (1 << 9)
17511 -#define ATMEL_US_PAR_SPACE (2 << 9)
17512 -#define ATMEL_US_PAR_MARK (3 << 9)
17513 -#define ATMEL_US_PAR_NONE (4 << 9)
17514 -#define ATMEL_US_PAR_MULTI_DROP (6 << 9)
17515 -#define ATMEL_US_NBSTOP (3 << 12) /* Number of Stop Bits */
17516 -#define ATMEL_US_NBSTOP_1 (0 << 12)
17517 -#define ATMEL_US_NBSTOP_1_5 (1 << 12)
17518 -#define ATMEL_US_NBSTOP_2 (2 << 12)
17519 -#define ATMEL_US_CHMODE (3 << 14) /* Channel Mode */
17520 -#define ATMEL_US_CHMODE_NORMAL (0 << 14)
17521 -#define ATMEL_US_CHMODE_ECHO (1 << 14)
17522 -#define ATMEL_US_CHMODE_LOC_LOOP (2 << 14)
17523 -#define ATMEL_US_CHMODE_REM_LOOP (3 << 14)
17524 -#define ATMEL_US_MSBF (1 << 16) /* Bit Order */
17525 -#define ATMEL_US_MODE9 (1 << 17) /* 9-bit Character Length */
17526 -#define ATMEL_US_CLKO (1 << 18) /* Clock Output Select */
17527 -#define ATMEL_US_OVER (1 << 19) /* Oversampling Mode */
17528 -#define ATMEL_US_INACK (1 << 20) /* Inhibit Non Acknowledge */
17529 -#define ATMEL_US_DSNACK (1 << 21) /* Disable Successive NACK */
17530 -#define ATMEL_US_MAX_ITER (7 << 24) /* Max Iterations */
17531 -#define ATMEL_US_FILTER (1 << 28) /* Infrared Receive Line Filter */
17532 -
17533 -#define ATMEL_US_IER 0x08 /* Interrupt Enable Register */
17534 -#define ATMEL_US_RXRDY (1 << 0) /* Receiver Ready */
17535 -#define ATMEL_US_TXRDY (1 << 1) /* Transmitter Ready */
17536 -#define ATMEL_US_RXBRK (1 << 2) /* Break Received / End of Break */
17537 -#define ATMEL_US_ENDRX (1 << 3) /* End of Receiver Transfer */
17538 -#define ATMEL_US_ENDTX (1 << 4) /* End of Transmitter Transfer */
17539 -#define ATMEL_US_OVRE (1 << 5) /* Overrun Error */
17540 -#define ATMEL_US_FRAME (1 << 6) /* Framing Error */
17541 -#define ATMEL_US_PARE (1 << 7) /* Parity Error */
17542 -#define ATMEL_US_TIMEOUT (1 << 8) /* Receiver Time-out */
17543 -#define ATMEL_US_TXEMPTY (1 << 9) /* Transmitter Empty */
17544 -#define ATMEL_US_ITERATION (1 << 10) /* Max number of Repetitions Reached */
17545 -#define ATMEL_US_TXBUFE (1 << 11) /* Transmission Buffer Empty */
17546 -#define ATMEL_US_RXBUFF (1 << 12) /* Reception Buffer Full */
17547 -#define ATMEL_US_NACK (1 << 13) /* Non Acknowledge */
17548 -#define ATMEL_US_RIIC (1 << 16) /* Ring Indicator Input Change [AT91RM9200 only] */
17549 -#define ATMEL_US_DSRIC (1 << 17) /* Data Set Ready Input Change [AT91RM9200 only] */
17550 -#define ATMEL_US_DCDIC (1 << 18) /* Data Carrier Detect Input Change [AT91RM9200 only] */
17551 -#define ATMEL_US_CTSIC (1 << 19) /* Clear to Send Input Change */
17552 -#define ATMEL_US_RI (1 << 20) /* RI */
17553 -#define ATMEL_US_DSR (1 << 21) /* DSR */
17554 -#define ATMEL_US_DCD (1 << 22) /* DCD */
17555 -#define ATMEL_US_CTS (1 << 23) /* CTS */
17556 -
17557 -#define ATMEL_US_IDR 0x0c /* Interrupt Disable Register */
17558 -#define ATMEL_US_IMR 0x10 /* Interrupt Mask Register */
17559 -#define ATMEL_US_CSR 0x14 /* Channel Status Register */
17560 -#define ATMEL_US_RHR 0x18 /* Receiver Holding Register */
17561 -#define ATMEL_US_THR 0x1c /* Transmitter Holding Register */
17562 -#define ATMEL_US_SYNH (1 << 15) /* Transmit/Receive Sync [AT91SAM9261 only] */
17563 -
17564 -#define ATMEL_US_BRGR 0x20 /* Baud Rate Generator Register */
17565 -#define ATMEL_US_CD (0xffff << 0) /* Clock Divider */
17566 -
17567 -#define ATMEL_US_RTOR 0x24 /* Receiver Time-out Register */
17568 -#define ATMEL_US_TO (0xffff << 0) /* Time-out Value */
17569 -
17570 -#define ATMEL_US_TTGR 0x28 /* Transmitter Timeguard Register */
17571 -#define ATMEL_US_TG (0xff << 0) /* Timeguard Value */
17572 -
17573 -#define ATMEL_US_FIDI 0x40 /* FI DI Ratio Register */
17574 -#define ATMEL_US_NER 0x44 /* Number of Errors Register */
17575 -#define ATMEL_US_IF 0x4c /* IrDA Filter Register */
17576 -
17577 -#endif
17578 diff -urN linux-2.6.24.3/drivers/serial/Kconfig avr32-2.6/drivers/serial/Kconfig
17579 --- linux-2.6.24.3/drivers/serial/Kconfig 2008-02-26 01:20:20.000000000 +0100
17580 +++ avr32-2.6/drivers/serial/Kconfig 2008-04-23 20:12:44.000000000 +0200
17581 @@ -380,6 +380,21 @@
17582 console is the device which receives all kernel messages and
17583 warnings and which allows logins in single user mode).
17584
17585 +config SERIAL_ATMEL_PDC
17586 + bool "Support DMA transfers on AT91 / AT32 serial port"
17587 + depends on SERIAL_ATMEL
17588 + default y
17589 + help
17590 + Say Y here if you wish to use the PDC to do DMA transfers to
17591 + and from the Atmel AT91 / AT32 serial port. In order to
17592 + actually use DMA transfers, make sure that the use_dma_tx
17593 + and use_dma_rx members in the atmel_uart_data struct is set
17594 + appropriately for each port.
17595 +
17596 + Note that break and error handling currently doesn't work
17597 + properly when DMA is enabled. Make sure that ports where
17598 + this matters don't use DMA.
17599 +
17600 config SERIAL_ATMEL_TTYAT
17601 bool "Install as device ttyATn instead of ttySn"
17602 depends on SERIAL_ATMEL=y
17603 diff -urN linux-2.6.24.3/drivers/spi/atmel_spi.c avr32-2.6/drivers/spi/atmel_spi.c
17604 --- linux-2.6.24.3/drivers/spi/atmel_spi.c 2008-02-26 01:20:20.000000000 +0100
17605 +++ avr32-2.6/drivers/spi/atmel_spi.c 2008-04-23 20:12:44.000000000 +0200
17606 @@ -51,7 +51,9 @@
17607 u8 stopping;
17608 struct list_head queue;
17609 struct spi_transfer *current_transfer;
17610 - unsigned long remaining_bytes;
17611 + unsigned long current_remaining_bytes;
17612 + struct spi_transfer *next_transfer;
17613 + unsigned long next_remaining_bytes;
17614
17615 void *buffer;
17616 dma_addr_t buffer_dma;
17617 @@ -85,6 +87,16 @@
17618 unsigned gpio = (unsigned) spi->controller_data;
17619 unsigned active = spi->mode & SPI_CS_HIGH;
17620 u32 mr;
17621 + int i;
17622 + u32 csr;
17623 + u32 cpol = (spi->mode & SPI_CPOL) ? SPI_BIT(CPOL) : 0;
17624 +
17625 + /* Make sure clock polarity is correct */
17626 + for (i = 0; i < spi->master->num_chipselect; i++) {
17627 + csr = spi_readl(as, CSR0 + 4 * i);
17628 + if ((csr ^ cpol) & SPI_BIT(CPOL))
17629 + spi_writel(as, CSR0 + 4 * i, csr ^ SPI_BIT(CPOL));
17630 + }
17631
17632 mr = spi_readl(as, MR);
17633 mr = SPI_BFINS(PCS, ~(1 << spi->chip_select), mr);
17634 @@ -121,6 +133,48 @@
17635 gpio_set_value(gpio, !active);
17636 }
17637
17638 +static inline int atmel_spi_xfer_is_last(struct spi_message *msg,
17639 + struct spi_transfer *xfer)
17640 +{
17641 + return msg->transfers.prev == &xfer->transfer_list;
17642 +}
17643 +
17644 +static inline int atmel_spi_xfer_can_be_chained(struct spi_transfer *xfer)
17645 +{
17646 + return xfer->delay_usecs == 0 && !xfer->cs_change;
17647 +}
17648 +
17649 +static void atmel_spi_next_xfer_data(struct spi_master *master,
17650 + struct spi_transfer *xfer,
17651 + dma_addr_t *tx_dma,
17652 + dma_addr_t *rx_dma,
17653 + u32 *plen)
17654 +{
17655 + struct atmel_spi *as = spi_master_get_devdata(master);
17656 + u32 len = *plen;
17657 +
17658 + /* use scratch buffer only when rx or tx data is unspecified */
17659 + if (xfer->rx_buf)
17660 + *rx_dma = xfer->rx_dma + xfer->len - len;
17661 + else {
17662 + *rx_dma = as->buffer_dma;
17663 + if (len > BUFFER_SIZE)
17664 + len = BUFFER_SIZE;
17665 + }
17666 + if (xfer->tx_buf)
17667 + *tx_dma = xfer->tx_dma + xfer->len - len;
17668 + else {
17669 + *tx_dma = as->buffer_dma;
17670 + if (len > BUFFER_SIZE)
17671 + len = BUFFER_SIZE;
17672 + memset(as->buffer, 0, len);
17673 + dma_sync_single_for_device(&as->pdev->dev,
17674 + as->buffer_dma, len, DMA_TO_DEVICE);
17675 + }
17676 +
17677 + *plen = len;
17678 +}
17679 +
17680 /*
17681 * Submit next transfer for DMA.
17682 * lock is held, spi irq is blocked
17683 @@ -130,53 +184,78 @@
17684 {
17685 struct atmel_spi *as = spi_master_get_devdata(master);
17686 struct spi_transfer *xfer;
17687 - u32 len;
17688 + u32 len, remaining, total;
17689 dma_addr_t tx_dma, rx_dma;
17690
17691 - xfer = as->current_transfer;
17692 - if (!xfer || as->remaining_bytes == 0) {
17693 - if (xfer)
17694 - xfer = list_entry(xfer->transfer_list.next,
17695 - struct spi_transfer, transfer_list);
17696 - else
17697 - xfer = list_entry(msg->transfers.next,
17698 - struct spi_transfer, transfer_list);
17699 - as->remaining_bytes = xfer->len;
17700 - as->current_transfer = xfer;
17701 + if (!as->current_transfer)
17702 + xfer = list_entry(msg->transfers.next,
17703 + struct spi_transfer, transfer_list);
17704 + else if (!as->next_transfer)
17705 + xfer = list_entry(as->current_transfer->transfer_list.next,
17706 + struct spi_transfer, transfer_list);
17707 + else
17708 + xfer = NULL;
17709 +
17710 + if (xfer) {
17711 + len = xfer->len;
17712 + atmel_spi_next_xfer_data(master, xfer, &tx_dma, &rx_dma, &len);
17713 + remaining = xfer->len - len;
17714 +
17715 + spi_writel(as, RPR, rx_dma);
17716 + spi_writel(as, TPR, tx_dma);
17717 +
17718 + if (msg->spi->bits_per_word > 8)
17719 + len >>= 1;
17720 + spi_writel(as, RCR, len);
17721 + spi_writel(as, TCR, len);
17722 +
17723 + dev_dbg(&msg->spi->dev,
17724 + " start xfer %p: len %u tx %p/%08x rx %p/%08x\n",
17725 + xfer, xfer->len, xfer->tx_buf, xfer->tx_dma,
17726 + xfer->rx_buf, xfer->rx_dma);
17727 + } else {
17728 + xfer = as->next_transfer;
17729 + remaining = as->next_remaining_bytes;
17730 }
17731
17732 - len = as->remaining_bytes;
17733 + as->current_transfer = xfer;
17734 + as->current_remaining_bytes = remaining;
17735
17736 - tx_dma = xfer->tx_dma + xfer->len - len;
17737 - rx_dma = xfer->rx_dma + xfer->len - len;
17738 + if (remaining > 0)
17739 + len = remaining;
17740 + else if (!atmel_spi_xfer_is_last(msg, xfer)
17741 + && atmel_spi_xfer_can_be_chained(xfer)) {
17742 + xfer = list_entry(xfer->transfer_list.next,
17743 + struct spi_transfer, transfer_list);
17744 + len = xfer->len;
17745 + } else
17746 + xfer = NULL;
17747
17748 - /* use scratch buffer only when rx or tx data is unspecified */
17749 - if (!xfer->rx_buf) {
17750 - rx_dma = as->buffer_dma;
17751 - if (len > BUFFER_SIZE)
17752 - len = BUFFER_SIZE;
17753 - }
17754 - if (!xfer->tx_buf) {
17755 - tx_dma = as->buffer_dma;
17756 - if (len > BUFFER_SIZE)
17757 - len = BUFFER_SIZE;
17758 - memset(as->buffer, 0, len);
17759 - dma_sync_single_for_device(&as->pdev->dev,
17760 - as->buffer_dma, len, DMA_TO_DEVICE);
17761 - }
17762 + as->next_transfer = xfer;
17763
17764 - spi_writel(as, RPR, rx_dma);
17765 - spi_writel(as, TPR, tx_dma);
17766 + if (xfer) {
17767 + total = len;
17768 + atmel_spi_next_xfer_data(master, xfer, &tx_dma, &rx_dma, &len);
17769 + as->next_remaining_bytes = total - len;
17770 +
17771 + spi_writel(as, RNPR, rx_dma);
17772 + spi_writel(as, TNPR, tx_dma);
17773 +
17774 + if (msg->spi->bits_per_word > 8)
17775 + len >>= 1;
17776 + spi_writel(as, RNCR, len);
17777 + spi_writel(as, TNCR, len);
17778 +
17779 + dev_dbg(&msg->spi->dev,
17780 + " next xfer %p: len %u tx %p/%08x rx %p/%08x\n",
17781 + xfer, xfer->len, xfer->tx_buf, xfer->tx_dma,
17782 + xfer->rx_buf, xfer->rx_dma);
17783 + } else {
17784 + spi_writel(as, RNCR, 0);
17785 + spi_writel(as, TNCR, 0);
17786 + }
17787
17788 - as->remaining_bytes -= len;
17789 - if (msg->spi->bits_per_word > 8)
17790 - len >>= 1;
17791 -
17792 - /* REVISIT: when xfer->delay_usecs == 0, the PDC "next transfer"
17793 - * mechanism might help avoid the IRQ latency between transfers
17794 - * (and improve the nCS0 errata handling on at91rm9200 chips)
17795 - *
17796 - * We're also waiting for ENDRX before we start the next
17797 + /* REVISIT: We're waiting for ENDRX before we start the next
17798 * transfer because we need to handle some difficult timing
17799 * issues otherwise. If we wait for ENDTX in one transfer and
17800 * then starts waiting for ENDRX in the next, it's difficult
17801 @@ -186,17 +265,7 @@
17802 *
17803 * It should be doable, though. Just not now...
17804 */
17805 - spi_writel(as, TNCR, 0);
17806 - spi_writel(as, RNCR, 0);
17807 spi_writel(as, IER, SPI_BIT(ENDRX) | SPI_BIT(OVRES));
17808 -
17809 - dev_dbg(&msg->spi->dev,
17810 - " start xfer %p: len %u tx %p/%08x rx %p/%08x imr %03x\n",
17811 - xfer, xfer->len, xfer->tx_buf, xfer->tx_dma,
17812 - xfer->rx_buf, xfer->rx_dma, spi_readl(as, IMR));
17813 -
17814 - spi_writel(as, RCR, len);
17815 - spi_writel(as, TCR, len);
17816 spi_writel(as, PTCR, SPI_BIT(TXTEN) | SPI_BIT(RXTEN));
17817 }
17818
17819 @@ -294,6 +363,7 @@
17820 spin_lock(&as->lock);
17821
17822 as->current_transfer = NULL;
17823 + as->next_transfer = NULL;
17824
17825 /* continue if needed */
17826 if (list_empty(&as->queue) || as->stopping)
17827 @@ -377,7 +447,7 @@
17828
17829 spi_writel(as, IDR, pending);
17830
17831 - if (as->remaining_bytes == 0) {
17832 + if (as->current_remaining_bytes == 0) {
17833 msg->actual_length += xfer->len;
17834
17835 if (!msg->is_dma_mapped)
17836 @@ -387,7 +457,7 @@
17837 if (xfer->delay_usecs)
17838 udelay(xfer->delay_usecs);
17839
17840 - if (msg->transfers.prev == &xfer->transfer_list) {
17841 + if (atmel_spi_xfer_is_last(msg, xfer)) {
17842 /* report completed message */
17843 atmel_spi_msg_done(master, as, msg, 0,
17844 xfer->cs_change);
17845 @@ -490,9 +560,14 @@
17846 if (!(spi->mode & SPI_CPHA))
17847 csr |= SPI_BIT(NCPHA);
17848
17849 - /* TODO: DLYBS and DLYBCT */
17850 - csr |= SPI_BF(DLYBS, 10);
17851 - csr |= SPI_BF(DLYBCT, 10);
17852 + /* DLYBS is mostly irrelevant since we manage chipselect using GPIOs.
17853 + *
17854 + * DLYBCT would add delays between words, slowing down transfers.
17855 + * It could potentially be useful to cope with DMA bottlenecks, but
17856 + * in those cases it's probably best to just use a lower bitrate.
17857 + */
17858 + csr |= SPI_BF(DLYBS, 0);
17859 + csr |= SPI_BF(DLYBCT, 0);
17860
17861 /* chipselect must have been muxed as GPIO (e.g. in board setup) */
17862 npcs_pin = (unsigned int)spi->controller_data;
17863 diff -urN linux-2.6.24.3/drivers/usb/gadget/atmel_usba_udc.c avr32-2.6/drivers/usb/gadget/atmel_usba_udc.c
17864 --- linux-2.6.24.3/drivers/usb/gadget/atmel_usba_udc.c 2008-02-26 01:20:20.000000000 +0100
17865 +++ avr32-2.6/drivers/usb/gadget/atmel_usba_udc.c 2008-04-23 20:12:45.000000000 +0200
17866 @@ -18,6 +18,7 @@
17867 #include <linux/platform_device.h>
17868 #include <linux/usb/ch9.h>
17869 #include <linux/usb/gadget.h>
17870 +#include <linux/usb/atmel_usba_udc.h>
17871 #include <linux/delay.h>
17872
17873 #include <asm/gpio.h>
17874 @@ -27,6 +28,7 @@
17875
17876
17877 static struct usba_udc the_udc;
17878 +static struct usba_ep *usba_ep;
17879
17880 #ifdef CONFIG_USB_GADGET_DEBUG_FS
17881 #include <linux/debugfs.h>
17882 @@ -324,53 +326,6 @@
17883 return 1;
17884 }
17885
17886 -static void copy_to_fifo(void __iomem *fifo, const void *buf, int len)
17887 -{
17888 - unsigned long tmp;
17889 -
17890 - DBG(DBG_FIFO, "copy to FIFO (len %d):\n", len);
17891 - for (; len > 0; len -= 4, buf += 4, fifo += 4) {
17892 - tmp = *(unsigned long *)buf;
17893 - if (len >= 4) {
17894 - DBG(DBG_FIFO, " -> %08lx\n", tmp);
17895 - __raw_writel(tmp, fifo);
17896 - } else {
17897 - do {
17898 - DBG(DBG_FIFO, " -> %02lx\n", tmp >> 24);
17899 - __raw_writeb(tmp >> 24, fifo);
17900 - fifo++;
17901 - tmp <<= 8;
17902 - } while (--len);
17903 - break;
17904 - }
17905 - }
17906 -}
17907 -
17908 -static void copy_from_fifo(void *buf, void __iomem *fifo, int len)
17909 -{
17910 - union {
17911 - unsigned long *w;
17912 - unsigned char *b;
17913 - } p;
17914 - unsigned long tmp;
17915 -
17916 - DBG(DBG_FIFO, "copy from FIFO (len %d):\n", len);
17917 - for (p.w = buf; len > 0; len -= 4, p.w++, fifo += 4) {
17918 - if (len >= 4) {
17919 - tmp = __raw_readl(fifo);
17920 - *p.w = tmp;
17921 - DBG(DBG_FIFO, " -> %08lx\n", tmp);
17922 - } else {
17923 - do {
17924 - tmp = __raw_readb(fifo);
17925 - *p.b = tmp;
17926 - DBG(DBG_FIFO, " -> %02lx\n", tmp);
17927 - fifo++, p.b++;
17928 - } while (--len);
17929 - }
17930 - }
17931 -}
17932 -
17933 static void next_fifo_transaction(struct usba_ep *ep, struct usba_request *req)
17934 {
17935 unsigned int transaction_len;
17936 @@ -387,7 +342,7 @@
17937 ep->ep.name, req, transaction_len,
17938 req->last_transaction ? ", done" : "");
17939
17940 - copy_to_fifo(ep->fifo, req->req.buf + req->req.actual, transaction_len);
17941 + memcpy_toio(ep->fifo, req->req.buf + req->req.actual, transaction_len);
17942 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
17943 req->req.actual += transaction_len;
17944 }
17945 @@ -476,7 +431,7 @@
17946 bytecount = req->req.length - req->req.actual;
17947 }
17948
17949 - copy_from_fifo(req->req.buf + req->req.actual,
17950 + memcpy_fromio(req->req.buf + req->req.actual,
17951 ep->fifo, bytecount);
17952 req->req.actual += bytecount;
17953
17954 @@ -1029,33 +984,6 @@
17955 .set_selfpowered = usba_udc_set_selfpowered,
17956 };
17957
17958 -#define EP(nam, idx, maxpkt, maxbk, dma, isoc) \
17959 -{ \
17960 - .ep = { \
17961 - .ops = &usba_ep_ops, \
17962 - .name = nam, \
17963 - .maxpacket = maxpkt, \
17964 - }, \
17965 - .udc = &the_udc, \
17966 - .queue = LIST_HEAD_INIT(usba_ep[idx].queue), \
17967 - .fifo_size = maxpkt, \
17968 - .nr_banks = maxbk, \
17969 - .index = idx, \
17970 - .can_dma = dma, \
17971 - .can_isoc = isoc, \
17972 -}
17973 -
17974 -static struct usba_ep usba_ep[] = {
17975 - EP("ep0", 0, 64, 1, 0, 0),
17976 - EP("ep1in-bulk", 1, 512, 2, 1, 1),
17977 - EP("ep2out-bulk", 2, 512, 2, 1, 1),
17978 - EP("ep3in-int", 3, 64, 3, 1, 0),
17979 - EP("ep4out-int", 4, 64, 3, 1, 0),
17980 - EP("ep5in-iso", 5, 1024, 3, 1, 1),
17981 - EP("ep6out-iso", 6, 1024, 3, 1, 1),
17982 -};
17983 -#undef EP
17984 -
17985 static struct usb_endpoint_descriptor usba_ep0_desc = {
17986 .bLength = USB_DT_ENDPOINT_SIZE,
17987 .bDescriptorType = USB_DT_ENDPOINT,
17988 @@ -1074,7 +1002,6 @@
17989 static struct usba_udc the_udc = {
17990 .gadget = {
17991 .ops = &usba_udc_ops,
17992 - .ep0 = &usba_ep[0].ep,
17993 .ep_list = LIST_HEAD_INIT(the_udc.gadget.ep_list),
17994 .is_dualspeed = 1,
17995 .name = "atmel_usba_udc",
17996 @@ -1231,7 +1158,7 @@
17997 } else {
17998 usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
17999 usba_writel(udc, TST, USBA_TST_PKT_MODE);
18000 - copy_to_fifo(ep->fifo, test_packet_buffer,
18001 + memcpy_toio(ep->fifo, test_packet_buffer,
18002 sizeof(test_packet_buffer));
18003 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
18004 dev_info(dev, "Entering Test_Packet mode...\n");
18005 @@ -1539,7 +1466,7 @@
18006 }
18007
18008 DBG(DBG_FIFO, "Copying ctrl request from 0x%p:\n", ep->fifo);
18009 - copy_from_fifo(crq.data, ep->fifo, sizeof(crq));
18010 + memcpy_fromio(crq.data, ep->fifo, sizeof(crq));
18011
18012 /* Free up one bank in the FIFO so that we can
18013 * generate or receive a reply right away. */
18014 @@ -1911,7 +1838,7 @@
18015
18016 regs = platform_get_resource(pdev, IORESOURCE_MEM, CTRL_IOMEM_ID);
18017 fifo = platform_get_resource(pdev, IORESOURCE_MEM, FIFO_IOMEM_ID);
18018 - if (!regs || !fifo)
18019 + if (!regs || !fifo || !pdata)
18020 return -ENXIO;
18021
18022 irq = platform_get_irq(pdev, 0);
18023 @@ -1959,16 +1886,44 @@
18024 usba_writel(udc, CTRL, 0);
18025 clk_disable(pclk);
18026
18027 + usba_ep = kmalloc(sizeof(struct usba_ep) * pdata->num_ep,
18028 + GFP_KERNEL);
18029 + if (!usba_ep)
18030 + goto err_alloc_ep;
18031 +
18032 + the_udc.gadget.ep0 = &usba_ep[0].ep;
18033 +
18034 INIT_LIST_HEAD(&usba_ep[0].ep.ep_list);
18035 usba_ep[0].ep_regs = udc->regs + USBA_EPT_BASE(0);
18036 usba_ep[0].dma_regs = udc->regs + USBA_DMA_BASE(0);
18037 usba_ep[0].fifo = udc->fifo + USBA_FIFO_BASE(0);
18038 - for (i = 1; i < ARRAY_SIZE(usba_ep); i++) {
18039 + usba_ep[0].ep.ops = &usba_ep_ops;
18040 + usba_ep[0].ep.name = pdata->ep[0].name;
18041 + usba_ep[0].ep.maxpacket = pdata->ep[0].fifo_size;
18042 + usba_ep[0].udc = &the_udc;
18043 + INIT_LIST_HEAD(&usba_ep[0].queue);
18044 + usba_ep[0].fifo_size = pdata->ep[0].fifo_size;
18045 + usba_ep[0].nr_banks = pdata->ep[0].nr_banks;
18046 + usba_ep[0].index = pdata->ep[0].index;
18047 + usba_ep[0].can_dma = pdata->ep[0].can_dma;
18048 + usba_ep[0].can_isoc = pdata->ep[0].can_isoc;
18049 +
18050 + for (i = 1; i < pdata->num_ep; i++) {
18051 struct usba_ep *ep = &usba_ep[i];
18052
18053 ep->ep_regs = udc->regs + USBA_EPT_BASE(i);
18054 ep->dma_regs = udc->regs + USBA_DMA_BASE(i);
18055 ep->fifo = udc->fifo + USBA_FIFO_BASE(i);
18056 + ep->ep.ops = &usba_ep_ops;
18057 + ep->ep.name = pdata->ep[i].name;
18058 + ep->ep.maxpacket = pdata->ep[i].fifo_size;
18059 + ep->udc = &the_udc;
18060 + INIT_LIST_HEAD(&ep->queue);
18061 + ep->fifo_size = pdata->ep[i].fifo_size;
18062 + ep->nr_banks = pdata->ep[i].nr_banks;
18063 + ep->index = pdata->ep[i].index;
18064 + ep->can_dma = pdata->ep[i].can_dma;
18065 + ep->can_isoc = pdata->ep[i].can_isoc;
18066
18067 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
18068 }
18069 @@ -1987,7 +1942,7 @@
18070 goto err_device_add;
18071 }
18072
18073 - if (pdata && pdata->vbus_pin != GPIO_PIN_NONE) {
18074 + if (pdata->vbus_pin >= 0) {
18075 if (!gpio_request(pdata->vbus_pin, "atmel_usba_udc")) {
18076 udc->vbus_pin = pdata->vbus_pin;
18077
18078 @@ -2007,7 +1962,7 @@
18079 }
18080
18081 usba_init_debugfs(udc);
18082 - for (i = 1; i < ARRAY_SIZE(usba_ep); i++)
18083 + for (i = 1; i < pdata->num_ep; i++)
18084 usba_ep_init_debugfs(udc, &usba_ep[i]);
18085
18086 return 0;
18087 @@ -2015,6 +1970,8 @@
18088 err_device_add:
18089 free_irq(irq, udc);
18090 err_request_irq:
18091 + kfree(usba_ep);
18092 +err_alloc_ep:
18093 iounmap(udc->fifo);
18094 err_map_fifo:
18095 iounmap(udc->regs);
18096 @@ -2032,10 +1989,11 @@
18097 {
18098 struct usba_udc *udc;
18099 int i;
18100 + struct usba_platform_data *pdata = pdev->dev.platform_data;
18101
18102 udc = platform_get_drvdata(pdev);
18103
18104 - for (i = 1; i < ARRAY_SIZE(usba_ep); i++)
18105 + for (i = 1; i < pdata->num_ep; i++)
18106 usba_ep_cleanup_debugfs(&usba_ep[i]);
18107 usba_cleanup_debugfs(udc);
18108
18109 diff -urN linux-2.6.24.3/drivers/video/atmel_lcdfb.c avr32-2.6/drivers/video/atmel_lcdfb.c
18110 --- linux-2.6.24.3/drivers/video/atmel_lcdfb.c 2008-02-26 01:20:20.000000000 +0100
18111 +++ avr32-2.6/drivers/video/atmel_lcdfb.c 2008-04-23 20:12:45.000000000 +0200
18112 @@ -16,6 +16,7 @@
18113 #include <linux/fb.h>
18114 #include <linux/init.h>
18115 #include <linux/delay.h>
18116 +#include <linux/backlight.h>
18117
18118 #include <asm/arch/board.h>
18119 #include <asm/arch/cpu.h>
18120 @@ -37,7 +38,9 @@
18121 #endif
18122
18123 #if defined(CONFIG_ARCH_AT91)
18124 -#define ATMEL_LCDFB_FBINFO_DEFAULT FBINFO_DEFAULT
18125 +#define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
18126 + | FBINFO_PARTIAL_PAN_OK \
18127 + | FBINFO_HWACCEL_YPAN)
18128
18129 static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
18130 struct fb_var_screeninfo *var)
18131 @@ -69,12 +72,113 @@
18132 }
18133 #endif
18134
18135 +static const u32 contrast_ctr = ATMEL_LCDC_PS_DIV8
18136 + | ATMEL_LCDC_POL_POSITIVE
18137 + | ATMEL_LCDC_ENA_PWMENABLE;
18138 +
18139 +#ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
18140 +
18141 +/* some bl->props field just changed */
18142 +static int atmel_bl_update_status(struct backlight_device *bl)
18143 +{
18144 + struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
18145 + int power = sinfo->bl_power;
18146 + int brightness = bl->props.brightness;
18147 +
18148 + /* REVISIT there may be a meaningful difference between
18149 + * fb_blank and power ... there seem to be some cases
18150 + * this doesn't handle correctly.
18151 + */
18152 + if (bl->props.fb_blank != sinfo->bl_power)
18153 + power = bl->props.fb_blank;
18154 + else if (bl->props.power != sinfo->bl_power)
18155 + power = bl->props.power;
18156 +
18157 + if (brightness < 0 && power == FB_BLANK_UNBLANK)
18158 + brightness = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
18159 + else if (power != FB_BLANK_UNBLANK)
18160 + brightness = 0;
18161 +
18162 + lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, brightness);
18163 + lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR,
18164 + brightness ? contrast_ctr : 0);
18165 +
18166 + bl->props.fb_blank = bl->props.power = sinfo->bl_power = power;
18167 +
18168 + return 0;
18169 +}
18170 +
18171 +static int atmel_bl_get_brightness(struct backlight_device *bl)
18172 +{
18173 + struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
18174 +
18175 + return lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
18176 +}
18177 +
18178 +static struct backlight_ops atmel_lcdc_bl_ops = {
18179 + .update_status = atmel_bl_update_status,
18180 + .get_brightness = atmel_bl_get_brightness,
18181 +};
18182 +
18183 +static void init_backlight(struct atmel_lcdfb_info *sinfo)
18184 +{
18185 + struct backlight_device *bl;
18186 +
18187 + sinfo->bl_power = FB_BLANK_UNBLANK;
18188 +
18189 + if (sinfo->backlight)
18190 + return;
18191 +
18192 + bl = backlight_device_register("backlight", &sinfo->pdev->dev,
18193 + sinfo, &atmel_lcdc_bl_ops);
18194 + if (IS_ERR(sinfo->backlight)) {
18195 + dev_err(&sinfo->pdev->dev, "error %ld on backlight register\n",
18196 + PTR_ERR(bl));
18197 + return;
18198 + }
18199 + sinfo->backlight = bl;
18200 +
18201 + bl->props.power = FB_BLANK_UNBLANK;
18202 + bl->props.fb_blank = FB_BLANK_UNBLANK;
18203 + bl->props.max_brightness = 0xff;
18204 + bl->props.brightness = atmel_bl_get_brightness(bl);
18205 +}
18206 +
18207 +static void exit_backlight(struct atmel_lcdfb_info *sinfo)
18208 +{
18209 + if (sinfo->backlight)
18210 + backlight_device_unregister(sinfo->backlight);
18211 +}
18212 +
18213 +#else
18214 +
18215 +static void init_backlight(struct atmel_lcdfb_info *sinfo)
18216 +{
18217 + dev_warn(&sinfo->pdev->dev, "backlight control is not available\n");
18218 +}
18219 +
18220 +static void exit_backlight(struct atmel_lcdfb_info *sinfo)
18221 +{
18222 +}
18223 +
18224 +#endif
18225 +
18226 +static void init_contrast(struct atmel_lcdfb_info *sinfo)
18227 +{
18228 + /* have some default contrast/backlight settings */
18229 + lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
18230 + lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
18231 +
18232 + if (sinfo->lcdcon_is_backlight)
18233 + init_backlight(sinfo);
18234 +}
18235 +
18236
18237 static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
18238 .type = FB_TYPE_PACKED_PIXELS,
18239 .visual = FB_VISUAL_TRUECOLOR,
18240 .xpanstep = 0,
18241 - .ypanstep = 0,
18242 + .ypanstep = 1,
18243 .ywrapstep = 0,
18244 .accel = FB_ACCEL_NONE,
18245 };
18246 @@ -148,6 +252,8 @@
18247 return -ENOMEM;
18248 }
18249
18250 + memset(info->screen_base, 0, info->fix.smem_len);
18251 +
18252 return 0;
18253 }
18254
18255 @@ -203,6 +309,26 @@
18256 var->transp.offset = var->transp.length = 0;
18257 var->xoffset = var->yoffset = 0;
18258
18259 + /* Saturate vertical and horizontal timings at maximum values */
18260 + var->vsync_len = min_t(u32, var->vsync_len,
18261 + (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1);
18262 + var->upper_margin = min_t(u32, var->upper_margin,
18263 + ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET);
18264 + var->lower_margin = min_t(u32, var->lower_margin,
18265 + ATMEL_LCDC_VFP);
18266 + var->right_margin = min_t(u32, var->right_margin,
18267 + (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1);
18268 + var->hsync_len = min_t(u32, var->hsync_len,
18269 + (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1);
18270 + var->left_margin = min_t(u32, var->left_margin,
18271 + ATMEL_LCDC_HBP + 1);
18272 +
18273 + /* Some parameters can't be zero */
18274 + var->vsync_len = max_t(u32, var->vsync_len, 1);
18275 + var->right_margin = max_t(u32, var->right_margin, 1);
18276 + var->hsync_len = max_t(u32, var->hsync_len, 1);
18277 + var->left_margin = max_t(u32, var->left_margin, 1);
18278 +
18279 switch (var->bits_per_pixel) {
18280 case 1:
18281 case 2:
18282 @@ -370,10 +496,6 @@
18283 /* Disable all interrupts */
18284 lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
18285
18286 - /* Set contrast */
18287 - value = ATMEL_LCDC_PS_DIV8 | ATMEL_LCDC_POL_POSITIVE | ATMEL_LCDC_ENA_PWMENABLE;
18288 - lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, value);
18289 - lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
18290 /* ...wait for DMA engine to become idle... */
18291 while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
18292 msleep(10);
18293 @@ -516,7 +638,6 @@
18294 struct fb_info *info = sinfo->info;
18295 int ret = 0;
18296
18297 - memset_io(info->screen_base, 0, info->fix.smem_len);
18298 info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
18299
18300 dev_info(info->device,
18301 @@ -577,6 +698,7 @@
18302 sinfo->default_monspecs = pdata_sinfo->default_monspecs;
18303 sinfo->atmel_lcdfb_power_control = pdata_sinfo->atmel_lcdfb_power_control;
18304 sinfo->guard_time = pdata_sinfo->guard_time;
18305 + sinfo->lcdcon_is_backlight = pdata_sinfo->lcdcon_is_backlight;
18306 } else {
18307 dev_err(dev, "cannot get default configuration\n");
18308 goto free_info;
18309 @@ -645,6 +767,11 @@
18310 info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
18311 if (!info->screen_base)
18312 goto release_intmem;
18313 +
18314 + /*
18315 + * Don't clear the framebuffer -- someone may have set
18316 + * up a splash image.
18317 + */
18318 } else {
18319 /* alocate memory buffer */
18320 ret = atmel_lcdfb_alloc_video_memory(sinfo);
18321 @@ -670,6 +797,9 @@
18322 goto release_mem;
18323 }
18324
18325 + /* Initialize PWM for contrast or backlight ("off") */
18326 + init_contrast(sinfo);
18327 +
18328 /* interrupt */
18329 ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info);
18330 if (ret) {
18331 @@ -721,6 +851,7 @@
18332 unregister_irqs:
18333 free_irq(sinfo->irq_base, info);
18334 unmap_mmio:
18335 + exit_backlight(sinfo);
18336 iounmap(sinfo->mmio);
18337 release_mem:
18338 release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
18339 @@ -755,6 +886,7 @@
18340 if (!sinfo)
18341 return 0;
18342
18343 + exit_backlight(sinfo);
18344 if (sinfo->atmel_lcdfb_power_control)
18345 sinfo->atmel_lcdfb_power_control(0);
18346 unregister_framebuffer(info);
18347 @@ -781,6 +913,9 @@
18348
18349 static struct platform_driver atmel_lcdfb_driver = {
18350 .remove = __exit_p(atmel_lcdfb_remove),
18351 +
18352 +// FIXME need suspend, resume
18353 +
18354 .driver = {
18355 .name = "atmel_lcdfb",
18356 .owner = THIS_MODULE,
18357 diff -urN linux-2.6.24.3/drivers/video/backlight/Kconfig avr32-2.6/drivers/video/backlight/Kconfig
18358 --- linux-2.6.24.3/drivers/video/backlight/Kconfig 2008-02-26 01:20:20.000000000 +0100
18359 +++ avr32-2.6/drivers/video/backlight/Kconfig 2008-04-23 20:12:45.000000000 +0200
18360 @@ -50,6 +50,19 @@
18361 To have support for your specific LCD panel you will have to
18362 select the proper drivers which depend on this option.
18363
18364 +config BACKLIGHT_ATMEL_LCDC
18365 + bool "Atmel LCDC Contrast-as-Backlight control"
18366 + depends on BACKLIGHT_CLASS_DEVICE && FB_ATMEL
18367 + default y if MACH_SAM9261EK || MACH_SAM9263EK
18368 + help
18369 + This provides a backlight control internal to the Atmel LCDC
18370 + driver. If the LCD "contrast control" on your board is wired
18371 + so it controls the backlight brightness, select this option to
18372 + export this as a PWM-based backlight control.
18373 +
18374 + If in doubt, it's safe to enable this option; it doesn't kick
18375 + in unless the board's description says it's wired that way.
18376 +
18377 config BACKLIGHT_CORGI
18378 tristate "Generic (aka Sharp Corgi) Backlight Driver"
18379 depends on BACKLIGHT_CLASS_DEVICE
18380 diff -urN linux-2.6.24.3/drivers/video/console/Kconfig avr32-2.6/drivers/video/console/Kconfig
18381 --- linux-2.6.24.3/drivers/video/console/Kconfig 2008-02-26 01:20:20.000000000 +0100
18382 +++ avr32-2.6/drivers/video/console/Kconfig 2008-04-23 19:33:46.000000000 +0200
18383 @@ -6,7 +6,7 @@
18384
18385 config VGA_CONSOLE
18386 bool "VGA text console" if EMBEDDED || !X86
18387 - depends on !ARCH_ACORN && !ARCH_EBSA110 && !4xx && !8xx && !SPARC && !M68K && !PARISC && !FRV && !ARCH_VERSATILE && !SUPERH && !BLACKFIN
18388 + depends on !ARCH_ACORN && !ARCH_EBSA110 && !4xx && !8xx && !SPARC && !M68K && !PARISC && !FRV && !ARCH_VERSATILE && !SUPERH && !BLACKFIN && !AVR32
18389 default y
18390 help
18391 Saying Y here will allow you to use Linux in text mode through a
18392 diff -urN linux-2.6.24.3/drivers/watchdog/Kconfig avr32-2.6/drivers/watchdog/Kconfig
18393 --- linux-2.6.24.3/drivers/watchdog/Kconfig 2008-02-26 01:20:20.000000000 +0100
18394 +++ avr32-2.6/drivers/watchdog/Kconfig 2008-04-23 20:12:45.000000000 +0200
18395 @@ -223,7 +223,7 @@
18396
18397 config AT32AP700X_WDT
18398 tristate "AT32AP700x watchdog"
18399 - depends on CPU_AT32AP7000
18400 + depends on CPU_AT32AP700X
18401 help
18402 Watchdog timer embedded into AT32AP700x devices. This will reboot
18403 your system when the timeout is reached.
18404 diff -urN linux-2.6.24.3/include/asm-avr32/arch-at32ap/at32ap7000.h avr32-2.6/include/asm-avr32/arch-at32ap/at32ap7000.h
18405 --- linux-2.6.24.3/include/asm-avr32/arch-at32ap/at32ap7000.h 2008-02-26 01:20:20.000000000 +0100
18406 +++ avr32-2.6/include/asm-avr32/arch-at32ap/at32ap7000.h 1970-01-01 01:00:00.000000000 +0100
18407 @@ -1,35 +0,0 @@
18408 -/*
18409 - * Pin definitions for AT32AP7000.
18410 - *
18411 - * Copyright (C) 2006 Atmel Corporation
18412 - *
18413 - * This program is free software; you can redistribute it and/or modify
18414 - * it under the terms of the GNU General Public License version 2 as
18415 - * published by the Free Software Foundation.
18416 - */
18417 -#ifndef __ASM_ARCH_AT32AP7000_H__
18418 -#define __ASM_ARCH_AT32AP7000_H__
18419 -
18420 -#define GPIO_PERIPH_A 0
18421 -#define GPIO_PERIPH_B 1
18422 -
18423 -#define NR_GPIO_CONTROLLERS 4
18424 -
18425 -/*
18426 - * Pin numbers identifying specific GPIO pins on the chip. They can
18427 - * also be converted to IRQ numbers by passing them through
18428 - * gpio_to_irq().
18429 - */
18430 -#define GPIO_PIOA_BASE (0)
18431 -#define GPIO_PIOB_BASE (GPIO_PIOA_BASE + 32)
18432 -#define GPIO_PIOC_BASE (GPIO_PIOB_BASE + 32)
18433 -#define GPIO_PIOD_BASE (GPIO_PIOC_BASE + 32)
18434 -#define GPIO_PIOE_BASE (GPIO_PIOD_BASE + 32)
18435 -
18436 -#define GPIO_PIN_PA(N) (GPIO_PIOA_BASE + (N))
18437 -#define GPIO_PIN_PB(N) (GPIO_PIOB_BASE + (N))
18438 -#define GPIO_PIN_PC(N) (GPIO_PIOC_BASE + (N))
18439 -#define GPIO_PIN_PD(N) (GPIO_PIOD_BASE + (N))
18440 -#define GPIO_PIN_PE(N) (GPIO_PIOE_BASE + (N))
18441 -
18442 -#endif /* __ASM_ARCH_AT32AP7000_H__ */
18443 diff -urN linux-2.6.24.3/include/asm-avr32/arch-at32ap/at32ap700x.h avr32-2.6/include/asm-avr32/arch-at32ap/at32ap700x.h
18444 --- linux-2.6.24.3/include/asm-avr32/arch-at32ap/at32ap700x.h 1970-01-01 01:00:00.000000000 +0100
18445 +++ avr32-2.6/include/asm-avr32/arch-at32ap/at32ap700x.h 2008-04-23 20:12:46.000000000 +0200
18446 @@ -0,0 +1,35 @@
18447 +/*
18448 + * Pin definitions for AT32AP7000.
18449 + *
18450 + * Copyright (C) 2006 Atmel Corporation
18451 + *
18452 + * This program is free software; you can redistribute it and/or modify
18453 + * it under the terms of the GNU General Public License version 2 as
18454 + * published by the Free Software Foundation.
18455 + */
18456 +#ifndef __ASM_ARCH_AT32AP700X_H__
18457 +#define __ASM_ARCH_AT32AP700X_H__
18458 +
18459 +#define GPIO_PERIPH_A 0
18460 +#define GPIO_PERIPH_B 1
18461 +
18462 +#define NR_GPIO_CONTROLLERS 4
18463 +
18464 +/*
18465 + * Pin numbers identifying specific GPIO pins on the chip. They can
18466 + * also be converted to IRQ numbers by passing them through
18467 + * gpio_to_irq().
18468 + */
18469 +#define GPIO_PIOA_BASE (0)
18470 +#define GPIO_PIOB_BASE (GPIO_PIOA_BASE + 32)
18471 +#define GPIO_PIOC_BASE (GPIO_PIOB_BASE + 32)
18472 +#define GPIO_PIOD_BASE (GPIO_PIOC_BASE + 32)
18473 +#define GPIO_PIOE_BASE (GPIO_PIOD_BASE + 32)
18474 +
18475 +#define GPIO_PIN_PA(N) (GPIO_PIOA_BASE + (N))
18476 +#define GPIO_PIN_PB(N) (GPIO_PIOB_BASE + (N))
18477 +#define GPIO_PIN_PC(N) (GPIO_PIOC_BASE + (N))
18478 +#define GPIO_PIN_PD(N) (GPIO_PIOD_BASE + (N))
18479 +#define GPIO_PIN_PE(N) (GPIO_PIOE_BASE + (N))
18480 +
18481 +#endif /* __ASM_ARCH_AT32AP700X_H__ */
18482 diff -urN linux-2.6.24.3/include/asm-avr32/arch-at32ap/board.h avr32-2.6/include/asm-avr32/arch-at32ap/board.h
18483 --- linux-2.6.24.3/include/asm-avr32/arch-at32ap/board.h 2008-02-26 01:20:20.000000000 +0100
18484 +++ avr32-2.6/include/asm-avr32/arch-at32ap/board.h 2008-04-23 20:12:46.000000000 +0200
18485 @@ -38,9 +38,7 @@
18486 at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
18487 unsigned long fbmem_start, unsigned long fbmem_len);
18488
18489 -struct usba_platform_data {
18490 - int vbus_pin;
18491 -};
18492 +struct usba_platform_data;
18493 struct platform_device *
18494 at32_add_device_usba(unsigned int id, struct usba_platform_data *data);
18495
18496 @@ -51,6 +49,9 @@
18497 at32_add_device_ide(unsigned int id, unsigned int extint,
18498 struct ide_platform_data *data);
18499
18500 +/* mask says which PWM channels to mux */
18501 +struct platform_device *at32_add_device_pwm(u32 mask);
18502 +
18503 /* depending on what's hooked up, not all SSC pins will be used */
18504 #define ATMEL_SSC_TK 0x01
18505 #define ATMEL_SSC_TF 0x02
18506 @@ -65,8 +66,17 @@
18507 struct platform_device *
18508 at32_add_device_ssc(unsigned int id, unsigned int flags);
18509
18510 -struct platform_device *at32_add_device_twi(unsigned int id);
18511 -struct platform_device *at32_add_device_mci(unsigned int id);
18512 +struct i2c_board_info;
18513 +struct platform_device *at32_add_device_twi(unsigned int id,
18514 + struct i2c_board_info *b,
18515 + unsigned int n);
18516 +
18517 +struct mci_platform_data {
18518 + int detect_pin;
18519 + int wp_pin;
18520 +};
18521 +struct platform_device *
18522 +at32_add_device_mci(unsigned int id, struct mci_platform_data *data);
18523 struct platform_device *at32_add_device_ac97c(unsigned int id);
18524 struct platform_device *at32_add_device_abdac(unsigned int id);
18525
18526 @@ -81,4 +91,7 @@
18527 at32_add_device_cf(unsigned int id, unsigned int extint,
18528 struct cf_platform_data *data);
18529
18530 +struct platform_device *
18531 +at32_add_device_psif(unsigned int id);
18532 +
18533 #endif /* __ASM_ARCH_BOARD_H */
18534 diff -urN linux-2.6.24.3/include/asm-avr32/arch-at32ap/cpu.h avr32-2.6/include/asm-avr32/arch-at32ap/cpu.h
18535 --- linux-2.6.24.3/include/asm-avr32/arch-at32ap/cpu.h 2008-02-26 01:20:20.000000000 +0100
18536 +++ avr32-2.6/include/asm-avr32/arch-at32ap/cpu.h 2008-04-23 20:12:46.000000000 +0200
18537 @@ -14,7 +14,7 @@
18538 * Only AT32AP7000 is defined for now. We can identify the specific
18539 * chip at runtime, but I'm not sure if it's really worth it.
18540 */
18541 -#ifdef CONFIG_CPU_AT32AP7000
18542 +#ifdef CONFIG_CPU_AT32AP700X
18543 # define cpu_is_at32ap7000() (1)
18544 #else
18545 # define cpu_is_at32ap7000() (0)
18546 diff -urN linux-2.6.24.3/include/asm-avr32/arch-at32ap/io.h avr32-2.6/include/asm-avr32/arch-at32ap/io.h
18547 --- linux-2.6.24.3/include/asm-avr32/arch-at32ap/io.h 2008-02-26 01:20:20.000000000 +0100
18548 +++ avr32-2.6/include/asm-avr32/arch-at32ap/io.h 2008-04-23 19:33:48.000000000 +0200
18549 @@ -4,7 +4,7 @@
18550 /* For "bizarre" halfword swapping */
18551 #include <linux/byteorder/swabb.h>
18552
18553 -#if defined(CONFIG_AP7000_32_BIT_SMC)
18554 +#if defined(CONFIG_AP700X_32_BIT_SMC)
18555 # define __swizzle_addr_b(addr) (addr ^ 3UL)
18556 # define __swizzle_addr_w(addr) (addr ^ 2UL)
18557 # define __swizzle_addr_l(addr) (addr)
18558 @@ -14,7 +14,7 @@
18559 # define __mem_ioswabb(a, x) (x)
18560 # define __mem_ioswabw(a, x) swab16(x)
18561 # define __mem_ioswabl(a, x) swab32(x)
18562 -#elif defined(CONFIG_AP7000_16_BIT_SMC)
18563 +#elif defined(CONFIG_AP700X_16_BIT_SMC)
18564 # define __swizzle_addr_b(addr) (addr ^ 1UL)
18565 # define __swizzle_addr_w(addr) (addr)
18566 # define __swizzle_addr_l(addr) (addr)
18567 diff -urN linux-2.6.24.3/include/asm-avr32/arch-at32ap/pm.h avr32-2.6/include/asm-avr32/arch-at32ap/pm.h
18568 --- linux-2.6.24.3/include/asm-avr32/arch-at32ap/pm.h 1970-01-01 01:00:00.000000000 +0100
18569 +++ avr32-2.6/include/asm-avr32/arch-at32ap/pm.h 2008-04-23 20:12:46.000000000 +0200
18570 @@ -0,0 +1,48 @@
18571 +/*
18572 + * AVR32 AP Power Management.
18573 + *
18574 + * Copyright (C) 2008 Atmel Corporation
18575 + *
18576 + * This program is free software; you can redistribute it and/or modify
18577 + * it under the terms of the GNU General Public License version 2 as
18578 + * published by the Free Software Foundation.
18579 + */
18580 +#ifndef __ASM_AVR32_ARCH_PM_H
18581 +#define __ASM_AVR32_ARCH_PM_H
18582 +
18583 +/* Possible arguments to the "sleep" instruction */
18584 +#define CPU_SLEEP_IDLE 0
18585 +#define CPU_SLEEP_FROZEN 1
18586 +#define CPU_SLEEP_STANDBY 2
18587 +#define CPU_SLEEP_STOP 3
18588 +#define CPU_SLEEP_STATIC 5
18589 +
18590 +#ifndef __ASSEMBLY__
18591 +extern void cpu_enter_idle(void);
18592 +
18593 +extern bool disable_idle_sleep;
18594 +
18595 +static inline void cpu_disable_idle_sleep(void)
18596 +{
18597 + disable_idle_sleep = true;
18598 +}
18599 +
18600 +static inline void cpu_enable_idle_sleep(void)
18601 +{
18602 + disable_idle_sleep = false;
18603 +}
18604 +
18605 +static inline void cpu_idle_sleep(void)
18606 +{
18607 + /*
18608 + * If we're using the COUNT and COMPARE registers for
18609 + * timekeeping, we can't use the IDLE state.
18610 + */
18611 + if (disable_idle_sleep)
18612 + cpu_relax();
18613 + else
18614 + cpu_enter_idle();
18615 +}
18616 +#endif
18617 +
18618 +#endif /* __ASM_AVR32_ARCH_PM_H */
18619 diff -urN linux-2.6.24.3/include/asm-avr32/arch-at32ap/portmux.h avr32-2.6/include/asm-avr32/arch-at32ap/portmux.h
18620 --- linux-2.6.24.3/include/asm-avr32/arch-at32ap/portmux.h 2008-02-26 01:20:20.000000000 +0100
18621 +++ avr32-2.6/include/asm-avr32/arch-at32ap/portmux.h 2008-04-23 19:33:48.000000000 +0200
18622 @@ -26,4 +26,16 @@
18623 void at32_select_gpio(unsigned int pin, unsigned long flags);
18624 void at32_reserve_pin(unsigned int pin);
18625
18626 +#ifdef CONFIG_GPIO_DEV
18627 +
18628 +/* Gang allocators and accessors; used by the GPIO /dev driver */
18629 +int at32_gpio_port_is_valid(unsigned int port);
18630 +int at32_select_gpio_pins(unsigned int port, u32 pins, u32 oe_mask);
18631 +void at32_deselect_pins(unsigned int port, u32 pins);
18632 +
18633 +u32 at32_gpio_get_value_multiple(unsigned int port, u32 pins);
18634 +void at32_gpio_set_value_multiple(unsigned int port, u32 value, u32 mask);
18635 +
18636 +#endif /* CONFIG_GPIO_DEV */
18637 +
18638 #endif /* __ASM_ARCH_PORTMUX_H__ */
18639 diff -urN linux-2.6.24.3/include/asm-avr32/arch-at32ap/time.h avr32-2.6/include/asm-avr32/arch-at32ap/time.h
18640 --- linux-2.6.24.3/include/asm-avr32/arch-at32ap/time.h 2008-02-26 01:20:20.000000000 +0100
18641 +++ avr32-2.6/include/asm-avr32/arch-at32ap/time.h 1970-01-01 01:00:00.000000000 +0100
18642 @@ -1,112 +0,0 @@
18643 -/*
18644 - * Copyright (C) 2007 Atmel Corporation
18645 - *
18646 - * This program is free software; you can redistribute it and/or modify
18647 - * it under the terms of the GNU General Public License version 2 as
18648 - * published by the Free Software Foundation.
18649 - */
18650 -
18651 -#ifndef _ASM_AVR32_ARCH_AT32AP_TIME_H
18652 -#define _ASM_AVR32_ARCH_AT32AP_TIME_H
18653 -
18654 -#include <linux/platform_device.h>
18655 -
18656 -extern struct irqaction timer_irqaction;
18657 -extern struct platform_device at32_systc0_device;
18658 -extern void local_timer_interrupt(int irq, void *dev_id);
18659 -
18660 -#define TIMER_BCR 0x000000c0
18661 -#define TIMER_BCR_SYNC 0
18662 -#define TIMER_BMR 0x000000c4
18663 -#define TIMER_BMR_TC0XC0S 0
18664 -#define TIMER_BMR_TC1XC1S 2
18665 -#define TIMER_BMR_TC2XC2S 4
18666 -#define TIMER_CCR 0x00000000
18667 -#define TIMER_CCR_CLKDIS 1
18668 -#define TIMER_CCR_CLKEN 0
18669 -#define TIMER_CCR_SWTRG 2
18670 -#define TIMER_CMR 0x00000004
18671 -#define TIMER_CMR_ABETRG 10
18672 -#define TIMER_CMR_ACPA 16
18673 -#define TIMER_CMR_ACPC 18
18674 -#define TIMER_CMR_AEEVT 20
18675 -#define TIMER_CMR_ASWTRG 22
18676 -#define TIMER_CMR_BCPB 24
18677 -#define TIMER_CMR_BCPC 26
18678 -#define TIMER_CMR_BEEVT 28
18679 -#define TIMER_CMR_BSWTRG 30
18680 -#define TIMER_CMR_BURST 4
18681 -#define TIMER_CMR_CLKI 3
18682 -#define TIMER_CMR_CPCDIS 7
18683 -#define TIMER_CMR_CPCSTOP 6
18684 -#define TIMER_CMR_CPCTRG 14
18685 -#define TIMER_CMR_EEVT 10
18686 -#define TIMER_CMR_EEVTEDG 8
18687 -#define TIMER_CMR_ENETRG 12
18688 -#define TIMER_CMR_ETRGEDG 8
18689 -#define TIMER_CMR_LDBDIS 7
18690 -#define TIMER_CMR_LDBSTOP 6
18691 -#define TIMER_CMR_LDRA 16
18692 -#define TIMER_CMR_LDRB 18
18693 -#define TIMER_CMR_TCCLKS 0
18694 -#define TIMER_CMR_WAVE 15
18695 -#define TIMER_CMR_WAVSEL 13
18696 -#define TIMER_CV 0x00000010
18697 -#define TIMER_CV_CV 0
18698 -#define TIMER_IDR 0x00000028
18699 -#define TIMER_IDR_COVFS 0
18700 -#define TIMER_IDR_CPAS 2
18701 -#define TIMER_IDR_CPBS 3
18702 -#define TIMER_IDR_CPCS 4
18703 -#define TIMER_IDR_ETRGS 7
18704 -#define TIMER_IDR_LDRAS 5
18705 -#define TIMER_IDR_LDRBS 6
18706 -#define TIMER_IDR_LOVRS 1
18707 -#define TIMER_IER 0x00000024
18708 -#define TIMER_IER_COVFS 0
18709 -#define TIMER_IER_CPAS 2
18710 -#define TIMER_IER_CPBS 3
18711 -#define TIMER_IER_CPCS 4
18712 -#define TIMER_IER_ETRGS 7
18713 -#define TIMER_IER_LDRAS 5
18714 -#define TIMER_IER_LDRBS 6
18715 -#define TIMER_IER_LOVRS 1
18716 -#define TIMER_IMR 0x0000002c
18717 -#define TIMER_IMR_COVFS 0
18718 -#define TIMER_IMR_CPAS 2
18719 -#define TIMER_IMR_CPBS 3
18720 -#define TIMER_IMR_CPCS 4
18721 -#define TIMER_IMR_ETRGS 7
18722 -#define TIMER_IMR_LDRAS 5
18723 -#define TIMER_IMR_LDRBS 6
18724 -#define TIMER_IMR_LOVRS 1
18725 -#define TIMER_RA 0x00000014
18726 -#define TIMER_RA_RA 0
18727 -#define TIMER_RB 0x00000018
18728 -#define TIMER_RB_RB 0
18729 -#define TIMER_RC 0x0000001c
18730 -#define TIMER_RC_RC 0
18731 -#define TIMER_SR 0x00000020
18732 -#define TIMER_SR_CLKSTA 16
18733 -#define TIMER_SR_COVFS 0
18734 -#define TIMER_SR_CPAS 2
18735 -#define TIMER_SR_CPBS 3
18736 -#define TIMER_SR_CPCS 4
18737 -#define TIMER_SR_ETRGS 7
18738 -#define TIMER_SR_LDRAS 5
18739 -#define TIMER_SR_LDRBS 6
18740 -#define TIMER_SR_LOVRS 1
18741 -#define TIMER_SR_MTIOA 17
18742 -#define TIMER_SR_MTIOB 18
18743 -
18744 -/* Bit manipulation macros */
18745 -#define TIMER_BIT(name) (1 << TIMER_##name)
18746 -#define TIMER_BF(name,value) ((value) << TIMER_##name)
18747 -
18748 -/* Register access macros */
18749 -#define timer_read(port,instance,reg) \
18750 - __raw_readl(port + (0x40 * instance) + TIMER_##reg)
18751 -#define timer_write(port,instance,reg,value) \
18752 - __raw_writel((value), port + (0x40 * instance) + TIMER_##reg)
18753 -
18754 -#endif /* _ASM_AVR32_ARCH_AT32AP_TIME_H */
18755 diff -urN linux-2.6.24.3/include/asm-avr32/asm.h avr32-2.6/include/asm-avr32/asm.h
18756 --- linux-2.6.24.3/include/asm-avr32/asm.h 2008-02-26 01:20:20.000000000 +0100
18757 +++ avr32-2.6/include/asm-avr32/asm.h 2008-04-23 20:12:46.000000000 +0200
18758 @@ -12,10 +12,10 @@
18759 #include <asm/asm-offsets.h>
18760 #include <asm/thread_info.h>
18761
18762 -#define mask_interrupts ssrf SR_GM_BIT
18763 -#define mask_exceptions ssrf SR_EM_BIT
18764 -#define unmask_interrupts csrf SR_GM_BIT
18765 -#define unmask_exceptions csrf SR_EM_BIT
18766 +#define mask_interrupts ssrf SYSREG_GM_OFFSET
18767 +#define mask_exceptions ssrf SYSREG_EM_OFFSET
18768 +#define unmask_interrupts csrf SYSREG_GM_OFFSET
18769 +#define unmask_exceptions csrf SYSREG_EM_OFFSET
18770
18771 #ifdef CONFIG_FRAME_POINTER
18772 .macro save_fp
18773 diff -urN linux-2.6.24.3/include/asm-avr32/byteorder.h avr32-2.6/include/asm-avr32/byteorder.h
18774 --- linux-2.6.24.3/include/asm-avr32/byteorder.h 2008-02-26 01:20:20.000000000 +0100
18775 +++ avr32-2.6/include/asm-avr32/byteorder.h 2008-04-23 20:12:46.000000000 +0200
18776 @@ -12,8 +12,10 @@
18777 extern unsigned short __builtin_bswap_16(unsigned short x);
18778 #endif
18779
18780 +#if 0
18781 #define __arch__swab32(x) __builtin_bswap_32(x)
18782 #define __arch__swab16(x) __builtin_bswap_16(x)
18783 +#endif
18784
18785 #if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
18786 # define __BYTEORDER_HAS_U64__
18787 diff -urN linux-2.6.24.3/include/asm-avr32/dma-controller.h avr32-2.6/include/asm-avr32/dma-controller.h
18788 --- linux-2.6.24.3/include/asm-avr32/dma-controller.h 1970-01-01 01:00:00.000000000 +0100
18789 +++ avr32-2.6/include/asm-avr32/dma-controller.h 2008-04-23 19:33:48.000000000 +0200
18790 @@ -0,0 +1,166 @@
18791 +/*
18792 + * Copyright (C) 2005-2006 Atmel Corporation
18793 + *
18794 + * This program is free software; you can redistribute it and/or modify
18795 + * it under the terms of the GNU General Public License version 2 as
18796 + * published by the Free Software Foundation.
18797 + */
18798 +#ifndef __ASM_AVR32_DMA_CONTROLLER_H
18799 +#define __ASM_AVR32_DMA_CONTROLLER_H
18800 +
18801 +#include <linux/device.h>
18802 +
18803 +#define DMA_DIR_MEM_TO_MEM 0x0000
18804 +#define DMA_DIR_MEM_TO_PERIPH 0x0001
18805 +#define DMA_DIR_PERIPH_TO_MEM 0x0002
18806 +#define DMA_DIR_PERIPH_TO_PERIPH 0x0003
18807 +
18808 +#define DMA_WIDTH_8BIT 0
18809 +#define DMA_WIDTH_16BIT 1
18810 +#define DMA_WIDTH_32BIT 2
18811 +
18812 +struct dma_request {
18813 + struct dma_controller *dmac;
18814 + struct list_head list;
18815 +
18816 + unsigned short channel;
18817 +
18818 + void (*xfer_complete)(struct dma_request *req);
18819 + void (*block_complete)(struct dma_request *req);
18820 + void (*error)(struct dma_request *req);
18821 +};
18822 +
18823 +struct dma_request_sg {
18824 + struct dma_request req;
18825 +
18826 + int nr_sg;
18827 + struct scatterlist *sg;
18828 + unsigned long block_size;
18829 + unsigned int nr_blocks;
18830 +
18831 + dma_addr_t data_reg;
18832 + unsigned short periph_id;
18833 +
18834 + unsigned char direction;
18835 + unsigned char width;
18836 +};
18837 +#define to_dma_request_sg(_req) \
18838 + container_of(_req, struct dma_request_sg, req)
18839 +
18840 +struct dma_request_cyclic {
18841 + struct dma_request req;
18842 +
18843 + int periods;
18844 + unsigned long buffer_size;
18845 +
18846 + dma_addr_t buffer_start;
18847 + dma_addr_t data_reg;
18848 +
18849 + unsigned short periph_id;
18850 + unsigned char direction;
18851 + unsigned char width;
18852 +
18853 + void *dev_id;
18854 +};
18855 +#define to_dma_request_cyclic(_req) \
18856 + container_of(_req, struct dma_request_cyclic, req)
18857 +
18858 +struct dma_request_memcpy {
18859 + struct dma_request req;
18860 +
18861 + dma_addr_t src_addr;
18862 + unsigned int src_width;
18863 + unsigned int src_stride;
18864 +
18865 + dma_addr_t dst_addr;
18866 + unsigned int dst_width;
18867 + unsigned int dst_stride;
18868 +
18869 + size_t length;
18870 +
18871 + unsigned short src_reverse:1;
18872 + unsigned short dst_reverse:1;
18873 +};
18874 +#define to_dma_request_memcpy(_req) \
18875 + container_of(_req, struct dma_request_memcpy, req)
18876 +
18877 +struct dma_controller {
18878 + struct list_head list;
18879 + int id;
18880 + struct device *dev;
18881 +
18882 + int (*alloc_channel)(struct dma_controller *dmac);
18883 + void (*release_channel)(struct dma_controller *dmac,
18884 + int channel);
18885 + int (*prepare_request_sg)(struct dma_controller *dmac,
18886 + struct dma_request_sg *req);
18887 + int (*prepare_request_cyclic)(struct dma_controller *dmac,
18888 + struct dma_request_cyclic *req);
18889 + int (*prepare_request_memcpy)(struct dma_controller *dmac,
18890 + struct dma_request_memcpy *req);
18891 + int (*start_request)(struct dma_controller *dmac,
18892 + unsigned int channel);
18893 + int (*stop_request)(struct dma_controller *dmac,
18894 + unsigned int channel);
18895 + dma_addr_t (*get_current_pos)(struct dma_controller *dmac,
18896 + unsigned int channel);
18897 +};
18898 +
18899 +static inline int
18900 +dma_alloc_channel(struct dma_controller *dmac)
18901 +{
18902 + return dmac->alloc_channel(dmac);
18903 +}
18904 +
18905 +static inline void
18906 +dma_release_channel(struct dma_controller *dmac, int chan)
18907 +{
18908 + dmac->release_channel(dmac, chan);
18909 +}
18910 +
18911 +static inline int
18912 +dma_prepare_request_sg(struct dma_controller *dmac,
18913 + struct dma_request_sg *req)
18914 +{
18915 + return dmac->prepare_request_sg(dmac, req);
18916 +}
18917 +
18918 +static inline int
18919 +dma_prepare_request_cyclic(struct dma_controller *dmac,
18920 + struct dma_request_cyclic *req)
18921 +{
18922 + return dmac->prepare_request_cyclic(dmac, req);
18923 +}
18924 +
18925 +static inline int
18926 +dma_prepare_request_memcpy(struct dma_controller *dmac,
18927 + struct dma_request_memcpy *req)
18928 +{
18929 + return dmac->prepare_request_memcpy(dmac, req);
18930 +}
18931 +
18932 +static inline int
18933 +dma_start_request(struct dma_controller *dmac,
18934 + unsigned int channel)
18935 +{
18936 + return dmac->start_request(dmac, channel);
18937 +}
18938 +
18939 +static inline int
18940 +dma_stop_request(struct dma_controller *dmac,
18941 + unsigned int channel)
18942 +{
18943 + return dmac->stop_request(dmac, channel);
18944 +}
18945 +
18946 +static inline dma_addr_t
18947 +dma_get_current_pos(struct dma_controller *dmac,
18948 + unsigned int channel)
18949 +{
18950 + return dmac->get_current_pos(dmac, channel);
18951 +}
18952 +
18953 +extern int register_dma_controller(struct dma_controller *dmac);
18954 +extern struct dma_controller *find_dma_controller(int id);
18955 +
18956 +#endif /* __ASM_AVR32_DMA_CONTROLLER_H */
18957 diff -urN linux-2.6.24.3/include/asm-avr32/intc.h avr32-2.6/include/asm-avr32/intc.h
18958 --- linux-2.6.24.3/include/asm-avr32/intc.h 2008-02-26 01:20:20.000000000 +0100
18959 +++ avr32-2.6/include/asm-avr32/intc.h 1970-01-01 01:00:00.000000000 +0100
18960 @@ -1,128 +0,0 @@
18961 -#ifndef __ASM_AVR32_INTC_H
18962 -#define __ASM_AVR32_INTC_H
18963 -
18964 -#include <linux/sysdev.h>
18965 -#include <linux/interrupt.h>
18966 -
18967 -struct irq_controller;
18968 -struct irqaction;
18969 -struct pt_regs;
18970 -
18971 -struct platform_device;
18972 -
18973 -/* Information about the internal interrupt controller */
18974 -struct intc_device {
18975 - /* ioremapped address of configuration block */
18976 - void __iomem *regs;
18977 -
18978 - /* the physical device */
18979 - struct platform_device *pdev;
18980 -
18981 - /* Number of interrupt lines per group. */
18982 - unsigned int irqs_per_group;
18983 -
18984 - /* The highest group ID + 1 */
18985 - unsigned int nr_groups;
18986 -
18987 - /*
18988 - * Bitfield indicating which groups are actually in use. The
18989 - * size of the array is
18990 - * ceil(group_max / (8 * sizeof(unsigned int))).
18991 - */
18992 - unsigned int group_mask[];
18993 -};
18994 -
18995 -struct irq_controller_class {
18996 - /*
18997 - * A short name identifying this kind of controller.
18998 - */
18999 - const char *typename;
19000 - /*
19001 - * Handle the IRQ. Must do any necessary acking and masking.
19002 - */
19003 - irqreturn_t (*handle)(int irq, void *dev_id, struct pt_regs *regs);
19004 - /*
19005 - * Register a new IRQ handler.
19006 - */
19007 - int (*setup)(struct irq_controller *ctrl, unsigned int irq,
19008 - struct irqaction *action);
19009 - /*
19010 - * Unregister a IRQ handler.
19011 - */
19012 - void (*free)(struct irq_controller *ctrl, unsigned int irq,
19013 - void *dev_id);
19014 - /*
19015 - * Mask the IRQ in the interrupt controller.
19016 - */
19017 - void (*mask)(struct irq_controller *ctrl, unsigned int irq);
19018 - /*
19019 - * Unmask the IRQ in the interrupt controller.
19020 - */
19021 - void (*unmask)(struct irq_controller *ctrl, unsigned int irq);
19022 - /*
19023 - * Set the type of the IRQ. See below for possible types.
19024 - * Return -EINVAL if a given type is not supported
19025 - */
19026 - int (*set_type)(struct irq_controller *ctrl, unsigned int irq,
19027 - unsigned int type);
19028 - /*
19029 - * Return the IRQ type currently set
19030 - */
19031 - unsigned int (*get_type)(struct irq_controller *ctrl, unsigned int irq);
19032 -};
19033 -
19034 -struct irq_controller {
19035 - struct irq_controller_class *class;
19036 - unsigned int irq_group;
19037 - unsigned int first_irq;
19038 - unsigned int nr_irqs;
19039 - struct list_head list;
19040 -};
19041 -
19042 -struct intc_group_desc {
19043 - struct irq_controller *ctrl;
19044 - irqreturn_t (*handle)(int, void *, struct pt_regs *);
19045 - unsigned long flags;
19046 - void *dev_id;
19047 - const char *devname;
19048 -};
19049 -
19050 -/*
19051 - * The internal interrupt controller. Defined in board/part-specific
19052 - * devices.c.
19053 - * TODO: Should probably be defined per-cpu.
19054 - */
19055 -extern struct intc_device intc;
19056 -
19057 -extern int request_internal_irq(unsigned int irq,
19058 - irqreturn_t (*handler)(int, void *, struct pt_regs *),
19059 - unsigned long irqflags,
19060 - const char *devname, void *dev_id);
19061 -extern void free_internal_irq(unsigned int irq);
19062 -
19063 -/* Only used by time_init() */
19064 -extern int setup_internal_irq(unsigned int irq, struct intc_group_desc *desc);
19065 -
19066 -/*
19067 - * Set interrupt priority for a given group. `group' can be found by
19068 - * using irq_to_group(irq). Priority can be from 0 (lowest) to 3
19069 - * (highest). Higher-priority interrupts will preempt lower-priority
19070 - * interrupts (unless interrupts are masked globally).
19071 - *
19072 - * This function does not check for conflicts within a group.
19073 - */
19074 -extern int intc_set_priority(unsigned int group,
19075 - unsigned int priority);
19076 -
19077 -/*
19078 - * Returns a bitmask of pending interrupts in a group.
19079 - */
19080 -extern unsigned long intc_get_pending(unsigned int group);
19081 -
19082 -/*
19083 - * Register a new external interrupt controller. Returns the first
19084 - * external IRQ number that is assigned to the new controller.
19085 - */
19086 -extern int intc_register_controller(struct irq_controller *ctrl);
19087 -
19088 -#endif /* __ASM_AVR32_INTC_H */
19089 diff -urN linux-2.6.24.3/include/asm-avr32/irq.h avr32-2.6/include/asm-avr32/irq.h
19090 --- linux-2.6.24.3/include/asm-avr32/irq.h 2008-02-26 01:20:20.000000000 +0100
19091 +++ avr32-2.6/include/asm-avr32/irq.h 2008-04-23 20:12:46.000000000 +0200
19092 @@ -11,4 +11,14 @@
19093
19094 #define irq_canonicalize(i) (i)
19095
19096 +#ifndef __ASSEMBLER__
19097 +int nmi_enable(void);
19098 +void nmi_disable(void);
19099 +
19100 +/*
19101 + * Returns a bitmask of pending interrupts in a group.
19102 + */
19103 +extern unsigned long intc_get_pending(unsigned int group);
19104 +#endif
19105 +
19106 #endif /* __ASM_AVR32_IOCTLS_H */
19107 diff -urN linux-2.6.24.3/include/asm-avr32/kdebug.h avr32-2.6/include/asm-avr32/kdebug.h
19108 --- linux-2.6.24.3/include/asm-avr32/kdebug.h 2008-02-26 01:20:20.000000000 +0100
19109 +++ avr32-2.6/include/asm-avr32/kdebug.h 2008-04-23 19:33:48.000000000 +0200
19110 @@ -5,6 +5,7 @@
19111 enum die_val {
19112 DIE_BREAKPOINT,
19113 DIE_SSTEP,
19114 + DIE_NMI,
19115 };
19116
19117 #endif /* __ASM_AVR32_KDEBUG_H */
19118 diff -urN linux-2.6.24.3/include/asm-avr32/ocd.h avr32-2.6/include/asm-avr32/ocd.h
19119 --- linux-2.6.24.3/include/asm-avr32/ocd.h 2008-02-26 01:20:20.000000000 +0100
19120 +++ avr32-2.6/include/asm-avr32/ocd.h 2008-04-23 19:33:48.000000000 +0200
19121 @@ -533,6 +533,11 @@
19122 #define ocd_read(reg) __ocd_read(OCD_##reg)
19123 #define ocd_write(reg, value) __ocd_write(OCD_##reg, value)
19124
19125 +struct task_struct;
19126 +
19127 +void ocd_enable(struct task_struct *child);
19128 +void ocd_disable(struct task_struct *child);
19129 +
19130 #endif /* !__ASSEMBLER__ */
19131
19132 #endif /* __ASM_AVR32_OCD_H */
19133 diff -urN linux-2.6.24.3/include/asm-avr32/pgtable.h avr32-2.6/include/asm-avr32/pgtable.h
19134 --- linux-2.6.24.3/include/asm-avr32/pgtable.h 2008-02-26 01:20:20.000000000 +0100
19135 +++ avr32-2.6/include/asm-avr32/pgtable.h 2008-04-23 20:12:46.000000000 +0200
19136 @@ -157,6 +157,7 @@
19137 #define _PAGE_S(x) _PAGE_NORMAL(x)
19138
19139 #define PAGE_COPY _PAGE_P(PAGE_WRITE | PAGE_READ)
19140 +#define PAGE_SHARED _PAGE_S(PAGE_WRITE | PAGE_READ)
19141
19142 #ifndef __ASSEMBLY__
19143 /*
19144 diff -urN linux-2.6.24.3/include/asm-avr32/processor.h avr32-2.6/include/asm-avr32/processor.h
19145 --- linux-2.6.24.3/include/asm-avr32/processor.h 2008-02-26 01:20:20.000000000 +0100
19146 +++ avr32-2.6/include/asm-avr32/processor.h 2008-04-23 19:33:48.000000000 +0200
19147 @@ -57,11 +57,25 @@
19148 unsigned short cpu_revision;
19149 enum tlb_config tlb_config;
19150 unsigned long features;
19151 + u32 device_id;
19152
19153 struct cache_info icache;
19154 struct cache_info dcache;
19155 };
19156
19157 +static inline unsigned int avr32_get_manufacturer_id(struct avr32_cpuinfo *cpu)
19158 +{
19159 + return (cpu->device_id >> 1) & 0x7f;
19160 +}
19161 +static inline unsigned int avr32_get_product_number(struct avr32_cpuinfo *cpu)
19162 +{
19163 + return (cpu->device_id >> 12) & 0xffff;
19164 +}
19165 +static inline unsigned int avr32_get_chip_revision(struct avr32_cpuinfo *cpu)
19166 +{
19167 + return (cpu->device_id >> 28) & 0x0f;
19168 +}
19169 +
19170 extern struct avr32_cpuinfo boot_cpu_data;
19171
19172 #ifdef CONFIG_SMP
19173 diff -urN linux-2.6.24.3/include/asm-avr32/ptrace.h avr32-2.6/include/asm-avr32/ptrace.h
19174 --- linux-2.6.24.3/include/asm-avr32/ptrace.h 2008-02-26 01:20:20.000000000 +0100
19175 +++ avr32-2.6/include/asm-avr32/ptrace.h 2008-04-23 19:33:48.000000000 +0200
19176 @@ -121,7 +121,15 @@
19177 };
19178
19179 #ifdef __KERNEL__
19180 -# define user_mode(regs) (((regs)->sr & MODE_MASK) == MODE_USER)
19181 +
19182 +#include <asm/ocd.h>
19183 +
19184 +#define arch_ptrace_attach(child) ocd_enable(child)
19185 +
19186 +#define user_mode(regs) (((regs)->sr & MODE_MASK) == MODE_USER)
19187 +#define instruction_pointer(regs) ((regs)->pc)
19188 +#define profile_pc(regs) instruction_pointer(regs)
19189 +
19190 extern void show_regs (struct pt_regs *);
19191
19192 static __inline__ int valid_user_regs(struct pt_regs *regs)
19193 @@ -141,9 +149,6 @@
19194 return 0;
19195 }
19196
19197 -#define instruction_pointer(regs) ((regs)->pc)
19198 -
19199 -#define profile_pc(regs) instruction_pointer(regs)
19200
19201 #endif /* __KERNEL__ */
19202
19203 diff -urN linux-2.6.24.3/include/asm-avr32/thread_info.h avr32-2.6/include/asm-avr32/thread_info.h
19204 --- linux-2.6.24.3/include/asm-avr32/thread_info.h 2008-02-26 01:20:20.000000000 +0100
19205 +++ avr32-2.6/include/asm-avr32/thread_info.h 2008-04-23 19:33:48.000000000 +0200
19206 @@ -88,6 +88,7 @@
19207 #define TIF_MEMDIE 6
19208 #define TIF_RESTORE_SIGMASK 7 /* restore signal mask in do_signal */
19209 #define TIF_CPU_GOING_TO_SLEEP 8 /* CPU is entering sleep 0 mode */
19210 +#define TIF_DEBUG 30 /* debugging enabled */
19211 #define TIF_USERSPACE 31 /* true if FS sets userspace */
19212
19213 #define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE)
19214 diff -urN linux-2.6.24.3/include/linux/atmel_pwm.h avr32-2.6/include/linux/atmel_pwm.h
19215 --- linux-2.6.24.3/include/linux/atmel_pwm.h 1970-01-01 01:00:00.000000000 +0100
19216 +++ avr32-2.6/include/linux/atmel_pwm.h 2008-04-23 19:33:51.000000000 +0200
19217 @@ -0,0 +1,70 @@
19218 +#ifndef __LINUX_ATMEL_PWM_H
19219 +#define __LINUX_ATMEL_PWM_H
19220 +
19221 +/**
19222 + * struct pwm_channel - driver handle to a PWM channel
19223 + * @regs: base of this channel's registers
19224 + * @index: number of this channel (0..31)
19225 + * @mck: base clock rate, which can be prescaled and maybe subdivided
19226 + *
19227 + * Drivers initialize a pwm_channel structure using pwm_channel_alloc().
19228 + * Then they configure its clock rate (derived from MCK), alignment,
19229 + * polarity, and duty cycle by writing directly to the channel registers,
19230 + * before enabling the channel by calling pwm_channel_enable().
19231 + *
19232 + * After emitting a PWM signal for the desired length of time, drivers
19233 + * may then pwm_channel_disable() or pwm_channel_free(). Both of these
19234 + * disable the channel, but when it's freed the IRQ is deconfigured and
19235 + * the channel must later be re-allocated and reconfigured.
19236 + *
19237 + * Note that if the period or duty cycle need to be changed while the
19238 + * PWM channel is operating, drivers must use the PWM_CUPD double buffer
19239 + * mechanism, either polling until they change or getting implicitly
19240 + * notified through a once-per-period interrupt handler.
19241 + */
19242 +struct pwm_channel {
19243 + void __iomem *regs;
19244 + unsigned index;
19245 + unsigned long mck;
19246 +};
19247 +
19248 +extern int pwm_channel_alloc(int index, struct pwm_channel *ch);
19249 +extern int pwm_channel_free(struct pwm_channel *ch);
19250 +
19251 +extern int pwm_clk_alloc(unsigned prescale, unsigned div);
19252 +extern void pwm_clk_free(unsigned clk);
19253 +
19254 +extern int __pwm_channel_onoff(struct pwm_channel *ch, int enabled);
19255 +
19256 +#define pwm_channel_enable(ch) __pwm_channel_onoff((ch), 1)
19257 +#define pwm_channel_disable(ch) __pwm_channel_onoff((ch), 0)
19258 +
19259 +/* periodic interrupts, mostly for CUPD changes to period or cycle */
19260 +extern int pwm_channel_handler(struct pwm_channel *ch,
19261 + void (*handler)(struct pwm_channel *ch));
19262 +
19263 +/* per-channel registers (banked at pwm_channel->regs) */
19264 +#define PWM_CMR 0x00 /* mode register */
19265 +#define PWM_CPR_CPD (1 << 10) /* set: CUPD modifies period */
19266 +#define PWM_CPR_CPOL (1 << 9) /* set: idle high */
19267 +#define PWM_CPR_CALG (1 << 8) /* set: center align */
19268 +#define PWM_CPR_CPRE (0xf << 0) /* mask: rate is mck/(2^pre) */
19269 +#define PWM_CPR_CLKA (0xb << 0) /* rate CLKA */
19270 +#define PWM_CPR_CLKB (0xc << 0) /* rate CLKB */
19271 +#define PWM_CDTY 0x04 /* duty cycle (max of CPRD) */
19272 +#define PWM_CPRD 0x08 /* period (count up from zero) */
19273 +#define PWM_CCNT 0x0c /* counter (20 bits?) */
19274 +#define PWM_CUPD 0x10 /* update CPRD (or CDTY) next period */
19275 +
19276 +static inline void
19277 +pwm_channel_writel(struct pwm_channel *pwmc, unsigned offset, u32 val)
19278 +{
19279 + __raw_writel(val, pwmc->regs + offset);
19280 +}
19281 +
19282 +static inline u32 pwm_channel_readl(struct pwm_channel *pwmc, unsigned offset)
19283 +{
19284 + return __raw_readl(pwmc->regs + offset);
19285 +}
19286 +
19287 +#endif /* __LINUX_ATMEL_PWM_H */
19288 diff -urN linux-2.6.24.3/include/linux/atmel_serial.h avr32-2.6/include/linux/atmel_serial.h
19289 --- linux-2.6.24.3/include/linux/atmel_serial.h 1970-01-01 01:00:00.000000000 +0100
19290 +++ avr32-2.6/include/linux/atmel_serial.h 2008-04-23 19:33:51.000000000 +0200
19291 @@ -0,0 +1,127 @@
19292 +/*
19293 + * include/linux/atmel_serial.h
19294 + *
19295 + * Copyright (C) 2005 Ivan Kokshaysky
19296 + * Copyright (C) SAN People
19297 + *
19298 + * USART registers.
19299 + * Based on AT91RM9200 datasheet revision E.
19300 + *
19301 + * This program is free software; you can redistribute it and/or modify
19302 + * it under the terms of the GNU General Public License as published by
19303 + * the Free Software Foundation; either version 2 of the License, or
19304 + * (at your option) any later version.
19305 + */
19306 +
19307 +#ifndef ATMEL_SERIAL_H
19308 +#define ATMEL_SERIAL_H
19309 +
19310 +#define ATMEL_US_CR 0x00 /* Control Register */
19311 +#define ATMEL_US_RSTRX (1 << 2) /* Reset Receiver */
19312 +#define ATMEL_US_RSTTX (1 << 3) /* Reset Transmitter */
19313 +#define ATMEL_US_RXEN (1 << 4) /* Receiver Enable */
19314 +#define ATMEL_US_RXDIS (1 << 5) /* Receiver Disable */
19315 +#define ATMEL_US_TXEN (1 << 6) /* Transmitter Enable */
19316 +#define ATMEL_US_TXDIS (1 << 7) /* Transmitter Disable */
19317 +#define ATMEL_US_RSTSTA (1 << 8) /* Reset Status Bits */
19318 +#define ATMEL_US_STTBRK (1 << 9) /* Start Break */
19319 +#define ATMEL_US_STPBRK (1 << 10) /* Stop Break */
19320 +#define ATMEL_US_STTTO (1 << 11) /* Start Time-out */
19321 +#define ATMEL_US_SENDA (1 << 12) /* Send Address */
19322 +#define ATMEL_US_RSTIT (1 << 13) /* Reset Iterations */
19323 +#define ATMEL_US_RSTNACK (1 << 14) /* Reset Non Acknowledge */
19324 +#define ATMEL_US_RETTO (1 << 15) /* Rearm Time-out */
19325 +#define ATMEL_US_DTREN (1 << 16) /* Data Terminal Ready Enable [AT91RM9200 only] */
19326 +#define ATMEL_US_DTRDIS (1 << 17) /* Data Terminal Ready Disable [AT91RM9200 only] */
19327 +#define ATMEL_US_RTSEN (1 << 18) /* Request To Send Enable */
19328 +#define ATMEL_US_RTSDIS (1 << 19) /* Request To Send Disable */
19329 +
19330 +#define ATMEL_US_MR 0x04 /* Mode Register */
19331 +#define ATMEL_US_USMODE (0xf << 0) /* Mode of the USART */
19332 +#define ATMEL_US_USMODE_NORMAL 0
19333 +#define ATMEL_US_USMODE_RS485 1
19334 +#define ATMEL_US_USMODE_HWHS 2
19335 +#define ATMEL_US_USMODE_MODEM 3
19336 +#define ATMEL_US_USMODE_ISO7816_T0 4
19337 +#define ATMEL_US_USMODE_ISO7816_T1 6
19338 +#define ATMEL_US_USMODE_IRDA 8
19339 +#define ATMEL_US_USCLKS (3 << 4) /* Clock Selection */
19340 +#define ATMEL_US_USCLKS_MCK (0 << 4)
19341 +#define ATMEL_US_USCLKS_MCK_DIV8 (1 << 4)
19342 +#define ATMEL_US_USCLKS_SCK (3 << 4)
19343 +#define ATMEL_US_CHRL (3 << 6) /* Character Length */
19344 +#define ATMEL_US_CHRL_5 (0 << 6)
19345 +#define ATMEL_US_CHRL_6 (1 << 6)
19346 +#define ATMEL_US_CHRL_7 (2 << 6)
19347 +#define ATMEL_US_CHRL_8 (3 << 6)
19348 +#define ATMEL_US_SYNC (1 << 8) /* Synchronous Mode Select */
19349 +#define ATMEL_US_PAR (7 << 9) /* Parity Type */
19350 +#define ATMEL_US_PAR_EVEN (0 << 9)
19351 +#define ATMEL_US_PAR_ODD (1 << 9)
19352 +#define ATMEL_US_PAR_SPACE (2 << 9)
19353 +#define ATMEL_US_PAR_MARK (3 << 9)
19354 +#define ATMEL_US_PAR_NONE (4 << 9)
19355 +#define ATMEL_US_PAR_MULTI_DROP (6 << 9)
19356 +#define ATMEL_US_NBSTOP (3 << 12) /* Number of Stop Bits */
19357 +#define ATMEL_US_NBSTOP_1 (0 << 12)
19358 +#define ATMEL_US_NBSTOP_1_5 (1 << 12)
19359 +#define ATMEL_US_NBSTOP_2 (2 << 12)
19360 +#define ATMEL_US_CHMODE (3 << 14) /* Channel Mode */
19361 +#define ATMEL_US_CHMODE_NORMAL (0 << 14)
19362 +#define ATMEL_US_CHMODE_ECHO (1 << 14)
19363 +#define ATMEL_US_CHMODE_LOC_LOOP (2 << 14)
19364 +#define ATMEL_US_CHMODE_REM_LOOP (3 << 14)
19365 +#define ATMEL_US_MSBF (1 << 16) /* Bit Order */
19366 +#define ATMEL_US_MODE9 (1 << 17) /* 9-bit Character Length */
19367 +#define ATMEL_US_CLKO (1 << 18) /* Clock Output Select */
19368 +#define ATMEL_US_OVER (1 << 19) /* Oversampling Mode */
19369 +#define ATMEL_US_INACK (1 << 20) /* Inhibit Non Acknowledge */
19370 +#define ATMEL_US_DSNACK (1 << 21) /* Disable Successive NACK */
19371 +#define ATMEL_US_MAX_ITER (7 << 24) /* Max Iterations */
19372 +#define ATMEL_US_FILTER (1 << 28) /* Infrared Receive Line Filter */
19373 +
19374 +#define ATMEL_US_IER 0x08 /* Interrupt Enable Register */
19375 +#define ATMEL_US_RXRDY (1 << 0) /* Receiver Ready */
19376 +#define ATMEL_US_TXRDY (1 << 1) /* Transmitter Ready */
19377 +#define ATMEL_US_RXBRK (1 << 2) /* Break Received / End of Break */
19378 +#define ATMEL_US_ENDRX (1 << 3) /* End of Receiver Transfer */
19379 +#define ATMEL_US_ENDTX (1 << 4) /* End of Transmitter Transfer */
19380 +#define ATMEL_US_OVRE (1 << 5) /* Overrun Error */
19381 +#define ATMEL_US_FRAME (1 << 6) /* Framing Error */
19382 +#define ATMEL_US_PARE (1 << 7) /* Parity Error */
19383 +#define ATMEL_US_TIMEOUT (1 << 8) /* Receiver Time-out */
19384 +#define ATMEL_US_TXEMPTY (1 << 9) /* Transmitter Empty */
19385 +#define ATMEL_US_ITERATION (1 << 10) /* Max number of Repetitions Reached */
19386 +#define ATMEL_US_TXBUFE (1 << 11) /* Transmission Buffer Empty */
19387 +#define ATMEL_US_RXBUFF (1 << 12) /* Reception Buffer Full */
19388 +#define ATMEL_US_NACK (1 << 13) /* Non Acknowledge */
19389 +#define ATMEL_US_RIIC (1 << 16) /* Ring Indicator Input Change [AT91RM9200 only] */
19390 +#define ATMEL_US_DSRIC (1 << 17) /* Data Set Ready Input Change [AT91RM9200 only] */
19391 +#define ATMEL_US_DCDIC (1 << 18) /* Data Carrier Detect Input Change [AT91RM9200 only] */
19392 +#define ATMEL_US_CTSIC (1 << 19) /* Clear to Send Input Change */
19393 +#define ATMEL_US_RI (1 << 20) /* RI */
19394 +#define ATMEL_US_DSR (1 << 21) /* DSR */
19395 +#define ATMEL_US_DCD (1 << 22) /* DCD */
19396 +#define ATMEL_US_CTS (1 << 23) /* CTS */
19397 +
19398 +#define ATMEL_US_IDR 0x0c /* Interrupt Disable Register */
19399 +#define ATMEL_US_IMR 0x10 /* Interrupt Mask Register */
19400 +#define ATMEL_US_CSR 0x14 /* Channel Status Register */
19401 +#define ATMEL_US_RHR 0x18 /* Receiver Holding Register */
19402 +#define ATMEL_US_THR 0x1c /* Transmitter Holding Register */
19403 +#define ATMEL_US_SYNH (1 << 15) /* Transmit/Receive Sync [AT91SAM9261 only] */
19404 +
19405 +#define ATMEL_US_BRGR 0x20 /* Baud Rate Generator Register */
19406 +#define ATMEL_US_CD (0xffff << 0) /* Clock Divider */
19407 +
19408 +#define ATMEL_US_RTOR 0x24 /* Receiver Time-out Register */
19409 +#define ATMEL_US_TO (0xffff << 0) /* Time-out Value */
19410 +
19411 +#define ATMEL_US_TTGR 0x28 /* Transmitter Timeguard Register */
19412 +#define ATMEL_US_TG (0xff << 0) /* Timeguard Value */
19413 +
19414 +#define ATMEL_US_FIDI 0x40 /* FI DI Ratio Register */
19415 +#define ATMEL_US_NER 0x44 /* Number of Errors Register */
19416 +#define ATMEL_US_IF 0x4c /* IrDA Filter Register */
19417 +
19418 +#endif
19419 diff -urN linux-2.6.24.3/include/linux/atmel_tc.h avr32-2.6/include/linux/atmel_tc.h
19420 --- linux-2.6.24.3/include/linux/atmel_tc.h 1970-01-01 01:00:00.000000000 +0100
19421 +++ avr32-2.6/include/linux/atmel_tc.h 2008-04-23 20:12:46.000000000 +0200
19422 @@ -0,0 +1,252 @@
19423 +/*
19424 + * Timer/Counter Unit (TC) registers.
19425 + *
19426 + * This program is free software; you can redistribute it and/or modify
19427 + * it under the terms of the GNU General Public License as published by
19428 + * the Free Software Foundation; either version 2 of the License, or
19429 + * (at your option) any later version.
19430 + */
19431 +
19432 +#ifndef ATMEL_TC_H
19433 +#define ATMEL_TC_H
19434 +
19435 +#include <linux/compiler.h>
19436 +#include <linux/list.h>
19437 +
19438 +/*
19439 + * Many 32-bit Atmel SOCs include one or more TC blocks, each of which holds
19440 + * three general-purpose 16-bit timers. These timers share one register bank.
19441 + * Depending on the SOC, each timer may have its own clock and IRQ, or those
19442 + * may be shared by the whole TC block.
19443 + *
19444 + * These TC blocks may have up to nine external pins: TCLK0..2 signals for
19445 + * clocks or clock gates, and per-timer TIOA and TIOB signals used for PWM
19446 + * or triggering. Those pins need to be set up for use with the TC block,
19447 + * else they will be used as GPIOs or for a different controller.
19448 + *
19449 + * Although we expect each TC block to have a platform_device node, those
19450 + * nodes are not what drivers bind to. Instead, they ask for a specific
19451 + * TC block, by number ... which is a common approach on systems with many
19452 + * timers. Then they use clk_get() and platform_get_irq() to get clock and
19453 + * IRQ resources.
19454 + */
19455 +
19456 +struct clk;
19457 +
19458 +/**
19459 + * struct atmel_tc - information about a Timer/Counter Block
19460 + * @pdev: physical device
19461 + * @iomem: resource associated with the I/O register
19462 + * @regs: mapping through which the I/O registers can be accessed
19463 + * @irq: irq for each of the three channels
19464 + * @clk: internal clock source for each of the three channels
19465 + * @node: list node, for tclib internal use
19466 + *
19467 + * On some platforms, each TC channel has its own clocks and IRQs,
19468 + * while on others, all TC channels share the same clock and IRQ.
19469 + * Drivers should clk_enable() all the clocks they need even though
19470 + * all the entries in @clk may point to the same physical clock.
19471 + * Likewise, drivers should request irqs independently for each
19472 + * channel, but they must use IRQF_SHARED in case some of the entries
19473 + * in @irq are actually the same IRQ.
19474 + */
19475 +struct atmel_tc {
19476 + struct platform_device *pdev;
19477 + struct resource *iomem;
19478 + void __iomem *regs;
19479 + int irq[3];
19480 + struct clk *clk[3];
19481 + struct list_head node;
19482 +};
19483 +
19484 +extern struct atmel_tc *atmel_tc_alloc(unsigned block, const char *name);
19485 +extern void atmel_tc_free(struct atmel_tc *tc);
19486 +
19487 +/* platform-specific ATMEL_TC_TIMER_CLOCKx divisors (0 means 32KiHz) */
19488 +extern const u8 atmel_tc_divisors[5];
19489 +
19490 +
19491 +/*
19492 + * Two registers have block-wide controls. These are: configuring the three
19493 + * "external" clocks (or event sources) used by the timer channels; and
19494 + * synchronizing the timers by resetting them all at once.
19495 + *
19496 + * "External" can mean "external to chip" using the TCLK0, TCLK1, or TCLK2
19497 + * signals. Or, it can mean "external to timer", using the TIOA output from
19498 + * one of the other two timers that's being run in waveform mode.
19499 + */
19500 +
19501 +#define ATMEL_TC_BCR 0xc0 /* TC Block Control Register */
19502 +#define ATMEL_TC_SYNC (1 << 0) /* synchronize timers */
19503 +
19504 +#define ATMEL_TC_BMR 0xc4 /* TC Block Mode Register */
19505 +#define ATMEL_TC_TC0XC0S (3 << 0) /* external clock 0 source */
19506 +#define ATMEL_TC_TC0XC0S_TCLK0 (0 << 0)
19507 +#define ATMEL_TC_TC0XC0S_NONE (1 << 0)
19508 +#define ATMEL_TC_TC0XC0S_TIOA1 (2 << 0)
19509 +#define ATMEL_TC_TC0XC0S_TIOA2 (3 << 0)
19510 +#define ATMEL_TC_TC1XC1S (3 << 2) /* external clock 1 source */
19511 +#define ATMEL_TC_TC1XC1S_TCLK1 (0 << 2)
19512 +#define ATMEL_TC_TC1XC1S_NONE (1 << 2)
19513 +#define ATMEL_TC_TC1XC1S_TIOA0 (2 << 2)
19514 +#define ATMEL_TC_TC1XC1S_TIOA2 (3 << 2)
19515 +#define ATMEL_TC_TC2XC2S (3 << 4) /* external clock 2 source */
19516 +#define ATMEL_TC_TC2XC2S_TCLK2 (0 << 4)
19517 +#define ATMEL_TC_TC2XC2S_NONE (1 << 4)
19518 +#define ATMEL_TC_TC2XC2S_TIOA0 (2 << 4)
19519 +#define ATMEL_TC_TC2XC2S_TIOA1 (3 << 4)
19520 +
19521 +
19522 +/*
19523 + * Each TC block has three "channels", each with one counter and controls.
19524 + *
19525 + * Note that the semantics of ATMEL_TC_TIMER_CLOCKx (input clock selection
19526 + * when it's not "external") is silicon-specific. AT91 platforms use one
19527 + * set of definitions; AVR32 platforms use a different set. Don't hard-wire
19528 + * such knowledge into your code, use the global "atmel_tc_divisors" ...
19529 + * where index N is the divisor for clock N+1, else zero to indicate it uses
19530 + * the 32 KiHz clock.
19531 + *
19532 + * The timers can be chained in various ways, and operated in "waveform"
19533 + * generation mode (including PWM) or "capture" mode (to time events). In
19534 + * both modes, behavior can be configured in many ways.
19535 + *
19536 + * Each timer has two I/O pins, TIOA and TIOB. Waveform mode uses TIOA as a
19537 + * PWM output, and TIOB as either another PWM or as a trigger. Capture mode
19538 + * uses them only as inputs.
19539 + */
19540 +#define ATMEL_TC_CHAN(idx) ((idx)*0x40)
19541 +#define ATMEL_TC_REG(idx, reg) (ATMEL_TC_CHAN(idx) + ATMEL_TC_ ## reg)
19542 +
19543 +#define ATMEL_TC_CCR 0x00 /* Channel Control Register */
19544 +#define ATMEL_TC_CLKEN (1 << 0) /* clock enable */
19545 +#define ATMEL_TC_CLKDIS (1 << 1) /* clock disable */
19546 +#define ATMEL_TC_SWTRG (1 << 2) /* software trigger */
19547 +
19548 +#define ATMEL_TC_CMR 0x04 /* Channel Mode Register */
19549 +
19550 +/* Both modes share some CMR bits */
19551 +#define ATMEL_TC_TCCLKS (7 << 0) /* clock source */
19552 +#define ATMEL_TC_TIMER_CLOCK1 (0 << 0)
19553 +#define ATMEL_TC_TIMER_CLOCK2 (1 << 0)
19554 +#define ATMEL_TC_TIMER_CLOCK3 (2 << 0)
19555 +#define ATMEL_TC_TIMER_CLOCK4 (3 << 0)
19556 +#define ATMEL_TC_TIMER_CLOCK5 (4 << 0)
19557 +#define ATMEL_TC_XC0 (5 << 0)
19558 +#define ATMEL_TC_XC1 (6 << 0)
19559 +#define ATMEL_TC_XC2 (7 << 0)
19560 +#define ATMEL_TC_CLKI (1 << 3) /* clock invert */
19561 +#define ATMEL_TC_BURST (3 << 4) /* clock gating */
19562 +#define ATMEL_TC_GATE_NONE (0 << 4)
19563 +#define ATMEL_TC_GATE_XC0 (1 << 4)
19564 +#define ATMEL_TC_GATE_XC1 (2 << 4)
19565 +#define ATMEL_TC_GATE_XC2 (3 << 4)
19566 +#define ATMEL_TC_WAVE (1 << 15) /* true = Waveform mode */
19567 +
19568 +/* CAPTURE mode CMR bits */
19569 +#define ATMEL_TC_LDBSTOP (1 << 6) /* counter stops on RB load */
19570 +#define ATMEL_TC_LDBDIS (1 << 7) /* counter disable on RB load */
19571 +#define ATMEL_TC_ETRGEDG (3 << 8) /* external trigger edge */
19572 +#define ATMEL_TC_ETRGEDG_NONE (0 << 8)
19573 +#define ATMEL_TC_ETRGEDG_RISING (1 << 8)
19574 +#define ATMEL_TC_ETRGEDG_FALLING (2 << 8)
19575 +#define ATMEL_TC_ETRGEDG_BOTH (3 << 8)
19576 +#define ATMEL_TC_ABETRG (1 << 10) /* external trigger is TIOA? */
19577 +#define ATMEL_TC_CPCTRG (1 << 14) /* RC compare trigger enable */
19578 +#define ATMEL_TC_LDRA (3 << 16) /* RA loading edge (of TIOA) */
19579 +#define ATMEL_TC_LDRA_NONE (0 << 16)
19580 +#define ATMEL_TC_LDRA_RISING (1 << 16)
19581 +#define ATMEL_TC_LDRA_FALLING (2 << 16)
19582 +#define ATMEL_TC_LDRA_BOTH (3 << 16)
19583 +#define ATMEL_TC_LDRB (3 << 18) /* RB loading edge (of TIOA) */
19584 +#define ATMEL_TC_LDRB_NONE (0 << 18)
19585 +#define ATMEL_TC_LDRB_RISING (1 << 18)
19586 +#define ATMEL_TC_LDRB_FALLING (2 << 18)
19587 +#define ATMEL_TC_LDRB_BOTH (3 << 18)
19588 +
19589 +/* WAVEFORM mode CMR bits */
19590 +#define ATMEL_TC_CPCSTOP (1 << 6) /* RC compare stops counter */
19591 +#define ATMEL_TC_CPCDIS (1 << 7) /* RC compare disables counter */
19592 +#define ATMEL_TC_EEVTEDG (3 << 8) /* external event edge */
19593 +#define ATMEL_TC_EEVTEDG_NONE (0 << 8)
19594 +#define ATMEL_TC_EEVTEDG_RISING (1 << 8)
19595 +#define ATMEL_TC_EEVTEDG_FALLING (2 << 8)
19596 +#define ATMEL_TC_EEVTEDG_BOTH (3 << 8)
19597 +#define ATMEL_TC_EEVT (3 << 10) /* external event source */
19598 +#define ATMEL_TC_EEVT_TIOB (0 << 10)
19599 +#define ATMEL_TC_EEVT_XC0 (1 << 10)
19600 +#define ATMEL_TC_EEVT_XC1 (2 << 10)
19601 +#define ATMEL_TC_EEVT_XC2 (3 << 10)
19602 +#define ATMEL_TC_ENETRG (1 << 12) /* external event is trigger */
19603 +#define ATMEL_TC_WAVESEL (3 << 13) /* waveform type */
19604 +#define ATMEL_TC_WAVESEL_UP (0 << 13)
19605 +#define ATMEL_TC_WAVESEL_UPDOWN (1 << 13)
19606 +#define ATMEL_TC_WAVESEL_UP_AUTO (2 << 13)
19607 +#define ATMEL_TC_WAVESEL_UPDOWN_AUTO (3 << 13)
19608 +#define ATMEL_TC_ACPA (3 << 16) /* RA compare changes TIOA */
19609 +#define ATMEL_TC_ACPA_NONE (0 << 16)
19610 +#define ATMEL_TC_ACPA_SET (1 << 16)
19611 +#define ATMEL_TC_ACPA_CLEAR (2 << 16)
19612 +#define ATMEL_TC_ACPA_TOGGLE (3 << 16)
19613 +#define ATMEL_TC_ACPC (3 << 18) /* RC compare changes TIOA */
19614 +#define ATMEL_TC_ACPC_NONE (0 << 18)
19615 +#define ATMEL_TC_ACPC_SET (1 << 18)
19616 +#define ATMEL_TC_ACPC_CLEAR (2 << 18)
19617 +#define ATMEL_TC_ACPC_TOGGLE (3 << 18)
19618 +#define ATMEL_TC_AEEVT (3 << 20) /* external event changes TIOA */
19619 +#define ATMEL_TC_AEEVT_NONE (0 << 20)
19620 +#define ATMEL_TC_AEEVT_SET (1 << 20)
19621 +#define ATMEL_TC_AEEVT_CLEAR (2 << 20)
19622 +#define ATMEL_TC_AEEVT_TOGGLE (3 << 20)
19623 +#define ATMEL_TC_ASWTRG (3 << 22) /* software trigger changes TIOA */
19624 +#define ATMEL_TC_ASWTRG_NONE (0 << 22)
19625 +#define ATMEL_TC_ASWTRG_SET (1 << 22)
19626 +#define ATMEL_TC_ASWTRG_CLEAR (2 << 22)
19627 +#define ATMEL_TC_ASWTRG_TOGGLE (3 << 22)
19628 +#define ATMEL_TC_BCPB (3 << 24) /* RB compare changes TIOB */
19629 +#define ATMEL_TC_BCPB_NONE (0 << 24)
19630 +#define ATMEL_TC_BCPB_SET (1 << 24)
19631 +#define ATMEL_TC_BCPB_CLEAR (2 << 24)
19632 +#define ATMEL_TC_BCPB_TOGGLE (3 << 24)
19633 +#define ATMEL_TC_BCPC (3 << 26) /* RC compare changes TIOB */
19634 +#define ATMEL_TC_BCPC_NONE (0 << 26)
19635 +#define ATMEL_TC_BCPC_SET (1 << 26)
19636 +#define ATMEL_TC_BCPC_CLEAR (2 << 26)
19637 +#define ATMEL_TC_BCPC_TOGGLE (3 << 26)
19638 +#define ATMEL_TC_BEEVT (3 << 28) /* external event changes TIOB */
19639 +#define ATMEL_TC_BEEVT_NONE (0 << 28)
19640 +#define ATMEL_TC_BEEVT_SET (1 << 28)
19641 +#define ATMEL_TC_BEEVT_CLEAR (2 << 28)
19642 +#define ATMEL_TC_BEEVT_TOGGLE (3 << 28)
19643 +#define ATMEL_TC_BSWTRG (3 << 30) /* software trigger changes TIOB */
19644 +#define ATMEL_TC_BSWTRG_NONE (0 << 30)
19645 +#define ATMEL_TC_BSWTRG_SET (1 << 30)
19646 +#define ATMEL_TC_BSWTRG_CLEAR (2 << 30)
19647 +#define ATMEL_TC_BSWTRG_TOGGLE (3 << 30)
19648 +
19649 +#define ATMEL_TC_CV 0x10 /* counter Value */
19650 +#define ATMEL_TC_RA 0x14 /* register A */
19651 +#define ATMEL_TC_RB 0x18 /* register B */
19652 +#define ATMEL_TC_RC 0x1c /* register C */
19653 +
19654 +#define ATMEL_TC_SR 0x20 /* status (read-only) */
19655 +/* Status-only flags */
19656 +#define ATMEL_TC_CLKSTA (1 << 16) /* clock enabled */
19657 +#define ATMEL_TC_MTIOA (1 << 17) /* TIOA mirror */
19658 +#define ATMEL_TC_MTIOB (1 << 18) /* TIOB mirror */
19659 +
19660 +#define ATMEL_TC_IER 0x24 /* interrupt enable (write-only) */
19661 +#define ATMEL_TC_IDR 0x28 /* interrupt disable (write-only) */
19662 +#define ATMEL_TC_IMR 0x2c /* interrupt mask (read-only) */
19663 +
19664 +/* Status and IRQ flags */
19665 +#define ATMEL_TC_COVFS (1 << 0) /* counter overflow */
19666 +#define ATMEL_TC_LOVRS (1 << 1) /* load overrun */
19667 +#define ATMEL_TC_CPAS (1 << 2) /* RA compare */
19668 +#define ATMEL_TC_CPBS (1 << 3) /* RB compare */
19669 +#define ATMEL_TC_CPCS (1 << 4) /* RC compare */
19670 +#define ATMEL_TC_LDRAS (1 << 5) /* RA loading */
19671 +#define ATMEL_TC_LDRBS (1 << 6) /* RB loading */
19672 +#define ATMEL_TC_ETRGS (1 << 7) /* external trigger */
19673 +
19674 +#endif
19675 diff -urN linux-2.6.24.3/include/linux/usb/atmel_usba_udc.h avr32-2.6/include/linux/usb/atmel_usba_udc.h
19676 --- linux-2.6.24.3/include/linux/usb/atmel_usba_udc.h 1970-01-01 01:00:00.000000000 +0100
19677 +++ avr32-2.6/include/linux/usb/atmel_usba_udc.h 2008-04-23 20:12:47.000000000 +0200
19678 @@ -0,0 +1,22 @@
19679 +/*
19680 + * Platform data definitions for Atmel USBA gadget driver.
19681 + */
19682 +#ifndef __LINUX_USB_USBA_H
19683 +#define __LINUX_USB_USBA_H
19684 +
19685 +struct usba_ep_data {
19686 + char *name;
19687 + int index;
19688 + int fifo_size;
19689 + int nr_banks;
19690 + int can_dma;
19691 + int can_isoc;
19692 +};
19693 +
19694 +struct usba_platform_data {
19695 + int vbus_pin;
19696 + int num_ep;
19697 + struct usba_ep_data ep[0];
19698 +};
19699 +
19700 +#endif /* __LINUX_USB_USBA_H */
19701 diff -urN linux-2.6.24.3/include/video/atmel_lcdc.h avr32-2.6/include/video/atmel_lcdc.h
19702 --- linux-2.6.24.3/include/video/atmel_lcdc.h 2008-02-26 01:20:20.000000000 +0100
19703 +++ avr32-2.6/include/video/atmel_lcdc.h 2008-04-23 19:33:52.000000000 +0200
19704 @@ -22,7 +22,7 @@
19705 #ifndef __ATMEL_LCDC_H__
19706 #define __ATMEL_LCDC_H__
19707
19708 - /* LCD Controller info data structure */
19709 + /* LCD Controller info data structure, stored in device platform_data */
19710 struct atmel_lcdfb_info {
19711 spinlock_t lock;
19712 struct fb_info *info;
19713 @@ -33,7 +33,14 @@
19714 struct platform_device *pdev;
19715 struct clk *bus_clk;
19716 struct clk *lcdc_clk;
19717 - unsigned int default_bpp;
19718 +
19719 +#ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
19720 + struct backlight_device *backlight;
19721 + u8 bl_power;
19722 +#endif
19723 + bool lcdcon_is_backlight;
19724 +
19725 + u8 default_bpp;
19726 unsigned int default_lcdcon2;
19727 unsigned int default_dmacon;
19728 void (*atmel_lcdfb_power_control)(int on);
19729 @@ -115,20 +122,20 @@
19730 #define ATMEL_LCDC_MEMOR_LITTLE (1 << 31)
19731
19732 #define ATMEL_LCDC_TIM1 0x0808
19733 -#define ATMEL_LCDC_VFP (0xff << 0)
19734 +#define ATMEL_LCDC_VFP (0xffU << 0)
19735 #define ATMEL_LCDC_VBP_OFFSET 8
19736 -#define ATMEL_LCDC_VBP (0xff << ATMEL_LCDC_VBP_OFFSET)
19737 +#define ATMEL_LCDC_VBP (0xffU << ATMEL_LCDC_VBP_OFFSET)
19738 #define ATMEL_LCDC_VPW_OFFSET 16
19739 -#define ATMEL_LCDC_VPW (0x3f << ATMEL_LCDC_VPW_OFFSET)
19740 +#define ATMEL_LCDC_VPW (0x3fU << ATMEL_LCDC_VPW_OFFSET)
19741 #define ATMEL_LCDC_VHDLY_OFFSET 24
19742 -#define ATMEL_LCDC_VHDLY (0xf << ATMEL_LCDC_VHDLY_OFFSET)
19743 +#define ATMEL_LCDC_VHDLY (0xfU << ATMEL_LCDC_VHDLY_OFFSET)
19744
19745 #define ATMEL_LCDC_TIM2 0x080c
19746 -#define ATMEL_LCDC_HBP (0xff << 0)
19747 +#define ATMEL_LCDC_HBP (0xffU << 0)
19748 #define ATMEL_LCDC_HPW_OFFSET 8
19749 -#define ATMEL_LCDC_HPW (0x3f << ATMEL_LCDC_HPW_OFFSET)
19750 +#define ATMEL_LCDC_HPW (0x3fU << ATMEL_LCDC_HPW_OFFSET)
19751 #define ATMEL_LCDC_HFP_OFFSET 21
19752 -#define ATMEL_LCDC_HFP (0x7ff << ATMEL_LCDC_HFP_OFFSET)
19753 +#define ATMEL_LCDC_HFP (0x7ffU << ATMEL_LCDC_HFP_OFFSET)
19754
19755 #define ATMEL_LCDC_LCDFRMCFG 0x0810
19756 #define ATMEL_LCDC_LINEVAL (0x7ff << 0)
19757 diff -urN linux-2.6.24.3/init/do_mounts.c avr32-2.6/init/do_mounts.c
19758 --- linux-2.6.24.3/init/do_mounts.c 2008-02-26 01:20:20.000000000 +0100
19759 +++ avr32-2.6/init/do_mounts.c 2008-04-23 20:12:47.000000000 +0200
19760 @@ -219,8 +219,14 @@
19761
19762 static int __init rootwait_setup(char *str)
19763 {
19764 - if (*str)
19765 + if (*str && *str != '=')
19766 return 0;
19767 +
19768 + if (*str)
19769 + printk(KERN_WARNING
19770 + "WARNING: \"rootwait=1\" is deprecated, "
19771 + "use \"rootwait\" instead.\n");
19772 +
19773 root_wait = 1;
19774 return 1;
19775 }
19776 diff -urN linux-2.6.24.3/kernel/ptrace.c avr32-2.6/kernel/ptrace.c
19777 --- linux-2.6.24.3/kernel/ptrace.c 2008-02-26 01:20:20.000000000 +0100
19778 +++ avr32-2.6/kernel/ptrace.c 2008-04-23 20:12:47.000000000 +0200
19779 @@ -470,6 +470,8 @@
19780 lock_kernel();
19781 if (request == PTRACE_TRACEME) {
19782 ret = ptrace_traceme();
19783 + if (!ret)
19784 + arch_ptrace_attach(current);
19785 goto out;
19786 }
19787
19788 diff -urN linux-2.6.24.3/MAINTAINERS avr32-2.6/MAINTAINERS
19789 --- linux-2.6.24.3/MAINTAINERS 2008-02-26 01:20:20.000000000 +0100
19790 +++ avr32-2.6/MAINTAINERS 2008-04-23 20:12:35.000000000 +0200
19791 @@ -671,6 +671,12 @@
19792 W: http://www.at91.com/
19793 S: Maintained
19794
19795 +ATMEL AT91 / AT32 SERIAL DRIVER
19796 +P: Haavard Skinnemoen
19797 +M: hskinnemoen@atmel.com
19798 +L: linux-kernel@vger.kernel.org
19799 +S: Supported
19800 +
19801 ATMEL LCDFB DRIVER
19802 P: Nicolas Ferre
19803 M: nicolas.ferre@atmel.com
19804 diff -urN linux-2.6.24.3/sound/avr32/ac97c.c avr32-2.6/sound/avr32/ac97c.c
19805 --- linux-2.6.24.3/sound/avr32/ac97c.c 1970-01-01 01:00:00.000000000 +0100
19806 +++ avr32-2.6/sound/avr32/ac97c.c 2008-04-23 19:33:54.000000000 +0200
19807 @@ -0,0 +1,914 @@
19808 +/*
19809 + * Driver for the Atmel AC97 controller
19810 + *
19811 + * Copyright (C) 2005-2007 Atmel Corporation
19812 + *
19813 + * This program is free software; you can redistribute it and/or modify it
19814 + * under the terms of the GNU General Public License version 2 as published by
19815 + * the Free Software Foundation.
19816 + */
19817 +#include <linux/clk.h>
19818 +#include <linux/delay.h>
19819 +#include <linux/dma-mapping.h>
19820 +#include <linux/init.h>
19821 +#include <linux/interrupt.h>
19822 +#include <linux/module.h>
19823 +#include <linux/platform_device.h>
19824 +#include <linux/mutex.h>
19825 +#include <linux/io.h>
19826 +
19827 +#include <sound/driver.h>
19828 +#include <sound/core.h>
19829 +#include <sound/initval.h>
19830 +#include <sound/pcm.h>
19831 +#include <sound/pcm_params.h>
19832 +#include <sound/ac97_codec.h>
19833 +#include <sound/memalloc.h>
19834 +
19835 +#include <asm/dma-controller.h>
19836 +
19837 +#include "ac97c.h"
19838 +
19839 +/* Serialize access to opened */
19840 +static DEFINE_MUTEX(opened_mutex);
19841 +
19842 +struct atmel_ac97_dma_info {
19843 + struct dma_request_cyclic req_tx;
19844 + struct dma_request_cyclic req_rx;
19845 + unsigned short rx_periph_id;
19846 + unsigned short tx_periph_id;
19847 +};
19848 +
19849 +struct atmel_ac97 {
19850 + /* Serialize access to opened */
19851 + spinlock_t lock;
19852 + void __iomem *regs;
19853 + struct snd_pcm_substream *playback_substream;
19854 + struct snd_pcm_substream *capture_substream;
19855 + struct snd_card *card;
19856 + struct snd_pcm *pcm;
19857 + struct snd_ac97 *ac97;
19858 + struct snd_ac97_bus *ac97_bus;
19859 + int opened;
19860 + int period;
19861 + u64 cur_format;
19862 + unsigned int cur_rate;
19863 + struct clk *mck;
19864 + struct platform_device *pdev;
19865 + struct atmel_ac97_dma_info dma;
19866 +};
19867 +
19868 +#define get_chip(card) ((struct atmel_ac97 *)(card)->private_data)
19869 +
19870 +#define ac97c_writel(chip, reg, val) \
19871 + __raw_writel((val), (chip)->regs + AC97C_##reg)
19872 +#define ac97c_readl(chip, reg) \
19873 + __raw_readl((chip)->regs + AC97C_##reg)
19874 +
19875 +/*
19876 + * PCM part
19877 + */
19878 +static struct snd_pcm_hardware snd_atmel_ac97_playback_hw = {
19879 + .info = (SNDRV_PCM_INFO_INTERLEAVED
19880 + | SNDRV_PCM_INFO_MMAP
19881 + | SNDRV_PCM_INFO_MMAP_VALID
19882 + | SNDRV_PCM_INFO_BLOCK_TRANSFER
19883 + | SNDRV_PCM_INFO_JOINT_DUPLEX),
19884 + .formats = (SNDRV_PCM_FMTBIT_S16_BE
19885 + | SNDRV_PCM_FMTBIT_S16_LE),
19886 + .rates = (SNDRV_PCM_RATE_CONTINUOUS),
19887 + .rate_min = 4000,
19888 + .rate_max = 48000,
19889 + .channels_min = 1,
19890 + .channels_max = 6,
19891 + .buffer_bytes_max = 64*1024,
19892 + .period_bytes_min = 512,
19893 + .period_bytes_max = 4095,
19894 + .periods_min = 8,
19895 + .periods_max = 1024,
19896 +};
19897 +
19898 +static struct snd_pcm_hardware snd_atmel_ac97_capture_hw = {
19899 + .info = (SNDRV_PCM_INFO_INTERLEAVED
19900 + | SNDRV_PCM_INFO_MMAP
19901 + | SNDRV_PCM_INFO_MMAP_VALID
19902 + | SNDRV_PCM_INFO_BLOCK_TRANSFER
19903 + | SNDRV_PCM_INFO_JOINT_DUPLEX),
19904 + .formats = (SNDRV_PCM_FMTBIT_S16_BE
19905 + | SNDRV_PCM_FMTBIT_S16_LE),
19906 + .rates = (SNDRV_PCM_RATE_CONTINUOUS),
19907 + .rate_min = 4000,
19908 + .rate_max = 48000,
19909 + .channels_min = 1,
19910 + .channels_max = 2,
19911 + .buffer_bytes_max = 64*1024,
19912 + .period_bytes_min = 512,
19913 + .period_bytes_max = 4095,
19914 + .periods_min = 8,
19915 + .periods_max = 1024,
19916 +};
19917 +
19918 +/*
19919 + * PCM functions
19920 + */
19921 +static int
19922 +snd_atmel_ac97_playback_open(struct snd_pcm_substream *substream)
19923 +{
19924 + struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
19925 + struct snd_pcm_runtime *runtime = substream->runtime;
19926 +
19927 + mutex_lock(&opened_mutex);
19928 + chip->opened++;
19929 + runtime->hw = snd_atmel_ac97_playback_hw;
19930 + if (chip->cur_rate) {
19931 + runtime->hw.rate_min = chip->cur_rate;
19932 + runtime->hw.rate_max = chip->cur_rate;
19933 + }
19934 + if (chip->cur_format)
19935 + runtime->hw.formats = (1ULL << chip->cur_format);
19936 + mutex_unlock(&opened_mutex);
19937 + chip->playback_substream = substream;
19938 + chip->period = 0;
19939 + return 0;
19940 +}
19941 +
19942 +static int
19943 +snd_atmel_ac97_capture_open(struct snd_pcm_substream *substream)
19944 +{
19945 + struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
19946 + struct snd_pcm_runtime *runtime = substream->runtime;
19947 +
19948 + mutex_lock(&opened_mutex);
19949 + chip->opened++;
19950 + runtime->hw = snd_atmel_ac97_capture_hw;
19951 + if (chip->cur_rate) {
19952 + runtime->hw.rate_min = chip->cur_rate;
19953 + runtime->hw.rate_max = chip->cur_rate;
19954 + }
19955 + if (chip->cur_format)
19956 + runtime->hw.formats = (1ULL << chip->cur_format);
19957 + mutex_unlock(&opened_mutex);
19958 + chip->capture_substream = substream;
19959 + chip->period = 0;
19960 + return 0;
19961 +}
19962 +
19963 +static int snd_atmel_ac97_playback_close(struct snd_pcm_substream *substream)
19964 +{
19965 + struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
19966 + mutex_lock(&opened_mutex);
19967 + chip->opened--;
19968 + if (!chip->opened) {
19969 + chip->cur_rate = 0;
19970 + chip->cur_format = 0;
19971 + }
19972 + mutex_unlock(&opened_mutex);
19973 + return 0;
19974 +}
19975 +
19976 +static int snd_atmel_ac97_capture_close(struct snd_pcm_substream *substream)
19977 +{
19978 + struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
19979 + mutex_lock(&opened_mutex);
19980 + chip->opened--;
19981 + if (!chip->opened) {
19982 + chip->cur_rate = 0;
19983 + chip->cur_format = 0;
19984 + }
19985 + mutex_unlock(&opened_mutex);
19986 + return 0;
19987 +}
19988 +
19989 +static int
19990 +snd_atmel_ac97_playback_hw_params(struct snd_pcm_substream *substream,
19991 + struct snd_pcm_hw_params *hw_params)
19992 +{
19993 + struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
19994 + int err;
19995 +
19996 + err = snd_pcm_lib_malloc_pages(substream,
19997 + params_buffer_bytes(hw_params));
19998 + if (err < 0)
19999 + return err;
20000 +
20001 + /* Set restrictions to params */
20002 + mutex_lock(&opened_mutex);
20003 + chip->cur_rate = params_rate(hw_params);
20004 + chip->cur_format = params_format(hw_params);
20005 + mutex_unlock(&opened_mutex);
20006 +
20007 + return 0;
20008 +}
20009 +
20010 +static int
20011 +snd_atmel_ac97_capture_hw_params(struct snd_pcm_substream *substream,
20012 + struct snd_pcm_hw_params *hw_params)
20013 +{
20014 + struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
20015 + int err;
20016 +
20017 + err = snd_pcm_lib_malloc_pages(substream,
20018 + params_buffer_bytes(hw_params));
20019 + if (err < 0)
20020 + return err;
20021 +
20022 + /* Set restrictions to params */
20023 + mutex_lock(&opened_mutex);
20024 + chip->cur_rate = params_rate(hw_params);
20025 + chip->cur_format = params_format(hw_params);
20026 + mutex_unlock(&opened_mutex);
20027 +
20028 + return 0;
20029 +}
20030 +
20031 +static int snd_atmel_ac97_playback_hw_free(struct snd_pcm_substream *substream)
20032 +{
20033 + return snd_pcm_lib_free_pages(substream);
20034 +}
20035 +
20036 +static int snd_atmel_ac97_capture_hw_free(struct snd_pcm_substream *substream)
20037 +{
20038 +
20039 + return snd_pcm_lib_free_pages(substream);
20040 +}
20041 +
20042 +static int snd_atmel_ac97_playback_prepare(struct snd_pcm_substream *substream)
20043 +{
20044 + struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
20045 + struct platform_device *pdev = chip->pdev;
20046 + struct snd_pcm_runtime *runtime = substream->runtime;
20047 + int block_size = frames_to_bytes(runtime, runtime->period_size);
20048 + unsigned long word = 0;
20049 + unsigned long buffer_size = 0;
20050 +
20051 + dma_sync_single_for_device(&pdev->dev, runtime->dma_addr,
20052 + block_size * 2, DMA_TO_DEVICE);
20053 +
20054 + /* Assign slots to channels */
20055 + switch (substream->runtime->channels) {
20056 + case 1:
20057 + word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
20058 + break;
20059 + case 2:
20060 + /* Assign Left and Right slot to Channel A */
20061 + word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
20062 + | AC97C_CH_ASSIGN(PCM_RIGHT, A);
20063 + break;
20064 + default:
20065 + /* TODO: support more than two channels */
20066 + return -EINVAL;
20067 + break;
20068 + }
20069 + ac97c_writel(chip, OCA, word);
20070 +
20071 + /* Configure sample format and size */
20072 + word = AC97C_CMR_PDCEN | AC97C_CMR_SIZE_16;
20073 +
20074 + switch (runtime->format) {
20075 + case SNDRV_PCM_FORMAT_S16_LE:
20076 + word |= AC97C_CMR_CEM_LITTLE;
20077 + break;
20078 + case SNDRV_PCM_FORMAT_S16_BE: /* fall through */
20079 + default:
20080 + word &= ~AC97C_CMR_CEM_LITTLE;
20081 + break;
20082 + }
20083 +
20084 + ac97c_writel(chip, CAMR, word);
20085 +
20086 + /* Set variable rate if needed */
20087 + if (runtime->rate != 48000) {
20088 + word = ac97c_readl(chip, MR);
20089 + word |= AC97C_MR_VRA;
20090 + ac97c_writel(chip, MR, word);
20091 + } else {
20092 + /* Clear Variable Rate Bit */
20093 + word = ac97c_readl(chip, MR);
20094 + word &= ~AC97C_MR_VRA;
20095 + ac97c_writel(chip, MR, word);
20096 + }
20097 +
20098 + /* Set rate */
20099 + snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, runtime->rate);
20100 +
20101 + buffer_size = frames_to_bytes(runtime, runtime->period_size) *
20102 + runtime->periods;
20103 +
20104 + chip->dma.req_tx.buffer_size = buffer_size;
20105 + chip->dma.req_tx.periods = runtime->periods;
20106 +
20107 + BUG_ON(chip->dma.req_tx.buffer_size !=
20108 + (chip->dma.req_tx.periods *
20109 + frames_to_bytes(runtime, runtime->period_size)));
20110 +
20111 + chip->dma.req_tx.buffer_start = runtime->dma_addr;
20112 + chip->dma.req_tx.data_reg = (dma_addr_t)(chip->regs + AC97C_CATHR + 2);
20113 + chip->dma.req_tx.periph_id = chip->dma.tx_periph_id;
20114 + chip->dma.req_tx.direction = DMA_DIR_MEM_TO_PERIPH;
20115 + chip->dma.req_tx.width = DMA_WIDTH_16BIT;
20116 + chip->dma.req_tx.dev_id = chip;
20117 +
20118 + return 0;
20119 +}
20120 +
20121 +static int snd_atmel_ac97_capture_prepare(struct snd_pcm_substream *substream)
20122 +{
20123 + struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
20124 + struct platform_device *pdev = chip->pdev;
20125 + struct snd_pcm_runtime *runtime = substream->runtime;
20126 + int block_size = frames_to_bytes(runtime, runtime->period_size);
20127 + unsigned long word = 0;
20128 + unsigned long buffer_size = 0;
20129 +
20130 + dma_sync_single_for_device(&pdev->dev, runtime->dma_addr,
20131 + block_size * 2, DMA_FROM_DEVICE);
20132 +
20133 + /* Assign slots to channels */
20134 + switch (substream->runtime->channels) {
20135 + case 1:
20136 + word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
20137 + break;
20138 + case 2:
20139 + /* Assign Left and Right slot to Channel A */
20140 + word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
20141 + | AC97C_CH_ASSIGN(PCM_RIGHT, A);
20142 + break;
20143 + default:
20144 + /* TODO: support more than two channels */
20145 + return -EINVAL;
20146 + break;
20147 + }
20148 + ac97c_writel(chip, ICA, word);
20149 +
20150 + /* Configure sample format and size */
20151 + word = AC97C_CMR_PDCEN | AC97C_CMR_SIZE_16;
20152 +
20153 + switch (runtime->format) {
20154 + case SNDRV_PCM_FORMAT_S16_LE:
20155 + word |= AC97C_CMR_CEM_LITTLE;
20156 + break;
20157 + case SNDRV_PCM_FORMAT_S16_BE:
20158 + default:
20159 + word &= ~(AC97C_CMR_CEM_LITTLE);
20160 + break;
20161 + }
20162 +
20163 + ac97c_writel(chip, CAMR, word);
20164 +
20165 + /* Set variable rate if needed */
20166 + if (runtime->rate != 48000) {
20167 + word = ac97c_readl(chip, MR);
20168 + word |= AC97C_MR_VRA;
20169 + ac97c_writel(chip, MR, word);
20170 + } else {
20171 + /* Clear Variable Rate Bit */
20172 + word = ac97c_readl(chip, MR);
20173 + word &= ~(AC97C_MR_VRA);
20174 + ac97c_writel(chip, MR, word);
20175 + }
20176 +
20177 + /* Set rate */
20178 + snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
20179 +
20180 + buffer_size = frames_to_bytes(runtime, runtime->period_size) *
20181 + runtime->periods;
20182 +
20183 + chip->dma.req_rx.buffer_size = buffer_size;
20184 + chip->dma.req_rx.periods = runtime->periods;
20185 +
20186 + BUG_ON(chip->dma.req_rx.buffer_size !=
20187 + (chip->dma.req_rx.periods *
20188 + frames_to_bytes(runtime, runtime->period_size)));
20189 +
20190 + chip->dma.req_rx.buffer_start = runtime->dma_addr;
20191 + chip->dma.req_rx.data_reg = (dma_addr_t)(chip->regs + AC97C_CARHR + 2);
20192 + chip->dma.req_rx.periph_id = chip->dma.rx_periph_id;
20193 + chip->dma.req_rx.direction = DMA_DIR_PERIPH_TO_MEM;
20194 + chip->dma.req_rx.width = DMA_WIDTH_16BIT;
20195 + chip->dma.req_rx.dev_id = chip;
20196 +
20197 + return 0;
20198 +}
20199 +
20200 + static int
20201 +snd_atmel_ac97_playback_trigger(struct snd_pcm_substream *substream, int cmd)
20202 +{
20203 + struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
20204 + unsigned long camr;
20205 + int flags, err = 0;
20206 +
20207 + spin_lock_irqsave(&chip->lock, flags);
20208 + camr = ac97c_readl(chip, CAMR);
20209 +
20210 + switch (cmd) {
20211 + case SNDRV_PCM_TRIGGER_START:
20212 + err = dma_prepare_request_cyclic(chip->dma.req_tx.req.dmac,
20213 + &chip->dma.req_tx);
20214 + dma_start_request(chip->dma.req_tx.req.dmac,
20215 + chip->dma.req_tx.req.channel);
20216 + camr |= AC97C_CMR_CENA;
20217 + break;
20218 + case SNDRV_PCM_TRIGGER_STOP:
20219 + err = dma_stop_request(chip->dma.req_tx.req.dmac,
20220 + chip->dma.req_tx.req.channel);
20221 + if (chip->opened <= 1)
20222 + camr &= ~AC97C_CMR_CENA;
20223 + break;
20224 + default:
20225 + err = -EINVAL;
20226 + break;
20227 + }
20228 +
20229 + ac97c_writel(chip, CAMR, camr);
20230 +
20231 + spin_unlock_irqrestore(&chip->lock, flags);
20232 + return err;
20233 +}
20234 +
20235 + static int
20236 +snd_atmel_ac97_capture_trigger(struct snd_pcm_substream *substream, int cmd)
20237 +{
20238 + struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
20239 + unsigned long camr;
20240 + int flags, err = 0;
20241 +
20242 + spin_lock_irqsave(&chip->lock, flags);
20243 + camr = ac97c_readl(chip, CAMR);
20244 +
20245 + switch (cmd) {
20246 + case SNDRV_PCM_TRIGGER_START:
20247 + err = dma_prepare_request_cyclic(chip->dma.req_rx.req.dmac,
20248 + &chip->dma.req_rx);
20249 + dma_start_request(chip->dma.req_rx.req.dmac,
20250 + chip->dma.req_rx.req.channel);
20251 + camr |= AC97C_CMR_CENA;
20252 + break;
20253 + case SNDRV_PCM_TRIGGER_STOP:
20254 + err = dma_stop_request(chip->dma.req_rx.req.dmac,
20255 + chip->dma.req_rx.req.channel);
20256 + mutex_lock(&opened_mutex);
20257 + if (chip->opened <= 1)
20258 + camr &= ~AC97C_CMR_CENA;
20259 + mutex_unlock(&opened_mutex);
20260 + break;
20261 + default:
20262 + err = -EINVAL;
20263 + break;
20264 + }
20265 +
20266 + ac97c_writel(chip, CAMR, camr);
20267 +
20268 + spin_unlock_irqrestore(&chip->lock, flags);
20269 + return err;
20270 +}
20271 +
20272 + static snd_pcm_uframes_t
20273 +snd_atmel_ac97_playback_pointer(struct snd_pcm_substream *substream)
20274 +{
20275 + struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
20276 + struct snd_pcm_runtime *runtime = substream->runtime;
20277 + snd_pcm_uframes_t pos;
20278 + unsigned long bytes;
20279 +
20280 + bytes = (dma_get_current_pos
20281 + (chip->dma.req_tx.req.dmac,
20282 + chip->dma.req_tx.req.channel) - runtime->dma_addr);
20283 + pos = bytes_to_frames(runtime, bytes);
20284 + if (pos >= runtime->buffer_size)
20285 + pos -= runtime->buffer_size;
20286 +
20287 + return pos;
20288 +}
20289 +
20290 + static snd_pcm_uframes_t
20291 +snd_atmel_ac97_capture_pointer(struct snd_pcm_substream *substream)
20292 +{
20293 + struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
20294 + struct snd_pcm_runtime *runtime = substream->runtime;
20295 + snd_pcm_uframes_t pos;
20296 + unsigned long bytes;
20297 +
20298 + bytes = (dma_get_current_pos
20299 + (chip->dma.req_rx.req.dmac,
20300 + chip->dma.req_rx.req.channel)
20301 + - runtime->dma_addr);
20302 + pos = bytes_to_frames(runtime, bytes);
20303 + if (pos >= runtime->buffer_size)
20304 + pos -= runtime->buffer_size;
20305 +
20306 +
20307 + return pos;
20308 +}
20309 +
20310 +static struct snd_pcm_ops atmel_ac97_playback_ops = {
20311 + .open = snd_atmel_ac97_playback_open,
20312 + .close = snd_atmel_ac97_playback_close,
20313 + .ioctl = snd_pcm_lib_ioctl,
20314 + .hw_params = snd_atmel_ac97_playback_hw_params,
20315 + .hw_free = snd_atmel_ac97_playback_hw_free,
20316 + .prepare = snd_atmel_ac97_playback_prepare,
20317 + .trigger = snd_atmel_ac97_playback_trigger,
20318 + .pointer = snd_atmel_ac97_playback_pointer,
20319 +};
20320 +
20321 +static struct snd_pcm_ops atmel_ac97_capture_ops = {
20322 + .open = snd_atmel_ac97_capture_open,
20323 + .close = snd_atmel_ac97_capture_close,
20324 + .ioctl = snd_pcm_lib_ioctl,
20325 + .hw_params = snd_atmel_ac97_capture_hw_params,
20326 + .hw_free = snd_atmel_ac97_capture_hw_free,
20327 + .prepare = snd_atmel_ac97_capture_prepare,
20328 + .trigger = snd_atmel_ac97_capture_trigger,
20329 + .pointer = snd_atmel_ac97_capture_pointer,
20330 +};
20331 +
20332 +static struct ac97_pcm atmel_ac97_pcm_defs[] __devinitdata = {
20333 + /* Playback */
20334 + {
20335 + .exclusive = 1,
20336 + .r = { {
20337 + .slots = ((1 << AC97_SLOT_PCM_LEFT)
20338 + | (1 << AC97_SLOT_PCM_RIGHT)
20339 + | (1 << AC97_SLOT_PCM_CENTER)
20340 + | (1 << AC97_SLOT_PCM_SLEFT)
20341 + | (1 << AC97_SLOT_PCM_SRIGHT)
20342 + | (1 << AC97_SLOT_LFE)),
20343 + } }
20344 + },
20345 + /* PCM in */
20346 + {
20347 + .stream = 1,
20348 + .exclusive = 1,
20349 + .r = { {
20350 + .slots = ((1 << AC97_SLOT_PCM_LEFT)
20351 + | (1 << AC97_SLOT_PCM_RIGHT)),
20352 + } }
20353 + },
20354 + /* Mic in */
20355 + {
20356 + .stream = 1,
20357 + .exclusive = 1,
20358 + .r = { {
20359 + .slots = (1<<AC97_SLOT_MIC),
20360 + } }
20361 + },
20362 +};
20363 +
20364 +static int __devinit snd_atmel_ac97_pcm_new(struct atmel_ac97 *chip)
20365 +{
20366 + struct snd_pcm *pcm;
20367 + int err;
20368 +
20369 + err = snd_ac97_pcm_assign(chip->ac97_bus,
20370 + ARRAY_SIZE(atmel_ac97_pcm_defs),
20371 + atmel_ac97_pcm_defs);
20372 + if (err)
20373 + return err;
20374 +
20375 + err = snd_pcm_new(chip->card, "Atmel-AC97", 0, 1, 1, &pcm);
20376 + if (err)
20377 + return err;
20378 +
20379 + snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
20380 + &atmel_ac97_playback_ops);
20381 +
20382 + snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
20383 + &atmel_ac97_capture_ops);
20384 +
20385 + snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
20386 + &chip->pdev->dev,
20387 + 128 * 1024, 128 * 1024);
20388 +
20389 + pcm->private_data = chip;
20390 + pcm->info_flags = 0;
20391 + strcpy(pcm->name, "Atmel-AC97");
20392 + chip->pcm = pcm;
20393 +
20394 + return 0;
20395 +}
20396 +
20397 +/*
20398 + * Mixer part.
20399 + */
20400 +static int snd_atmel_ac97_mixer_new(struct atmel_ac97 *chip)
20401 +{
20402 + int err;
20403 + struct snd_ac97_template template;
20404 +
20405 + memset(&template, 0, sizeof(template));
20406 + template.private_data = chip;
20407 + err = snd_ac97_mixer(chip->ac97_bus, &template, &chip->ac97);
20408 +
20409 + return err;
20410 +}
20411 +
20412 +static void atmel_ac97_error(struct dma_request *_req)
20413 +{
20414 + struct dma_request_cyclic *req = to_dma_request_cyclic(_req);
20415 + struct atmel_ac97 *chip = req->dev_id;
20416 +
20417 + dev_dbg(&chip->pdev->dev, "DMA Controller error, channel %d\n",
20418 + req->req.channel);
20419 +}
20420 +
20421 +static void atmel_ac97_block_complete(struct dma_request *_req)
20422 +{
20423 + struct dma_request_cyclic *req = to_dma_request_cyclic(_req);
20424 + struct atmel_ac97 *chip = req->dev_id;
20425 + if (req->periph_id == chip->dma.tx_periph_id)
20426 + snd_pcm_period_elapsed(chip->playback_substream);
20427 + else
20428 + snd_pcm_period_elapsed(chip->capture_substream);
20429 +}
20430 +
20431 +/*
20432 + * Codec part.
20433 + */
20434 +static void snd_atmel_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
20435 + unsigned short val)
20436 +{
20437 + struct atmel_ac97 *chip = get_chip(ac97);
20438 + unsigned long word;
20439 + int timeout = 40;
20440 +
20441 + word = (reg & 0x7f) << 16 | val;
20442 +
20443 + do {
20444 + if (ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) {
20445 + ac97c_writel(chip, COTHR, word);
20446 + return;
20447 + }
20448 + udelay(1);
20449 + } while (--timeout);
20450 +
20451 + dev_dbg(&chip->pdev->dev, "codec write timeout\n");
20452 +}
20453 +
20454 +static unsigned short snd_atmel_ac97_read(struct snd_ac97 *ac97,
20455 + unsigned short reg)
20456 +{
20457 + struct atmel_ac97 *chip = get_chip(ac97);
20458 + unsigned long word;
20459 + int timeout = 40;
20460 + int write = 10;
20461 +
20462 + word = (0x80 | (reg & 0x7f)) << 16;
20463 +
20464 + if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0)
20465 + ac97c_readl(chip, CORHR);
20466 +
20467 +retry_write:
20468 + timeout = 40;
20469 +
20470 + do {
20471 + if ((ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) != 0) {
20472 + ac97c_writel(chip, COTHR, word);
20473 + goto read_reg;
20474 + }
20475 + mdelay(10);
20476 + } while (--timeout);
20477 +
20478 + if (!--write)
20479 + goto timed_out;
20480 + goto retry_write;
20481 +
20482 +read_reg:
20483 + do {
20484 + if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0) {
20485 + unsigned short val = ac97c_readl(chip, CORHR);
20486 + return val;
20487 + }
20488 + mdelay(10);
20489 + } while (--timeout);
20490 +
20491 + if (!--write)
20492 + goto timed_out;
20493 + goto retry_write;
20494 +
20495 +timed_out:
20496 + dev_dbg(&chip->pdev->dev, "codec read timeout\n");
20497 + return 0xffff;
20498 +}
20499 +
20500 +static void snd_atmel_ac97_reset(struct atmel_ac97 *chip)
20501 +{
20502 + ac97c_writel(chip, MR, AC97C_MR_WRST);
20503 + mdelay(1);
20504 + ac97c_writel(chip, MR, AC97C_MR_ENA);
20505 +}
20506 +
20507 +static void snd_atmel_ac97_destroy(struct snd_card *card)
20508 +{
20509 + struct atmel_ac97 *chip = get_chip(card);
20510 +
20511 + if (chip->regs)
20512 + iounmap(chip->regs);
20513 +
20514 + if (chip->mck) {
20515 + clk_disable(chip->mck);
20516 + clk_put(chip->mck);
20517 + }
20518 +
20519 + if (chip->dma.req_tx.req.dmac) {
20520 + dma_release_channel(chip->dma.req_tx.req.dmac,
20521 + chip->dma.req_tx.req.channel);
20522 + }
20523 + if (chip->dma.req_rx.req.dmac) {
20524 + dma_release_channel(chip->dma.req_rx.req.dmac,
20525 + chip->dma.req_rx.req.channel);
20526 + }
20527 +}
20528 +
20529 +static int __devinit snd_atmel_ac97_create(struct snd_card *card,
20530 + struct platform_device *pdev)
20531 +{
20532 + static struct snd_ac97_bus_ops ops = {
20533 + .write = snd_atmel_ac97_write,
20534 + .read = snd_atmel_ac97_read,
20535 + };
20536 + struct atmel_ac97 *chip = get_chip(card);
20537 + struct resource *regs;
20538 + struct clk *mck;
20539 + int err;
20540 +
20541 + regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
20542 + if (!regs)
20543 + return -ENXIO;
20544 +
20545 + mck = clk_get(&pdev->dev, "pclk");
20546 + if (IS_ERR(mck))
20547 + return PTR_ERR(mck);
20548 + clk_enable(mck);
20549 + chip->mck = mck;
20550 +
20551 + card->private_free = snd_atmel_ac97_destroy;
20552 +
20553 + spin_lock_init(&chip->lock);
20554 + chip->card = card;
20555 + chip->pdev = pdev;
20556 +
20557 + chip->regs = ioremap(regs->start, regs->end - regs->start + 1);
20558 + if (!chip->regs)
20559 + return -ENOMEM;
20560 +
20561 + snd_card_set_dev(card, &pdev->dev);
20562 +
20563 + err = snd_ac97_bus(card, 0, &ops, chip, &chip->ac97_bus);
20564 +
20565 + return err;
20566 +}
20567 +
20568 +static int __devinit snd_atmel_ac97_probe(struct platform_device *pdev)
20569 +{
20570 + static int dev;
20571 + struct snd_card *card;
20572 + struct atmel_ac97 *chip;
20573 + int err;
20574 + int ch;
20575 +
20576 + mutex_init(&opened_mutex);
20577 +
20578 + err = -ENOMEM;
20579 + card = snd_card_new(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
20580 + THIS_MODULE, sizeof(struct atmel_ac97));
20581 + if (!card)
20582 + goto out;
20583 + chip = get_chip(card);
20584 +
20585 + err = snd_atmel_ac97_create(card, pdev);
20586 + if (err)
20587 + goto out_free_card;
20588 +
20589 + snd_atmel_ac97_reset(chip);
20590 +
20591 + err = snd_atmel_ac97_mixer_new(chip);
20592 + if (err)
20593 + goto out_free_card;
20594 +
20595 + err = snd_atmel_ac97_pcm_new(chip);
20596 + if (err)
20597 + goto out_free_card;
20598 +
20599 + /* TODO: Get this information from the platform device */
20600 + chip->dma.req_tx.req.dmac = find_dma_controller(0);
20601 + if (!chip->dma.req_tx.req.dmac) {
20602 + dev_dbg(&chip->pdev->dev, "DMA controller for TX missing\n");
20603 + err = -ENODEV;
20604 + goto out_free_card;
20605 + }
20606 + chip->dma.req_rx.req.dmac = find_dma_controller(0);
20607 + if (!chip->dma.req_rx.req.dmac) {
20608 + dev_dbg(&chip->pdev->dev, "DMA controller for RX missing\n");
20609 + err = -ENODEV;
20610 + goto out_free_card;
20611 + }
20612 +
20613 + chip->dma.rx_periph_id = 3;
20614 + chip->dma.tx_periph_id = 4;
20615 +
20616 + ch = dma_alloc_channel(chip->dma.req_tx.req.dmac);
20617 + if (ch < 0) {
20618 + dev_dbg(&chip->pdev->dev,
20619 + "could not allocate TX DMA channel\n");
20620 + err = ch;
20621 + goto out_free_card;
20622 + }
20623 + chip->dma.req_tx.req.channel = ch;
20624 + chip->dma.req_tx.width = DMA_WIDTH_16BIT;
20625 + chip->dma.req_tx.req.block_complete = atmel_ac97_block_complete;
20626 + chip->dma.req_tx.req.error = atmel_ac97_error;
20627 +
20628 + ch = dma_alloc_channel(chip->dma.req_rx.req.dmac);
20629 + if (ch < 0) {
20630 + dev_dbg(&chip->pdev->dev,
20631 + "could not allocate RX DMA channel\n");
20632 + err = ch;
20633 + goto out_free_card;
20634 + }
20635 + chip->dma.req_rx.req.channel = ch;
20636 + chip->dma.req_rx.width = DMA_WIDTH_16BIT;
20637 + chip->dma.req_rx.req.block_complete = atmel_ac97_block_complete;
20638 + chip->dma.req_rx.req.error = atmel_ac97_error;
20639 +
20640 + strcpy(card->driver, "atmel_ac97c");
20641 + strcpy(card->shortname, "atmel_ac97c");
20642 + sprintf(card->longname, "Atmel AVR32 AC97 controller");
20643 +
20644 + err = snd_card_register(card);
20645 + if (err)
20646 + goto out_free_card;
20647 +
20648 + platform_set_drvdata(pdev, card);
20649 + dev++;
20650 +
20651 + dev_info(&pdev->dev, "Atmel AVR32 AC97 controller at 0x%p\n",
20652 + chip->regs);
20653 +
20654 + return 0;
20655 +
20656 +out_free_card:
20657 + snd_card_free(card);
20658 +out:
20659 + return err;
20660 +}
20661 +
20662 +#ifdef CONFIG_PM
20663 + static int
20664 +snd_atmel_ac97_suspend(struct platform_device *pdev, pm_message_t msg)
20665 +{
20666 + struct snd_card *card = platform_get_drvdata(pdev);
20667 + struct atmel_ac97 *chip = card->private_data;
20668 +
20669 + clk_disable(chip->mck);
20670 +
20671 + return 0;
20672 +}
20673 +
20674 +static int snd_atmel_ac97_resume(struct platform_device *pdev)
20675 +{
20676 + struct snd_card *card = dev_get_drvdata(pdev);
20677 + struct atmel_ac97 *chip = card->private_data;
20678 +
20679 + clk_enable(chip->mck);
20680 +
20681 + return 0;
20682 +}
20683 +#else
20684 +#define snd_atmel_ac97_suspend NULL
20685 +#define snd_atmel_ac97_resume NULL
20686 +#endif
20687 +
20688 +static int __devexit snd_atmel_ac97_remove(struct platform_device *pdev)
20689 +{
20690 + struct snd_card *card = platform_get_drvdata(pdev);
20691 +
20692 + snd_card_free(card);
20693 + platform_set_drvdata(pdev, NULL);
20694 + return 0;
20695 +}
20696 +
20697 +static struct platform_driver atmel_ac97_driver = {
20698 + .remove = __devexit_p(snd_atmel_ac97_remove),
20699 + .driver = {
20700 + .name = "atmel_ac97c",
20701 + },
20702 + .suspend = snd_atmel_ac97_suspend,
20703 + .resume = snd_atmel_ac97_resume,
20704 +};
20705 +
20706 +static int __init atmel_ac97_init(void)
20707 +{
20708 + return platform_driver_probe(&atmel_ac97_driver,
20709 + snd_atmel_ac97_probe);
20710 +}
20711 +module_init(atmel_ac97_init);
20712 +
20713 +static void __exit atmel_ac97_exit(void)
20714 +{
20715 + platform_driver_unregister(&atmel_ac97_driver);
20716 +}
20717 +module_exit(atmel_ac97_exit);
20718 +
20719 +MODULE_LICENSE("GPL");
20720 +MODULE_DESCRIPTION("Driver for Atmel AC97 Controller");
20721 +MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
20722 diff -urN linux-2.6.24.3/sound/avr32/ac97c.h avr32-2.6/sound/avr32/ac97c.h
20723 --- linux-2.6.24.3/sound/avr32/ac97c.h 1970-01-01 01:00:00.000000000 +0100
20724 +++ avr32-2.6/sound/avr32/ac97c.h 2008-04-23 19:33:54.000000000 +0200
20725 @@ -0,0 +1,71 @@
20726 +/*
20727 + * Register definitions for the Atmel AC97 Controller.
20728 + *
20729 + * Copyright (C) 2005-2006 Atmel Corporation
20730 + *
20731 + * This program is free software; you can redistribute it and/or modify
20732 + * it under the terms of the GNU General Public License version 2 as
20733 + * published by the Free Software Foundation.
20734 + */
20735 +#ifndef __SOUND_AVR32_AC97C_H
20736 +#define __SOUND_AVR32_AC97C_H
20737 +
20738 +#define AC97C_MR 0x08
20739 +#define AC97C_ICA 0x10
20740 +#define AC97C_OCA 0x14
20741 +#define AC97C_CARHR 0x20
20742 +#define AC97C_CATHR 0x24
20743 +#define AC97C_CASR 0x28
20744 +#define AC97C_CAMR 0x2c
20745 +#define AC97C_CBRHR 0x30
20746 +#define AC97C_CBTHR 0x34
20747 +#define AC97C_CBSR 0x38
20748 +#define AC97C_CBMR 0x3c
20749 +#define AC97C_CORHR 0x40
20750 +#define AC97C_COTHR 0x44
20751 +#define AC97C_COSR 0x48
20752 +#define AC97C_COMR 0x4c
20753 +#define AC97C_SR 0x50
20754 +#define AC97C_IER 0x54
20755 +#define AC97C_IDR 0x58
20756 +#define AC97C_IMR 0x5c
20757 +#define AC97C_VERSION 0xfc
20758 +
20759 +#define AC97C_CATPR PDC_TPR
20760 +#define AC97C_CATCR PDC_TCR
20761 +#define AC97C_CATNPR PDC_TNPR
20762 +#define AC97C_CATNCR PDC_TNCR
20763 +#define AC97C_CARPR PDC_RPR
20764 +#define AC97C_CARCR PDC_RCR
20765 +#define AC97C_CARNPR PDC_RNPR
20766 +#define AC97C_CARNCR PDC_RNCR
20767 +#define AC97C_PTCR PDC_PTCR
20768 +
20769 +#define AC97C_MR_ENA (1 << 0)
20770 +#define AC97C_MR_WRST (1 << 1)
20771 +#define AC97C_MR_VRA (1 << 2)
20772 +
20773 +#define AC97C_CSR_TXRDY (1 << 0)
20774 +#define AC97C_CSR_UNRUN (1 << 2)
20775 +#define AC97C_CSR_RXRDY (1 << 4)
20776 +#define AC97C_CSR_ENDTX (1 << 10)
20777 +#define AC97C_CSR_ENDRX (1 << 14)
20778 +
20779 +#define AC97C_CMR_SIZE_20 (0 << 16)
20780 +#define AC97C_CMR_SIZE_18 (1 << 16)
20781 +#define AC97C_CMR_SIZE_16 (2 << 16)
20782 +#define AC97C_CMR_SIZE_10 (3 << 16)
20783 +#define AC97C_CMR_CEM_LITTLE (1 << 18)
20784 +#define AC97C_CMR_CEM_BIG (0 << 18)
20785 +#define AC97C_CMR_CENA (1 << 21)
20786 +#define AC97C_CMR_PDCEN (1 << 22)
20787 +
20788 +#define AC97C_SR_CAEVT (1 << 3)
20789 +
20790 +#define AC97C_CH_ASSIGN(slot, channel) \
20791 + (AC97C_CHANNEL_##channel << (3 * (AC97_SLOT_##slot - 3)))
20792 +#define AC97C_CHANNEL_NONE 0x0
20793 +#define AC97C_CHANNEL_A 0x1
20794 +#define AC97C_CHANNEL_B 0x2
20795 +
20796 +#endif /* __SOUND_AVR32_AC97C_H */
20797 diff -urN linux-2.6.24.3/sound/avr32/Kconfig avr32-2.6/sound/avr32/Kconfig
20798 --- linux-2.6.24.3/sound/avr32/Kconfig 1970-01-01 01:00:00.000000000 +0100
20799 +++ avr32-2.6/sound/avr32/Kconfig 2008-04-23 19:33:54.000000000 +0200
20800 @@ -0,0 +1,11 @@
20801 +menu "AVR32 devices"
20802 + depends on SND != n && AVR32
20803 +
20804 +config SND_ATMEL_AC97
20805 + tristate "Atmel AC97 Controller Driver"
20806 + select SND_PCM
20807 + select SND_AC97_CODEC
20808 + help
20809 + ALSA sound driver for the Atmel AC97 controller.
20810 +
20811 +endmenu
20812 diff -urN linux-2.6.24.3/sound/avr32/Makefile avr32-2.6/sound/avr32/Makefile
20813 --- linux-2.6.24.3/sound/avr32/Makefile 1970-01-01 01:00:00.000000000 +0100
20814 +++ avr32-2.6/sound/avr32/Makefile 2008-04-23 19:33:54.000000000 +0200
20815 @@ -0,0 +1,3 @@
20816 +snd-atmel-ac97-objs := ac97c.o
20817 +
20818 +obj-$(CONFIG_SND_ATMEL_AC97) += snd-atmel-ac97.o
20819 diff -urN linux-2.6.24.3/sound/Kconfig avr32-2.6/sound/Kconfig
20820 --- linux-2.6.24.3/sound/Kconfig 2008-02-26 01:20:20.000000000 +0100
20821 +++ avr32-2.6/sound/Kconfig 2008-04-23 19:33:54.000000000 +0200
20822 @@ -63,6 +63,8 @@
20823
20824 source "sound/arm/Kconfig"
20825
20826 +source "sound/avr32/Kconfig"
20827 +
20828 if SPI
20829 source "sound/spi/Kconfig"
20830 endif
20831 diff -urN linux-2.6.24.3/sound/Makefile avr32-2.6/sound/Makefile
20832 --- linux-2.6.24.3/sound/Makefile 2008-02-26 01:20:20.000000000 +0100
20833 +++ avr32-2.6/sound/Makefile 2008-04-23 19:33:54.000000000 +0200
20834 @@ -6,7 +6,7 @@
20835 obj-$(CONFIG_SOUND_PRIME) += oss/
20836 obj-$(CONFIG_DMASOUND) += oss/
20837 obj-$(CONFIG_SND) += core/ i2c/ drivers/ isa/ pci/ ppc/ arm/ sh/ synth/ usb/ \
20838 - sparc/ spi/ parisc/ pcmcia/ mips/ soc/
20839 + sparc/ spi/ parisc/ pcmcia/ mips/ soc/ avr32/
20840 obj-$(CONFIG_SND_AOA) += aoa/
20841
20842 # This one must be compilable even if sound is configured out
20843 diff -urN linux-2.6.24.3/sound/oss/at32_abdac.c avr32-2.6/sound/oss/at32_abdac.c
20844 --- linux-2.6.24.3/sound/oss/at32_abdac.c 1970-01-01 01:00:00.000000000 +0100
20845 +++ avr32-2.6/sound/oss/at32_abdac.c 2008-04-23 19:33:54.000000000 +0200
20846 @@ -0,0 +1,722 @@
20847 +/*
20848 + * OSS Sound Driver for the Atmel AT32 on-chip DAC.
20849 + *
20850 + * Copyright (C) 2006 Atmel Corporation
20851 + *
20852 + * This program is free software; you can redistribute it and/or modify
20853 + * it under the terms of the GNU General Public License version 2 as
20854 + * published by the Free Software Foundation.
20855 + */
20856 +#include <linux/clk.h>
20857 +#include <linux/dma-mapping.h>
20858 +#include <linux/fs.h>
20859 +#include <linux/init.h>
20860 +#include <linux/interrupt.h>
20861 +#include <linux/kernel.h>
20862 +#include <linux/module.h>
20863 +#include <linux/platform_device.h>
20864 +#include <linux/sound.h>
20865 +#include <linux/soundcard.h>
20866 +
20867 +#include <asm/byteorder.h>
20868 +#include <asm/dma-controller.h>
20869 +#include <asm/io.h>
20870 +#include <asm/uaccess.h>
20871 +
20872 +/* We want to use the "bizarre" swap-bytes-in-each-halfword macro */
20873 +#include <linux/byteorder/swabb.h>
20874 +
20875 +#include "at32_abdac.h"
20876 +
20877 +#define DMA_BUFFER_SIZE 32768
20878 +#define DMA_PERIOD_SHIFT 10
20879 +#define DMA_PERIOD_SIZE (1 << DMA_PERIOD_SHIFT)
20880 +#define DMA_WRITE_THRESHOLD DMA_PERIOD_SIZE
20881 +
20882 +struct sound_settings {
20883 + unsigned int format;
20884 + unsigned int channels;
20885 + unsigned int sample_rate;
20886 + /* log2(bytes per sample) */
20887 + unsigned int input_order;
20888 +};
20889 +
20890 +struct at32_dac {
20891 + spinlock_t lock;
20892 + void __iomem *regs;
20893 +
20894 + /* head and tail refer to number of words */
20895 + struct {
20896 + u32 *buf;
20897 + int head;
20898 + int tail;
20899 + } dma;
20900 +
20901 + struct semaphore sem;
20902 + wait_queue_head_t write_wait;
20903 +
20904 + /*
20905 + * Read at most ucount bytes from ubuf, translate to 2-channel
20906 + * signed 16-bit big endian format and write to the DMA buffer
20907 + * as long as there is room left. Return the number of bytes
20908 + * successfully copied from ubuf, or -EFAULT if the first
20909 + * sample from ubuf couldn't be read. This function is not
20910 + * called unless there is room for at least one sample (4
20911 + * bytes) in the DMA buffer.
20912 + */
20913 + ssize_t (*trans)(struct at32_dac *dac, const char __user *ubuf,
20914 + size_t ucount);
20915 +
20916 + struct sound_settings dsp_settings;
20917 + struct dma_request_cyclic req;
20918 +
20919 + struct clk *mck;
20920 + struct clk *sample_clk;
20921 + struct platform_device *pdev;
20922 + int busy;
20923 + int playing;
20924 + int dev_dsp;
20925 +};
20926 +static struct at32_dac *the_dac;
20927 +
20928 +static inline unsigned int abdac_get_head(struct at32_dac *dac)
20929 +{
20930 + return dac->dma.head & ((DMA_BUFFER_SIZE / 4) - 1);
20931 +}
20932 +
20933 +static inline unsigned int abdac_get_tail(struct at32_dac *dac)
20934 +{
20935 + return dac->dma.tail & ((DMA_BUFFER_SIZE / 4) - 1);
20936 +}
20937 +
20938 +static inline unsigned int abdac_dma_space(struct at32_dac *dac)
20939 +{
20940 + unsigned int space;
20941 +
20942 + space = ((dac->dma.tail - dac->dma.head - 1)
20943 + & ((DMA_BUFFER_SIZE / 4) - 1));
20944 + return space;
20945 +}
20946 +
20947 +static void abdac_update_dma_tail(struct at32_dac *dac)
20948 +{
20949 + dma_addr_t dma_addr;
20950 + unsigned int new_tail;
20951 +
20952 + if (dac->playing) {
20953 + dma_addr = dma_get_current_pos(dac->req.req.dmac,
20954 + dac->req.req.channel);
20955 + new_tail = (dma_addr - dac->req.buffer_start) / 4;
20956 + if (new_tail >= dac->dma.head
20957 + && (dac->dma.tail < dac->dma.head
20958 + || dac->dma.tail > new_tail))
20959 + dev_notice(&dac->pdev->dev, "DMA underrun detected!\n");
20960 + dac->dma.tail = new_tail;
20961 + dev_dbg(&dac->pdev->dev, "update tail: 0x%x - 0x%x = %u\n",
20962 + dma_addr, dac->req.buffer_start, dac->dma.tail);
20963 + }
20964 +}
20965 +
20966 +static int abdac_start(struct at32_dac *dac)
20967 +{
20968 + int ret;
20969 +
20970 + if (dac->playing)
20971 + return 0;
20972 +
20973 + memset(dac->dma.buf, 0, DMA_BUFFER_SIZE);
20974 +
20975 + clk_enable(dac->sample_clk);
20976 +
20977 + ret = dma_prepare_request_cyclic(dac->req.req.dmac, &dac->req);
20978 + if (ret)
20979 + goto out_stop_clock;
20980 +
20981 + dev_dbg(&dac->pdev->dev, "starting DMA...\n");
20982 + ret = dma_start_request(dac->req.req.dmac, dac->req.req.channel);
20983 + if (ret)
20984 + goto out_stop_request;
20985 +
20986 + dac_writel(dac, CTRL, DAC_BIT(EN));
20987 + dac->playing = 1;
20988 +
20989 + return 0;
20990 +
20991 +out_stop_request:
20992 + dma_stop_request(dac->req.req.dmac,
20993 + dac->req.req.channel);
20994 +out_stop_clock:
20995 + clk_disable(dac->sample_clk);
20996 + return ret;
20997 +}
20998 +
20999 +static int abdac_stop(struct at32_dac *dac)
21000 +{
21001 + if (dac->playing) {
21002 + dma_stop_request(dac->req.req.dmac, dac->req.req.channel);
21003 + dac_writel(dac, DATA, 0);
21004 + dac_writel(dac, CTRL, 0);
21005 + dac->playing = 0;
21006 + clk_disable(dac->sample_clk);
21007 + }
21008 +
21009 + return 0;
21010 +}
21011 +
21012 +static int abdac_dma_prepare(struct at32_dac *dac)
21013 +{
21014 + dac->dma.buf = dma_alloc_coherent(&dac->pdev->dev, DMA_BUFFER_SIZE,
21015 + &dac->req.buffer_start, GFP_KERNEL);
21016 + if (!dac->dma.buf)
21017 + return -ENOMEM;
21018 +
21019 + dac->dma.head = dac->dma.tail = 0;
21020 + dac->req.periods = DMA_BUFFER_SIZE / DMA_PERIOD_SIZE;
21021 + dac->req.buffer_size = DMA_BUFFER_SIZE;
21022 +
21023 + return 0;
21024 +}
21025 +
21026 +static void abdac_dma_cleanup(struct at32_dac *dac)
21027 +{
21028 + if (dac->dma.buf)
21029 + dma_free_coherent(&dac->pdev->dev, DMA_BUFFER_SIZE,
21030 + dac->dma.buf, dac->req.buffer_start);
21031 + dac->dma.buf = NULL;
21032 +}
21033 +
21034 +static void abdac_dma_block_complete(struct dma_request *req)
21035 +{
21036 + struct dma_request_cyclic *creq = to_dma_request_cyclic(req);
21037 + struct at32_dac *dac = container_of(creq, struct at32_dac, req);
21038 +
21039 + wake_up(&dac->write_wait);
21040 +}
21041 +
21042 +static void abdac_dma_error(struct dma_request *req)
21043 +{
21044 + struct dma_request_cyclic *creq = to_dma_request_cyclic(req);
21045 + struct at32_dac *dac = container_of(creq, struct at32_dac, req);
21046 +
21047 + dev_err(&dac->pdev->dev, "DMA error\n");
21048 +}
21049 +
21050 +static irqreturn_t abdac_interrupt(int irq, void *dev_id)
21051 +{
21052 + struct at32_dac *dac = dev_id;
21053 + u32 status;
21054 +
21055 + status = dac_readl(dac, INT_STATUS);
21056 + if (status & DAC_BIT(UNDERRUN)) {
21057 + dev_err(&dac->pdev->dev, "Underrun detected!\n");
21058 + dac_writel(dac, INT_CLR, DAC_BIT(UNDERRUN));
21059 + } else {
21060 + dev_err(&dac->pdev->dev, "Spurious interrupt (status=0x%x)\n",
21061 + status);
21062 + dac_writel(dac, INT_CLR, status);
21063 + }
21064 +
21065 + return IRQ_HANDLED;
21066 +}
21067 +
21068 +static ssize_t trans_s16be(struct at32_dac *dac, const char __user *ubuf,
21069 + size_t ucount)
21070 +{
21071 + ssize_t ret;
21072 +
21073 + if (dac->dsp_settings.channels == 2) {
21074 + const u32 __user *up = (const u32 __user *)ubuf;
21075 + u32 sample;
21076 +
21077 + for (ret = 0; ret < (ssize_t)(ucount - 3); ret += 4) {
21078 + if (!abdac_dma_space(dac))
21079 + break;
21080 +
21081 + if (unlikely(__get_user(sample, up++))) {
21082 + if (ret == 0)
21083 + ret = -EFAULT;
21084 + break;
21085 + }
21086 + dac->dma.buf[abdac_get_head(dac)] = sample;
21087 + dac->dma.head++;
21088 + }
21089 + } else {
21090 + const u16 __user *up = (const u16 __user *)ubuf;
21091 + u16 sample;
21092 +
21093 + for (ret = 0; ret < (ssize_t)(ucount - 1); ret += 2) {
21094 + if (!abdac_dma_space(dac))
21095 + break;
21096 +
21097 + if (unlikely(__get_user(sample, up++))) {
21098 + if (ret == 0)
21099 + ret = -EFAULT;
21100 + break;
21101 + }
21102 + dac->dma.buf[abdac_get_head(dac)]
21103 + = (sample << 16) | sample;
21104 + dac->dma.head++;
21105 + }
21106 + }
21107 +
21108 + return ret;
21109 +}
21110 +
21111 +static ssize_t trans_s16le(struct at32_dac *dac, const char __user *ubuf,
21112 + size_t ucount)
21113 +{
21114 + ssize_t ret;
21115 +
21116 + if (dac->dsp_settings.channels == 2) {
21117 + const u32 __user *up = (const u32 __user *)ubuf;
21118 + u32 sample;
21119 +
21120 + for (ret = 0; ret < (ssize_t)(ucount - 3); ret += 4) {
21121 + if (!abdac_dma_space(dac))
21122 + break;
21123 +
21124 + if (unlikely(__get_user(sample, up++))) {
21125 + if (ret == 0)
21126 + ret = -EFAULT;
21127 + break;
21128 + }
21129 + /* Swap bytes in each halfword */
21130 + dac->dma.buf[abdac_get_head(dac)] = swahb32(sample);
21131 + dac->dma.head++;
21132 + }
21133 + } else {
21134 + const u16 __user *up = (const u16 __user *)ubuf;
21135 + u16 sample;
21136 +
21137 + for (ret = 0; ret < (ssize_t)(ucount - 1); ret += 2) {
21138 + if (!abdac_dma_space(dac))
21139 + break;
21140 +
21141 + if (unlikely(__get_user(sample, up++))) {
21142 + if (ret == 0)
21143 + ret = -EFAULT;
21144 + break;
21145 + }
21146 + sample = swab16(sample);
21147 + dac->dma.buf[abdac_get_head(dac)]
21148 + = (sample << 16) | sample;
21149 + dac->dma.head++;
21150 + }
21151 + }
21152 +
21153 + return ret;
21154 +}
21155 +
21156 +static ssize_t abdac_dma_translate_from_user(struct at32_dac *dac,
21157 + const char __user *buffer,
21158 + size_t count)
21159 +{
21160 + /* At least one buffer must be available at this point */
21161 + dev_dbg(&dac->pdev->dev, "copying %zu bytes from user...\n", count);
21162 +
21163 + return dac->trans(dac, buffer, count);
21164 +}
21165 +
21166 +static int abdac_set_format(struct at32_dac *dac, int format)
21167 +{
21168 + unsigned int order;
21169 +
21170 + switch (format) {
21171 + case AFMT_S16_BE:
21172 + order = 1;
21173 + dac->trans = trans_s16be;
21174 + break;
21175 + case AFMT_S16_LE:
21176 + order = 1;
21177 + dac->trans = trans_s16le;
21178 + break;
21179 + default:
21180 + dev_dbg(&dac->pdev->dev, "unsupported format: %d\n", format);
21181 + return -EINVAL;
21182 + }
21183 +
21184 + if (dac->dsp_settings.channels == 2)
21185 + order++;
21186 +
21187 + dac->dsp_settings.input_order = order;
21188 + dac->dsp_settings.format = format;
21189 + return 0;
21190 +}
21191 +
21192 +static int abdac_set_sample_rate(struct at32_dac *dac, unsigned long rate)
21193 +{
21194 + unsigned long new_rate;
21195 + int ret;
21196 +
21197 + ret = clk_set_rate(dac->sample_clk, 256 * rate);
21198 + if (ret < 0)
21199 + return ret;
21200 +
21201 + /* TODO: mplayer seems to have a problem with this */
21202 +#if 0
21203 + new_rate = clk_get_rate(dac->sample_clk);
21204 + dac->dsp_settings.sample_rate = new_rate / 256;
21205 +#else
21206 + dac->dsp_settings.sample_rate = rate;
21207 +#endif
21208 +
21209 + return 0;
21210 +}
21211 +
21212 +static ssize_t abdac_dsp_write(struct file *file,
21213 + const char __user *buffer,
21214 + size_t count, loff_t *ppos)
21215 +{
21216 + struct at32_dac *dac = file->private_data;
21217 + DECLARE_WAITQUEUE(wait, current);
21218 + unsigned int avail;
21219 + ssize_t copied;
21220 + ssize_t ret;
21221 +
21222 + /* Avoid address space checking in the translation functions */
21223 + if (!access_ok(buffer, count, VERIFY_READ))
21224 + return -EFAULT;
21225 +
21226 + down(&dac->sem);
21227 +
21228 + if (!dac->dma.buf) {
21229 + ret = abdac_dma_prepare(dac);
21230 + if (ret)
21231 + goto out;
21232 + }
21233 +
21234 + add_wait_queue(&dac->write_wait, &wait);
21235 + ret = 0;
21236 + while (count > 0) {
21237 + do {
21238 + abdac_update_dma_tail(dac);
21239 + avail = abdac_dma_space(dac);
21240 + set_current_state(TASK_INTERRUPTIBLE);
21241 + if (avail >= DMA_WRITE_THRESHOLD)
21242 + break;
21243 +
21244 + if (file->f_flags & O_NONBLOCK) {
21245 + if (!ret)
21246 + ret = -EAGAIN;
21247 + goto out;
21248 + }
21249 +
21250 + pr_debug("Going to wait (avail = %u, count = %zu)\n",
21251 + avail, count);
21252 +
21253 + up(&dac->sem);
21254 + schedule();
21255 + if (signal_pending(current)) {
21256 + if (!ret)
21257 + ret = -ERESTARTSYS;
21258 + goto out_nosem;
21259 + }
21260 + down(&dac->sem);
21261 + } while (1);
21262 +
21263 + copied = abdac_dma_translate_from_user(dac, buffer, count);
21264 + if (copied < 0) {
21265 + if (!ret)
21266 + ret = -EFAULT;
21267 + goto out;
21268 + }
21269 +
21270 + abdac_start(dac);
21271 +
21272 + count -= copied;
21273 + ret += copied;
21274 + }
21275 +
21276 +out:
21277 + up(&dac->sem);
21278 +out_nosem:
21279 + remove_wait_queue(&dac->write_wait, &wait);
21280 + set_current_state(TASK_RUNNING);
21281 + return ret;
21282 +}
21283 +
21284 +static int abdac_dsp_ioctl(struct inode *inode, struct file *file,
21285 + unsigned int cmd, unsigned long arg)
21286 +{
21287 + struct at32_dac *dac = file->private_data;
21288 + int __user *up = (int __user *)arg;
21289 + struct audio_buf_info abinfo;
21290 + int val, ret;
21291 +
21292 + switch (cmd) {
21293 + case OSS_GETVERSION:
21294 + return put_user(SOUND_VERSION, up);
21295 +
21296 + case SNDCTL_DSP_SPEED:
21297 + if (get_user(val, up))
21298 + return -EFAULT;
21299 + if (val >= 0) {
21300 + abdac_stop(dac);
21301 + ret = abdac_set_sample_rate(dac, val);
21302 + if (ret)
21303 + return ret;
21304 + }
21305 + return put_user(dac->dsp_settings.sample_rate, up);
21306 +
21307 + case SNDCTL_DSP_STEREO:
21308 + if (get_user(val, up))
21309 + return -EFAULT;
21310 + abdac_stop(dac);
21311 + if (val && dac->dsp_settings.channels == 1)
21312 + dac->dsp_settings.input_order++;
21313 + else if (!val && dac->dsp_settings.channels != 1)
21314 + dac->dsp_settings.input_order--;
21315 + dac->dsp_settings.channels = val ? 2 : 1;
21316 + return 0;
21317 +
21318 + case SNDCTL_DSP_CHANNELS:
21319 + if (get_user(val, up))
21320 + return -EFAULT;
21321 +
21322 + if (val) {
21323 + if (val < 0 || val > 2)
21324 + return -EINVAL;
21325 +
21326 + abdac_stop(dac);
21327 + dac->dsp_settings.input_order
21328 + += val - dac->dsp_settings.channels;
21329 + dac->dsp_settings.channels = val;
21330 + }
21331 + return put_user(val, (int *)arg);
21332 +
21333 + case SNDCTL_DSP_GETFMTS:
21334 + return put_user(AFMT_S16_BE | AFMT_S16_BE, up);
21335 +
21336 + case SNDCTL_DSP_SETFMT:
21337 + if (get_user(val, up))
21338 + return -EFAULT;
21339 +
21340 + if (val == AFMT_QUERY) {
21341 + val = dac->dsp_settings.format;
21342 + } else {
21343 + ret = abdac_set_format(dac, val);
21344 + if (ret)
21345 + return ret;
21346 + }
21347 + return put_user(val, up);
21348 +
21349 + case SNDCTL_DSP_GETOSPACE:
21350 + abdac_update_dma_tail(dac);
21351 + abinfo.fragsize = ((1 << dac->dsp_settings.input_order)
21352 + * (DMA_PERIOD_SIZE / 4));
21353 + abinfo.bytes = (abdac_dma_space(dac)
21354 + << dac->dsp_settings.input_order);
21355 + abinfo.fragstotal = ((DMA_BUFFER_SIZE * 4)
21356 + >> (DMA_PERIOD_SHIFT
21357 + + dac->dsp_settings.input_order));
21358 + abinfo.fragments = ((abinfo.bytes
21359 + >> dac->dsp_settings.input_order)
21360 + / (DMA_PERIOD_SIZE / 4));
21361 + pr_debug("fragments=%d fragstotal=%d fragsize=%d bytes=%d\n",
21362 + abinfo.fragments, abinfo.fragstotal, abinfo.fragsize,
21363 + abinfo.bytes);
21364 + return copy_to_user(up, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
21365 +
21366 + default:
21367 + dev_dbg(&dac->pdev->dev, "Unimplemented ioctl cmd: 0x%x\n", cmd);
21368 + return -EINVAL;
21369 + }
21370 +}
21371 +
21372 +static int abdac_dsp_open(struct inode *inode, struct file *file)
21373 +{
21374 + struct at32_dac *dac = the_dac;
21375 + int ret;
21376 +
21377 + if (file->f_mode & FMODE_READ)
21378 + return -ENXIO;
21379 +
21380 + down(&dac->sem);
21381 + ret = -EBUSY;
21382 + if (dac->busy)
21383 + goto out;
21384 +
21385 + dac->dma.head = dac->dma.tail = 0;
21386 +
21387 + /* FIXME: What are the correct defaults? */
21388 + dac->dsp_settings.channels = 2;
21389 + abdac_set_format(dac, AFMT_S16_BE);
21390 + ret = abdac_set_sample_rate(dac, 8000);
21391 + if (ret)
21392 + goto out;
21393 +
21394 + file->private_data = dac;
21395 + dac->busy = 1;
21396 +
21397 + ret = 0;
21398 +
21399 +out:
21400 + up(&dac->sem);
21401 + return ret;
21402 +}
21403 +
21404 +static int abdac_dsp_release(struct inode *inode, struct file *file)
21405 +{
21406 + struct at32_dac *dac = file->private_data;
21407 +
21408 + down(&dac->sem);
21409 +
21410 + abdac_stop(dac);
21411 + abdac_dma_cleanup(dac);
21412 + dac->busy = 0;
21413 +
21414 + up(&dac->sem);
21415 +
21416 + return 0;
21417 +}
21418 +
21419 +static struct file_operations abdac_dsp_fops = {
21420 + .owner = THIS_MODULE,
21421 + .llseek = no_llseek,
21422 + .write = abdac_dsp_write,
21423 + .ioctl = abdac_dsp_ioctl,
21424 + .open = abdac_dsp_open,
21425 + .release = abdac_dsp_release,
21426 +};
21427 +
21428 +static int __init abdac_probe(struct platform_device *pdev)
21429 +{
21430 + struct at32_dac *dac;
21431 + struct resource *regs;
21432 + struct clk *mck;
21433 + struct clk *sample_clk;
21434 + int irq;
21435 + int ret;
21436 +
21437 + if (the_dac)
21438 + return -EBUSY;
21439 +
21440 + regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
21441 + if (!regs)
21442 + return -ENXIO;
21443 + irq = platform_get_irq(pdev, 0);
21444 + if (irq < 0)
21445 + return irq;
21446 +
21447 + mck = clk_get(&pdev->dev, "pclk");
21448 + if (IS_ERR(mck))
21449 + return PTR_ERR(mck);
21450 + sample_clk = clk_get(&pdev->dev, "sample_clk");
21451 + if (IS_ERR(sample_clk)) {
21452 + ret = PTR_ERR(sample_clk);
21453 + goto out_put_mck;
21454 + }
21455 + clk_enable(mck);
21456 +
21457 + ret = -ENOMEM;
21458 + dac = kzalloc(sizeof(struct at32_dac), GFP_KERNEL);
21459 + if (!dac)
21460 + goto out_disable_clk;
21461 +
21462 + spin_lock_init(&dac->lock);
21463 + init_MUTEX(&dac->sem);
21464 + init_waitqueue_head(&dac->write_wait);
21465 + dac->pdev = pdev;
21466 + dac->mck = mck;
21467 + dac->sample_clk = sample_clk;
21468 +
21469 + dac->regs = ioremap(regs->start, regs->end - regs->start + 1);
21470 + if (!dac->regs)
21471 + goto out_free_dac;
21472 +
21473 + ret = request_irq(irq, abdac_interrupt, 0, "dac", dac);
21474 + if (ret)
21475 + goto out_unmap_regs;
21476 +
21477 + /* FIXME */
21478 + dac->req.req.dmac = find_dma_controller(0);
21479 + if (!dac->req.req.dmac)
21480 + goto out_free_irq;
21481 +
21482 + ret = dma_alloc_channel(dac->req.req.dmac);
21483 + if (ret < 0)
21484 + goto out_free_irq;
21485 +
21486 + dac->req.req.channel = ret;
21487 + dac->req.req.block_complete = abdac_dma_block_complete;
21488 + dac->req.req.error = abdac_dma_error;
21489 + dac->req.data_reg = regs->start + DAC_DATA;
21490 + dac->req.periph_id = 2; /* FIXME */
21491 + dac->req.direction = DMA_DIR_MEM_TO_PERIPH;
21492 + dac->req.width = DMA_WIDTH_32BIT;
21493 +
21494 + /* Make sure the DAC is silent and disabled */
21495 + dac_writel(dac, DATA, 0);
21496 + dac_writel(dac, CTRL, 0);
21497 +
21498 + ret = register_sound_dsp(&abdac_dsp_fops, -1);
21499 + if (ret < 0)
21500 + goto out_free_dma;
21501 + dac->dev_dsp = ret;
21502 +
21503 + /* TODO: Register mixer */
21504 +
21505 + the_dac = dac;
21506 + platform_set_drvdata(pdev, dac);
21507 +
21508 + return 0;
21509 +
21510 +out_free_dma:
21511 + dma_release_channel(dac->req.req.dmac, dac->req.req.channel);
21512 +out_free_irq:
21513 + free_irq(irq, dac);
21514 +out_unmap_regs:
21515 + iounmap(dac->regs);
21516 +out_free_dac:
21517 + kfree(dac);
21518 +out_disable_clk:
21519 + clk_disable(mck);
21520 + clk_put(sample_clk);
21521 +out_put_mck:
21522 + clk_put(mck);
21523 + return ret;
21524 +}
21525 +
21526 +static int __exit abdac_remove(struct platform_device *pdev)
21527 +{
21528 + struct at32_dac *dac;
21529 +
21530 + dac = platform_get_drvdata(pdev);
21531 + if (dac) {
21532 + unregister_sound_dsp(dac->dev_dsp);
21533 + dma_release_channel(dac->req.req.dmac, dac->req.req.channel);
21534 + free_irq(platform_get_irq(pdev, 0), dac);
21535 + iounmap(dac->regs);
21536 + clk_disable(dac->mck);
21537 + clk_put(dac->sample_clk);
21538 + clk_put(dac->mck);
21539 + kfree(dac);
21540 + platform_set_drvdata(pdev, NULL);
21541 + the_dac = NULL;
21542 + }
21543 +
21544 + return 0;
21545 +}
21546 +
21547 +static struct platform_driver abdac_driver = {
21548 + .remove = __exit_p(abdac_remove),
21549 + .driver = {
21550 + .name = "abdac",
21551 + },
21552 +};
21553 +
21554 +static int __init abdac_init(void)
21555 +{
21556 + return platform_driver_probe(&abdac_driver, abdac_probe);
21557 +}
21558 +module_init(abdac_init);
21559 +
21560 +static void __exit abdac_exit(void)
21561 +{
21562 + platform_driver_unregister(&abdac_driver);
21563 +}
21564 +module_exit(abdac_exit);
21565 +
21566 +MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
21567 +MODULE_DESCRIPTION("Sound Driver for the Atmel AT32 ABDAC");
21568 +MODULE_LICENSE("GPL");
21569 diff -urN linux-2.6.24.3/sound/oss/at32_abdac.h avr32-2.6/sound/oss/at32_abdac.h
21570 --- linux-2.6.24.3/sound/oss/at32_abdac.h 1970-01-01 01:00:00.000000000 +0100
21571 +++ avr32-2.6/sound/oss/at32_abdac.h 2008-04-23 19:33:54.000000000 +0200
21572 @@ -0,0 +1,59 @@
21573 +/*
21574 + * Register definitions for the Atmel AT32 on-chip DAC.
21575 + *
21576 + * Copyright (C) 2006 Atmel Corporation
21577 + *
21578 + * This program is free software; you can redistribute it and/or modify
21579 + * it under the terms of the GNU General Public License version 2 as
21580 + * published by the Free Software Foundation.
21581 + */
21582 +#ifndef __SOUND_OSS_AT32_ABDAC_H__
21583 +#define __SOUND_OSS_AT32_ABDAC_H__
21584 +
21585 +/* DAC register offsets */
21586 +#define DAC_DATA 0x0000
21587 +#define DAC_CTRL 0x0008
21588 +#define DAC_INT_MASK 0x000c
21589 +#define DAC_INT_EN 0x0010
21590 +#define DAC_INT_DIS 0x0014
21591 +#define DAC_INT_CLR 0x0018
21592 +#define DAC_INT_STATUS 0x001c
21593 +#define DAC_PDC_DATA 0x0020
21594 +
21595 +/* Bitfields in CTRL */
21596 +#define DAC_SWAP_OFFSET 30
21597 +#define DAC_SWAP_SIZE 1
21598 +#define DAC_EN_OFFSET 31
21599 +#define DAC_EN_SIZE 1
21600 +
21601 +/* Bitfields in INT_MASK/INT_EN/INT_DIS/INT_STATUS/INT_CLR */
21602 +#define DAC_UNDERRUN_OFFSET 28
21603 +#define DAC_UNDERRUN_SIZE 1
21604 +#define DAC_TX_READY_OFFSET 29
21605 +#define DAC_TX_READY_SIZE 1
21606 +#define DAC_TX_BUFFER_EMPTY_OFFSET 30
21607 +#define DAC_TX_BUFFER_EMPTY_SIZE 1
21608 +#define DAC_CHANNEL_TX_END_OFFSET 31
21609 +#define DAC_CHANNEL_TX_END_SIZE 1
21610 +
21611 +/* Bit manipulation macros */
21612 +#define DAC_BIT(name) \
21613 + (1 << DAC_##name##_OFFSET)
21614 +#define DAC_BF(name, value) \
21615 + (((value) & ((1 << DAC_##name##_SIZE) - 1)) \
21616 + << DAC_##name##_OFFSET)
21617 +#define DAC_BFEXT(name, value) \
21618 + (((value) >> DAC_##name##_OFFSET) \
21619 + & ((1 << DAC_##name##_SIZE) - 1))
21620 +#define DAC_BFINS(name, value, old) \
21621 + (((old) & ~(((1 << DAC_##name##_SIZE) - 1) \
21622 + << DAC_##name##_OFFSET)) \
21623 + | DAC_BF(name,value))
21624 +
21625 +/* Register access macros */
21626 +#define dac_readl(port, reg) \
21627 + __raw_readl((port)->regs + DAC_##reg)
21628 +#define dac_writel(port, reg, value) \
21629 + __raw_writel((value), (port)->regs + DAC_##reg)
21630 +
21631 +#endif /* __SOUND_OSS_AT32_ABDAC_H__ */
21632 diff -urN linux-2.6.24.3/sound/oss/Kconfig avr32-2.6/sound/oss/Kconfig
21633 --- linux-2.6.24.3/sound/oss/Kconfig 2008-02-26 01:20:20.000000000 +0100
21634 +++ avr32-2.6/sound/oss/Kconfig 2008-04-23 19:33:54.000000000 +0200
21635 @@ -654,3 +654,7 @@
21636 int "DAC channel"
21637 default "1"
21638 depends on SOUND_SH_DAC_AUDIO
21639 +
21640 +config SOUND_AT32_ABDAC
21641 + tristate "Atmel AT32 Audio Bitstream DAC (ABDAC) support"
21642 + depends on SOUND_PRIME && AVR32
21643 diff -urN linux-2.6.24.3/sound/oss/Makefile avr32-2.6/sound/oss/Makefile
21644 --- linux-2.6.24.3/sound/oss/Makefile 2008-02-26 01:20:20.000000000 +0100
21645 +++ avr32-2.6/sound/oss/Makefile 2008-04-23 20:12:49.000000000 +0200
21646 @@ -10,6 +10,7 @@
21647
21648 # Please leave it as is, cause the link order is significant !
21649
21650 +obj-$(CONFIG_SOUND_AT32_ABDAC) += at32_abdac.o
21651 obj-$(CONFIG_SOUND_SH_DAC_AUDIO) += sh_dac_audio.o
21652 obj-$(CONFIG_SOUND_HAL2) += hal2.o
21653 obj-$(CONFIG_SOUND_AEDSP16) += aedsp16.o
21654 diff -urN linux-2.6.24.3/sound/spi/at73c213.c avr32-2.6/sound/spi/at73c213.c
21655 --- linux-2.6.24.3/sound/spi/at73c213.c 2008-02-26 01:20:20.000000000 +0100
21656 +++ avr32-2.6/sound/spi/at73c213.c 2008-04-23 20:12:51.000000000 +0200
21657 @@ -744,7 +744,7 @@
21658 /*
21659 * Device functions
21660 */
21661 -static int snd_at73c213_ssc_init(struct snd_at73c213 *chip)
21662 +static int __devinit snd_at73c213_ssc_init(struct snd_at73c213 *chip)
21663 {
21664 /*
21665 * Continuous clock output.
21666 @@ -774,7 +774,7 @@
21667 return 0;
21668 }
21669
21670 -static int snd_at73c213_chip_init(struct snd_at73c213 *chip)
21671 +static int __devinit snd_at73c213_chip_init(struct snd_at73c213 *chip)
21672 {
21673 int retval;
21674 unsigned char dac_ctrl = 0;
21675 @@ -939,7 +939,7 @@
21676 return retval;
21677 }
21678
21679 -static int snd_at73c213_probe(struct spi_device *spi)
21680 +static int __devinit snd_at73c213_probe(struct spi_device *spi)
21681 {
21682 struct snd_card *card;
21683 struct snd_at73c213 *chip;
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