target/linux/generic-2.6/files/drivers/net/phy/ar8216.h

   1 /*
   2  * ar8216.h: AR8216 switch driver
   3  *
   4  * Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version 2
   9  * of the License, or (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  */
  16
  17 #ifndef __AR8216_H
  18 #define __AR8216_H
  19
  20 #define BITS(_s, _n)    (((1UL << (_n)) - 1) << _s)
  21
  22 #define AR8216_PORT_CPU 0
  23 #define AR8216_NUM_PORTS        6
  24 #define AR8216_NUM_VLANS        16
  25
  26 #define AR8216_REG_CTRL                 0x0000
  27 #define   AR8216_CTRL_RESET             BIT(31)
  28
  29 #define AR8216_REG_GLOBAL_CTRL          0x0030
  30 #define   AR8216_GCTRL_MTU              BITS(0, 10)
  31
  32 #define AR8216_REG_VTU                  0x0040
  33 #define   AR8216_VTU_OP                 BITS(0, 3)
  34 #define   AR8216_VTU_OP_NOOP            0x0
  35 #define   AR8216_VTU_OP_FLUSH           0x1
  36 #define   AR8216_VTU_OP_LOAD            0x2
  37 #define   AR8216_VTU_OP_PURGE           0x3
  38 #define   AR8216_VTU_OP_REMOVE_PORT     0x4
  39 #define   AR8216_VTU_ACTIVE             BIT(3)
  40 #define   AR8216_VTU_FULL               BIT(4)
  41 #define   AR8216_VTU_PORT               BITS(8, 4)
  42 #define   AR8216_VTU_PORT_S             8
  43 #define   AR8216_VTU_VID                BITS(16, 12)
  44 #define   AR8216_VTU_VID_S              16
  45 #define   AR8216_VTU_PRIO               BITS(28, 3)
  46 #define   AR8216_VTU_PRIO_S             28
  47 #define   AR8216_VTU_PRIO_EN            BIT(31)
  48
  49 #define AR8216_REG_VTU_DATA             0x0044
  50 #define   AR8216_VTUDATA_MEMBER         BITS(0, 10)
  51 #define   AR8216_VTUDATA_VALID          BIT(11)
  52
  53 #define AR8216_REG_ATU                  0x0050
  54 #define   AR8216_ATU_OP                 BITS(0, 3)
  55 #define   AR8216_ATU_OP_NOOP            0x0
  56 #define   AR8216_ATU_OP_FLUSH           0x1
  57 #define   AR8216_ATU_OP_LOAD            0x2
  58 #define   AR8216_ATU_OP_PURGE           0x3
  59 #define   AR8216_ATU_OP_FLUSH_LOCKED    0x4
  60 #define   AR8216_ATU_OP_FLUSH_UNICAST   0x5
  61 #define   AR8216_ATU_OP_GET_NEXT        0x6
  62 #define   AR8216_ATU_ACTIVE             BIT(3)
  63 #define   AR8216_ATU_PORT_NUM           BITS(8, 4)
  64 #define   AR8216_ATU_FULL_VIO           BIT(12)
  65 #define   AR8216_ATU_ADDR4              BIT(16, 8)
  66 #define   AR8216_ATU_ADDR5              BIT(24, 8)
  67
  68 #define AR8216_REG_ATU_DATA             0x0054
  69 #define   AR8216_ATU_ADDR3              BIT(0, 8)
  70 #define   AR8216_ATU_ADDR2              BIT(8, 8)
  71 #define   AR8216_ATU_ADDR1              BIT(16, 8)
  72 #define   AR8216_ATU_ADDR0              BIT(24, 8)
  73
  74 #define AR8216_PORT_OFFSET(_i)          (0x0100 * (i + 1))
  75 #define AR8216_REG_PORT_STATUS(_i)      (AR8216_PORT_OFFSET(_i) + 0x0000)
  76 #define   AR8216_PORT_STATUS_SPEED      BIT(0)
  77 #define   AR8216_PORT_STATUS_SPEED_ERR  BIT(1)
  78 #define   AR8216_PORT_STATUS_TXMAC      BIT(2)
  79 #define   AR8216_PORT_STATUS_RXMAC      BIT(3)
  80 #define   AR8216_PORT_STATUS_TXFLOW     BIT(4)
  81 #define   AR8216_PORT_STATUS_RXFLOW     BIT(5)
  82 #define   AR8216_PORT_STATUS_DUPLEX     BIT(6)
  83 #define   AR8216_PORT_STATUS_LINK_UP    BIT(8)
  84 #define   AR8216_PORT_STATUS_LINK_AUTO  BIT(9)
  85 #define   AR8216_PORT_STATUS_LINK_PAUSE BIT(10)
  86
  87 #define AR8216_REG_PORT_CTRL(_i)        (AR8216_PORT_OFFSET(_i) + 0x0004)
  88
  89 /* port forwarding state */
  90 #define   AR8216_PORT_CTRL_STATE        BITS(0, 3)
  91 #define   AR8216_PORT_CTRL_STATE_S      0
  92
  93 #define   AR8216_PORT_CTRL_LEARN_LOCK   BIT(7)
  94
  95 /* egress 802.1q mode */
  96 #define   AR8216_PORT_CTRL_VLAN_MODE    BITS(8, 2)
  97 #define   AR8216_PORT_CTRL_VLAN_MODE_S  8
  98
  99 #define   AR8216_PORT_CTRL_IGMP_SNOOP   BIT(10)
 100 #define   AR8216_PORT_CTRL_HEADER       BIT(11)
 101 #define   AR8216_PORT_CTRL_MAC_LOOP     BIT(12)
 102 #define   AR8216_PORT_CTRL_SINGLE_VLAN  BIT(13)
 103 #define   AR8216_PORT_CTRL_LEARN        BIT(14)
 104 #define   AR8216_PORT_CTRL_MIRROR_TX    BIT(16)
 105 #define   AR8216_PORT_CTRL_MIRROR_RX    BIT(17)
 106
 107 #define AR8216_REG_PORT_VLAN(_i)        (AR8216_PORT_OFFSET(_i) + 0x0008)
 108
 109 #define   AR8216_PORT_VLAN_DEFAULT_ID   BITS(0, 12)
 110 #define   AR8216_PORT_VLAN_DEFAULT_ID_S 0
 111
 112 #define   AR8216_PORT_VLAN_DEST_PORTS   BITS(16, 9)
 113 #define   AR8216_PORT_VLAN_DEST_PORTS_S 16
 114
 115 /* bit0 added to the priority field of egress frames */
 116 #define   AR8216_PORT_VLAN_TX_PRIO      BIT(27)
 117
 118 /* port default priority */
 119 #define   AR8216_PORT_VLAN_PRIORITY     BITS(28, 2)
 120 #define   AR8216_PORT_VLAN_PRIORITY_S   28
 121
 122 /* ingress 802.1q mode */
 123 #define   AR8216_PORT_VLAN_MODE         BITS(30, 2)
 124 #define   AR8216_PORT_VLAN_MODE_S       30
 125
 126 #define AR8216_REG_PORT_RATE(_i)        (AR8216_PORT_OFFSET(_i) + 0x000c)
 127 #define AR8216_REG_PORT_PRIO(_i)        (AR8216_PORT_OFFSET(_i) + 0x0010)
 128
 129 /* ingress 802.1q mode */
 130 enum {
 131         AR8216_IN_PORT_ONLY = 0,
 132         AR8216_IN_PORT_FALLBACK = 1,
 133         AR8216_IN_VLAN_ONLY = 2,
 134         AR8216_IN_SECURE = 3
 135 };
 136
 137 /* egress 802.1q mode */
 138 enum {
 139         AR8216_OUT_KEEP = 0,
 140         AR8216_OUT_STRIP_VLAN = 1,
 141         AR8216_OUT_ADD_VLAN = 2
 142 };
 143
 144 /* port forwarding state */
 145 enum {
 146         AR8216_PORT_STATE_DISABLED = 0,
 147         AR8216_PORT_STATE_BLOCK = 1,
 148         AR8216_PORT_STATE_LISTEN = 2,
 149         AR8216_PORT_STATE_LEARN = 3,
 150         AR8216_PORT_STATE_FORWARD = 4
 151 };
 152
 153 #endif